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DiscussionCite this article: Soref R. 2014 Silicon-basedsilicon–germanium–tin heterostructurephotonics. Phil. Trans. R. Soc. A 372: 20130113.http://dx.doi.org/10.1098/rsta.2013.0113

One contribution of 11 to a Discussion MeetingIssue ‘Beyond Moore’s law’.

Subject Areas:nanotechnology, microsystems, quantumengineering, optics, solid state physics,quantum physics

Keywords:opto-electronics, integrated photonics,mid-infrared devices, silicon, germanium,communications

Author for correspondence:Richard Sorefe-mail: soref@rcn.com

Silicon-basedsilicon–germanium–tinheterostructure photonicsRichard Soref

Department of Physics and the Engineering Program, The Universityof Massachusetts at Boston, 100 Morrissey Boulevard, Boston,MA 02125, USA

The wavelength range that extends from 1550to 5000 nm is a new regime of operation forSi-based photonic and opto-electronic integratedcircuits. To actualize the new chips, heterostructureactive devices employing the ternary SiGeSn alloyare proposed in this paper. Foundry-based monolithicintegration is described. Opportunities and challengesabound in creating laser diodes, optical amplifiers,light-emitting diodes, photodetectors, modulators,switches and a host of high-performance passiveinfrared waveguided components.

1. IntroductionThe possibilities for new electrically biased SiGeSnheterostructure photonic components—especially laserdiodes (LDs), photodetectors, optical amplifiers, light-emitting diodes (LEDs), tuneable filters, electro-opticalmodulators, reconfigurable add/drop multiplexers andwaveguided routing switches—are discussed in thispaper. I shall indicate how the physical propertiesof SiGeSn materials can be exploited to create theactive devices and how those devices can be integratedmonolithically in a photonic integrated ‘circuit’ (PIC) oropto-electronic integrated circuit (OEIC). Several types ofmonolithic integration are described, including PICs andOEICs manufactured in a silicon foundry.

Silicon photonics (SiP) is a subset of group IVphotonics (GFP). Today, the mainstays of SiP are the Gephotodetector, the Ge-quantum-well modulator, the SiGeFranz–Keldysh electro-absorptive modulator and the Ge-on-Si LD. Germanium’s direct bandgap of 0.8 eV imposesan upper limit of about 1550 nm upon the wavelengthof operation λo. The introduction of the GFP SiGeSnmaterial enables a significant increase in λo well beyond

2014 The Author(s) Published by the Royal Society. All rights reserved.

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1550 nm. This paper examines what we can expect—the likely outcomes—of applying SiGeSntechnology in the 1550–5000 nm wavelength range.

2. Background discussionThe future of nanoelectronics includes a close integration with photonic and biological entities.My mission here is to illuminate the synergistic marriage of photonics with electronics on a siliconchip. I recognize that the substrate for OEICs could be InP rather than Si and that InP microwavetransistors offer some of the highest speeds available. However, I shall leave the telling of that III–V story to other authors because my expertise resides in group IV semiconductors. It is importantto expand the investigation of SiP to GFP because GFP is a more general technology with greaterfunctionality than SiP. In fact, there is a parallel with nanoelectronics. The James S. Harris group atStanford [1] proposes using GeSn to extend ‘Ge electronics’, and we know that SiGe has expanded‘Si electronics’. Therefore, I think there is ‘group IV electronics’ (GFE) running parallel to GFP;so, GFE and GFP can converge. In addition, my colleagues and I have shown in a series ofpublications that a ‘group IV plasmonics’ exists. In this paper, I am emphasizing integrated GFPdevices because of their wide wavelength scope. Around the world today, complementary metal-oxide semiconductor (CMOS) foundries with an added photonic capability are coming on streamand promise to give high-volume OEIC creation at a cost-per-chip lower than that of any OEtechnology. For OEIC manufacture, the ‘silicon foundry advantage’ could be profound.

For the commercial viability of these PICs and OEICs, it is important to manufacture thechips in a modern Si factory known as a technology node. Each node has its resolution andtapeout costs. The 130 and 65 nm nodes will be adequate for most OEIC applications becausethe minimum photonic-device dimension d is λo/2n, where n is the real index of the waveguidecore—for example, d = 220 nm at λo = 1550 nm. I expect the above-mentioned technology nodesto provide an economic future for OEICs. In special cases where deep-subwavelength plasmonicdevices are integrated with opto-electronics, an advanced node—such as 40 nm—may be requiredfor chip manufacture. At 40 nm, the advanced field-effect transistors in the OEIC could be builtupon bulk Si as well as on silicon-on-insulator (SOI). Then, photonic integration on bulk Si andSOI would be needed as explained in §3.

As discussed below, to make the GFP material compatible with the Si substrate, it is sometimesnecessary to deposit relaxed buffer layers on the Si in a local area underneath the photonic device.The buffer is a virtual substrate or VS whose lattice is larger than that of Si.

The modern foundry nodes mentioned above ‘demand’ photonics that are commensurate withthe electronics; that is, the electro-optical (EO) devices must have the lowest possible switchingenergy and the smallest possible footprint. The minimum on-chip area of a photonic or EOcomponent is roughly λ2

o or ‘wavelength scale’. Numerically, the footprint dimensions are inthe micrometre scale when compared with the millimetre scale of the chip. These proportionsreveal the real possibility of large-scale photonic integration (LSPI), which is defined here as morethan 10 000 components on-chip. What then are the applications of LSPI? A few applications areclear; most are speculative. In the ‘less certain’ category, I propose wavelength-division opticalinterconnects, intelligent optical-routing networks, EO logic arrays, neural networks, quantum-computing processors and all-optical computers using arrays of nanosized surface-plasmoniclasers [2] or nanoscale resonant surface-plasmon-emitting diodes. However, it is clear todaythat an immediate use of LSPI is in electrically controlled optical phased-arrays—namely beam-steered transmitters and receivers, where the infrared beam travels in free space. The Wattsgroup at MIT [3,4] demonstrated recently an on-chip 4096-element rectangular array of group IVwaveguided elements fed from one laser source. Although they tested an independent thermo-optic (TO) phase shifter at each element, I would suggest employing instead an EO phase shifterin each ‘pixel’. A tiny surface-relief grating [3] or a pair of tiny metal nanoantennas [4] is locatedat each of N × N pixels, thereby coupling 1550-nm light at 4096 locations from a waveguide tofree space or from space to a waveguide. At present, the reconfigurable TO pixel size is 9 × 9 μm,

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but in principle each active pixel could be reduced to an area of 1 × 1 μm. Thus, the LSPI opticalbeamformer approach appears scalable to mega-pixel arrays.

Group IV photonics presently deals with ultrafast datacom and telecom at the 1.31 and 1.55 μmfibre-optic transmission bands of major networks, respectively. However, the useful wavelengthsfor GFP extend well beyond telecom, as SiGeSn is highly transparent over wide stretches ofthe broad infrared spectrum, suggesting that GFP will have strong application in the mid-infrared (MIR), far infrared and terahertz ranges [5]. Note also that GFP offers great microwavephotonics potential, another direction for foundry manufacture. My coverage here is limited to theMIR regime from 1.55 μm out to about 5.00 μm, including thereby the 3–5 μm ‘window’ wherethe atmosphere is transparent. That window enables free-space uses of OEICs, although I willemphasize situations in which the infrared light is confined within various waveguided deviceson the chip. It is important to recognize that there are several infrared-manipulation technologiesthat work closely with photonics; namely plasmonics, photonic-crystals, opto-electro-mechanics,optofluidics and ‘biologics’. I am advancing the idea that these can be integrated intimately withphotonics on the same nanoelectronics substrate.

When GFP operation is extended from 1.55 to 5.00 μm, the mission of fast opticalcommunications is supplemented by the new applications listed in my 2013 PhotonicsWest paper [6]. Principal among these is photonically enabled sensing, referring to thedetection/identification of chemical, biological and physical variables with a PIC or OEIC—an application that might eventually eclipse communications-and-computing in importance. Asdetailed below, the focus of this paper is the relatively new ternary SiGeSn discussed at lengthin the empirical-pseudopotential theory paper of Moontragoon, Soref and Ikonic [7] (knownhereafter as MSI). The silicon foundry compatibility of SiGeSn must be established soon inorder to validate the thrust of this paper, and I believe it will be proved. I also believe thatthe SiGeSn heterostructures explored in this paper can play a role in the new terabit/s fibre-optic communications systems being created for next-generation photonic-bandgap fibres in the1.9–2.1 μm communications band [8]. For easy reference, I shall assign the somewhat facetiousterm ‘Z band’ to denote the new approximately 2 μm wavelength communications band. I amhoping that GFP Z-band will prove cost-effective for both long-haul networks and short-haulfibre interconnects (active optical cables). Z-band systems are intended to supplement the 1.55 μmnetwork infrastructure.

3. Types of monolithic integrationI see five types. Type 1 is the active PIC, which preferably has LDs on-chip, although a viablealternative is to place the LDs on the second PIC (an optical power supply) linked via waveguideto the first PIC chip. Silicon 1.3/1.6 μm PICs are the present focus of OE foundry research, but Iadvocate that this foundry approach should be enlarged to include Z-band SiGeSn PICs. Type 2is the multi-chip module or multi-die module, of which one die is the monolithic PIC and theother dies are mainly electronics. Those dies are electrically and/or optically interconnected ona tiny platform or ‘circuit board’. Type 3 is the full-fledged CMOS foundry OEIC wherein thephotonic fabrication process is integrated into the factory transistor-process flow to yield opticsand electronics in the same layer or in adjacent layers. Type 4 is a variation on Type 3 in whicha bulk Si or SOI nanoelectronic wafer has various areas that are deliberately left ‘blank’ givingexposed Si surfaces on which monolithic PICs are sited. The idea proposed here is that the PICsare each self-contained active-plus-passives ‘membranes’ discussed below. Each PIC is bonded asa unit. Type 5 integration refers to a fully three-dimensional OEIC ‘multi-technology chip’ that isillustrated in fig. 2 of [6].

Returning now to type 4, the OEIC engineer can choose to bond those approximately 1 μmthick group IV PICs to open Si surfaces with approximately 1 μm of benzo-cyclo-buten (BCB)polymer or he could bond the PIC membrane directly to Si with the transfer printing processdeveloped by Prof. Z. Q. Ma [9] and Prof. W. Zhou [10]. The BCB approach is favoured byProf. Meint Smit [11] of the COBRA Research Institute in his proposal for bonding an InGaAsP

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PIC membrane to Si CMOS or to a network of SOI waveguides. I would describe COBRA asa heterogeneous hybrid integration, not monolithic. However, the group IV PIC membrane caseis ‘almost monolithic’ because both the ‘bonded and the bondee’ are in group IV; hence, thishybrid is homogeneous. Transfer printing is, in principle, foundry compatible. Transfer wouldbe accomplished using pick-and-place robotic equipment that ‘prints’ on CMOS the group IVPICs that were previously lifted off of a sacrificial substrate. I claim that transfer printing can bedone on bulk Si or SOI. For that purpose, I am suggesting an active monolithic membrane thatincludes a network of passive strip waveguides that are held together mechanically by SiO2 thatfills all the interguide spaces. When the membrane is printed to SOI, the in-membrane single-mode strip waveguide cores would be silicon, meaning that each strip becomes a silicon ribwaveguide when it is bonding closely to thin-film SOI. When printing the membrane to bulksilicon, we require a strong index contrast between the membrane’s waveguide strips and thebulk silicon after bonding is performed. Therefore, drawing upon published Ge/Si results andmy recommendation for SiGeSn/Si channels, the group IV membrane shall contain a series ofwaveguiding SiGeSn strips that contrast optically with the underlying bulk Si after bonding.Because the membrane fabrication is preferably a foundry process, the printed OEIC requiresthe first and the second foundry process. In addition, the membrane PIC requires local-area-on-Sibuffering of its active devices.

If desired, a guideless group IV PIC could be bonded to a network of on-chip waveguides. Inthat connection, I want to add that the hybrid integration of 1.55-μm III–V microlasers on siliconhas been a huge success. Such hybridization will carry forward into the MIR I believe. Thus, whenwe consider individual MIR LDs, semiconductor optical amplifiers (SOAs) and LEDs—or arraysthereof—those components can be thought of as mini-membranes. Hence, there is a sub-categoryof type 4 integration, which is the bonding of mini-dies onto a group IV waveguide network.Returning to type 5, this is truly a ‘futuristic’ chip for which a large number of technical/processdetails must be worked out before it becomes a reality. In the three-dimensional multilayer, oneor more technologies can be within one layer, and vertical interlayer communication is required.My three-dimensional prescription does not show specifically how the plasmonic, photoniccrystal, opto-electro-mechanical, microfluidic and biological technologies would be inserted inthe factory flow.

4. Strained-layer group IV devicesThe MSI paper examined unstrained relaxed material (r-SiGeSn); however, in many instancesGFP is a strained-layer heterostructure technology. The band theory for strained SiGeSn isunfortunately incomplete. Therefore, the unfinished task of theory (and experiment!) awaits usfor tensile-strained (t) and compressively strained (c) layers: t-SiGeSn and c-SiGeSn, respectively.This is biaxial strain with tension or compression in the growth plane. Along with dualheterostructures (DHs), multiple-quantum-well (MQW) structures are of key importance. Theuse of strain, or the lack of it, determines to some extent the wavelength of operation. The fullyrelaxed (r), lattice-matched MQW is one approach. But beyond that, we can employ an MQWhaving asymmetric strain (an r-c or an r-t alternation) or balanced strain (equal-and-opposite c-and t-layers alternated on a relaxed VS of ‘midway’ composition). For the asymmetric case, thebuild-up of net strain along the heterostack axis limits the number of QWs that can be used beforethe stack cracks. Strain balance is better but more complicated. Examples of asymmetric strain are:(i) the LD design of Chang et al. [12] using N-doped t-Ge QWs with r-SiGeSn barriers and (ii) thephotodiode (PD) experiments of Gassenq et al. [13] that employed a 3-QW PD stack of c-GeSn withr-Ge barriers. Their limit of three wells in turn limited the responsivity for normal incidence. Also,their QWs were dominated by the conduction-band (c.b.) L valley, not by the Γ valley, which isacceptable in a PD but not in an LD. A good example of strain balance is the LD proposal of Changet al. [14] for c-Ge0.84Sn0.16 QWs with t-Si0.09Ge0.80Sn0.11 barriers sited on a r-Ge0.86Sn0.12 bufferon Si. The 16% Sn concentration gave directness in the wells and the GeSn compression split thedegeneracy of LH and HH in the valence band (v.b.). For the TE polarization, they calculate high

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gain at the MIR 2900 nm wavelength, suitable for lasing. This strain-balanced structure is relevantto the thrusts of this paper.

5. Priorities in group IV alloysThe CSiGeSn quaternary is the most general or ‘ultimate’ alloy—of which the ternaries CSiGe [15],CSiSn, CGeSn and SiGeSn are subsets. The ternaries in turn can be decomposed into binaries SiGe,CSi, CGe, SiSn, GeSn and CSn. Here, carbon stands for the cubic phase of diamond. Today, all of thevarious carbon-containing alloys are essentially unexplored experimentally, and there are reasonsto investigate these materials. I find indications that CSiGeSn contains alloys with a truly directbandgap in the 0.8–1.2 eV range. According to Pandey et al. [16], my 1992 prediction [17] of anindirect bandgap for the stoichiometric Sn0.5C0.5 alloy is incorrect because their linear combinationof atomic orbitals theory indicates a 0.75 eV direct gap for this crystal. Employing an Eg versus%Sn plot of the Sn1−xCx system, I have performed a linear interpolation by connecting the c.b.L-valley and Γ -valley energies of cubic tin (+0.960, −0.413 eV) with the corresponding c.b. energiesof diamond (6.50, 7.35 eV), and I find compositions x having ‘true directness’ in the telecomsrange. However, that primitive procedure does not take into account the real-world bowing ofEg; nevertheless, the ‘directness suggestion’ remains. This L-Γ exercise gives me an opportunity toreplace the incorrect α-Sn value of EΓ = 0 eV used in figure 2 of my 1991 article [18] by the acceptedvalue of EΓ = −0.413 eV. When that change is made, a more realistic estimate of the direct-gapregion of SiGeSn is given in my modified 1991 figures, a region that extends to higher energies.

When considering the research frontier of carbon-containing alloys, it is clear that their bandtheory and their epitaxial growth present tremendous challenges. That is why I shall leaveexploration of these alloys to the future, despite the prospect of directness, and shall concentrateinstead upon the more immediate prospects of carbon-less SiGeSn. I say ‘immediate’ and yetdifficulties abound, especially for materials requiring a large fraction of tin. A ‘miscibility gap’might be found—analogous to that seen in III–Vs—meaning that it might be impossible to growcertain high-Sn compositions. Low-temperature growth is imposed to avoid Sn segregation.Also, there is an issue of the thermodynamic phase stability of the random and ordered SiGeSnalloys. Can epitaxial stabilization and non-equilibrium growth help? All of these questionswarrant study.

6. Results so farMost of the experimental work has been on the binary GeSn. The history of GeSn is long.Happily, at present we are witnessing a build-up of research momentum as groups aroundthe world investigate GeSn MBE, CVD, solid-phase epitaxy (SPE) and re-crystallization of theamorphous. Along with Prof. J. Menendez, Prof. J. Kouvetakis’ group at Arizona State Universityhas pioneered the growth of crystalline SiGeSn, including epitaxy directly upon silicon. Theirnumerous publications are listed at a web site [19] where they present recent device work [20,21]on SiGeSn/Ge and GeSn/Si PDs, along with GeSn electro-luminescence (EL) studies. They havealso grown a few SiSn samples. They promote the independent adjustment of strain and bandgapin SiGeSn. I have co-authored work on N-doped GeSn as a plasmonic conductor material forGeSn/Ge surface-plasmon/photonic applications [22]. Prof. E. Kasper and his colleagues havedone fine work on GeSn epitaxy, LEDs and photodetectors [23], all of which is detailed atthe Universitat Stuttgart web site [24]. Prof. H. Cheng’s group reports strong EL in GeSn [25].Lieten et al. [26] used SPE to grow annealed GeSn on Si(111) and the mismatch in thermalexpansion between GeSn and Si led to tensile GeSn during cooling. Si/GeSn/Si represents alattice-mismatched strategy in which the GeSn has dislocations at both of its hetero-interfaces. Linet al. [27] grew SiGeSn on InGaAs. The MSI theory paper gives design rules for type-1 direct-gapMQW photonic structures operating in the 2.8–6.2 μm range. The same paper points out that the‘large’ SiGeSn lattice parameter must be dealt with. The ternary parameter is larger than that ofSi or Ge. It approaches 5.9 Å when the Sn concentration is raised from zero to approximately 40%.

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7. Temperature of operationThe history of semiconductor mid-infrared technology shows that some active devices requirecooling, the longer the λo, the stronger the need for cryogenics. In the present PIC/OEIC case,I think that those chips will perform well at room temperature for 1.55 μm ≤ λo ≤ 3.0 μm. Atrade-off seems needed for room-temperature operation over the 3–5 μm region where reducedperformance for emitters, amplifiers and detectors would have to be accepted in order to keep thechip uncooled.

8. Laser, LED and SOA proposalsThe active layers of the Si-based SiGeSn LDs/SOAs/LEDs are sandwiched between P-dopedand N-doped contact layers to form a PN or PIN waveguided diode. We categorize activesas homojunction or heterojunction devices—and the relaxed VS-on-silicon is inevitable. Aheterostructure interfaces an SiGeSn active layer of ‘composition 1’ with a wider-bandgapcladding or barrier layer of SiGeSn having ‘composition 2’, written as SiGeSn/SiGeSn’. Theseband-to-band active photonic devices can be single heterodiodes, DH diodes and MQW diodes,usually PIN. Regarding intersubband structures for λo < 5 μm, I assign a low probability ofcreating a SiGeSn type II interband cascade laser (ICL). Also, an SiGeSn quantum cascade laser(QCL) at λo < 5 μm does not appear feasible. Although asymmetric strain is useful in devicedesign, I favour lattice-matched and strain-balanced strategies.

In order to illuminate the issues arising in LDs/SOAs/LEDs, let us look at the ‘schematic bandstructure’ of SiGeSn in figure 1, which illustrates the c.b. L and Γ curves but omits the X valleyat higher energy. Figure 1a places SiGeSn LDs in context with the Ge telecom art by showingbands of the heavily N-doped Ge layer employed by the MIT group [28,29] in their experimentalP+Si/N+Ge/N+Si LD where the Ge had a small tensile strain [30]. By contrast, the SiGeSn layersin figure 1b, c are not doped and not strained. I see this as an advantage. The Sn content in figure 1bis lower than that in figure 1c; however, the figure 1b Sn concentration is large enough to givedegeneracy of the Γ and L valleys, while the bandgap in figure 1c is ‘truly direct’ (EΓ

g < ELg) albeit

at a smaller bandgap energy. The intervalley Γ -L electron transfer in figure 1b is discussed below.Figure 2 presents calculated values of the bandgap energy and lattice parameter of unstrained

Si1−x−yGexSny. These predictions are reprinted from [7]. Figure 2 provides a framework for ouranalysis of LDs/SOAs/LEDs, and these ternary diagrams cover all compositions xy. Figure 3,also reprinted from Section V of [7], gives a specific design sequence for MQW devices. Figure 3ternary charts show xy compositions of lattice-matched wells-and-barriers having type-I bandoffsets in both v.b. and c.b. Figure 3a through e presents a step-by-step procedure to determinefavourable alloys for building unstrained LDs, SOAs and LEDs (lattice matched to the r-VS layer)for the 2.3–5.0 μm λo region. The devices would be direct-gap SiGeSn/SiGeSn’ PIN MQWs andthe Sn fraction would be in the 15–25% range. The procedure is a straightforward and credibleapproach to those devices.

What are the relative merits of the DH and MQW devices? The answer involves the Augerrecombination of injected electrons and holes, which amounts to an unwanted non-radiative‘path’. From the results of Sun et al. [31,32], the intensity of the Auger process is lower in theMQW than in the DH, therefore the MQW is preferred for SiGeSn/SiGeSn’ LDs/SOAs/LEDsover the 1.55–5.0 μm λo range. Although the DH is indeed a viable approach in this λo range(both unstrained and strained-layer heterostructures) the DH infrared gain per unit of injection-current-density is unfortunately smaller than that exhibited by MQWs—and that gain behaviourwill influence the temperature of operation. So, the MQWs are ‘primary’ while the DHs are‘supplemental’. For 1.55 ≤ λo ≤ 2.3 μm, the LD/SOA/LED situation is challenging because theactive layer’s bandgap is indirect, and because the barrier’s band offsets are inadequate. Toaddress these issues, I propose an altered strategy of (i) doping of the active regions N type—especially for 1.55 μm ≤ λo ≤ 1.80 μm—in order to fill the SiGeSn L valley with electrons up toa level near the Γ bandedge, as in the Ge DH LD, and (ii) allowing asymmetric strain as well

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E E EN-doping

LG

k k k

(b)(a) (c)

Figure 1. Simplified band diagram of lasingmaterial: (a) N-doped tensile Ge, (b) unstrained SiGeSnwith approximately 5% Sn,(c) unstrained SiGeSn with approximately 10% Sn. (Online version in colour.)

as lattice mismatch, which are obtained (for example) by choosing relaxed ‘wide bandgap’ Gebarriers that are lattice-mismatched to the SiGeSn wells. Such barriers produce the desired banddiscontinuities. In this mismatch example, ‘thin’ wells become compressively strained whengrown commensurately on Ge. Alternatively, each SiGeSn layer can become strain relieved byadjusting its thickness and composition. This strain-relaxed strategy seems to be supported bythe theoretical DH laser analysis of Dutt et al. [33], who considered an ‘unstrained’ N-doped GeSnlayer sandwiched between P-Si and N-Si barriers. Taking into account Auger and free carrierabsorption, they found ‘reasonable’ laser thresholds for various Sn fractions up to 10%.

Now I shall give concrete proposals for 1.8–2.3 μm devices. At λo = 1.8 μm, for example, theemphasis shifts to the active SiSn alloys (figure 2f ), and here I turn to table III of MSI, which listssome lattice-matched indirect materials. Taking one pair of those alloys, the unstrained 1.76 μmMQW LD would have undoped Si0.56Sn0.44 wells (EΓ

g = 0.706 eV, ELg = 0.707 eV) and Si0.58Sn0.42

barriers (EΓg = 0.789 eV, EL

g = 0.752 eV) both with an approximately 5.92 Å lattice. The issues hereare: (i) reduced gain because EΓ

g = ELg, (ii) small type-1 alignment, and (iii) a high-Sn fraction,

which is a problem for present epitaxy. For 1.9–2.1 μm LD examples, the QW Sn concentration inthe above LD increases to 46–48% and the wells become direct. For 2.1–2.3 μm LD examples, I turnto the 2.3 μm unstrained, direct-gap Ge0.9Sn0.1/Si0.10Ge0.75Sn0.15 design offered by Sun, Soref andCheng [32]. I would modify that structure for shorter-wave 2.2 μm lasing by reducing slightlythe Sn concentration in both the undoped QWs and barriers, which unavoidably decreases thedesired EL

g − EΓg separation. Wall-plug efficiency is often a metric for LEDs and in the DH and

MQW LEDs described in this section, I expect the efficiency to improve from low to moderate tohigh as λo is increased from 1.55 to 2.3 to 5.0 μm. Similarly, for the present DH and MQW SOAsoutlined here, a related low-to-high progression in gain per unit length is expected for the sameλo increase.

Overall, the 1.55–2.3 μm region is characterized as ‘difficult’ for LD/SOA/LED creation.However, for both the ‘difficult’ 1.55–2.3 μm and the ‘easy’ 2.3–5.0 μm regimes, I feel that theresearch community should make a serious attempt, backed by adequate resources, to actualizethese LDs/SOAs/LEDs. If that device work is not undertaken, we shall never know feasibility,let alone performance and cost. Those of us advocating group IV need to have our intuitionssupported by experimental facts.

I have often wondered whether an ultrafast SiGeSn LED could serve in lieu of an LD as apractical, on-chip wavelength-division multiplexed (WDM) light source in chip-to-chip, intra-chip and short-haul-cable Z-band optical communications. The SiGeSn LED would be a DHor MQW and it would be embedded in the point-defect cavity region of a one-dimensional

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40%Ge%Sn

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Figure 2. Ternary composition diagrams of unstrained SiGeSn reprinted with permission from the Journal of Applied Physics.Equi-eV-energy or equi-Å-lattice contours are shown: (a) bandgap from theΓ valley, (b) bandgap from the L valley, (c) bandgapfrom the X valley, (d) cubic lattice parameter, (e) truly direct bandgap and (f ) indirect bandgap in which EΓg − ELg is less than0.12 eV.

photonic-crystal hole array within an Si or Ge single-mode strip waveguide, a waveguideknown as a nanobeam. The arrangement is close to that illustrated for the nanobeam LD inan on-chip nanobeam communication link [34] containing lateral-PIN devices for 1.5–2.0 μmcommunications. I am visualizing an on-chip WDM array of such 10 Gb s−1 nanobeam LEDs,each resonant at a different wavelength. Such LEDs may be the ‘keys’ to the all-monolithic PIC.

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0.5

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Egdir (eV) =

Egdir (eV) =

Egdir (eV) =

Egdir (eV) = 0.20...(0.05)...0.65

Egdir (eV) = 0.20...(0.05)...0.65

Egdir (eV) = 0.20...(0.05)...0.65

Egdir (eV) = 0.20...(0.05)...0.65

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Figure 3. Ternary composition diagrams of unstrained SiGeSn/SiGeSn’ MQWs reprinted with permission from the Journal ofApplied Physics. Equi-energy contours are shown: (a) Sn content of well necessary for the chosen Si content and EΓg , (b) Si andSn contents in the barrier necessary for lattice matching with the well material for a range of its EΓg , (c) direct bandgap of thebarrier material, (d) band discontinuities at v.b. and c.b.Γ for the chosen well and barrier materials, (e) spacing between theΓ valley in the well and the lowest indirect valley.

9. Photodetector possibilitiesWhat are the physical mechanisms available for group IV MIR sensing? The list isvoluminous and the following are some representative device mechanisms: band-to-band PINhomojunction diodes [35], avalanche PDs [35], quantum-dot photodetectors [36], impurity-and bulk-photoconductors [37,38], silicon/silicide Schottky-barrier diodes [39] metal/Ge/metalSchottky-enhanced diodes [40], microbolometers [41], defect-enhanced-Si PDs [42] (extendable, Ithink, to defect-mediated Ge PDs), superlattice diodes [43] valence-intersubband diodes [44] andconduction-intersubband diodes. Deliberately, I shall narrow my focus here to heterostructurephotodetectors, a choice for which the requirements on band offsets and ‘directness’ are lessstringent than they are for LDs. Looking at figure 2, there are many direct and ‘nearly direct’

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SiGeSn actives for efficient ‘sensing’ over 1.55 ≤ λo ≤ 5.0 μm (the peak-response wavelengthis ‘tuned’ by the choice of composition). Figure 2 simulations, together with 1.55–1.8 μmexperimental progress, makes me hopeful, and I feel that the prospects are excellent for detectionout to 5 μm. I expect that further research will reveal photodetectors that are fully competitivewith their III–V counterparts in the MIR. Perhaps this statement is too strong for the particularcase of 1.5–1.8 μm sensing because some III–Vs are ‘more direct’ there.

10. Electro-optical modulators and switchesElectro-optical is a term that includes electro-refraction and electro-absorption. In a 2 × 2 switch,the EO mechanism is usually the same as in a 1 × 1 modulator. There are several excellentwaveguided EO modulator-and-switch possibilities for 1.55–5.00 μm in SiGeSn heterodevices.First, the fast Franz–Keldysh field effect (FKE) in SiGeSn is optimized at a target wavelength (thewavelength at which peak-modulation occurs is chosen by selecting the alloy’s composition).It is interesting that the alloy can be ‘slightly indirect’ and yet function very well near thedirect bandgap wavelength (the figure of merit peaks at a photon energy around 40 meV belowthe direct-gap energy). The GeSn FKE theory is presented in Soref et al. [45], but the FKEin SiGeSn generally needs confirming experiments. Second, the FKE is the bulk version ofthe quantum confined Stark effect (QCSE). In the last few years, most if not all publicationson the Si-based QCSE feature Ge QWs with SiGe barriers and an SiGe VS buffer-on-Si. Themost recent papers [46] focus on a strain-balanced 1550 nm QCSE in which the buffer isr- Si0.10Ge0.90 on Si, while the QWs are 14 nm c-Ge, the barriers are ‘highly tensile’ Si0.15Ge0.85,and the λo of 1550 nm is truly an upper limit for SiGe/Ge. Although this system has merit,I think that QCSE systems should be expanded to the SiGeSn compositions, thereby enablingQCSE at 1550–5000 nm λo in unstrained (or strain balanced) MQWs. The MSI paper pointsout SiGeSn reverse-biased PIN unstrained MQW systems for this purpose. Independently, theJames S. Harris group at Stanford [1] conceived of a GeSn version. Dr Y. Huo is a memberof the Harris group, and in his thesis [47] he indicates (fig. 5.2) that a strain-balanced QCSEMQW with c-GeSn wells and t-SiGeSn claddings on r-SiGeSn buffered Si is ‘in progress.’ Asa more specific example, I propose here an unstrained PIN MQW QCSE modulator for the1900 nm region. I would employ two matched alloys cited in MSI table III; the indirect wellswould be Si0.45Ge0.20Sn0.35 (EΓ

g = 0.695 eV, ELg = 0.623 eV) and the indirect barriers would be

Si0.61Sn0.39 (EΓg = 0.923 eV, EL

g = 0.824 eV) both lattice matched to the 5.878 Å VS; making this ahigh-Sn proposal. It is important to note that the QCSE devices are inherently broadband [48].This means that QCSE devices provide low-energy modulation over a much wider informationpassband than that in resonant microdisk modulators. For broad-spectrum applications, I shallalso suggest an end-coupled, ultrafast, broadband, electro-optical modulator that employs ahybrid photonic-plasmonic channel-waveguide mode. I am recommending that the 1310 nmSi/ITO/SiO2/Au device of Sorger et al. [49] should be scaled up in waveguide-cross section foroptimum modulation at any wavelength within the 1600–3600 nm range, and that the N-doped-Simodulator body can be changed to N-SiGeSn if wanted.

The MSI paper points out that a variety of slightly indirect SiGeSn waveguided componentsare useful in the hν < Eg(indirect) transparency range, and that the SiGeSn free carrier plasma effects(FCEs) are generally very strong over 1550–5000 nm with strength depending inversely upon thebandgap. In that same MIR range, the SiGeSn nonlinear optical effects are also very strong withχ (3) ∼ 1/Eg.

11. WDM transceiver chips for ultrafast 2μm communicationsThe two projects launched in this area are listed in [6] and a European team has demonstratederror-free 8 Gb s−1 data transmission in one (of many) wavelength channel near 2008 nm [50].As group IV enthusiasts, our objective is to demonstrate an Si-based factory-made all-group

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IV dense-WDM transceiver chip, PIC or OEIC, for this low-loss HC-PBG-fibre system. PlanA is to integrate SiGeSn LDs on-chip together with other monolithic transmitter and receivercomponents. Plan B is to hybrid-integrate III–V LDs on-chip or to put all 2 μm sources off-chip.Both A and B chips contain a set of integrated, ultrafast, WDM waveguided components. Bothchips would be significant in the communications world where B is nearly as important as A. Iadvocate the construction of these chips as a showcase for SiGeSn technology generally and forFKE, QCSE and FCE switches/modulators particularly. I am confident that the hybrid-LD Z-bandPIC could be developed successfully.

12. SummarySiGeSn-on-Si will, I think, join Ge-on-Si as a viable low-loss MIR channel waveguide on bulksilicon. More generally, on the journey to construct group IV MIR PICs, a large number ofdiverse passive components are going to be called upon: low-loss waveguides, filters, directionalcouplers, arrayed waveguide gratings, surface gratings, photonic crystals, resonators, add/dropmultiplexers, multimode interference couplers, polarization converters, isolators, bends, tapers,splitters and more. I feel that the future prospects for all of these SiGeSn-related componentsare excellent over the entire 1.55–5.00 μm range. In addition, the strong third-order nonlinearcoefficients of SiGeSn will prove useful in the mid-infrared. Surveying the GeSn and SiGeSnmaterial requirements for the various passives, it should be noted that an indirect bandgap isacceptable in most (if not all) cases.

For active, electrically biased components, a direct bandgap is desired in some cases.We certainly prefer directness in the category of SiGeSn-related LDs/SOAs/LEDs; however,for all of the other actives (including photodetectors, tuneable filters, WDM cross connects,reconfigurable add/drop multiplexers, electro-optical modulators and electro-optical-routingswitches) directness is not essential, and I believe that this large group of actives,similar to the passives, has outstanding prospects for practical development in the1.55–5.0 μm range.

Regarding LDs, LEDs, SOAs, I said above that (i) the hybrid integration of III–V LDs/LEDs/SOAs on group IV will likely be a highly practical technique within the 1.55–5.0 μm λo

range for both interband and cascade devices, (ii) the creation of practical monolithic SiGeSnhetero LDs/LEDs/SOAs in the 1.55–2.30 μm range is going to be challenging but feasible,and (iii) the monolithic fabrication of 2.3–5.0 μm direct-gap SiGeSn/SiGeSn’ LDs/LEDs/SOAsappears straightforward and practical. The ‘reward’ of attaining PDs and LDs motivates researchon high-Sn-fraction materials near the binary SiSn composition line in the ternary diagram. Moregenerally, the MSI ternary theory must be put to the test over many compositions, beginning withthe GeSn binary to determine experimentally the Sn content (x) at which GeSn’s indirect-to-directtransition occurs (EΓ

g crosses ELg) in the unstrained, disordered alloy. For example, MSI puts the

crossover at x = 10%, whereas the theory of Yin et al. [51] places the transition at x = 6.3%, whereEΓ

g = 0.65 eV.Looking to the future, it is difficult to predict whether mid-infrared group IV (or ‘IV–IV’)

PICs and OEICs will develop more rapidly than their III–V counterparts. Development decisionsare investment decisions based upon factors that go beyond the basic materials science. Whencomparing IV–IV and III–V technologies, what I can do is look at the fundamental materialsparameters in order to arrive at an informed opinion. The parameters that should be consideredinclude the index contrast between the waveguide core and its cladding, the infrared matrixelements and absorption coefficients for band-to-band transitions, and the effective massesas well as mobilities of both electrons and holes. As the IV–IV index is well above 4.0, thecontrast �n > 2.0 is surely competitive with that of the III–Vs. Also, the MIR absorption of theGeSn/Ge MQW is competitive according to [13]. Gupta et al. [1] find GeSn electron mobilitieshigher than those of Ge. Estimates of m∗

e and m∗h in GeSn [1,22] reveal favourable behaviour.

Generally speaking, theory predicts a IV–IV device-performance outlook similar to that of III–Vs

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for perfect MIR materials. However, the development of SiGeSn requires more attention paid tothe real-world issues of strain, defect formation and atomic segregation.

With this background, let me estimate the ‘inherent’ performance of PIC/OEIC chips in threecategories. The first category is the ‘source-less chip’ in which the LDs/LEDs/SOAs are off-chipand the remainder of the optical circuit is monolithic. The second kind is the fully monolithic chipthat contains ‘all conceivable’ components. The third is the hybrid-source chip, a monolithic IC inwhich the necessary III–V LDs/LEDs/SOAs are bonded on the chip. (Because I am spotlightinggroup IV competence, I have excluded from consideration here the InP-membrane PIC-on-Si thatblurs the lines of demarcation between III–V and IV–IV). The III–Vs sources will include MIR ICLsand QCLs.

Let me then compare the III–V and IV–IV versions of these three chips in two wavelengthbands: 1.55–2.3 μm (region 1) and 2.3–5.0 μm (region 2). My estimate is that the IV–IV sourcelesschip will perform just as well as the III–V sourceless chip over both regions 1 and 2 (and theIV–IV might be more economical as per my foundry discussions). In region 1, we are probablyobliged to compare the hybrid-source IV–IV monolithic with the all-monolithic III–V, owing tothe uncertainties of making IV–IV sources/amplifiers in that region. Even so, I project equivalentperformance for the IV–IV and III–V technologies. Within region 2, I think we can happily pit theIV–IV monolithic chip against the monolithic III–V chip and arrive once again at the judgementthat both technologies will produce similar, practical photonic and opto-electronic results. Insummary, I am optimistic about the value and contribution of group IV.

13. ConclusionThe materials Si, Ge and SiGeSn have tremendous untapped potential for practical applicationin Si-based PICs and OEICs operating in the 1550–5000 nm wavelength range. The active andpassive waveguided components in these integrated ‘circuit’ chips also have fine possibilitiesfor cost-effective high-volume manufacture in modern 130 and 65 nm silicon foundry nodes. Theternary SiGeSn composition diagram contains domains that are ripe for experimental exploration,including materials using up to 45% Sn content. The active devices are generally PIN band-to-band SiGeSn/SiGeSn’ heterostructure diodes, for example MQW diodes. A caveat is that theheterodevice often requires a local-area VS under the device, a relaxed 5.7–5.9 Å SiGeSn bufferlayer that contacts the bulk Si or SOI wafer. In addition to its uses in SiGeSn devices, this VS isautomatically a template for lattice-matched growth of MIR InGaAsP devices on Si.

A research agenda for specific devices has been given. The future prospects are excellentfor creating a complete suite of group IV, high-performance, monolithically integrated MIRcomponents—essentially all conceivable components except LDs in the 1.55–2.30 μm range(seen as problematic). However, the LDs appear feasible for 2.3–5.0 μm uses. Even without on-chip group IV LDs, these monolithic PICs and OEICs are valuable contributors to 1.55–5.0 μmapplications. The bonding of band-to-band and intersubband III–V MIR LDs to those chips is apractical strategy.

Funding statement. The author thanks the US Air Force Office of Scientific Research for sponsoring this workunder grant no. FA9550-10-1-0417.

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