MegaRAC® M300V Card Implementer’s Reference and User’s Guide · 2007-07-09 · vi MegaRAC®...

MegaRAC® M300V Card Implementer’s Reference

and User’s Guide

MAN-M300V 07/9/07

ii MegaRAC® M300V Card Implementer’s Reference and User’s Guide

© Copyright 1985-2010 American Megatrends, Inc. All rights reserved. American Megatrends, Inc. 5555 Oakbrook Parkway, Building 200,Norcross, GA 30093

This publication contains proprietary information which is protected by copyright. No part of this publication can be reproduced, transcribed, stored in a retrieval system, translated into any language or computer language or transmitted in any form whatsoever without the prior written consent of the publisher, American Megatrends, Inc. American Megatrends, Inc. acknowledges the following trademarks: AMD is a registered trademark of Advanced Micro Devices. Other trademarks and trade names may be used in this document to refer to either the entities claiming the marks and names or their products. American Megatrends, Inc. disclaims any proprietary interest in trademarks and trade names other than its own.

Revision History 07/09/07 Initial release

Preface iii

Table of Contents

Revision History ......................................................................................................................................... ii Table of Contents ...................................................................................................................................... iii Limited Warranty ...................................................................................................................................... vi Disclaimer ................................................................................................................................................. vi

Chapter 1 Introduction ............................................................................................................................ 1

Features .................................................................................................................................................... 2 Acronyms and Terminology ....................................................................................................................... 4 Conventions ............................................................................................................................................... 6 Reference Documents ............................................................................................................................... 7

Chapter 2 M300V Card Layout ............................................................................................................... 9

MegaRAC® M300V card Layout ............................................................................................................... 9

Chapter 3 M300V GUI ............................................................................................................................ 11

M300V GUI Overview .............................................................................................................................. 11 Initial Configuration of the MegaRAC® M300V card ............................................................................... 12

Setup your Client System’s Internet Browser ...................................................................................... 13 Default User Name and Password .......................................................................................................... 13 MegaRAC® GUI Explained ..................................................................................................................... 14 Menu Bar ................................................................................................................................................. 14 General Information Group ...................................................................................................................... 14

System Information .............................................................................................................................. 14 Server Health Group ................................................................................................................................ 15

Sensor Reading ................................................................................................................................... 15 Sensor Readings with Thresholds ....................................................................................................... 15 Event Log ............................................................................................................................................. 16 Sensor Monitoring Options .................................................................................................................. 16

Configuration Group ................................................................................................................................ 17 Alert List ............................................................................................................................................... 17 Alert List : Modify Alert ......................................................................................................................... 18 Alert List : Send Test Alert ................................................................................................................... 18 LDAP Settings ...................................................................................................................................... 19 Mouse Mode Settings .......................................................................................................................... 20 Network Settings .................................................................................................................................. 21 SMTP Setting ....................................................................................................................................... 22 SSL Configuration ................................................................................................................................ 22 User List ............................................................................................................................................... 23 Add New User ...................................................................................................................................... 24 Modify User .......................................................................................................................................... 25 Delete User .......................................................................................................................................... 25

Remote Control Group ............................................................................................................................ 26 Launch Redirection .............................................................................................................................. 26 Remote Console Shortcut Key Combinations ..................................................................................... 26 Console Redirection Window ............................................................................................................... 27 Console Redirection Window : Video .................................................................................................. 27 Console Redirection Window : Keyboard ............................................................................................ 27 Console Redirection Window : Mouse ................................................................................................. 28 Console Redirection Window : Options ............................................................................................... 28 Console Redirection Window : Device ................................................................................................. 29 Console Redirection Window : Help .................................................................................................... 29 Power Status and Control .................................................................................................................... 29

Maintenance Group ................................................................................................................................. 30

iv MegaRAC® M300V Card Implementer’s Reference and User’s Guide

Firmware Update ................................................................................................................................. 30 Languages ............................................................................................................................................... 30 Logging Out ............................................................................................................................................. 30

Chapter 4 M300V Interface Signal Specifications .............................................................................. 31

Overview .................................................................................................................................................. 31 Signal Callout Grouped by Functions ...................................................................................................... 31

LED Control Signals ............................................................................................................................. 31 Signal Group: LED Control .................................................................................................................. 31 USB Interface Signals .......................................................................................................................... 32 Signal Group: USB ............................................................................................................................... 32 Push-Button Signals ............................................................................................................................ 32 Signal Group: Buttons .......................................................................................................................... 32 Video Capture DVI-I Signals ................................................................................................................ 33 Signal Group: Video Capture DVI-I ...................................................................................................... 33 Multi-Bank Fan Control Signals ........................................................................................................... 34 Signal Group: Multi-Bank Fan Control ................................................................................................. 34 Multiplexed Fan Tach Input Signals ..................................................................................................... 34 Signal Group: Multiplexed Fan Tachometers ...................................................................................... 34 Fan Tach MUX Bank Selector Signals ................................................................................................ 35 Signal Group: Multiplexed Fan Tachometer Controls .......................................................................... 35 Single Wire Analog Voltage Sensor Signals ........................................................................................ 35 Signal Group: Single Wire Analog Sensors ......................................................................................... 35 MCard Serial Port and ICMB ............................................................................................................... 36 Signal Group: mCard Serial Port and ICMB ........................................................................................ 36 Serial Over LAN Feedback Path .......................................................................................................... 36 Signal Group: SoL Serial Port .............................................................................................................. 36 Dedicated Management Ethernet Signals ........................................................................................... 37 BMC Host Interface ID Signals ............................................................................................................ 37 Signal Group: Interface Type ID .......................................................................................................... 37 MCard Presence Detection Signal ....................................................................................................... 38 Signal Group: Card Detect ................................................................................................................... 38 System Status Signals ......................................................................................................................... 38 Signal Group: Status ............................................................................................................................ 38 System Control Signals ........................................................................................................................ 40 Signal Group: Control .......................................................................................................................... 40 I2C or SMBus Signals .......................................................................................................................... 41 Signal Group: I2C or SMBus ................................................................................................................ 41 LPC Bus Signals .................................................................................................................................. 42 Signal Group: LPC ............................................................................................................................... 42 Miscellaneous Signals ......................................................................................................................... 42 Signal Group: Miscellaneous ............................................................................................................... 42 Firmware Debugger Probe Signals ...................................................................................................... 43 Signal Group: Debug Interface ............................................................................................................ 43 Signal Group: Debug Power ................................................................................................................ 43

OPMA Hardware Resources ................................................................................................................... 44 SEEPROM Address Reservation ........................................................................................................ 44

OPMA Feature Card Power Requirements ............................................................................................. 45 OPMA Feature Card Signal Tolerance Requirements ............................................................................ 46 OPMA Signals Grouped by Function ...................................................................................................... 46

Chapter 5 OPMA Connector Specification and Pin Assignments ................................................... 49

Overview .................................................................................................................................................. 49 Pin Assignments for the OPMA Connector ............................................................................................. 49

Chapter 6 M300V Card Mechanicals ................................................................................................... 53

Preface v

MegaRAC M300V DDR2 Polarization Key .............................................................................................. 53 MegaRAC M300V Card Mechanical Form Factor ................................................................................... 54 OPMA LAN and Serial Port Connector Scheme ..................................................................................... 55 Management LAN and UART Connectors .............................................................................................. 55

Chapter 7 Serial over LAN Support ..................................................................................................... 57

Serial over LAN Support .......................................................................................................................... 57 MCARD_DETECT_L = Logic High ...................................................................................................... 58 MCARD_DETECT_L = Logic Low ....................................................................................................... 59 MCARD_AUX_SoL_CTRL_L = Logic High ......................................................................................... 60 MCARD_AUX_SoL_CTRL_L = Logic Low .......................................................................................... 61

Possible UART Configurations ................................................................................................................ 62 MegaRAC M300V Card Not Present ................................................................................................... 62 MegaRAC M300V Card Present and on SoL Mode (Default) ............................................................. 63 MegaRAC M300V Card Present and in Non-SoL Mode ..................................................................... 64

Chapter 8 Motherboard Hardware Support ........................................................................................ 65

Overview .................................................................................................................................................. 65 General Signal Termination ..................................................................................................................... 65 Fan Tachometer Read Back ................................................................................................................... 65

Fan Tach Monitoring Circuit Block Diagram ........................................................................................ 66 Fan Tach Monitoring Circuit Example .................................................................................................. 66

Fan Speed Control .................................................................................................................................. 67 Fan Speed Control Circuit Block Diagram ........................................................................................... 67 Fan Speed Control PWM-to-DC Converter Circuit Example ............................................................... 67

Clear CMOS Circuit ................................................................................................................................. 68 CMOS Clearing Circuit Example ......................................................................................................... 68

System Speaker Control Circuit .............................................................................................................. 69 Speaker Control Circuit Example ......................................................................................................... 69

Local Access Lock Out ............................................................................................................................ 70 Partial Circuit Example for Local Access Lock Out ............................................................................. 70

ACPI State Reporting .............................................................................................................................. 71 Signal Encoding for ACPI State Reporting .......................................................................................... 71

DVI–Digital Visual Interface ..................................................................................................................... 71 ICMB RS-485 Level Translation Circuit ................................................................................................... 71 Management UART Signal Level Translation ......................................................................................... 71 Management UART Signal Multiplexing .................................................................................................. 72 Support for Dedicated Management LAN ............................................................................................... 72 MCard Presence Detect and Interface ID Support .................................................................................. 72 Motherboard Support for I/O Functions ................................................................................................... 73 Motherboard Support for MegaRAC M300V SCI Interrupt Signal........................................................... 73 Motherboard I/O Terminations ................................................................................................................ 73

Chapter 9 BIOS/Firmware Considerations ......................................................................................... 75

MCard Presence Detect .......................................................................................................................... 75 Card Detect Signal States ................................................................................................................... 75

MCard IPMI Command Interface Type Detection ................................................................................... 75 Management Subsystem Host Interface Type Encoding .................................................................... 76

IPMI Command Hardware Interface Support .......................................................................................... 76 IPMI Command BIOS Interface Support ................................................................................................. 76 MegaRAC M300V Card Presence, Health and BMC Firmware Revision Reporting .............................. 77

BIOS POST Screen ............................................................................................................................. 77 System Identification ............................................................................................................................... 78

Index ........................................................................................................................................................... 79

vi MegaRAC® M300V Card Implementer’s Reference and User’s Guide

Limited Warranty The buyer agrees that if this product proves to be defective, American Megatrends is only obligated to repair or replace this product at American Megatrends’ discretion according to the terms and conditions of the warranty registration card that accompanies this product. American Megatrends shall not be liable in tort or contract for any loss or damage, direct, incidental or consequential resulting from the use of this product. Please see the Warranty Registration Card shipped with this product for full warranty details.

Disclaimer

This manual describes the operation of the American Megatrends MegaRAC® M300V card. Although efforts have been made to assure the accuracy of the information contained here, American Megatrends expressly disclaims liability for any error in this information and for damages, whether direct, indirect, special, exemplary, consequential or otherwise, that may result from such error, including but not limited to the loss of profits resulting from the use or misuse of the manual or information contained therein (even if American Megatrends has been advised of the possibility of such damages). Any questions or comments regarding this document or its contents should be addressed to American Megatrends at the address shown on the inside of the front cover. American Megatrends provides this publication “as is” without warranty of any kind, either expressed or implied, including, but not limited to, the implied warranties of merchantability or fitness for a specific purpose. Some states do not allow disclaimer of express or implied warranties or the limitation or exclusion of liability for indirect, special, exemplary, incidental or consequential damages in certain transactions; therefore, this statement may not apply to you. Also, you may have other rights which vary from jurisdiction to jurisdiction. This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes will be incorporated in new editions of the publication. American Megatrends may make improvements and/or revisions in the product(s) and/or the program(s) described in this publication at any time. Requests for technical information about American Megatrends products should be made to your American Megatrends authorized reseller or marketing representative.

Chapter One : Introduction 1

Chapter 1 Introduction

16MB FlashModule

16MB Frame Buffer Memory

American Megatrends Inc.MegaRAC MG9091B Controller Chip

DDR2 Key OPMA Specification (Ver. 1.2)Notice that the notch is locatedcloser to the leads on the rightthan the leads on the left.

32 MB SOCMemory

Reset Switch(push to reset, button is located on the left side)

The MegaRAC M300V card is a high-end OPMA service processor based on AMI's MG 9091B (Verbena II) System on Chip (SOC). The MegaRAC M300V card allows for complete server management, with text and graphical redirection, in a 2.50' x 2.75' form factor. The MegaRAC M300V card enables OEMs and motherboard manufacturers to easily integrate KVM server management into their server and board designs. The MegaRAC M300V card is a 2.5" x 2.75" daughter card module, which implements AMI's extensive IPMI and KVM/IP technology in a management card solution compatible with all Intel and AMD -type motherboards with OPMA connector. The module interfaces with various components on the motherboard to manage the server efficiently. The MegaRAC M300V card is based on AMI's MG 9091 (Verbena II) highly integrated System on Chip (SOC). Verbena II SOC provides both Serial over LAN and KVM over LAN capability, as well as a 10/100 Base-T LAN connection for dedicated management LAN. Serial over LAN allows for remote operation of the server via a terminal interface, connected via an RS232 link. KVM over LAN allows for remote server operation that adds graphical redirection to text, using the server’s video output and keyboard and mouse inputs. The MegaRAC M300V card features video capture of up to 1280 x 1024, applying AMI's AAVICAII compression engine, which uses intelligent algorithms to significantly reduce network traffic and provide high-performance redirection. The engine interfaces with the server’s DVO video interface and USB bus. The MegaRAC M300V card implements media redirection for the CD/DVD/ROM drive and floppy drive at the same time. This feature enables remote installation of the operating system or applications.

2 MegaRAC® M300V Card Implementer’s Reference and User’s Guide

Features

Feature Description Key Features • 2.5” by 2.75” Daughter card with OPMA connector

• MG 9091 System on Chip • Memory: 16MB Flash ROM, 32MB SDRAM (PC100) • Serial port - UART • USB 2.0 for Mass Storage/Keyboard/Mouse (Composite Device) • Integrated Watchdog Timer • IPMB support (I2C based) • Power Consumption: 3.3V - 800mA

AMI MG9091 Controller • Highly Integrated System on Chip (SoC) • 200 MIPS 32-bit ARM CPU with MMU, 16K-I Cache, 16-D Cache

CPU • SDRAM Controller / Static Memory Controller and Flash • Video Processor

• Up to 1280 X 1024 Capture Engine • 5-5-5 RGB DVO Input • AAVICA-IIA Compression Engine • 16Mbyte Frame Buffer SDRAM

• Ethernet: 10/100 Ethernet MAC • USB:1xUSB 2.0 Device Controller and PHY • Encryption Engine

• DES / Triple-DES / AES Encryption / • Decryption compliant with NIST Standard • AES 128/192/256-bit Keys

• Peripherals • 5x I2C Controllers and 2x UARTs • RTC, Timer, Watchdog Timer and Interrupt • Controller • 4x PWMs and 8x Tach Inputs • 22 Dedicated GPIOs, 26 Shared GPIOs

• 200 KSPS, 8-channel ADC, 10-bit Resolution ADC • Integrated LPC Interface

• 3X KCS Interface • Port 80H Snoop Support • BT Interface with 512 FIFO • Bus master Support

• 484 Pin BGA 23x23 mm Package KVM/IP (Console Redirection) • High performance redirection, up to 35

• frames per second • Dynamic selection of 1 bit, 4 bit Gray, 7/8/16 bit color

• Resolution support: • 1280 X 1024 • 1024 X 768 • 800 X 600 • 640 X 480

• Low network bandwidth requirement • Auto session timeout for security

Media Redirection • Simultaneous floppy and CD/DVD redirection • USB 2.0 based CD/DVD redirection with up to 18x CD speed • Support for USB key and USB hard disk • Auto session timeout for security

Virtual Presence and Front Panel Redirection

• Customizable GUI for the front panel • Provides virtual reality of the remote server management • LCD/LED status display • Floppy, CD/DVD tray control • “At-a-glance” snapshot of the server screen


Feature Description IPMI 2.0 Based Management • Manages the IPMI 2.0 based BMC present in the server

• Runs the virtual BMC stack for BMC-less systems and presents as a full IPMI 2.0 compliant BMC

• Customizable sensor management Event Log • Log full and partial full events • Front panel status (LCD/LED) • Sensor readings • Event log full alerts

Web Based User Interface • Cross browser/Cross platform support • Customizable GUI • Added security with SSL (HTTPS)

Sophisticated User Management • Multiple user permission level • Many user profiles • Web based configuration of the user profiles

LDAP Client Support • Direct LDAP support from the device • Windows Active Directory and Open-LDAP support • Client application to extend the LDAP schema easily

SMASH and CLP Support • IPMI 2.0 boot option support • Telnet based SoL • Power control of the server • Fully compliant with the DMTF specification

Side-Band and Dedicated NIC • Dedicated NIC support Security • SSL (Secured Socket Layer)

• Encryption (Blowfish) • Authentication (MD5 hash) • SHA • SNMP v3 (DES)

Multilanguage Support • Full Unicode support • Multiple language support for multiple clients simultaneously

Web Based Configuration • Full configuration using Web UI • Personality migration • Fail-safe firmware upgrade

OEM Tools • AMI-PMCP for customizing the sensors • MegaRAC Studio for customizing the GUI • Platform Development Kit


Acronyms and Terminology This section lists the definitions of acronyms and terms used in this specification. In some of the definitions, the IPMI Specification is referred to.

Term Definition BIOS Basic Input Output System. This is the boot firmware on a standard PC system (including servers). It also

provides some abstraction for system hardware. BMC Baseboard Management Controller. This is the main component of the OPMA subsystem that provides IPMI

command processing, alerting, error logging, and so on in compliance with the IPMI specification. BT IPMI’s Block Transfer command interface. CLI Command Line Interface. This is a text-based interface to a BMC. CMOS Commercial Metal Oxide Semiconductor. This term refers to a battery-backed storage element found on legacy

PC systems. COTS Commercial Off The Shelf. This refers to items that are commonly available commercially, not custom. DDC Display Data Channel. Provides plug-and-play data to whatever device the monitor is plugged into. DDWG Digital Display Working Group—owns DVI specification. DVI Digital Visual Interface. A set of buses for moving video data within a system. DVI-D digitally encodes the

video data and then puts it out onto a bus. DVI-A is simply the same analog video signals seen on a standard VGA connector. DVI-I is the union of DVI-D and DVI-A signals to provide both methods of video information transmission over a single cable and/or connector.

FRU Field Replaceable Unit. See the IPMI specification for details. I2C Inter-Integrated Circuit bus. A simple two-wire bus often used to allow system processing elements to read low

cost sensor devices. An I2C device interfaces to the system via the I2C bus. ICMB Intelligent Chassis Management Bus. An IPMI-defined bus for connecting management processors that exist in

separate physical chassis. See the IPMI specification for details. IHV Independent Hardware Vendor. In this document the IHV is American Megatrends Inc. IPMB Intelligent Platform Management Bus. An IPMI-defined bus for connecting management processors that exist

in a single physical chassis. See IPMI specification for details. ISV Independent Software Vendor. Used in this specification to refer to the manufacturer of OPMA subsystem

board firmware, OS-level drivers and OS-level applications. JTAG Joint Test Action Group KCS IPMI’s Keyboard Controller Style command interface KVMoIP Keyboard, Video and Mouse over Internet Protocol. Used for implementing remote video consoles on headless

(for example, no local keyboard mouse or display) servers. LED Light Emitting Diode LPC A reference to the low pin count bus specification. This is a common host system interface bus for BMCs. LUN IPMI Logical Unit Number mCard This is the generic name for an OPMA-compliant Management Card. It is a modular, connector based

management subsystem which contains the BMC and associated hardware resources. In this document, “mCard”, “OPMA feature card” and MegaRAC M300V card are used interchangeably.

NIC Network Interface Chip (a/k/a Ethernet controller). Typically includes an Ethernet Media Access Controller and may also include an integrated physical layer (PHY).

ODM Original Design Manufacturer. Used in this specification to refer to the developers of motherboards that are used in a completed server system.

OEM Original Equipment Manufacturer. Used in this specification to refer to the server system manufacturer. OOB Out Of Band. A platform hardware management communications channel that connects a remote console

directly to the BMC. This channel is working even when the managed platform is in a soft off state. OPMA Open Platform Management Architecture. This acronym is used in several contexts as follows:

OPMA architecture—This is the overall description of the way OPMA subsystem cards connect to and interact with the motherboard. It includes not only the OPMA connector and associated electrical specification, but required firmware interfaces as well as other resources located on the motherboard that are required to support the intended usage model. The OPMA architecture is described in this specification. OPMA subsystem—An implementation of the OPMA architecture on the motherboard taken together with an OPMA feature card. OPMA feature card—This is a feature board that contains the majority of the management subsystem hardware. The term “mCard” (management card) is often used for this in the interest of brevity. OPMA connector—This is the connector into which an OPMA feature card (MegaRAC M300V card) is plugged to provide a given system hardware management feature set.


Term Definition OPMA interface—This refers collectively to all OPMA signals that are routed to and from the OPMA connector. The term “interface” as used in this document refers to an electrical interface as opposed to software or command interfaces.

OSPM Operating System directed Power Management PLD Programmable Logic Device POST Power On Self Test. In this specification, POST refers to code run at boot time by the BIOS on a server. PWM Pulse Width Modulation RxD Receive Data SCI System Control Interrupt. This is a way to notify the ACPI subsystem that a device is requesting service. SDR Sensor Data Record. See the IPMI specification for details. SDRR Sensor Data Record Repository SEEPROM

Serial Electrically Erasable Programmable Read-Only Memory

SEL System Error Log. See the IPMI specification for details. SERIRQ Serialize Interrupt Request. See the LPC specification for details. SMBus An I2C bus derivative. SMIC IPMI‘s Server Management Interface Chip command interface SoL Serial over LAN. The redirecting of text data to a remote text console using Ethernet as a transport. Redirected

text is typically the BMC’s CLI or system-generated text such as BIOS boot and setup screens. SPD Serial Presence Detect (used for DRAM auto sizing) SSIF IPMI‘s SMBus System Interface command interface TxD Transmit Data USB Universal Serial Bus Zero Impact

The ability to add an OPMA connector to an existing system for the purposes of upgrading the existing management subsystem without requiring changes in either the existing down solution firmware or in system BIOS.


Conventions The following table describes the conventions used in this specification.

Term Definition Down solution This refers to a basic, BMC-based, IPMI 1.5-compliant management subsystem that is

soldered to the motherboard. OPMA When OPMA is used as a noun, it should be taken by the reader to mean the OPMA

specification. Upgrade kit This refers to a mCard which is used to add enhanced capabilities to a server that employs a

down solution. Hardware signal names OPMA hardware signal names are presented in capital letters with underscores between

words. If the name ends with “L” then the signal is low true. If the name does not end with “L”, it is high true. Example: MCARD_CLR_CMOS_L

IPMI command names The names of all IPMI commands are presented with no spaces between the words in the name. Only the first letter of each word is capitalized. Example: GetSystemTypeIdentifier

IPMI command parameters The names of all IPMI command parameters are presented with spaces between the words in the name. Only the first letter of each word is capitalized unless the word is an acronym or abbreviation. Example: Interface ID

ms Abbreviation for millisecond(s) (1/1,000th of a second) μs Abbreviation for microsecond(s) (1/1,000,000th of a second) h Suffix for a number expressed in hexadecimal. Every four digit set is separated by an

underscore for readability. Example: 1234_5678h Note: Decimal is the default radix.

b Prefix for a number expressed in binary. Every four digits set is separated by an underscore for readability. Example: 1010_1101b Note: Decimal is the default radix.

Bit fields [x:y] Brackets designate bit fields. For example, [0] means bit zero. [3:0] refers to bits zero through three.


Reference Documents The following table lists the documents referenced in this OPMA specification or are otherwise related to the understanding of this specification.

Specification Comment IPMI 1.5 Intelligent Platform Management Interface Specification, Version 1.5, Revision 1.1 IPMI 2.0 Intelligent Platform Management Interface Specification, Version 2.0, Revision 1.0 DVI Digital Visual Interface Specification, Version 1.0 I2C Inter-Integrated Circuit Bus Specification, Version 2.1 JTAG IEEE 1149.1 LPC Low Pin Count Interface Specification, Revision 1.1 USB Universal Serial Bus Specification, Revision 2.0

Chapter Two : M300V Card Layout 9

Chapter 2 M300V Card Layout

MegaRAC® M300V card Layout

16MB FlashModule




32 MB SOCMemory


Chapter Three : M300V GUI 11

Chapter 3 M300V GUI

M300V GUI Overview The M300V card has a user-friendly Graphics User Interface (GUI) called the M300V GUI. It is designed to be easy to use. It has a low learning curve because it uses a standard Internet browser. You can expect to be up and running in less than five minutes. This chapter allows you to become familiar with the M300V GUI’s various functions. Each function is described in detail.

Note: Your M300V GUI may not match this document. If it does not appear to be the same, you can visit ami.com and download the most current user’s guide.


Initial Configuration of the MegaRAC® M300V card

Plug the MegaRAC® M300V card into the OPMA connector on your motherboard. You can access the MegaRAC® M300V card from another system via the network. AMI refers to this other system as the client system. To do this, you must know the MegaRAC® M300V card’s IP Address. If you have installed the MegaRAC® M300V card on a network that uses DHCP, you can search the network for the MegaRAC® M300V card. To locate and find out its IP Address, you can run Intel Device Spy for UPnP Technologies. Download Device Spy for UPnP Technologies from the Intel website:

http://www.intel.com/ Do a search for the following phrase:

Intel® Tools for UPnP Technologies The download page changes from time to time, so doing a search will give you the best results. Download the compressed file and uncompress it. The file will have a filename similar to the following:

218892_218892.zip The ZIP file will contain an EXE file that will have a filename similar to the following:

Intel_Tools_4UT_v1768.exe After you run the EXE file, the Device Spy.exe file will become available. Device Spy.exe is the file that contains the Intel Device Spy for UPnP Technologies program. Device Spy: Intel's Universal Control Point (UCP). This tool readily tests "action" invocations and events. Device Spy also traces packets sent to UPnP devices. For more information on how to use Intel Device Spy for UPnP Technologies see the documentation provided with it.

Step Action 1 Download the Intel Device Spy for UPnP Technologies program onto your remote client system.

Run the Intel Device Spy for UPnP Technologies program. The name “MegaRAC®-M300V Device” will display in the tree under UPnP Devices. 3 Select the “MegaRAC®-M300V Device” to view its properties. 4 Click on the IP address located in the “Presentation URL” field to connect to your MegaRAC®

M300V card. 5 When prompted for the user name and password, use root for the User Name and

superuser for the Password. Both are all lower-case characters. 6 Left click the OK button. After you successfully log into your MegaRAC® M300V card, you

are greeted with the Welcome to MegaRAC® M300V card screen.

Note: When you log in using the root user name and password, you have full administrative powers. It is advised that once you log in, you change the root password.


Setup your Client System’s Internet Browser You must first set up Internet Explorer browser on the client system before you can redirect the server’s console. Set up Internet Explorer’s Security Settings to allow the downloading of Signed ActiveX controls and also allow it to run Signed ActiveX controls.

Note: At the time this document was being created, the MegaRAC® ActiveX controls were in the process of being “signed” (by VeriSign®) so that they could be authenticated by Internet browsers. If redirection does not operate properly, you may have to set up Internet Explorer’s Security Settings to allow the downloading of Unsigned ActiveX controls and also allow it to run Unsigned ActiveX controls as well.

Default User Name and Password When you first try to access your M300V card, you will be prompted to enter a user name and password. The default user name and password are as follows:

Field Default User Name rootPassword superuser

Note: The default user name and password are in lower-case characters.

Note: When you log in using the root user name and password, you have full administrative powers. It

is advised that once you log in, you change the root password.


MegaRAC® GUI Explained After you successfully log into your MegaRAC® M300V, you are greeted with the MegaRAC® GUI.

Menu Bar There is a menu bar located at the top of the MegaRAC® GUI. It lists the following groups: • General Information Group • Server Health Group • Configuration Group • Remote Control Group • Maintenance Group • Languages Group

General Information Group This group of pages allows you to view system information.

System Information This page displays information about the firmware and device availability.

Field Description Firmware Revision Major and minor revision of the firmware. IPMI Version The IPMI command specification version. Build Time The build time of the firmware.


Server Health Group This page allows you to view the sensor readings and system event logs.

Button Description Sensor Readings This button allows you to view the readings from the various sensors. Sensor Readings with Thresholds

This button allows you to view the readings from the various sensors, with thresholds included in the table.

Event Log This button allows you to view the events written to the event log.

Sensor Reading This page displays all sensor readings from the system.

Item Description Sensor Selection drop down menu

This drop down menu allows you to select the type of sensor readings that you want to display in the list.

• All Sensors • Temperature Sensors • Voltage Sensors • Fan Sensors

Sensor Readings List This field displays the individual sensor’s name, reading and the current status of the sensor.

Refresh button Use this button to refresh the sensor readings view. Show Thresholds button

Clicking Show Thresholds button expands the sensor reading table and also show the various threshold settings for every sensor.

• Name • Status • Reading • Low NR • Low CT • Low NC • High NC • High CT • High NR

Sensor Readings with Thresholds

This page displays all sensor readings and thresholds from the system.

Item Description Sensor Selection drop down menu

This drop down menu allows you to select the type of sensor readings that you want to display in the list.

• All Sensors • Temperature Sensors • Voltage Sensors • Fan Sensors

Sensor Readings List This field displays the individual sensor’s name, reading and the current status of the sensor.

Refresh button Use this button to refresh the sensor readings view. Hide Thresholds button

Clicking Hide Thresholds button reduces the sensor reading table and hides the various threshold settings for every sensor.


Event Log

On this page there is a table of the events from the system's event log.

Item Description Select an event log category

Select one of the following event categories: • Sensor-Specific Events • BIOS Generated Events • System Management Software Events

Event Log You can obtain the following information for each event: • Event ID • Time Stamp • Sensor Name • Sensor Type • Description

Clear Event Log button

Left click the Event Log menu item to view and clear the event logs.

Sensor Monitoring Options

This page allows you to select sensor monitoring options. Sensors can be monitored external baseboard management controller (BMC) connected to the PMB bus or you can directly monitor sensors on the I2C bus.

Item Description Monitoring Options

You can select how you want to monitor the sensors. Direct Monitoring of sensors on the I2C bus (needs PMCP files) Monitoring via External BMC (needs IPMB connection)

External BMC Slave Address

If being monitored by an external BMC, you will need to provide the slave address so that the MegaRAC® M300V card will be able to read data from the onboard BMC on the motherboard/ server board. 0x20 is the address most commonly used.

PMCP monitoring file (sp.bin)

Select the Soft Processor (SP) File with the BIN file extension.

Sensor definitions file (sdr.dat)

Select the SDR File with the BIN file extension.

Upload new file (if one already exists)

Select this option if the SDR and Soft Processor (SP) File are already loaded on the card and you want to have it replaced with the new file.

Browse button Use this button to look for the SDR and Soft Processor (SP) File. Save button Use this button to save your settings.


Configuration Group This group of pages allows you to access various configuration settings.

Button Description Alerts button This button takes you to the Alert List page where you can add, edit or

remove alert destinations. LDAP button This button takes you to the LDAP Settings page where you can change

settings to authenticate and access the LDAP server. Mouse mode button This button takes you to the Mouse Mode Settings page where you can

view the current setting and/or change the mode of your pointing device to/from either Relative or Absolute.

Network button This button takes you to the Network Settings page where you can view the MAC address or change network settings, including the dynamic and static IP assignment.

SMTP button This button takes you to the SMTP Settings page where you can configure the SMTP mail server.

SSL Certificate button

This button takes you to the SSL Configuration page where you can view default certificate and private key or upload a new SSL Certificate.

Users button This button takes you to the User List page where you can add, edit or remove users.

Alert List

On this page you can configure alert destinations. To delete an alert, select it and press Delete. To create a new alert, select a Destination Address that has not been configured yet from the Alert Table entry and click Modify button.

Item Description Alert # Number of alert configuration entry. There are 15 alert configuration entries

in the system. Alert Level This is associated with the severity of the event that causes the alert. Destination Address

SNMP destination IP address for the configured alert entry.

Modify button Use this button to add a new alert configuration entry or modify an existing one.

Send Test Alert button

Use this button to test the selected alert configuration entry.


Alert List : Modify Alert

Please enter the information for the new alert below and press Save.

Item Description Alert Type drop down menu

You can select the way an alert is sent when it is triggered by an event. • SNMP Trap • Email

Event Severity drop down menu

You select the severity of the event that you want to trigger an alert. • Disable All • Informational • Warning • Critical • Non-recoverable

Destination IP Type the SNMP destination IP address into this field. If you have selected Email as the Alert Type, this field will be grayed out.

Email Address field

Type the Email Address into this field. If you have selected SNMP Trap as the Alert Type, this field will be grayed out.

Subject field Type a Subject into this field. If you have selected SNMP Trap as the Alert Type, this field will be grayed out.

Message field Type a Message into this field. If you have selected SNMP Trap as the Alert Type, this field will be grayed out.

Save button Use this button to save your settings. Cancel button Use this button to cancel this action.

Alert List : Send Test Alert

To send a test alert, select it and select the Send Test Alert button.


LDAP Settings

This page allows you to access the Lightweight Directory Access Protocol (LDAP) Server and authentication information and LDAP Settings information. LDAP is an Internet protocol that MegaRAC® card can use to authenticate users. If you have an LDAP server configured on your network, you can use it as an easy way to add, manage and authenticate MegaRAC® card users. It does this by passing login requests to your LDAP Server. This means that there is no need to define an additional authentication mechanism when using the MegaRAC card. Since your existing LDAP Server keeps authentication centralized, you will always know who is accessing network resources and can easily define user/group-based policies to control access. Use the following fields to authenticate and access the LDAP server.

Item Description Enable LDAP Authentication box

Check this box to enable LDAP authentication through an LDAP server.

Port field Enter the port address of your LDAP server. A common port used by LDAP is port 389.

IP Address field Type in the IP address of your LDAP server. Bind Password field

The Bind Password specifies the password for the MegaRAC card to use when binding to your LDAP server.

Bind DN field Type the Bind DN name in the Bind Distinguished Name field. The Bind DN is required if anonymous binds are not allowed on your LDAP server.

Searchbase field An LDAP directory requires an RFC 2247–compliant distinguished name or search base, to perform an LDAP search. Type in your search base name here.


Mouse Mode Settings

Here you can configure the mouse mode.

Item Description Set mode to Absolute option

Select this option to select mouse mode to “Absolute”, depending upon your system. This mode enables you to see two mouse cursors where one is redirected host mouse cursor and other is actual local mouse cursor. It is recommended to use this mode when host server is running in Windows platform.

Set mode to Relative option

Select this option to select mouse mode to “Relative”, depending upon your system. In this mode, the user can see only one mouse cursor for example redirected host mouse cursor. This mode will lock the local mouse cursor inside the redirected window and the user has to press Alt+M to unlock and stop mouse redirection. Here Alt+M is basically used to start/stop mouse redirection. It is recommended to use this mouse mode when host server is running in Linux and other OS platforms.

Apply button Use this button to make the settings active.


Network Settings

This page allows you to view and modify the network settings on this page. Select whether to obtain an IP address automatically or manually configure one.

Item Description MAC Address field

This field displays the MAC address of the MegaRAC® M300V card.

Obtain an IP address automatically (use DHCP) option

This option allows the MegaRAC® M300V’s IP to be configured by a DHCP server (dynamically).

Use the following IP address option

This option allows you to configure the MegaRAC® M300V’s IP address with a static IP. The IP Address, Subnet Mask and Gateway fields will become editable when this option is selected.

IP Address field

This field allows you to set the MegaRAC® M300V’s IP address.

Subnet Mask field

This field allows you to set the Subnet Mask The MegaRAC® M300V resides on.

Default Gateway field

This field allows you to set the MegaRAC® M300V’s Gateway access address.

Save button Use this button to save your settings.


SMTP Setting

This button takes you to the SMTP Settings page where you can configure the SMTP mail server.

Item Description Mail Server IP field

This field allows you to configure the IP Address of the SMTP mail server.

Save button Use this button to save your settings.

SSL Configuration Here you can upload an SSL Certificate and SSL Private Key to use when accessing your MegaRAC® M300V.

Item Description Default Certificate

This field displays the Default Certificate.

Default Private Key

This field displays the Default Private Key.

New SSL Certificate Upload field

This field allows you to upload an SSL Certificate and SSL Private Key.

Browse button Use the Browse button to search for your SSL Certificate or Private Key. Both types of files have a PEM file extension.

Upload button Use this button to upload the files to the card.

Note: The MegaRAC® M300V does not support pass-phrase encrypted certificates. Once you upload the certificates, left click the OK button to reset your MegaRAC® M300V. You can now access your MegaRAC® M300V securely using the following format in your IP Address field from your Internet browser: https://<your MegaRAC® M300V’s IP address here> For example, if your MegaRAC® M300V’s IP address is 192.168.0.30, enter the following: https://192.168.0.30 Notice the <s> after <http>.

Note: You must accept the certificate before you are able to access your MegaRAC® M300V again.


User List

This page allows you to view the current list of user slots for the server. If you would like to delete or modify a user, select their name in the list and select Delete User or Modify User. To add a new user, select an un-configured slot and select Add User.

Item Description UserID column This column displays the ID number used in association with the User Name. User Name column

This column displays a list of all users who are able to access this MegaRAC® M300V. Note: The default administrator is root. It is prudent for you to change the root password.

Network Privilege column

This column displays the network rights associated with the account.

Add User button

Use this button to add a new user. You must select an open field first.

Modify User button

Use this button to modify an existing user. You must select a user first.

Delete User button

Use this button to delete an existing user. You must select a user first.


Add New User

This page allows you to enter the requested information for the new user. You can add a new user by entering the information for the new user and by selecting the Add button. Press Cancel to return to the user list.

Note: Only user accounts with administrative rights are allowed to add, edit and remove users. Non-administrator users can only change their own password. If a new user is given administrative privileges, permissions are automatically granted for all interfaces.

Item Description User Name field

Enter a user name in the Username field. Your user name must be at least four characters long and no more than 32 characters long. User names are case-sensitive and must start with an alphabetical character.

Password field Enter a password in the Password field. Your password must be at least eight characters long. Note: The password must be a minimum of eight characters and a

maximum of 32 characters. Use a mixture of alphanumeric and special characters for better security. The password is case-sensitive.

Confirm Password field

Confirm your password by entering your password again in the Confirm Password field.

Network Privileges drop down menu

Assign network permissions and access rights. • Administrator • Operator • No Access

Serial Privileges drop down menu

Assign access rights through the serial port and permissions. • Administrator • Operator • No Access

Add button Use this button to add the new user. Cancel button Use this button to cancel this action.


Modify User

You can use this page to update the information for the user selected from the User List. After you have modified the information, click Modify. Click Cancel to return to the User List, while discarding all changes.

Item Description User Name field

This field contains the user name being modified. This field cannot be modified.

Change Password box

Place a check in this box to change the password.

Password field Enter the new password in the Password field. Your password must be at least eight characters long. Note: The password must be a minimum of eight characters and a

maximum of 32 characters. Use a mixture of alphanumeric and special characters for better security. The password is case-sensitive.

Confirm Password field

Confirm your password by entering your password again in the Confirm Password field.

Network Privileges drop down menu

Modify network permissions and access rights. • Administrator • Operator • User • Callback • No Access

Serial Privileges drop down menu

Modify access rights through the serial port and permissions. • Administrator • Operator • No Access

Modify button Use this button to update the user account. Cancel button Use this button to cancel this action.

Delete User

If you would like to delete a user, highlight the user name from the User List and click on the Delete User button.


Remote Control Group This section allows you to initiate Console Redirection and to view the Power Control options.

Button Description Console Redirection button

Use this button to launch the redirection console via Java or ActiveX (Internet Explorer only) viewers.

Power Control button

Use this button to view the power state and perform power control functions on the server.

Launch Redirection

This page allows you to launch console redirection and to manage the remote server. Select the desired viewer that you wish to use to start redirection. Click on the appropriate button to launch the remote console.

Two console viewers are available for redirection support.

1. ActiveX Console (Only on a windows platform with Internet Explorer) 2. Java Console (Recommended on all platforms)

Remote Console Shortcut Key Combinations The most powerful feature of your MegaRAC® M300V is the ability to redirect the server’s console. To redirect the server’s console is the ability to manage your server as if it were physically in front of you, when it is not. The following table is a list of basic keystrokes and their functions:

Keystroke Description <ATL> + <S> Start Console Redirection <ATL> + <T> Stop Console Redirection <ATL> + <R> Restart Console Redirection <ATL> + <F> Toggle Full Screen Mode <ATL> + <M> Synchronize Mouse <ATL> + <A> Hold/Unhold Right <ATL> Key <ATL> + <B> Hold/Unhold Left <ATL> Key <ATL> + <L> Hold/Unhold Right <CTRL> Key <ATL> + <N> Hold/Unhold Left <CTRL> Key <ATL> + <D> Generate <CTRL>, <ATL>, + <DEL> <ATL> + <E> Start CD-ROM Drive Redirection

Note: Occasionally, when invoking the <ALT> + <E> keys, the screen does not refresh and will appear

to be blank. You can hit any key on your keyboard or move the mouse to refresh the screen.


Console Redirection Window

Console Redirection Window : Video This dropdown menu contains the following dropdown menu items:

Menu Item Description Start Redirection This menu item can be used to begin Console Redirection. Stop Redirection This menu item can be used to halt Console Redirection. Restart This menu item can be used to stop Console Redirection and then start

Console Redirection again. Compression This menu item can be used to configure the compression used. You can

select from the following options: • None (Default Setting) • Type-I • Type-II • Both

Full Screen This menu item can be used to view the Console Redirection in Full Screen mode. Note: Set your client system’s screen resolution to 1024 x 768 so that you can view the server in true full screen.

Exit This menu item can be used to exit and close the redirection window.

Console Redirection Window : Keyboard This dropdown menu contains the following dropdown menu items:

Menu Item Description Hold Right Ctrl Key

This menu item can be used to act as the right-side <CTRL> key when in Console Redirection.

Hold Right Alt Key

This menu item can be used to act as the right-side <ALT> key when in Console Redirection.

Hold Left Ctrl Key

This menu item can be used to act as the left-side <CTRL> key when in Console Redirection.

Hold Left Alt Key This menu item can be used to act as the left-side <ALT> key when in Console Redirection.

Left Windows Key

This menu item can be used to act as the left-side <WIN> key when in Console Redirection. You can also decide how the key should be pressed:

• Hold Down • Press and Release

Right Windows Key

This menu item can be used to act as the right-side <WIN> key when in Console Redirection. You can also decide how the key should be pressed:

• Hold Down • Press and Release

Alt+Ctrl+Del This menu item can be used to act as if you depressed the <CTRL>, <ALT> and <DEL> keys down simultaneously on the server that you are redirecting.


Console Redirection Window : Mouse

This dropdown menu contains the following dropdown menu item:

Menu Item Description Sync Cursor This menu item can be used to synchronize or unsynchronize the mouse

cursor.

Console Redirection Window : Options This dropdown menu contains the following dropdown menu items:

Menu Item Description Bandwidth The Bandwidth Usage option allows you to adjust the bandwidth. You can

select one of the following: • 256 Kbps • 512 Kbps • 1 Mbps • 10 Mbps • 100 Mbps (Default Setting)

Quality This option allows you to configure the video quality. Depending on the bandwidth selected, you can adjust the speed/quality level. The level can be from 1 through 5, 1 being the maximum speed for given bandwidth and 5 being the maximum quality for given bandwidth. The relation between speed and quality is that more speed tries to reduce the data over network and thus reducing quality and vice versa.

Video Settings The Video Performance Parameters allows you to enhance the frame rate of your remote console session. Red Gain slider This slider allows you to increase or decrease the

amount of red. Green Gain slider This slider allows you to increase or decrease the

amount of green. Blue Gain slider This slider allows you to increase or decrease the

amount of blue. Horizontal This allows you to modify the horizontal

position of the screen. Vertical Position This allows you to modify the vertical position

of the screen. Set Default Gains button This button allows you to reset the color gains to

the default levels. Auto Calibrate button This button allows the card to automatically set

the color gains and noise thresholds. KB/Mouse Encryption

This option allows you to encrypt keyboard inputs and mouse movements sent between the connections.


Console Redirection Window : Device

This dropdown menu contains the following dropdown menu items:

Menu Item Description CDROM This menu item can be used to start or stop the redirection of the CD-ROM

drive. You can redirect from an image of a CD or from a physical CD-ROM drive.

Floppy This menu item can be used to start or stop the redirection of the floppy drive. You can redirect from an image of a disk or from a physical floppy drive. Note: Floppy Redirection is not an available feature on all versions of

the MegaRAC® M300V cards.

Console Redirection Window : Help This dropdown menu contains the following dropdown menu item:

Menu Item Description About AVCView Displays the copyright and version information.

Power Status and Control

This page allows you to view and control the power of your server. Select one of the options listed in the following table to execute on your server. You will be asked to confirm your choice. Upon confirmation, the command will be executed and you will be informed of the status.

Item Description Reset Server option

Select this option to reset the server.

Power Off Server - Immediate option

Select this option to power down the server immediately.

Power Off Server - Orderly Shutdown option

Select this option to power down the server gracefully.

Power On Server option

Select this option to power up the server.

Power Cycle Server option

Select this option to power cycle the server.

Perform Action button

Select this button to execute the option selected.


Maintenance Group This group of pages allows you to do maintenance tasks on the device.

Firmware Update

Warning

DO NOT CLOSE THE WINDOW USING THE CLOSE BUTTON (X) ON THE TITLE BAR WHEN THE MEGARAC® IS IN UPDATE MODE. USE THE CANCEL

BUTTON ONLY!

Note: The firmware upgrade process is a crucial operation. Make sure that the chances of a power or connectivity loss are minimal when performing this operation.

Note: Once you enter into Update Mode and choose to cancel the firmware flash operation, the MegaRAC® card must be reset. This means that you must close the Internet browser and log back onto the MegaRAC® card before you can perform any other types of operations. You can update the device's firmware here. Select the Enter Update Mode button to put the device in a special mode that allows firmware update. You can now follow the instructions presented in the subsequent pages to successfully update the card’s firmware. The device will reset if update is canceled.

Item Description Enter Update Mode button

Select the Enter Update Mode button to put the device in a special mode that allows firmware update. Follow the instructions listed on the update wizard. The device will reset if update is canceled.

Languages

You can change the language from the Languages page.

Note: As of the initial release of this document, only English is supported.

Logging Out To log out, simply click on the Disconnect link.

Chapter Four : M300V Interface Signal Specifications 31

Chapter 4 M300V Interface Signal Specifications

Overview This section provides detail on the signals specified for the OPMA connector. These signals are collectively referred to as “the OPMA interface” in this document even though they are for the MegaRAC M300V card.

Signal Callout Grouped by Functions This section provides a description of the major buses and signal subgroups. Under each signal group, individual signals are referred to by a short descriptive name followed by the capitalized hardware signal name inside parentheses. For signals that are closely related, shortcuts have been taken when displaying the associated hardware signal names. For example, if there are four signals named SIG0, SIG1, SIG2 and SIG3, these are abbreviated as SIG0–SIG3.

LED Control Signals The LED control signals enable the MegaRAC M300V card-controlled LEDs to provide a visual indication of the hardware health and status. OPMA defines only two dedicated LED control signals at the connector. If the system level manageability solution requires a more detailed visual indication of faults with other LEDs or LCD indicators, they may be achieved through I2C or SMBus-based indicators. Any other system specific GPIOs should be implemented on the motherboard using I2C or SMBus-based GPIO expanders (for example, 8575 devices). OPMA does not require the implementation of additional GPIOs. However, such GPIOs are likely to be implemented for a variety of purposes including GPIO based sensors and fault diagnostic LEDs. BMC firmware that is specific to a given motherboard must handle these system specific GPIOs.

Signal Group: LED Control

Signal Group Signal Name Signal Function I/O Signal Termination on MB*

LED Control FAULT_LED_L Fault LED control O 4.7k PU to +3.3V CHASSIS_ID_L Chassis identification LED control O 4.7k PU to +3.3V • Fault LED control (FAULT_LED_L)

• Connected to a BMC GPIO for fault status indicator LED control. • Direct BMC connection allows control of this LED even under a hung I2C or SMBus

scenario.

• Chassis ID LED control (CHASSIS_ID_L) • Connected to a BMC GPIO for chassis ID LED control • Direct BMC connection simplifies blink rate control by the MegaRAC M300V card

firmware.


USB Interface Signals

The OPMA interface USB signals enable the MegaRAC M300V card to emulate a USB keyboard and mouse, which are used for KVMoIP. This USB interface is also used by a MegaRAC M300V card to emulate USB mass storage devices (for example, virtual CD, virtual floppy disk and so on) to the system.

Signal Group: USB


USB USB_P USB Differential Pair I/O N/A USB_N • USB interface (USB_P, USB_N)

• One USB bus

Note: The OPMA interface only supports one USB channel. A USB hub device is implemented in the MegaRAC M300V card to support two USB devices, one USB1.1 for Keyboard and Mouse and One USB2.0 High speed device for CDROM/FLOPPY.

Push-Button Signals The push-button signals are dedicated I/O control signals that are connected directly to the MegaRAC M300V card. This allows the MegaRAC M300V card to remotely/virtually control these signals. These signals are implemented as dedicated I/O control instead of I2C or SMBus-based control signals because the supported functions are deemed mission critical.

Signal Group: Buttons


Buttons MCARD_PWRBTN_L MegaRAC M300V card remote system power button

O 4.7k PU to +3.3V

MCARD_RSTBTN_L MegaRAC M300V card remote system reset button

O 4.7k PU to +3.3V

MCARD_NMIBTN_L MegaRAC M300V card remote system NMI button

O 4.7k PU to +3.3V

• MegaRAC M300V card host’s system Power button control (MCARD_PWRBTN_L)

• This output allows a remote console to control the MegaRAC M300V card host’s system Power button signal. This is used to power up or power down a server system remotely. It can also be used to force the server into a low power ACPI state or to wake it up from a low-power ACPI state.

• MegaRAC M300V card host’s system Reset button control (MCARD_RSTBTN_L) • This output allows a remote console to control the MegaRAC M300V card host’s system

reset button signal. This is used to recover a hung remote system. • MegaRAC M300V card NMI button control (MCARD_NMIBTN_L)

• This output allows a remote console to control the MegaRAC M300V card host’s system NMI (core dump) signal. The core dump information can be used to debug system software issues.


Video Capture DVI-I Signals

The server’s graphics chip sends the DVI-I (Digital Visual Interface) signals to the MegaRAC M300V card, which uses these signals to capture the graphics console. The captured video data is compressed and transmitted over an Ethernet link to a remote console. The console operator can then view all graphical screens of the remote machine. OPMA provides a total of 18 signals for this purpose. Signals in this group are defined by the Digital Display Working Group (DDWG) (http://www.ddwg.org). The DDWG specification describes a TMDS (Transition Minimized Differential Signaling) receiver chip for retrieving the serialized data from the TMDS channels.

Signal Group: Video Capture DVI-I


Video Capture DVI-I

DVI_TX0_H TMDS differential pair; channel 0 I/O N/A DVI_TX0_L DVI_TX1_H TMDS differential pair; channel 1 I/O N/A DVI_TX1_L DVI_TX2_H TMDS differential pair; channel 2 I/O N/A DVI_TX2_L DVI_CLK_H TMDS differential pair; clock I/O N/A DVI_CLK_L DVI_DDC_DATA Data signal for DDC interface I/O 4.7k PU to +3.3V DVI_DDC_CLK Clock signal for DDC interface I/O 4.7k PU to +3.3V ANALOG_DDC_DATA Not Used By M300V I/O 4.7k PU to +3.3V ANALOG_DDC_CLK I/O 4.7k PU to +3.3V ANALOG_RED I N/A ANALOG_GREEN I N/A ANALOG_BLUE I N/A ANALOG_HSYNC I/O N/A ANALOG_VSYNC I/O N/A • TMDS differential data pairs (DVI_TXD0_H–DVI_TXD2_H, DVI_TXD0_L–

DVI_TXD2_L) • These six signals form three communications channels that carry digitized video data to

an M300V mCard for graphics capture purposes. Channel 0 carries the blue data, channel 1 carries the green data and channel 2 carries the red data.

• TMDS differential clock pair (DVI_TX_CLK_H, DVI_TX_CLK_L) • These two signals form a differential clock for digitized video data transfer.

• DVI interface DDC clock and data (DVI_DDC_DATA, DVI_DDC_CLK) • These two signals form the Display Data Channel for the DVI interface. The MegaRAC

M300V card can communicate its capabilities to a host system’s DVI-based video chip using this communications bus. For example, support of this feature can disallow a video subsystem from driving unsupported video resolutions, and so on, to the MegaRAC M300V card video capture circuit.


Multi-Bank Fan Control Signals

OPMA partitions the server system fans into three control banks. Each bank can be independently controlled to operate at three levels of speed through PWM control. Variable speed fans allow the MegaRAC M300V card BMC to run the fans at the slowest (and therefore quietest) possible speed while maintaining associated subsystems at acceptable temperature levels.

Signal Group: Multi-Bank Fan Control


Multi-Bank Fan Control

MCARD_FAN_PWM_CPU mCard PWM CPU fan control O 3.3V signal level MCARD_FAN_PWM_SYS mCard PWM system fan control O 3.3V signal level MCARD_FAN_PWM_PS mCard PWM power supply fan control O 3.3V signal level • System fan PWM control (MCARD_FAN_PWM_SYS)

• PWM output to control the speed of all system fans • CPU fan PWM control (MCARD_FAN_PWM_CPU)

• PWM output to control the speed of all CPU fans • Power supply fan PWM control (MCARD_FAN_PWM_PS)

• PWM output to control the speed of all power supply fans

Multiplexed Fan Tach Input Signals The fan tachometer inputs are provided for the MegaRAC M300V card to read in the RPM of each set of fans connected to it. OPMA incorporates fan tach signal multiplexing. OPMA-compliant motherboards must contain a 16:4 digital fan tach MUX. OEMs/ODMs can use this feature to implement systems with up to 16 monitored fans. This multiplexer is controlled by the MegaRAC M300V card. The MegaRAC M300V cards whose BMCs have less than four fan tach inputs must add an additional 4:2 multiplexer (if the BMC has two fan tach inputs) or 4:1 multiplexer (if the BMC has only one fan tach input) as required.

Signal Group: Multiplexed Fan Tachometers


Multiplexed Fan Tachometers

MCARD_FAN_TACH0 Multiplexed fan tach input 0 I 4.7k PU to +3.3V MCARD_FAN_TACH1 Multiplexed fan tach input 1 I 4.7k PU to +3.3V MCARD_FAN_TACH2 Multiplexed fan tach input 2 I 4.7k PU to +3.3V MCARD_FAN_TACH3 Multiplexed fan tach input 3 I 4.7k PU to +3.3V • Multiplexed fan tach inputs (MCARD_FAN_TACH0–MCARD_FAN_TACH3)

• Four tachometer inputs from motherboard-based fan tachometer MUX.


Fan Tach MUX Bank Selector Signals

These signals select one of four fan tachometer banks to be switched in for read back by the MegaRAC M300V card.

Signal Group: Multiplexed Fan Tachometer Controls


Fan tachometer MUX Controls

MCARD_FAN_SEL0_L Multiplexed fan tach MUX control 0 O 4.7k PU to +3.3V MCARD_FAN_SEL1_L Multiplexed fan tach MUX control 1 O 4.7k PU to +3.3V MCARD_FAN_SEL2_L Multiplexed fan tach MUX control 2 O 4.7k PU to +3.3V MCARD_FAN_SEL3_L Multiplexed fan tach MUX control 3 O 4.7k PU to +3.3V • Fan tach multiplexer control (MCARD_FAN_SEL0_L–MCARD_FAN_SEL3_L)

• Four tachometer MUX control active Low signals • Controls which tachometer bank is switched in from the motherboard-mounted digital

multiplexer. Firmware must not enable more than one of these signals simultaneously.

Single Wire Analog Voltage Sensor Signals The analog voltage sensors are primary voltage rails brought in for the MegaRAC M300V card A/D converters or analog comparators. The MegaRAC M300V card monitors these rails for appropriate voltage levels. While some of the existing BMCs used on mCards provide A/D converters, others provide analog comparators for voltage monitoring. The motherboard vendor must properly condition the voltage rails connected to these inputs. All voltages that are linked to these signals must be divided down or amplified up appropriately to meet the below specifications: ACOMP_ADC# Input Voltage Range = +1.8V – AVDD (max), positive AVDD = +3.3V ± 2%

Signal Group: Single Wire Analog Sensors


Single Wire Analog Sensors

ACOMP_ADC0 Analog voltage input 0 I N/A ACOMP_ADC1 Analog voltage input 1 I N/A ACOMP_ADC2 Analog voltage input 2 I N/A ACOMP_ADC3 Analog voltage input 3 I N/A ACOMP_ADC4 Analog voltage input 4 I N/A ACOMP_ADC5 Analog voltage input 5 I N/A • Analog voltage sensors (ACOMP_ADC0–ACOMP_ADC5)

• Six analog voltage sensor inputs


MCard Serial Port and ICMB

These signals are provided to support 16550 UART style interfaces. The signals through the connector are digital logic levels only. Any circuitry required for translation to specific levels (for example, RS-232 and RS-485) is provided on the motherboard. Two channels of this type are defined.


mCard Serial Port

MCARD_DTR0_L Data Terminal Ready for Serial Port 0 O N/A MCARD_DCD0_L Data Carrier Detect for Serial Port 0 I N/A MCARD_DSR0_L Data Set Ready for Serial Port 0 I N/A MCARD_RI0_L Ring Indicator for Serial Port 0 I N/A MCARD_RXD0 Receive Data for Serial Port 0 I N/A MCARD_TXD0 Transmit Data for Serial Port 0 O N/A MCARD_CTS0_L Clear to Send for Serial Port 0 I N/A MCARD_RTS0_L Request to Send for Serial Port 0 O N/A

ICMB MCARD_RXD1 Receive Data for ICMB I N/A MCARD_TXD1 Transmit Data for ICMB O N/A MCARD_TXD1_EN Transmit Data Enable for ICMB O N/A

Signal Group: mCard Serial Port and ICMB • Channel 0 is a full UART that allow connection to either DTE (Data Terminal Equipment –

connect to another computer) or to DCE (Data Communications Equipment – connects to a MODEM). • Dedicated for use by BMC UART-generated traffic that will be routed to a back panel

RS- 232 connector • Hardware flow control supported

• Channel 3 includes TxD and RxD only along with TxD data enable control signal • Dedicated for use by ICMB traffic • XON and XOFF (software flow control) only

Serial Over LAN Feedback Path

Traffic generated by the system UART may need to be redirected over the LAN for consumption by a remote text console. This is referred to as serial over LAN (SoL). OPMA provides the signals in this section to capture the local system’s host UART stream for formation into packets by the BMC and later transmission to the remote console. See Chapter 6 for more details on expected usage.

Signal Group: SoL Serial Port


Serial Port for Serial Over LAN

MCARD_RXD_SoL Receive Data for Serial over LAN I N/A MCARD_TXD_SoL Transmit Data for Serial over LAN O N/A MCARD_AUX_SoL_CTRL_L Serial Port handshake signal MUX control O 4.7k PU to +3.3V • One transmit/receive channel pair—includes TxD and RxD only

• Dedicated purpose is to feed back system UART data to mCard for SoL support.


Dedicated Management Ethernet Signals

These signals provide the interface for the MegaRAC M300V card dedicated management LAN. These signals go across the OPMA connector and connect the MegaRAC M300V card NIC to a management LAN RJ-45 connector.

Signal Group: Management Ethernet


Management Ethernet

MCARD_TX_H Transmit Differential Pair O N/A MCARD_TX_L MCARD_RX_H Receive Differential Pair I N/A MCARD_RX_L POE_PWR NOT USED By M300V I N/A POE_PWR POE_GND NOT USED by M300V O N/A POE_GND LAN_BUSY_LED_L Busy LED O N/A LAN_LINK_LED_L Link LED O N/A • Ten signals that implement the dedicated management Ethernet.

BMC Host Interface ID Signals These signals are provided for the system level software, BIOS and so on, to identify the type of IPMI communications interface supported by the installed mCard solution. The IPMI Specification currently describes four possible host interfaces—KCS, BT, SMIC and SSIF.

M300V Implements 3 KCS only Interface. KCS0 Port 0xCA2,0xCA3 KCS1 Port 0xCA4,0xCA5 KCS2 Port 0xCA6,0xCA7

Signal Group: Interface Type ID

Signal Group Signal Name Signal Function I/O Signal

Termination on MB*

Interface Type ID

INTERFACE_ID0 Binary encoded interface type identification number

O 4.7k PU to +3.3V INTERFACE_ID1 INTERFACE_ID2 • mCard IPMI communications interface ID (INTERFACE_ID0–INTERFACE_ID2)

• Three mCard interface ID signals • Speeds boot process by allowing the BIOS to quickly identify the IPMI interface type of

the MegaRAC M300V card for initial handshaking operations with BIOS during POST.


MCard Presence Detection Signal

This signal allows the BIOS to determine if the MegaRAC M300V card is present in the OPMA connector. The BIOS should not attempt to read the INTERFACE_ID signals until after it has detected the presence of the MegaRAC M300V card.

Signal Group: Card Detect


Card Detect MCARD_DETECT_L Indicates presence/ absence of mCard O 4.7k PU to +3.3V • mCard presence detection (MCARD_DETECT_L)

• Speeds boot process by allowing the BIOS to quickly detect the presence of the MegaRAC M300V card in the OPMA connector.

System Status Signals

These signals provide specific system status to the MegaRAC M300V card.

Signal Group: Status


Status ALL_PWROK Indicates all the voltage rails are good I 4.7k PU to +3.3V SYS_INTRUDER_L Indicates intrusion on the system I 10k PU to +3.3V SYS_THERMTRIP_L System thermal trip alert signal I 4.7k PU to +3.3V SYS_LINE_AC_L Line AC present signal I 4.7k PU to +3.3V SYS_PWRBTN_L Indicates status of system power button I 3.3V thru switch SYS_RSTBTN_L Indicates status of system reset button I 3.3V thru switch SYS_NMIBTN_L Indicates status of system NMI button I 3.3V thru switch SYS_SMI_L Motherboard SMI status I 4.7k PU to +3.3V SYS_PCI_RST_L Motherboard reset status I 4.7k PU to +3.3V SYS_ACPI_STATE0 Binary encoded indication of the current

system ACPI sleep state (S0, S1, S2, S3, S4/ S5)

I 4.7k PU to +3.3V SYS_ACPI_STATE1 I 4.7k PU to +3.3V SYS_ACPI_STATE2 I 4.7k PU to +3.3V SYS_SMBUS_IO_EXP_INTR_L Interrupt from SMBus-based I/O expander I 4.7k PU to +3.3V • System Power OK indication (PWROK):

• This signal indicates that system power sequencing was successful and that all voltage rails have stabilized.

• Critical system thermal trip point detection (MCARD_THERMTRIP_L): • Single consolidated ThermTrip signal from all of the CPUs. ThermTrip indicates that the

processor has overheated to the point of potential hardware damage and has shut down as a result.

• Connected directly to a M300V BMC GPIO (not through the I2C or SMBus-based GPIO expander).

• Chassis intrusion detection (MCARD_INTRUDER_L):

• Single consolidated intrusion sensor from multiple bays or locations within the system. • Line AC Power indicator (SYS_LINE_AC_L):

• Provides an indication of standby power status to the MegaRAC M300V card. An active signal indicates that the standby power is good. A rising edge on this signal indicates that


system AC power has been cut off. The system power supply typically continues to supply standby power for a small amount of time (system specific) after AC power is removed. The BMC is operational during this small window and should use the assertion of this signal to do any emergency clean up that may be required. For example, if the BMC is in the middle of writing to NV storage, it should abort this process in an orderly manner so that data corruption does not occur.

• System Power button (SYS_PWRBTN_L): • The MegaRAC M300V card monitors this input to detect when the system power button

is pushed. This signal can be used to remotely detect a local Power button assertion. • System Reset button (SYS_RSTBTN_L):

• The MegaRAC M300V card monitors this input to detect when the system reset button is pushed. This signal can be used to remotely detect a local reset button assertion.

• System NMI button (SYS_NMIBTN_L): • The MegaRAC M300V card monitors this input to detect when the system NMI button is

pushed. This signal can be used to remotely detect a local NMI button assertion. • System SMI (SYS_SMI_L):

• The MegaRAC M300V card monitors this input for detecting SMI activity on the motherboard. Usage of this signal is platform specific.

Note: The MegaRAC M300V cards do not generate SMI to the system using this signal; it is for

monitoring purposes only. • System PCI reset (SYS_PCI_RST_L):

• The MegaRAC M300V card monitors this input to detect a PCI reset event. One potential use is to detect system resets that are initiated using Ctrl-Alt-Del. If the system does not contain a PCI bus, this signal should be used to monitor the reset status of the implemented system bus.

• System ACPI state indication (SYS_ACPI_STATE0–SYS_ACPI_STATE2) • Three signals • Binary encoded ACPI state indicator for the MegaRAC M300V card. Motherboard

hardware encodes the system ACPI state and presents it to the MegaRAC M300V card through these inputs.

• SMBus I/O Expander Interrupt (SYS_SMBUS_IO_EXP_INTR_L): • The primary purpose of this signal is to provide the ability to interrupt the BMC based on

signal inputs into I2C or SMBus-based GPIO expanders. SMBus-based I/O expander devices (for example, PCA 9555) may also be available that generate interrupts on a state change on any of its inputs.


System Control Signals

These signals are used by the MegaRAC M300V card to control some specific, system-level parameters.

Signal Group: Control


Control MCARD_CLR_CMOS_L mCard system CMOS clear control O 4.7k PU to +3.3V MCARD_LOCAL_LOCK_L mCard local lock out control O 4.7k PU to +3.3V MCARD_SYS_SPKR_DATA mCard system speaker control O N/A MCARD_SCI_INT_L mCard SCI to the system chipset O 4.7k PU to +3.3V • Local access lock out (MCARD_LOCAL_LOCK_L):

• Assertion of this signal by the MegaRAC M300V card enables a local mode access lock out mechanism.

• Clear CMOS control (MCARD_CLR_CMOS_L): • The MegaRAC M300V card uses this signal to clear the host system CMOS RAM.

Clearing the CMOS is often necessary after actions such as updating BIOS. Asserting this signal for at least 250 ms and then deasserting it causes the system CMOS to be cleared.

• Speaker data (MCARD_SYS_SPKR_L): • The BMC may pulse this signal to send tones to the system speaker/transducer that is

typically soldered to the motherboard. This allows the BMC a simple audile alarm capability. Special motherboard support is required to integrate the BMC speaker control with that normally provided by the system chipset.

• System Control Interrupt (MCARD_SCI_INT_L): • The MegaRAC M300V card uses this signal to assert an SCI to the system to indicate to

the system that the MegaRAC M300V card has identified an event which requires attention from the host system. The system will send some system specific IPMI commands in response to receipt of this signal.


I2C or SMBus Signals

OPMA supports a total of five I2C or SMBus buses to allow the MegaRAC M300V card to communicate with multiple I2C and SMBus devices in the system. The numbers of I2C or SMBus interfaces supported by specific BMCs vary, but it is the responsibility of all mCards to ensure that all of the I2C or SMBus pins on the OPMA connector are in some way connected to the BMC’s I2C or SMBus controller(s).

Signal Group: I2C or SMBus


I2C or SMBus X 5

MCARD_I2C_IPMB_SCL I2C clock for the IPMB bus I/O 4.7k PU to +3.3V MCARD_I2C_IPMB_SDA I2C data for the IPMB bus I/O 4.7k PU to +3.3V MCARD_I2C_ SIDEBAND_NIC_SCL

I2C clock for the NIC sideband bus I/O 4.7k PU to +3.3V

MCARD_I2C_ SIDEBAND_NIC_SDA

I2C data for the NIC sideband bus I/O 4.7k PU to +3.3V

MCARD_I2C_ SIDEBAND_NIC_ALERT

Alert signal from the NIC for I2C traffic I/O 4.7k PU to +3.3V

MCARD_I2C_PRIVATE0_SCL I2C clock for mCard private 0 I2C bus I/O 4.7k PU to +3.3V MCARD_I2C_PRIVATE0_ SDA

I2C data for mCard private 0 I2C bus I/O 4.7k PU to +3.3V



MCARD_I2C_SHARED_SCL mCard shared host device I2C clock I/O 4.7k PU to +3.3V MCARD_I2C_SHARED_SDA mCard shared host device I2C data I/O 4.7k PU to +3.3V • mCard IPMB (MCARD_I2C_IPMB_SCL, MCARD_I2C_IPMB_SDA)

• One bus (two signals) for Intelligent Platform Management Bus • mCard sideband NIC channel (MCARD_I2C_SIDEBAND_NIC_SCL,

MCARD_I2C_SIDEBAND_NIC_SDA) • One bus (two signals) through which the system NIC may send IPMI management traffic

to support a shared NIC configuration. • The additional MCARD_I2C_SIDEBAND_NIC_ALERT signal is required for NIC

devices that are not capable of multi-mastering. This signal is primarily used for alerting the MegaRAC M300V card that packets are available.

• mCard shared host I2C bus or SMBus (MCARD_I2C_SHARED_SCL, MCARD_I2C_SHARED_SDA) • One bus (two signals) for communicating with devices that are on an I2C bus or SMBus

that another master is also connected to. The typical example is sharing an I2C bus with the host chipset’s SMBus controller so that both the system and the BMC have direct access to SMBus-based devices such as DRAM SPD (Serial Presence Detect).

• If used in this configuration, the SMBus master devices (the host and the MegaRAC M300V card) must conform to the multi-mastering protocol.

• mCard private I2C or SMBus buses (MCARD_I2C_PRIVATE0_SCL, MCARD_I2C_PRIVATE1_SCL, MCARD_I2C_PRIVATE0_SDA and MCARD_I2C_PRIVATE1_SDA) • Two buses (four signals) for mCard private I2C or SMBus buses. The bulk of the I2C or

SMBus sensor devices that are monitored by the BMC should be placed on these buses.


LPC Bus Signals

The LPC bus is the main system CPU interface to the MegaRAC M300V card. The MegaRAC M300V card compatible BMCs accept IPMI commands from the host system either through the LPC bus (KCS, BT, SMIC) or through the I2C or SMBus (SSIF).

Signal Group: LPC


LPC LAD0 LPC address-data bus I/O 10k PU to +3.3V LAD1 LAD2 LAD3 LFRAME_L LPC frame signal I N/A LRST_L LPC reset for mCard LPC interface I N/A LDRQ_L LPC DMA request signal O 10k PU to +3.3V SERIRQ Serialized IRQ signal I/O N/A LCLKRUN_L Clock run (same as PCI CLKRUN#) O 10k PU to +3.3V LCLK LPC clock signal I N/A • All LPC signals as defined in the LPC specification

Miscellaneous Signals No relationship is implied between miscellaneous signals in this group.

Signal Group: Miscellaneous


Misc CLK_32768 Not Used By M300V I N/A


Firmware Debugger Probe Signals

These signals are used to allow the connection of a debug probe for mCard firmware development and for debugging.

Signal Group: Debug Interface


Debug Interface

DEBUG_IF0 NOT Used By M300V I/O N/A DEBUG_IF1 DEBUG_IF2 DEBUG_IF3 DEBUG_IF4 DEBUG_IF5 DEBUG_IF6 DEBUG_IF7

Signal Group: Debug Power


Debug Power DEBUG_PWR0 NOT Used By M300V I N/A DEBUG_PWR1


OPMA Hardware Resources The following sections describe the OPMA reserved hardware resources. The addressing scheme for the devices described here is an 8-bit addressing scheme.

SEEPROM Address Reservation Unless restricted, mCards could locate their SEL (System Event Log) and SDRR (Sensor Data Record Repository) SEEPROMs on any OPMA I2C or SMBus and at any of the eight possible SEEPROM device addresses (0–7). In order to simplify BMC firmware, OPMA reserves two SEEPROM I2C or SMBus addresses for the SEL and the SDRR. If such devices are to be used, mCard designers must locate SDR and SEL SEEPROM devices at SEEPROM I2C or SMBus addresses A0h and A2h. In addition, these devices must be located on the OPMA-defined MCARD_I2C_PRIVATE0 only. The MegaRAC M300V cards using this scheme must select SEEPROM devices that can be addressed at A0h and A2h locations. The A0h address is reserved for the SEL device and the A2h address is reserved for the SDRR device. If a single SEEPROM device is selected for both the SEL and SDRR, it can be located at address A0h. In such cases, address A2h is still reserved and not utilized. OPMA-compliant motherboards may locate SEEPROM devices that are outside of the OPMA specification at any I2C or SMBus addresses on the MCARD_I2C_PRIVATE0 besides the OPMA-reserved addresses of A0h and A2h. There are no SEEPROM device restrictions for any of the four other OPMA-defined I2C or SMBus buses.


OPMA Feature Card Power Requirements The MegaRAC M300V card subsystem is designed to operate in all ACPI states of a server platform. For this reason dual voltage planes are supplied through the MegaRAC M300V card connector. The following data provides power requirements for the MegaRAC M300V card subsystem:


mCard Power and Ground

VDD_3.3_DUAL 3.3V supplied in all sleep modes I N/A VDD_3.3_DUAL VDD_3.3_DUAL VDD_3.3_DUAL

VDD_5_DUAL NOT Used By M300V I VDD_5_DUAL • VDD_3.3_DUAL is a +3.3VDC voltage rail that is supplied in ACPI power states S0, S1, S2,

S3, S4 and S5 • In ACPI power states S0 and S1 the platform must be capable of supplying to the MegaRAC

M300V card subsystem: • 3.3 volts, 1.5 amps • In ACPI power states S2, S3, S4 and S5 the platform must be capable of supplying to the

MegaRAC M300V card subsystem: • 3.3 volts, 1 amps


OPMA Feature Card Signal Tolerance Requirements All mCard input signal buffers must be 5-V tolerant. All mCard output signal drivers must be at least 3.3-V capable.

OPMA Signals Grouped by Function The following table lists the signals that comprise the OPMA interface.


LED Control FAULT_LED_L Fault LED control O 4.7k PU to +3.3V CHASSIS_ID_L Chassis identification LED control O 4.7k PU to +3.3V

USB USB_P USB Differential Pair I/O N/A USB_N

Buttons MCARD_PWRBTN_L mCard remote system power button O 4.7k PU to +3.3V MCARD_RSTBTN_L mCard remote system reset button O 4.7k PU to +3.3V MCARD_NMIBTN_L mCard remote system NMI button O 4.7k PU to +3.3V

Video Capture DVI-I

DVI_TX0_H TMDS differential pair; channel 0 I/O N/A DVI_TX0_L DVI_TX1_H TMDS differential pair; channel 1 I/O N/A DVI_TX1_L DVI_TX2_H TMDS differential pair; channel 2 I/O N/A DVI_TX2_L DVI_CLK_H TMDS differential pair; clock I/O N/A DVI_CLK_L DVI_DDC_DATA Data signal for DDC interface I/O 4.7k PU to +3.3V DVI_DDC_CLK Clock signal for DDC interface I/O 4.7k PU to +3.3V ANALOG_DDC_DATA NOT USED BY M300V I/O 4.7k PU to +3.3V ANALOG_DDC_CLK I/O 4.7k PU to +3.3V ANALOG_RED I N/A ANALOG_GREEN I N/A ANALOG_BLUE I N/A ANALOG_HSYNC I/O N/A ANALOG_VSYNC I/O N/A

Multi-Bank Fan Control

MCARD_FAN_PWM_CPU mCard PWM CPU fan control O 3.3V signal level MCARD_FAN_PWM_SYS mCard PWM system fan control O 3.3V signal level MCARD_FAN_PWM_PS mCard PWM power supply fan control O 3.3V signal level

Multiplexed Fan Tachometers

MCARD_FAN_TACH0 Multiplexed fan tach input 0 I 4.7k PU to +3.3V MCARD_FAN_TACH1 Multiplexed fan tach input 1 I 4.7k PU to +3.3V MCARD_FAN_TACH2 Multiplexed fan tach input 2 I 4.7k PU to +3.3V MCARD_FAN_TACH3 Multiplexed fan tach input 3 I 4.7k PU to +3.3V

Fan tachometer MUX Controls

MCARD_FAN_SEL0_L Multiplexed fan tach MUX control 0 O 4.7k PU to +3.3V MCARD_FAN_SEL1_L Multiplexed fan tach MUX control 1 O 4.7k PU to +3.3V MCARD_FAN_SEL2_L Multiplexed fan tach MUX control 2 O 4.7k PU to +3.3V MCARD_FAN_SEL3_L Multiplexed fan tach MUX control 3 O 4.7k PU to +3.3V

Single Wire Analog Sensors

ACOMP_ADC0 Analog voltage input 0 I N/A ACOMP_ADC1 Analog voltage input 1 I N/A ACOMP_ADC2 Analog voltage input 2 I N/A ACOMP_ADC3 Analog voltage input 3 I N/A ACOMP_ADC4 Analog voltage input 4 I N/A ACOMP_ADC5 Analog voltage input 5 I N/A

mCard Serial Port

MCARD_DTR0_L Data Terminal Ready for Serial Port 0 O N/A MCARD_DCD0_L Data Carrier Detect for Serial Port 0 I N/A MCARD_DSR0_L Data Set Ready for Serial Port 0 I N/A MCARD_RI0_L Ring Indicator for Serial Port 0 I N/A MCARD_RXD0 Receive Data for Serial Port 0 I N/A



MCARD_TXD0 Transmit Data for Serial Port 0 O N/A MCARD_CTS0_L Clear to Send for Serial Port 0 I N/A MCARD_RTS0_L Request to Send for Serial Port 0 O N/A

ICMB MCARD_RXD1 Receive Data for ICMB I N/A MCARD_TXD1 Transmit Data for ICMB O N/A MCARD_TXD1_EN Transmit Data Enable for ICMB O N/A

Serial Port for Serial Over LAN

MCARD_RXD_SoL Receive Data for Serial over LAN I N/A MCARD_TXD_SoL Transmit Data for Serial over LAN O N/A MCARD_AUX_SoL_CTRL_L Serial Port handshake signal MUX control O 4.7k PU to +3.3V

Management Ethernet

MCARD_TX_H Transmit Differential Pair O N/A MCARD_TX_L MCARD_RX_H Receive Differential Pair I N/A MCARD_RX_L POE_PWR NOT USED BY M300V I N/A POE_PWR POE_GND O N/A POE_GND LAN_BUSY_LED_L Busy LED O N/A LAN_LINK_LED_L Link LED O N/A

Interface Type ID

INTERFACE_ID0 Binary encoded interface type identification number

O 4.7k PU to +3.3V INTERFACE_ID1 INTERFACE_ID2

Card Detect MCARD_DETECT_L Indicates presence/ absence of mCard O 4.7k PU to +3.3V Status ALL_PWROK Indicates all the voltage rails are good I 4.7k PU to +3.3V

SYS_INTRUDER_L Indicates intrusion on the system I 10k PU to +3.3V SYS_THERMTRIP_L System thermal trip alert signal I 4.7k PU to +3.3V SYS_LINE_AC_L Line AC present signal I 4.7k PU to +3.3V SYS_PWRBTN_L Indicates status of system power button I 3.3V thru switch SYS_RSTBTN_L Indicates status of system reset button I 3.3V thru switch SYS_NMIBTN_L Indicates status of system NMI button I 3.3V thru switch SYS_SMI_L Motherboard SMI status I 4.7k PU to +3.3V SYS_PCI_RST_L Motherboard reset status I 4.7k PU to +3.3V SYS_ACPI_STATE0 Binary encoded indication of the current

system ACPI sleep state (S0, S1, S2, S3, S4/ S5)

I 4.7k PU to +3.3V SYS_ACPI_STATE1 I 4.7k PU to +3.3V SYS_ACPI_STATE2 I 4.7k PU to +3.3V SYS_SMBUS_IO_EXP_INTR_L Interrupt from SMBus-based I/O expander I 4.7k PU to +3.3V

Control MCARD_CLR_CMOS_L mCard system CMOS clear control O 4.7k PU to +3.3V MCARD_LOCAL_LOCK_L mCard local lock out control O 4.7k PU to +3.3V MCARD_SYS_SPKR_DATA mCard system speaker control O N/A MCARD_SCI_INT_L mCard SCI to the system chipset O 4.7k PU to +3.3V

I2C or SMBus X 5

MCARD_I2C_IPMB_SCL I2C clock for the IPMB bus I/O 4.7k PU to +3.3V MCARD_I2C_IPMB_SDA I2C data for the IPMB bus I/O 4.7k PU to +3.3V MCARD_I2C_ SIDEBAND_NIC_SCL

I2C clock for the NIC sideband bus I/O 4.7k PU to +3.3V

MCARD_I2C_ SIDEBAND_NIC_SDA

I2C data for the NIC sideband bus I/O 4.7k PU to +3.3V

MCARD_I2C_ SIDEBAND_NIC_ALERT

Alert signal from the NIC for I2C traffic I/O 4.7k PU to +3.3V





MCARD_I2C_SHARED_SCL mCard shared host device I2C clock I/O 4.7k PU to +3.3V MCARD_I2C_SHARED_SDA mCard shared host device I2C data I/O 4.7k PU to +3.3V



LPC LAD0 LPC address-data bus I/O 10k PU to +3.3V LAD1 LAD2 LAD3 LFRAME_L LPC frame signal I N/A LRST_L LPC reset for mCard LPC interface I N/A LDRQ_L LPC DMA request signal O 10k PU to +3.3V SERIRQ Serialized IRQ signal I/O N/A LCLKRUN_L Clock run (same as PCI CLKRUN#) O 10k PU to +3.3V LCLK LPC clock signal I N/A

Misc CLK_32768 NOT USED BY M300V I N/A Debug Interface

DEBUG_IF0 NOT USED BY M300V I/O N/A DEBUG_IF1 DEBUG_IF2 DEBUG_IF3 DEBUG_IF4 DEBUG_IF5 DEBUG_IF6 DEBUG_IF7

Debug Power DEBUG_PWR0 NOT USED BY M300V I N/A DEBUG_PWR1

mCard Power and Ground

VDD_3.3_DUAL 3.3V supplied in all sleep modes I N/A VDD_3.3_DUAL VDD_3.3_DUAL VDD_3.3_DUAL VDD_5_DUAL NOT Used By M300V I VDD_5_DUAL

Note: * Signal level terminations on the motherboard. PU – Refers to pull-up. The pull-up resistor values indicated in the signal termination column are suggested values. Motherboard designers must take their circuit and the type of I/O on the motherboard (for example, push-pull, open-drain, and so on) into consideration while designing the values for the pull-ups.

Chapter Five : OPMA Connector Specification and Pin Assignments 49

Chapter 5 OPMA Connector Specification and Pin Assignments

Overview OPMA leverages the 200-pin SO-DIMM connector commonly used by DDR2 infrastructure for mobile computers. This connector is reasonably small and contains 200 pins which support currently defined and projected expansion signals. These connectors are available in both vertical and right angle versions and will be readily available for the next two to three years at relatively low cost. The number of OPMA connector insertions/removal cycles in the field is expected to be low and on par with the expected number of insertions/removal cycles performed for DRAM sticks. Thus, no connector reliability or longevity issues are expected when leveraging this DRAM infrastructure for OPMA.

Pin Assignments for the OPMA Connector

Side A Side B To Pin From From Pin To

GROUND 1 GND RSVD 2

3 RSVD GND 4 GROUND

GROUND 5 GND RSVD 6

7 RSVD GND 8 GROUND

GROUND 9 GND DVI_TX0_H 10 <> TMDS0+

LPC_DRQ => 11 LDRQ_L DVI_TX0_L 12 <> TMDS0-

LPC_LFRAME => 13 LFRAME_L GND 14 GROUND

LPC_LAD0 <> 15 LAD0 DVI_TX1_H 16 <> TMDS1+

LPC_CLKRUN <= 17 LCKRUN_L DVI_TX1_L 18 <> TMDS1-

LPC_LAD1 => 19 LAD1 GND 20 GROUND

LPC_LAD2 => 21 LAD2 DVI_TX2_H 22 <> TMDS2+

LPC_LAD3 => 23 LAD3 DVI_TX2_L 24 <> TMDS2-

LPC_SERIRQ <> 25 SERIRQ GND 26 GROUND

LPC_RST => 27 LRST_L DVI_TX_CLK_H 28 <> TMDSCLK+

LPC_CLK => 29 LCLK DVI_TX_CLK_L 30 <> TMDSCLK-

GROUND 31 GND GND 32 GROUND

33 RSVD DVI_DDC_DATA 34 <> EDID_SDA

35 RSVD DVI_DDC_CLK 36 <> EDID_SCL

GROUND 37 GND RSVD 38

MCARD_I2C_PRIVATE0_SCL <> 39 MCARD_I2C_PRIVATE0_SCL ANALOG_DDC_DATA 40

MCARD_I2C_PRIVATE0_SDA <> 41 MCARD_I2C_PRIVATE0_SDA ANALOG_DDC_CLK 42


IPMB_SCL <> 45 MCARD_I2C_IPMB_SCL ANALOG_RED 46

IPMB_SDA <> 47 MCARD_I2C_IPMB_SDA ANALOG_GREEN 48

GROUND 49 GND ANALOG_BLUE 50

SIDEBAND_NIC_SCL <> 51 MCARD_I2C_SIDEBAND_NIC_SCL ANALOG_HSYNC 52

SIDEBAND_NIC_SDA <> 53 MCARD_I2C_SIDEBAND_NIC_SDA ANALOG_VSYNC 54

SIDEBAND_NIC_ALERT => 55 MCARD_I2C_SIDEBAND_NIC_ALERT GND 56 GROUND


MCARD_I2C_PRIVATE1_SCL <> 59 MCARD_I2C_PRIVATE1_SCL RSVD 60

MCARD_I2C_PRIVATE1_SDA <> 61 MCARD_I2C_PRIVATE1_SDA GND 62 GROUND



GROUND 63 GND MCARD_FAN_PWM_CPU 64 => FAN_PWM_CPU

SHARED_SCL <> 65 MCARD_I2C_SHARED_SCL MCARD_FAN_PWM_SYS 66 => FAN_PWM_SYS

SHARED_SDA <> 67 MCARD_I2C_SHARED_SDA MCARD_FAN_PWM_PS 68 => FAN_PWM_PS


71 DEBUG_IF0 MCARD_FAN_TACH_0 72 <= TACH0





DTR0# <= 81 MCARD_DTR0_L MCARD_FAN_SEL0 82 => FAN_SEL0

DCD0# => 83 MCARD_DCD0_L MCARD_FAN_SEL1 84 => FAN_SEL1

DSRO# => 85 MCARD_DSRO_L MCARD_FAN_SEL2 86 => FAN_SEL2

RI0# => 87 MCARD_RI0_L MCARD_FAN_SEL3 88 => FAN_SEL3

EMP_RXD_IN => 89 MCARD_RXD0 GND 90 GROUND

EMP_TXD_OUT <= 91 MCARD_TXD0 MCARD_RXD_SOL 92 <= SOL_RXD_IN

CTS0# => 93 MCARD_CTS0_L MCARD_TXD_SOL 94 => SOL_TXD_OUT

RTS0# <= 95 MCARD_RTS0_L GND 96 GROUND

GROUND 97 GND FAULT_LED_L 98 => FAULT_LED#

99 DEBUG_PWR0 CHASSIS_ID_L 100 => CHASSIS_ID#

101 DEBUG_PWR1 GND 102 GROUND

GROUND 103 GND USB_P 104 <> USB_D+

MCARD_ID0 <= 105 MCARD_ID0 USB_N 106 <> USB_D-

MCARD_ID1 <= 107 MCARD_ID1 GND 108 GROUND

MCARD_ID2 <= 109 MCARD_ID2 MCARD_PWRBTN_L 110 => PWRBTN#

GROUND 111 GND MCARD_RSTBTN_L 112 => RSTBTN#

113 DEBUG_IF4 MCARD_NMIBTN_L 114 => NMIBTN#

115 DEBUG_IF5 GND 116 GROUND

117 DEBUG_IF6 MCARD_AUX_SOL_CTRL_L 118 MCARD_AUX_SOL_CTRL#

119 DEBUG_IF7 RSVD 120


LOCAL_LOCK# <= 123 MCARD_LOCAL_LOCK_L MCARD_RXD1 124 <= MCARD_ICMB_RXD

SYS_SPKR_DATA <= 125 MCARD_SYS_SPKR_DATA MCARD_TXD1 126 => MCARD_ICMB_TXD

CLR_CMOS# <= 127 MCARD_CLR_CMOS_L MCARD_TXD1_ENABLE 128 => MCARD_TXD1_ENABLE


131 CLK_32768 ALL_PWROK 132 <= ALL_PWROK

GROUND 133 GND SYS_THERMTRIP_L 134 <= SYS_THERMTRIP#

MCARD_DETECT# <= 135 MCARD_DETECT_L SYS_INTRUDER_L 136 <= SYS_INTRUDER#

GROUND 137 GND SYS_LINE_AC_L 138 <= SYS_LINE_AC#

CONN_1.8V 139 ACOMP_ADC0 SYS_PWRBTN_L 140 <= SYS_PWRBTN#

141 ACOMP_ADC1 SYS_RSTBTN_L 142 <= SYS_RSTBTN#

CONN_3.3V 143 ACOMP_ADC2 SYS_NMIBTN_L 144 <= SYS_NMIBTN#

CONN_3.3V_STB 145 ACOMP_ADC3 SYS_SMI_L 146 <= SYS_SMI#

CONN_5V 147 ACOMP_ADC4 SYS_PCI_RST 148 <= SYS_PCI_RST

CONN_12V 149 ACOMP_ADC5 SYS_ACPI_STATE0 150 <= SYS_ACPI_STATE0

GROUND 151 GND SYS_ACPI_STATE1 152 <= SYS_ACPI_STATE1

SCI_INT# <= 153 MCARD_SCI_INT_L SYS_ACPI_STATE2 154 <= SYS_ACPI_STATE2

155 RSVD SYS_IO_EXP_INT_L 156 <= SYS_IO_EXP_INT#


159 RSVD RSVD 160

161 RSVD RSVD 162

Chapter Five : OPMA Connector Specification and Pin Assignments 51


163 RSVD RSVD 164

165 RSVD RSVD 166


GROUND 169 GND MCARD_TX_H 170 => A_MII_LAN_TX+

+3.3V_STB 171 VDD_3.3_DUAL MCARD_TX_L 172 => A_MII_LAN_TX-

+3.3V_STB 173 VDD_3.3_DUAL GND 174 GROUND

+3.3V_STB 175 VDD_3.3_DUAL MCARD_RX_H 176 <= A_MII_LAN_RX+

+3.3V_STB 177 VDD_3.3_DUAL MCARD_RX_L 178 <= A_MII_LAN_RX-

GROUND 179 GND POE_GND 180 CHASSIS GROUND

GROUND 181 GND POE_PWR 182

183 VDD_5_DUAL POE_PWR 184

185 VDD_5_DUAL POE_GND 186 CHASSIS GROUND

187 RSVD LAN_BUSY_LED_L 188 => A_MII_BUSY_LED#

189 RSVD LAN_LINK_LED_L 190 => A_MII_LINK_LED#

191 RSVD GND 192 GROUND

193 RSVD RSVD 194

195 RSVD GND 196 GROUND


A_MII_TERM <> 199 RSVD GND 200 GROUND

Chapter Six : M300V Card Mechanicals 53

Chapter 6 M300V Card Mechanicals

MegaRAC M300V DDR2 Polarization Key

16MB FlashModule




32 MB SOCMemory


The key specified in OPMA specification 1.0-1.1 defined a double wide slotted key which allowed card installation into either DDR1 or DDR2 SODIMM OPMA sockets on the motherboard. OPMA specification version 1.2 and later versions require the card key specification to mechanically conform to SODIMM-DDR2 only. AMD has determined that the original double wide keying scheme could cause misalignment between socket pins and gold fingers. This has been seen only under worst case manufacturing tolerances between the SODIMM socket and the OPMA card, namely where the card was manufactured to the low-end of the allowed tolerance and the socket used provided the maximum allowable width. The DDR2 socket has achieved broad availability and commodity pricing, which was not the case when the first OPMA specification was introduced.


MegaRAC M300V Card Mechanical Form Factor

Chapter Six : M300V Card Mechanicals 55

OPMA LAN and Serial Port Connector Scheme The OPMA connector can be mounted anywhere on the motherboard, limited only by motherboard-specific factors. It can be mounted horizontally (for example, blades and 1U–2U chasses) or vertically (4U chassis). The MegaRAC M300V card UART (management serial port) signals are routed through the OPMA connector to the manufacturer’s choice of management serial port connectors on the chassis (typically either an RJ-11/45 or 9-pin D shell connector). OPMA assumes that the management serial port is shared with the system serial port. This arrangement is required so that both the CLI and the system text consoles (BIOS setup, and so on) can share the same serial legacy concentrator infrastructure that is commonly found in the field today. The dedicated management LAN Ethernet signals from the OPMA connector are routed through the motherboard to a chassis-mounted RJ-45 connector. Except in the upgrade kit mode, if an M300V card is plugged into the OPMA connector, this RJ-45 connector carries all of the management traffic. The transformer matrix is located on the MegaRAC M300V card itself, while the EMI ferrite and the RJ-45 is part of the motherboard. RJ-45 connectors with integrated magnetics should not be used on the motherboard for the MegaRAC M300V card’s out-of-band management traffic.

Management LAN and UART Connectors

Chapter Seven : Serial over LAN Support 57

Chapter 7 Serial over LAN Support

Serial over LAN Support Serial over LAN (SoL) is the ability to redirect a local text console over the management LAN to a remote viewing/control station. Text-based BIOS setup screens and operating system control consoles can be redirected using this method. SoL is a replacement technology for the legacy serial concentrators and can lead to lower installation and maintenance costs due to reduced cabling and the elimination of serial concentrators from the management infrastructure. For the MegaRAC M300V card’s SoL and Serial Port Routing Logic to work correctly, the Host system must implement one MUX logic (X5 for the UART control signals) and one De-MUX (X4 for UART TXD and RXD signal) for the motherboard’s serial port. The X4 De-MUX is controlled by MCARD_DETECT_L signal from the OPMA connector. The MUX X5 is controlled by MCARD_AUX_SoL_CTRL_L signal from the OPMA connector.


MCARD_DETECT_L = Logic High

When the MegaRAC M300V card is not present, the motherboard UART TXD and RXD signals are routed to the motherboard’s serial connector. The X4 De-MUX direction is from Y to B.

X1

X2 X3

X4

X5

RS232 xlator

Connector

UART0 UART1

UART

BMC

CLIGenerator

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BMCLocal Bus

Man

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NIC

Super I/ OHost System

Handshake Signals

UA

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TxD

, RxD

B n

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whe

n ca

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On-card TxD/ RxD signal mux control

Handshake signal mux control from mCard

Driven by UART but not felt at connector

TxD

, RxD

TxD

, RxD

Rx

A B

Y

AB

Y

A B

Y

A B

Y

A B

Y

M300V Cardnot Present


MCARD_DETECT_L = Logic Low When the MegaRAC M300V card is present, the motherboard UART TXD and RXD signals are routed to the MegaRAC M300V OPMA SoL pins. The X4 De-MUX direction is from Y to A.

X1

X2 X3

X4

X5

RS232 xlator

Connector

UART0 UART1

UART

BMC

CLIGenerator

ES

C S

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BMCLocal Bus

Man

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NIC

Ethernet


Handshake Signals

UA

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Han

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TxD

, RxD

mCardPresent

B n

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Driven by UART and muxed to connector

TxD

, RxD

TxD

, RxD

Rx

A B

Y

AB

Y

A B

Y

A B

Y

A B

Y

X1

X2 X3

UART0 UART1

BMC

CLIGenerator

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BMCLocal Bus

Man

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SoL / ESC Snoop

TxD

, RxD

On-card TxD/ RxDsignal mux control

Rx

A B

Y

A B

Y

A B

Y


MCARD_AUX_SoL_CTRL_L = Logic High This signal should have a Pull-Up on the motherboard when the MegaRAC M300V is not present, this signal should be Logic High. The motherboard’s UART control signals are routed to the motherboard’s serial connector, the X5 MUX direction is from A to Y.

X1

X2 X3

X4

X5

RS232 xlator

Connector

UART0 UART1

UART

BMC

CLIGenerator

ES

C S

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Man

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NIC

Ethernet


Handshake Signals

UA

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Han

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TxD

, RxD

mCardPresent

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TxD

, RxD

TxD

, RxD

Rx

A B

Y

AB

Y

A B

Y

A B

Y

A B

Y

X1

X2 X3

UART0 UART1

BMC

CLIGenerator

ES

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BMCLocal Bus

Man

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NIC

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TxD

, RxD


Rx

A B

Y

A B

Y

A B

Y


MCARD_AUX_SoL_CTRL_L = Logic Low

When the MegaRAC M300V card UART0 control signals are routed to the motherboard’s serial connector, the X5 MUX direction is from B to Y.

X1

X2 X3

X4

X5

RS232 xlator

Connector

UART0 UART1

UART

BMC

CLIGenerator

ES

C S

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BMCLocal Bus

Man

agem

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NIC

Ethernet


Handshake Signals

UA

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Han

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TxD

, RxD

mCardPresent

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TxD

, RxD

TxD

, RxD

Rx

A B

Y

AB

Y

A B

Y

A B

Y

A B

Y

X1

X2 X3

UART0 UART1

BMC

CLIGenerator

ES

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Man

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TxD

, RxD


Rx

A B

Y

A B

Y

A B

Y


Possible UART Configurations There are three possible configurations.

Configuration Description 1 MegaRAC M300V card not present. The motherboard’s serial connector behaves as normal. 2 MegaRAC M300V card is present and the MegaRAC M300V card is on SoL mode. The MegaRAC M300V

card’s UART0 signals are routed to the motherboards serial port connector. 3 MegaRAC M300V card is present and the M300V is in non-SoL mode. The motherboard’s UART0 TXD

and RXD signals are routed to the motherboards serial port connector through the MegaRAC M300V card.

MegaRAC M300V Card Not Present MCARD_DETECT_L= Logic High MCARD_AUX_SoL_CTRL_L= Logic High All signals from the motherboard UART are routed to the motherboard’s serial port connector. In this configuration the X4 De-MUX is from Y to B and the X5 MUX direction is from A to Y.


MegaRAC M300V Card Present and on SoL Mode (Default)

X1

X2 X3

X4

X5

RS232 xlator

Connector

UART0 UART1

UART

BMC

CLIGenerator

ES

C S

noop

BMCLocal Bus

Man

agem

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NIC

Ethernet


Handshake Signals

UA

RT

Han

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TxD

, RxD

mCardPresent

B n

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whe

n ca

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TxD

, RxD

TxD

, RxD

Rx

A B

Y

AB

Y

A B

Y

A B

Y

A B

Y

X1

X2 X3

UART0 UART1

BMC

CLIGenerator

ES

C S

noop

BMCLocal Bus

Man

agem

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NIC

SoL / ESC Snoop

TxD

, RxD


Rx

A B

Y

A B

Y

A B

Y

MCARD_DETECT_L= Logic Low MCARD_AUX_SoL_CTRL_L= Logic Low This is the default configuration. All the MegaRAC M300V card UART0 signals are routed to the motherboard’s serial port connector and the motherboard’s serial port TXD and RXD signals are routed to OPMA SoL pins that are routed to the MegaRAC M300V card UART 1. In this configuration the X4 De-MUX direction is from Y to A and the X5 MUX direction is from B to Y. In this configuration the MegaRAC M300V card can re-direct the SoL input serial data to a remote location through the MegaRAC M300V card’s dedicated LAN. Additionally the SoL input serial data can be viewed via the MegaRAC M300V card UART0 through the motherboard’s serial connector simultaneously.


MegaRAC M300V Card Present and in Non-SoL Mode

CARD_DETECT_L= Logic Low MCARD_AUX_SoL_CTRL_L= Logic High The motherboard UART TXD and RXD signals are routed to the motherboard’s serial connector through MegaRAC M300V card. The MegaRAC M300V card UART1 monitors the RXD signal for an escape (ESC) sequences so that it can switch between SoL Mode and Non-SoL Mode. The motherboard UART control signals are routed to motherboard’s serial connector. The MegaRAC M300V card UART0 is in No Connect mode.

X1

X2 X3

X4

X5

RS232 xlator

Connector

UART0 UART1

UART

BMC

CLIGenerator

ES

C S

noop

BMCLocal Bus

Man

agem

ent

NIC

Ethernet


Handshake Signals

UA

RT

Han

dsha

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igna

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SoL / ESC Snoop

TxD

, RxD

mCardPresent

B n

ot u

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whe

n ca

rd in

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led




TxD

, RxD

TxD

, RxD

Rx

A B

Y

AB

Y

A B

Y

A B

Y

A B

Y

X1

X2 X3

UART0 UART1

BMC

CLIGenerator

ES

C S

noop

BMCLocal Bus

Man

agem

ent

NIC

SoL / ESC Snoop

TxD

, RxD


Rx

A B

Y

A B

Y

A B

Y

In this configuration the X4 De-MUX direction is from Y to A and the X5 MUX direction is from B to Y.

Chapter Eight : Motherboard Hardware Support 65

Chapter 8 Motherboard Hardware Support

Overview This chapter provides more detail on the motherboard support required for OPMA compliance along with sample implementation circuitry for OPMA-required signals. Refer to the appropriate sections of this specification for detailed descriptions of the OPMA signals associated with these support requirements and functions.

Note: Some of these signals are not taken from the AMD OPMA Specification. Pay special attention to the non-OPMA-required signals as they have been modified specifically for the MegaRAC M300V card.

General Signal Termination OPMA signal termination requirements for the motherboard are listed in Chapter Four, OPMA Interface Signal Specification.

Fan Tachometer Read Back The MegaRAC M300V card reads the fan tachometers through a 16:4 multiplexer located on the motherboard. Only four fan tach signals are provided across the OPMA connector as inputs to the MegaRAC M300V card. The 16:4 multiplexer is controlled by four MUX select signals provided across the OPMA connector and the MegaRAC M300V card controls these signals to select one bank of up to four fans to be monitored at a time. The motherboard must provide a 16:4 multiplexer for the MegaRAC M300V card to perform this function. The motherboard must also provide appropriate pull-ups for the fan select signals. The following illustrations show the block diagram and an example of the fan tach monitoring circuit, respectively.


Fan Tach Monitoring Circuit Block Diagram

Fan Tach Monitoring Circuit Example


Fan Speed Control The motherboard must provide the necessary circuit that converts PWM pulses from the MegaRAC M300V card output to an analog DC level that is then amplified to actually control the fans. It is part of the fan speed control circuit. The illustration below shows the block diagram of the fan speed control circuit. The one beneath it shows an example of the fan speed control PWM-to-DC converter circuit. If the platform is using PWM controlled fans this circuitry is not required, but proper hardware buffering might be required for directly routing the PWM signals to the fan circuitry.

Fan Speed Control Circuit Block Diagram

Fan Speed Control PWM-to-DC Converter Circuit Example


Clear CMOS Circuit The motherboard must provide hardware circuitry for clearing the BIOS CMOS contents when the MegaRAC M300V card BMC activates the output to clear the CMOS. This provides a remote, software controlled way of clearing the system CMOS without having to open the system chassis. This circuitry must co-exist with the traditional jumper-based method provided by the motherboard to clear the CMOS contents. The BMC asserts MCARD_CLR_CMOS_L for a minimum of 250 ms to clear the CMOS. The motherboard hardware ensures that the CMOS is cleared if this signal is held active by the BMC for >= 250 ms. If the CMOS RAM chip requires a longer CMOS clear signal activation period in order to clear the CMOS, motherboard hardware must be provided to stretch the 250 ms pulse provided by the BMC.

CMOS Clearing Circuit Example


System Speaker Control Circuit The motherboard must provide the hardware circuitry for the MegaRAC M300V card to share control of the system speaker (transducer) with the Southbridge or I/O hub. This circuitry allows the MegaRAC M300V card to drive the system speaker with the MCARD_SYS_SPKR_DATA signal to generate audible alerts. It may be used as part of the server identification capability in a rack environment.

Speaker Control Circuit Example


Local Access Lock Out The motherboard may provide hardware circuitry for locking out local access to the system for the purpose of providing security in a server farm environment. Using this recommended but optional feature, the MegaRAC M300V card may be commanded remotely to lock out some or all local console access to its host. Lock out, if implemented, should disable local access to front panel reset, power and NMI switches as a minimum. It is recommended that this capability also be used to lock out local access to PS2/USB keyboard and PS2/USB mouse. Local lock out should not restrict remote access to these interfaces. In other words, when locally locked out, the remote system operator should still be able to assert system RESET, POWER and NMI signals through the MegaRAC M300V card. Also, remote lock out has no affect on the ability to use remote human interface devices such as remote serial console and KVMoIP interfaces. It also has no effect on virtual, USB-based mass storage devices. Only local access is disallowed. OPMA provides the MCARD_LOCAL_LOCK_L signal for this purpose. When this signal is activated by the MegaRAC M300V card, local access as previously described is disallowed.

Partial Circuit Example for Local Access Lock Out


ACPI State Reporting The motherboard must provide hardware circuitry to drive an encoded version of the ACPI state of the system to the OPMA connector. The MegaRAC M300V card uses this information to provide accurate ACPI status to a remote location. This information is also useful in determining when certain sensors are and are not valid. Some sensors may not be valid in certain ACPI states. The assumption here is that the encoding function could easily be put into an existing PLD on the server motherboard. PLDs are typically used for purposes like power rail sequencing and so on.

Signal Encoding for ACPI State Reporting

State ACPI State Encoded Value 1 ACPI S0 000b 2 ACPI S1 001b 3 ACPI S2 010b 4 ACPI S3 011b 5 ACPI S4, S5 100b 6 Reserved 101b 7 Reserved 110b 8 Reserved 111b

DVI–Digital Visual Interface

The motherboard must route the DVI-I signals from the video chip to the OPMA connector. The video chip selected for the system must be capable of providing DVI-I signals. The DVI-I signals are used by MegaRAC M300V card for the purpose of video redirection in the KVMoIP (Keyboard, Video and Mouse redirection through internet protocol) feature. The DVI signals should be properly terminated on the motherboard to handle the case where either no MegaRAC M300V card is installed or where a MegaRAC M300V card that does not support KVMoIP is installed.

ICMB RS-485 Level Translation Circuit The motherboard must provide the level translation hardware along with the connector for the ICMB (Intelligent Chassis Management Bus). Physically, the ICMB is a multi-drop, multi-master, two-wire, half-duplex, differential drive bus, utilizing RS-485 transceivers. For more details on the ICMB connector specification and circuitry, refer to the following document: IPMI-Intelligent Chassis Management Bus Bridge Specification v1.0, Document Revision 1.1.

Management UART Signal Level Translation The motherboard must provide the necessary level translation circuitry to convert the management UART signals coming from the OPMA connector to RS-232 compliance. From the level translator, these signals are routed to the pack panel RS-232 connector that is shared between the management UART and the system UART.


Management UART Signal Multiplexing The system serial port connector may contain either BMC console traffic (for example, a Command Line Interface) or host system console traffic (for example, BIOS setup screen). Separate serial port connectors are not allowed for management traffic and the local system UART traffic. When no MegaRAC M300V card is installed, the system UART must be automatically routed to the system serial port connector. In order for this to work with the BMCs on MegaRAC M300V card, serial port multiplexers are required on the motherboard. See Chapter 6 for more detail. The motherboard’s system UART TxD/RxD MUX must route these signals to the MegaRAC M300V card socket when MCARD_DETECT_L is active. When MCARD_DETECT_L is inactive, the TxD/RxD signals are routed to the system serial port connector. The motherboard’s UART handshake signal MUX must route the UART handshake signals from the MegaRAC M300V card connector to the system serial port connector when MCARD_AUX_SoL_CTRL_L is active. When MCARD_AUX_SoL_CTRL_L is inactive, the system UART handshake signals are routed to the system serial port connector.

Support for Dedicated Management LAN The MegaRAC M300V card uses a dedicated management NIC. The motherboard must route the MegaRAC M300V card dedicated management NIC signals to a dedicated management network RJ-45 connector that is accessible by the end user. The designer must also provide means to block off this RJ-45 connector in the event that the MegaRAC M300V card is installed that uses a shared NIC configuration.

MCard Presence Detect and Interface ID Support The motherboard must support mCard presence detection and IPMI interface identification by the system BIOS. OPMA supports this using four signals: one for card presence detect (MCARD_DETECT_L) and three (INTERFACE_ID0–INTERFACE_ID2) for the interface type identifier. Refer to the appropriate sections of this specification for descriptions on these signals.


Motherboard Support for I/O Functions The OPMA interface dedicates a fixed number of I/O signals to discrete sensors monitored by the MegaRAC M300V card. These I/O signals are defined in the OPMA interface signal definition section. If the motherboard requires additional discrete I/O sensors to be monitored for additional manageability functions then those signals should be routed through I2C or SMBus-based GPIO expanders. If any of these additional signals require interrupt attention from the MegaRAC M300V card (as opposed to routine sensor polling performed by the MegaRAC M300V card) then an I2C or SMBus-based GPIO expander with interrupting capability may be used to drive the OPMA SYS_SMBUS_IO_EXP_INTR_L signal. Example: If the motherboard requires the MegaRAC M300V card to monitor a power supply presence/absence condition, the OPMA connector does not have a dedicated pin for this sensor. Accordingly, the motherboard must provide this signal through an I2C or SMBus-based GPIO expander (such as an PCF 8575 device). Since this sensor does not require an interrupt attention from the MegaRAC M300V card, an 8575 device would suffice in this case. When defining manageability subsystem I/O requirements, the motherboard designer should carefully consider which I2C or SMBus expander-based GPIO signals may or may not require interrupting capabilities for manageability functions and then select the proper type of GPIO expander accordingly.

Motherboard Support for MegaRAC M300V SCI Interrupt Signal The motherboard must route the MCARD_SCI_INT_L signal from the OPMA connector to an input on the Southbridge that is capable of generating an SCI (System Control Interrupt) to the ACPI subsystem. The MegaRAC M300V card firmware will activate this output based on specific conditions and policies that are defined for a particular system and the system level response to this interrupt will be based on those preset policies. This interrupt is intended to allow the BMC to initiate communications with the ACPI software running on the host system. A typical usage would be as a replacement for certain types of temperature polling by server software. Instead of requiring the system to poll the BMC for system temperatures, the BMC would interrupt the ACPI subsystem when certain threshold temperatures were reached. OSPM at the system level could then reduce the heat generation of the processor(s) and/or other BMC-monitored devices.

Motherboard I/O Terminations All motherboard hardware I/Os that interface with the OPMA connector must have 3.3-V input buffers. Also, motherboard hardware requirements must be implemented with 3.3-V signal logic.

Chapter Nine : BIOS/Firmware Considerations 75

Chapter 9 BIOS/Firmware Considerations While OPMA attempts to minimize impacts on existing BIOS, any form of the MegaRAC card cross-platform compatibility requires some degree of system BIOS support. The main reason for OPMA specific BIOS support is to enable simple plug and play capability. Under normal circumstances, the BIOS should not halt the boot process or require keystroke input on any sort of BMC related error; the absence of the MegaRAC M300V card should never stop a server from booting up. Any reference in the following paragraphs to BIOS printing messages to the boot screen should be taken to mean that BIOS must write the indicated message to the text-based BIOS POST screen that is displayed during POST.

MCard Presence Detect BIOS must be capable of identifying the presence/absence of the MegaRAC M300V card. This is done by monitoring the MCARD_PRESENCE_L signal using a BIOS-controlled GPIO that is typically implemented using the system Southbridge chip. If the GPIO is not available directly from the chipset, the system must use an alternative solution to read this signal from the MegaRAC M300V card (for example, an SMBus based GPIO expander). If the MegaRAC M300V card is found to be present, the BIOS then determines which IPMI interface to use for sending IPMI commands. BIOS and other system software reads the card detect signal and then determine the MegaRAC M300V card presence.

Card Detect Signal States

Card Detect State Meaning Asserted (Low) The MegaRAC M300V card is installed in the OPMA

connector. Deasserted (High) No mCard is installed in the OPMA connector.

MCard IPMI Command Interface Type Detection

The BIOS must be capable of determining which IPMI interface the MegaRAC M300V card supports. This is done by monitoring the MCARD_INTERFACE_ID0–CARD_INTERFACE_ID2 signals using BIOS-controlled GPIOs that are typically implemented using the system Southbridge chip. If the GPIOs are not available directly from the chipset, the system must use an alternative solution to read the signals from the MegaRAC M300V card (for example, an SMBus-based GPIO expander). The value read back from the INTERFACE_ID signals indicates the default IPMI communications interface supported by the management controller. In cases where the MegaRAC M300V card supports more than one IPMI interface, these additional interfaces are conveyed through an IPMI OEM command. BIOS or system software can decide at runtime which interface to use for IPMI communications.


Management Subsystem Host Interface Type Encoding

Interface Definition Encoded Value KCS Interface 000b Block Transfer Interface 001b, Hardware available, not implemented in Firmware SMIC Interface Not Used By M300V SMBus Interface (SSIF) Reserved Reserved mCard in upgrade kit mode 110b Interface type not initialized 111b

To avoid race conditions associated with the configuration of the INTERFACE_ID bits, the BIOS should sample these bits for up to 25 seconds after having determined that the MegaRAC M300V card is present by using the MCARD_DETECT_L signal. Most likely the BIOS will not have to wait this long during system boot up for the BMC to be ready, but some BMCs take a longer time to initialize. Any delays would only be noticed when AC power is applied to a system and the system is immediately configured to boot up without further intervention. No delay would be noticed by the BIOS during POST caused by system reset or by boot up from any ACPI state other than mechanical off. This is because the BMC is powered at all times except during the Mechanical Off state. If the interface ID bits remain 111b for the full 25 seconds, BIOS should assume that a problem exists with the MegaRAC M300V card and print this fact to the POST screen. BIOS must wait an additional 50 ms beyond the initial detection of any pattern other than 111b before taking a final INTERFACE_ID reading. This allows slower BMC microcontrollers enough time to set up these bits if the controls for them reside in multiple BMC registers.

IPMI Command Hardware Interface Support The host system BIOS must contain basic IPMI command support for some or all supported IPMI 2.0 command interfaces using KCS only. If the BIOS does not have any IPMI command firmware support for the IPMI interface that indicates that the BMC is available, the BIOS must print to its POST screen that the MegaRAC M300V card was detected and that it has exposed the indicated IPMI command interface, but that BIOS does not support that IPMI command interface.

IPMI Command BIOS Interface Support The system BIOS must support all of the BIOS-Firmware interaction specific commands defined in the AMD OPMA spec.

Chapter Nine : BIOS/Firmware Considerations 77

MegaRAC M300V Card Presence, Health and BMC Firmware Revision Reporting The system BIOS must print a POST screen message that indicates whether or not the MegaRAC M300V card was detected as being present. If the MegaRAC M300V card is present, the BIOS must determine if an IPMI command interface is present on the MegaRAC M300V card that the BIOS know how to communicate with. If not, the BIOS must state this fact. If so, the BIOS must state which IPMI interface initial BMC communications will take place over. After BIOS-BMC communications have been initiated, the BIOS will execute several IPMI commands in order to synch up with the BMC. One of those commands will be GetDeviceID which will return the BMC firmware revision. BIOS must print this to the POST screen. BIOS will also issue the GetSelfTestResults command. BIOS will print the results of this command to the POST screen. The following are example BIOS POST screen displays:

BIOS POST Screen Situation BIOS POST Screen Reports: No MegaRAC M300V card installed. No mCard detected in OPMA connector MegaRAC M300V card is detected, uses the KCS interface and is functioning properly.

MCard detected in OPMA connector Initial IPMI communications to occur via KCS interface BMC firmware revision: (put revision strong here) BMC self test PASSED

MegaRAC M300V card is detected, but the INTERFACE_ID bits always read back 111b.

MCard detected in OPMA connector Timeout waiting for interface ID reporting

MegaRAC M300V card is detected, INTERFACE_ID indicates that it uses the KCS interface, but does not respond to IPMI commands on that interface.

MCard detected in OPMA connector Initial IPMI communications to occur via KCS interface BMC command timeout on KCS interface

MegaRAC M300V card is detected and the BIOS sends the SetSystemTypeIdentifier command to the BMC. The BMC returns a completion code of C9h which indicates the BMC was built to a later version of the OPMA specification than the motherboard was. Since the MegaRAC M300V card may not be sure that it will function with the older motherboard, it will therefore not scan the sensors.

MCard detected in OPMA connector Initial IPMI communications to occur via KCS interface The installed mCard has determined that it is not spec level compatible with the host system.

MegaRAC M300V card is detected and the BIOS sends the SetSystemTypeIdentifier command to the BMC. The BMC returns a completion code of CCh which indicates the BMC does not know the ID of the motherboard and will therefore not scan the sensors.

MCard detected in OPMA connector Initial IPMI communications to occur via KCS interface The installed mCard has not been ported to this system


System Identification The system BIOS must contain a system identification OEM ID and management sensor implementation ID. The BIOS communicates this information to the BMC as part of the POST BIOS-BMC synchronization process.

Index 79

Index

A ACPI State Reporting, 71 Acronyms and Terminology, 4 Add New User, 24 Alert List, 17, 18 Alert List Modify Alert, 18

Alert List Send Test Alert, 18

B BIOS POST Screen, 77 BIOS/Firmware Considerations, 75 BMC Host Interface ID Signals, 37

C Card Detect Signal States, 75 Clear CMOS Circuit, 68 CMOS Clearing Circuit Example, 68 Configuration Group, 14, 17 Console Redirection Window, 27, 28, 29 Console Redirection Window Video, 27

Console Redirection Window Keyboard, 27

Console Redirection Window Mouse, 28

Console Redirection Window Options, 28

Console Redirection Window Device, 29

Console Redirection Window Help, 29

Conventions, 6

D Dedicated Management Ethernet Signals, 37 Default User Name and Password, 13 Delete User, 23, 25 DVI–Digital Visual Interface, 71

E Event Log, 3, 15, 16, 44

F Fan Speed Control, 67

Fan Speed Control Circuit Block Diagram, 67

Fan Speed Control PWM-to-DC Converter Circuit Example, 67

Fan Tach Monitoring Circuit Block Diagram, 66

Fan Tach Monitoring Circuit Example, 66 Fan Tach MUX Bank Selector Signals, 35 Fan Tachometer Read Back, 65 Features, 2 Firmware Debugger Probe Signals, 43 Firmware Update, 30

G General Information Group, 14 General Signal Termination, 65

I I2C or SMBus Signals, 41 ICMB RS-485 Level Translation Circuit, 71 Initial Configuration of the MegaRAC® M300V card, 12

IPMI Command BIOS Interface Support, 76 IPMI Command Hardware Interface Support,

76

L Languages, 14, 30 Launch Redirection, 26 LDAP Settings, 17, 19 LED Control Signals, 31 Local Access Lock Out, 70 Logging Out, 30 LPC Bus Signals, 42

M M300V Card Layout, 9 M300V Card Mechanicals, 53 M300V GUI, 11 M300V GUI Overview, 11 M300V Interface Signal Specifications, 31 Maintenance Group, 14, 30 Management LAN and UART Connectors, 55 Management Subsystem Host Interface Type Encoding, 76

Management UART Signal Level Translation, 71

Management UART Signal Multiplexing, 72


MCard IPMI Command Interface Type Detection, 75

MCard Presence Detect, 38, 72, 75 MCard Presence Detect and Interface ID Support, 72

MCard Presence Detection Signal, 38 MCard Serial Port and ICMB, 36 MCARD_AUX_SoL_CTRL_L = Logic High, 60 MCARD_AUX_SoL_CTRL_L = Logic Low, 61 MCARD_DETECT_L = Logic High, 58 MCARD_DETECT_L = Logic Low, 59 MegaRAC M300V Card Mechanical Form Factor, 54

MegaRAC M300V Card Not Present, 62 MegaRAC M300V Card Present and in Non-SoL Mode, 64

MegaRAC M300V Card Present and on SoL Mode (Default), 63

MegaRAC M300V DDR2 Polarization Key, 53 MegaRAC® GUI Explained, 14 MegaRAC® M300V card Layout, 9 Menu Bar, 14 Miscellaneous Signals, 42 Modify User, 23, 25 Motherboard Hardware Support, 65 Motherboard I/O Terminations, 73 Motherboard Support for I/O Functions, 73 Motherboard Support for MegaRAC M300V SCI Interrupt Signal, 73

Mouse Mode Settings, 17, 20 Multi-Bank Fan Control Signals, 34 Multiplexed Fan Tach Input Signals, 34

N Network Settings, 17, 21

O OPMA Connector Specification and Pin Assignments, 49

OPMA Feature Card Power Requirements, 45 OPMA Hardware Resources, 44 OPMA LAN and Serial Port Connector Scheme, 55

OPMA Signals Grouped by Function, 46

P Partial Circuit Example for Local Access Lock Out, 70

Pin Assignments for the OPMA Connector, 49

Possible UART Configurations, 62 Power Status and Control, 29 Push-Button Signals, 32

R Reference Documents, 7 Remote Console Shortcut Key Combinations, 26

Remote Control Group, 14, 26

S SEEPROM Address Reservation, 44 Sensor Monitoring Options, 16 Sensor Reading, 15 Sensor Readings with Thresholds, 15 Serial Over LAN Feedback Path, 36 Serial over LAN Support, 57 Server Health Group, 14, 15 Setup your Client System’s Internet Browser, 13

Signal Callout Grouped by Functions, 31 Signal Encoding for ACPI State Reporting, 71

Single Wire Analog Voltage Sensor Signals, 35

SMTP Setting, 17, 22 Speaker Control Circuit Example, 69 SSL Configuration, 17, 22 Support for Dedicated Management LAN, 72 System Control Signals, 40 System Identification, 78 System Information, 14 System Speaker Control Circuit, 69 System Status Signals, 38

U USB Interface Signals, 32 User List, 17, 23, 25

V Video Capture DVI-I Signals, 33

Index 81

MegaRAC® M300V Card Implementer’s Reference and User’s Guide · 2007-07-09 · vi MegaRAC®...

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Transcript of MegaRAC® M300V Card Implementer’s Reference and User’s Guide · 2007-07-09 · vi MegaRAC®...