PXL Sensors Overview

M. Szelezniak 1PXL Sensor and RDO review – 06/23/2010

STAR

PXL Sensors Overview


STARSensor Requirements

Sensor requirements (consistent with IPHC development direction)

• ~2 cm x 2 cm (1 reticle) size.• Pixel size < 30 µm.• Integration time of ≤ 200 µs for L = 8 x 1027 cm-2s-1

• Power dissipation ≤ 170 mW/cm2 (air cooling)• Binary output with remote threshold adjustment• Efficiency of ≥ 95% for MIPs with a simultaneous accidental noise

rate of ≤ 10-4

• Maintain efficiency and accidental rate after radiation exposure of 90 kRad and 1012 1 MeV neq / cm2.

• ≤ 4 LVDS output channels (ladder space)• Remote configuration


STARTalk Outline

• MAPS @ IPHC• Principle of operation• Readout speed and integration time• Radiation hardness

• PXL sensors development path• Current generation of sensors

• Characteristics• Testing results

• Next generation of sensors• Sensor interface

• High resistivity substrate


STAR




• Next generation of sensors• Sensor interfaces



STARMAPS @ Institut Pluridisciplinaire Hubert Curien

• IPHC-DRS (former IRES/LEPSI) proposed using MAPS for high energy physics in 1999

• CMOS & ILC group today– 6 physists– 9 microcircuit designers– 6 test engineers– 7 PhD students

CNRS - IPHC, Strasbourg-Cronenbourg

More than 30 prototypes developed– several pixel sizes and architectures (simple

3-transistor cells, pixels with in-pixel amplifiers and CDS processing)

– different readout strategies (sensors operated in current and voltage mode, analog and digital output)

– Large variety of prototype sizes (from several hundreds of pixels up to 1M pixel prototype with full-reticule size)

MIMOSA (Minimum Ionizing particle MOS Active sensor)


STARMonolithic Active Pixel Sensors

• Standard commercial CMOS technology • Room temperature operation• Sensor and signal processing are integrated in the same silicon wafer• Signal is created in the low-doped epitaxial layer (typically ~10-15 μm) → MIP

signal is limited to <1000 electrons• Charge collection is mainly through thermal diffusion (~100 ns), reflective

boundaries at p-well and substrate → cluster size is about ~10 pixels (20-30 μm pitch)

• 100% fill-factor • Fast readout• Proven thinning to 50 micron

MAPS pixel cross-section (not to scale)


STARCharge Sharing and Cluster Size

Based on tests of several different prototypesS/N>12 allows detection efficiency >99.6%

MimoSTAR2 test results(30 μm pixel pitch)


STARMAPS Integration Time = Readout Time

• Typical sensor readout– Raster scan – Charge integration time = array

readout time– Multiplexed sub-arrays to

decrease integration time

• Column parallel readout architecture– All columns readout in parallel and

then multiplexed to one output– Charge integration time = column

readout time


STARFrom Analog to Binary Readout

VREF1 PWR_ON

MOSCAP

RESET

VREF2 VDD

PWR_ON

VR1VR2

READ

CALIB

ISF

PIXEL

COLUMN CIRCUITRY

OFFSET COMPENSATED COMPARATOR

(COLUMN LEVEL CDS)

SOURCEFOLLOWER

latch

Q

Q_

READ

READ

+

+

+

+

+ +

-

- -

-

LATCH

CALIB

READ

Digital readout – offers increased speed but requires on-chip discriminators or ADCs and increased S/N for on-chip signal processing

Analog readout – simpler architecture but slower readout


STARMAPS – Ionizing Radiation


STARMAPS – Non-ionizing Radiation


STAR







STARPXL Sensors Development Path

Pixel

Sensors CDS

ADC Data

sparsification

readout

to DAQ

analogsignals

Complementary detector readout

MimoSTAR sensors 4 ms integration time

PXL final sensors (Ultimate) < 200 μs integration time

analog

digital digital signals

Disc.

CDS

Phase-1 sensors 640 μs integration time

Sensor and RDO Development Path

1

2

3


STARCurrent Generation of Sensors

Phase-1 prototype Architecture based on Mimosa22 AMS-C35B4/OPTO which uses 4 metal-

and 2 poly- layers 14 μm epitaxial layer Reticle size (~ 4 cm²)

Pixel pitch 30 μm ~ 410 k pixels

Column parallel readout Column discriminators Binary readout of all pixels Data multiplexed onto 4 LVDS outputs

@ 160 MHz Integration time 640 μs

Functionality tests and yield look very good. Measured ENC is 15 e-. Beam test to measure MIP efficiency

planned for 2010.

Phase-2 prototype Small mask adjustments to improve

discriminator threshold dispersion


STARPhase1/2 Testing Results

Discriminator transfer functions:

Phase-1• FPN 0.6 mV to 1 mV • temporal noise 1-1.2 mV

Phase-2• FPN ~0.5 mV • temporal noise ~0.9 mV

55Fe calibrations:

noise ~14 e─

ADC counts

Threshold (mV) Column #R

ow #

1

0

coun

ts


STARPhase 1 vs. Phase 2

In Phase-2 the magnitude of discriminator threshold variations is smaller than in Phase-1.

Phase-1 chip B6

Phase-2 chip A2

Our test results feed back to IPHC designs to improve sensor performance


STARNext Generation PXL Sensor

Design based on Mimosa26 architecture Reticle size (~ 4 cm²)

Pixel pitch 20.7 μm (recent change) 890 k pixels

Reduced power dissipation Vdd: 3.0 V Optimized pixel pitch vs. Non-ionising

radiation tolerance Estimated power consumption ~134 mW/cm²

Short integration time 185.6 μs Improved pixel architecture Optimized discriminator timing

Improved threshold uniformity on-chip zero suppression 2 LVDS data outputs @ 160 MHz

S0 S1 S15

N Hits N Hits

-

Col

umn

-0

Col

umn

-63

Col

umn

-0

Col

umn

-63

Col

umn

-63

Col

umn

-0

A/D A/D… A/D A/D A/D A/D

…

…

…

…

…

…

…

…

S1 S2 Sn

Memory with 600 states stored and serial transmission

Col

umn

-0

Col

umn

-63

Col

umn

-0

Col

umn

-63

Col

umn

-63

Col

umn

-0

A/D A/D… A/D A/D A/D A/D

…

…

…

…

…

…

…

…

(6 states)

Priority Look-Aheadalgorithm

Selection of 9 states among n x 6 states for each row

(6 states)


(6 states)


Memory 1

Memory 2

core of the zero suppression

Zero suppression circuitry (SUZE)


STAR Mimosa26


STAR On-chip Zero Suppression


STARData Format After Zero Suppression


STAR PXL Sensor Testability


STARPhase1 and Final PXL Sensor Interface

Phase 1 and Phase 2 Final PXL sensor

Inputs

LVDS/CMOS CLKJTAG: TCK, TMS, TDI, TDO, Reset

START, SPEAK

Vlcp (analog reference voltage)

Outputs

8 x analog output4 x LVDS 2 x LVDS

16 x LVCMOS (?)

LAST_ROWCLKD

Test pad1, test pad2

DAC test pads (including Vref1, Vref2)

Required “ladder” interfaceRequired testing interface


STAR







STARNew Prototype on High Resistivity Substrate


STARSensor performance with HR substrate


STARSummary

• Sensor performance satisfies requirements

• Sensors design at IPHC is on schedule

• High resistivity substrate dramatically improves S/N and removes radiation hardness issues

• The design of the final PXL sensor will benefit from the ongoing tests of Mimosa22HR and latch up tests of Mimosa22HR and memory prototypes planned later this year

• Phase-2 will be used for ladder prototyping

• We will build a 3-sector detector prototype equipped with Phase-2 sensors to test it at STAR (2012)


STAR• Backup slides


STAR Phase1/2 testing results

The Phase-1 performance tested on several chips1 demonstrated FPN ranging from 0.6 mV to 1 mV and temporal noise estimated at 1-1.2 mV.


STARMAPS principle of operation

GND

VDD VDD

select

outputoutputin equilibrium

time

chargecollection

a) b)

chargecollectingdiode

reset

GND

VDD VDD

select

output

reset

output

time

chargecollection

chargecollectingdiode

VDD

Continuous reverse bias (self-biased)

Classical diode with reset

Reset noise, offset

No reset noise, no offset

read

read


STARSensor/RDO Requirements by generation

Mimostar–2 30 µm pixel, 128 x 128 array1.7 ms integration time1 analog outputMimostar–330 µm pixel, 320 x 640 array2.0 ms integration time2 analog outputsPhase–1/230 µm pixel, 640 x 640 array640 µs integration time, CDS4 binary digital outputsFinal (Ultimate)18.4 µm pixel, 1024 x 1088 array≤ 200 µs integration time, CDS,zero suppression2 digital outputs (addresses)

Sensor Sensor RDO

50 MHz readout clockJTAG interface, control infrastructureADCs, FPGA CDS & cluster findingzero suppression ≤ 4 sensor simultaneous readout

160 MHz readout clockJTAG interface, control infrastructurezero suppression120 sensor simultaneous readout

160 MHz readout clockJTAG interface, control infrastructure400 sensor simultaneous readout(full system)

DO

NE

PR

OTO

TYP

ED

Gen

1

1

2

3

PXL Sensors Overview

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