ELCT 201: Digital Logic Designeee.guc.edu.eg/Courses/Electronics/ELCT201 Digital Log… ·  ·...

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ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, [email protected] Dr. Eng. Wassim Alexan, [email protected] Lecture 2 ذو الحجة1438 هــWinter 2017 Following the slides of Dr. Ahmed H. Madian

Transcript of ELCT 201: Digital Logic Designeee.guc.edu.eg/Courses/Electronics/ELCT201 Digital Log… ·  ·...

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, [email protected]

Dr. Eng. Wassim Alexan, [email protected]

Lecture 2

هــ 1438ذو الحجة

Winter 2017

Following the slides of Dr. Ahmed H. Madian

COURSE OUTLINE

1. Introduction

2. Gate-Level Minimization

3. Combinational Logic

4. Synchronous Sequential Logic

5. Registers and Counters

6. Memories and Programmable Logic

BASIC LOGIC GATES

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• We have defined three basic logic gates and operators

• We could build any digital circuit from those basic logic gates

• In digital logic, we are not using normal mathematics, we are using Boolean algebra

PRACTICAL EXAMPLES OF AND & OR GATES

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Floyd 11th edition

A seat belt alarm system An intrusion detection system

Z Y X

1

0

0

1

0

1

0

1

0

0

1

1

Z Y X

0

1

1

0

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1

0

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0

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1

1

Z Y X

1

1

1

0

0

1

0

1

0

0

1

1

Z Y X

1

0

0

0

0

1

0

1

0

0

1

1

DERIVED GATES

NAND

AND-Invert

NOR

OR-Invert

XOR

Odd

XNOR

Even

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PRACTICAL ICS FOR LOGIC GATES

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74 Series Logic Gate Functions

PRACTICAL ICS FOR LOGIC GATES

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74 Series Logic Gate Functions

MEASUREMENT DEVICES

How to practically monitor the output of a gate?

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Oscilloscope

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Logic State Analyzer Floyd 11th edition

Probe

MEASUREMENT DEVICES

• Any Boolean expression can be converted into a circuit by combining basic gates in a relatively straightforward way.

• The diagram below shows the inputs and outputs of each gate.

• The precedencies are explicit in a circuit. Clearly, we have to make sure that the hardware does the operations in the right order!

EXPRESSIONS AND LOGIC CIRCUITS

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SIMPLIFICATION OF THE LOGIC FUNCTION

F(A,B)=A’B’ + A’B + AB’

= A’ * (B’ + B) + A * B’ (Distributivity)

= A’ * (B + B’) + A * B’ (Commutativity)

= A’ * 1 + A * B’ (x + x’ = 1)

= (A’ + B’) (De Morgan’s)

= (A B)’ 1 GATE (NAND) ONLY

From 7 gates, using simplification rules could be optimized to one gate

= A’ + (A * B’) (x +x’y)=(x+x’)(x+y)(Distributivity)

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EXPRESSIONS AND LOGIC CIRCUITS

• Now that we are familiar with Boolean algebra and logic gates, how would that help us build logic circuits?

• If you want to build a logic circuits, you must have a Boolean expression to represent it with logic gates!

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ALGEBRAIC FORMS OF REPRESENTING BOOLEAN FUNCTIONS

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• Sum of Products (SOP)

• Product of Sums (POS)

SUM OF PRODUCTS (SOP)

Switching functions formed by:

SUMMING (ORing) PRODUCT (ANDed) terms.

Example:

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, , ,F A B C D ABC B D AC D

literals

(product terms)

sum terms

SUM OF PRODUCTS (SOP)

Product terms are known as minterms

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A B C F 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1

F =

F = 001 011 101 110 111

+ A'BC + AB'C + ABC' + ABC A'B'C

The apostrophe ’ here means invert

SUM OF PRODUCTS (SOP)

Product term (or minterm) ANDed product – input combination for which output is true

Each variable appears exactly once, in true or inverted form (but not both)

16 Short-hand notation for minterms of 3 variables

A B C F minterms 0 0 0 0 A'B'C‘ m0 0 0 1 1 A'B'C m1 0 1 0 0 A'BC' m2 0 1 1 1 A'BC m3 1 0 0 0 AB'C' m4 1 0 1 1 AB'C m5 1 1 0 1 ABC' m6 1 1 1 1 ABC m7

F(A, B, C) = m(1,3,5,6,7) = m1 + m3 + m5 + m6 + m7 = A'B'C + A'BC + AB'C + ABC' + ABC

This form is called the canonical form

F(A, B, C) = A'B'C + A'BC + AB'C + ABC + ABC' = (A'B' + A'B + AB' + AB)C + ABC' = ((A' + A)(B' + B))C + ABC' = C + ABC' = ABC' + C

= AB + C This form is called the minimal form

From the pervious example:

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Answer:

SOP AND/OR

Two-level Implementation

F = A'B'C + A'BC + AB'C + ABC' + ABC

HOW TO BUILD A CIRCUIT FROM THE SOP FUNCTION?

PRODUCT OF SUMS (POS)

Switching functions formed by taking the:

PRODUCT (ANDing) of SUM (ORed) terms.

Example:

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, , ,F A B C D A B C B D A C D

Products

Literals

(Sum terms)

PRODUCT OF SUMS (POS)

Sum terms are known as Maxterms

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A B C F 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1

F = 000 010 100

F = (A + B + C) (A + B' + C) (A' + B + C)

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PRODUCT-OF-SUMS (CONT’D)

Sum term (or maxterm)

ORed sum of literals – input combination for which output is false

each variable appears exactly once in a sum term, in true or inverted form (but not both)

A B C maxterms 0 0 0 A+B+C M0 0 0 1 A+B+C' M1 0 1 0 A+B'+C M2 0 1 1 A+B'+C' M3 1 0 0 A'+B+C M4 1 0 1 A'+B+C' M5 1 1 0 A'+B'+C M6 1 1 1 A'+B'+C' M7

short-hand notation for Maxterms of 3 variables

F(A, B, C) = M(0,2,4) = M0 • M2 • M4 = (A + B + C) (A + B' + C) (A' + B + C)

This form is called the canonical form

F(A, B, C) = (A + B + C) (A + B' + C) (A' + B + C)

= (A + C) (B + C)

This form is called the minimal form

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Answer:

POS OR/AND

Two-level Implementation

F(A, B, C) = (A + B + C) (A + B' + C) (A' + B + C)

HOW TO BUILD A CIRCUIT FROM THE POS FUNCTION?

F=m(1,3,5,6,7) F=M(0,2,4)

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A B C F 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1

SOP AND POS REPRESENT THE SAME FUNCTION

POS VERSUS SOP

Any expression can be written either way

We can convert from one from to the other using theorems

Sometimes SOP looks simpler

AB + CD = ( A + C )( B + C )( A + D )( B + D )

Other times POS looks simpler

(A + B)(C + D) = BD + AD + BC + AC

However, SOP will be most commonly used

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MINIMIZATION OF LOGIC FUNCTIONS

We have chips with millions of gates

Why care about minimizing a function?

What do a few gates matter?

Basic logic functions are replicated thousands of times

Saving one gate for a memory cell pays off

What is the criterion for “minimization”

Should we minimize

Number of product terms?

Number of logic operations?

Number of variables (literals)?

Number of wires?

…?

For implementation: minimize number of gates!

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HOW TO MINIMIZE THE GATE COUNT?

Example: F=A’BC’+AB’C’+AB’C+ABC’= Σm(2,4,5,6)

How many gates do we need for implementation?

If AND gates have 3 inputs and OR gates have 4 inputs?

If all gates are binary (2 inputs)?

Are there any tricks we can use?

Combine minterms:

A’BC’+ABC’=BC’

AB’C’+AB’C=AB’

F = BC’+AB’

How many gates does F need now?

This mainly depends on your experience but we need a systematic

approach to minimize Boolean expressions

Answer: Karnaugh maps (K-maps)

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KARNAUGH MAPS

• Karnaugh maps (K-maps) are graphical representations of Boolean functions

• One map cell corresponds to a row in the truth table

• Also, one map cell corresponds to a minterm or a maxterm in the Boolean expression

• Multiple-cell areas of the map correspond to standard terms

x y minterm

0 0 m0

0 1 m1

1 0 m2

1 1 m3

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2-VARIABLE K-MAP

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m3

m2

1

m1

m0

0

1 0

x

y

0 1

2 3

• The ordering of variables is IMPORTANT for𝑓(𝑥, 𝑦), 𝑥 is

the row, 𝑦 is the column

• For the K map on the left, cell 0 represents 𝑥′𝑦′; cell 1

represents 𝑥′𝑦, etc…

• If a minterm is present in the function, then a 1 is placed

in the corresponding cell

m3

m1

1

m2

m0

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1

0

y

x

0 2

1 3

OR

BOOLEAN FUNCTIONS IN A K-MAP

The1s and 0s represent a function in a K-map

A 1 represents the On-set (F=1), while a 0 represents the Off-set (F=0)

Similar to the truth table

0s are typically not shown

x y f

0 0 0

0 1 0

1 0 0

1 1 1

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x y f

0 0 0

0 1 1

1 0 1

1 1 1

2-VARIABLE K-MAP

Any two adjacent cells in the map differ by ONLY one variable, which appears complemented in one cell and uncomplemented in the other

Example

𝑚0(= 𝑥′ 𝑦′) is adjacent to 𝑚1(= 𝑥′ 𝑦),

this means that

𝑥′𝑦′ + 𝑥′𝑦 = 𝑥′ 𝑦′ + 𝑦 = 𝑥′

Also 𝑚0(= 𝑥′ 𝑦′) is adjacent to 𝑚2(= 𝑥𝑦′)

𝑥′𝑦′ + 𝑥𝑦′ = 𝑦′ 𝑥′ + 𝑥 = 𝑦′

but 𝑚0(= 𝑥′ 𝑦′) is NOT adjacent 𝑚3(= 𝑥𝑦)! 29

2-VARIABLE K-MAP: AN EXAMPLE

The 1s are placed in the K-map for specified minterms: 𝑚0, 𝑚1 and 𝑚2

Grouping (ORing) of 1s allows for simplification

What (simpler) function is represented by each dashed rectangle?

Note that m0 is covered twice! 30

𝐹 𝑥1, 𝑥2 = 𝑥1′𝑥2′+ 𝑥1′ 𝑥2+ 𝑥1 𝑥2′

= 𝑚0 + 𝑚1+ 𝑚2 = 𝑥1

′ + 𝑥2′

𝑥1′ = 𝑚0 + 𝑚1

𝑥2′ = 𝑚0 + 𝑚2

3-VARIABLE MAP

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• Note the order of the

minterms

• Gray code is used, so that

the difference between any

adjacent cells is still ONLY

one literal

3-VARIABLE MAP: EXAMPLE I

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Simplify the Boolean expression: F 𝑥, 𝑦, 𝑧 = Σ(2,3,4,5)

F 𝑥, 𝑦, 𝑧 = 𝑥𝑦′ + 𝑥′𝑦

3-VARIABLE MAP: EXAMPLE II

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Simplify the Boolean expression: F 𝑥, 𝑦, 𝑧 = Σ(3,4,6,7)

F 𝑥, 𝑦, 𝑧 = 𝑦𝑧 + 𝑥𝑧′

3-VARIABLE MAP: EXAMPLE III

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Simplify the Boolean expression: F 𝑥, 𝑦, 𝑧 = Σ(0,2,4,5,6)

F 𝑥, 𝑦, 𝑧 = 𝑧′ + 𝑥𝑦′

3-VARIABLE MAP: EXAMPLE IV

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Let the Boolean function 𝐹(𝐴, 𝐵, 𝐶) = 𝐴′𝐶 + 𝐴′𝐵 + 𝐴𝐵′𝐶 + 𝐵𝐶

(a) Express this function as a sum of minterms

(b) Find the minimal SOP expression

𝐹 𝐴, 𝐵, 𝐶 = 𝛴(1,2,3,5,7) 𝐹 𝐴, 𝐵, 𝐶 = 𝐶 + 𝐴′𝐵

NOTES ON A 3-VARIABLE MAP

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• The number of adjacent squares that may be combined must always represent a number that is a power of two, such as 1, 2, 4 and 8

• As more adjacent squares are combined, we obtain a product term with fewer literals

• One square represents one minterm, giving a term with 3 literals

• Two adjacent squares represent a term with 2 literals

• Four adjacent squares represent a term with 1 literal

• Eight adjacent squares encompass the entire map and produce a function that is always equal to logic 1