Metal Semi Conductor Junctions

Agha Muqaddas Ali Khan MESP-1501

Asad Ali MESP-1517

Contents

Introduction

Metals

Semiconductors

Metal Semiconductor Junctions

Schottky Barriers

Rectifying Contacts

Ohmic Contacts

Typical Schottky Barriers

Introduction

Metals

• Good electrical conductors

• Free electrons

• Overlapping C.B. and V.B.

• Fermi level at center of

C.B. and V.B.

Semiconductors

• Intermediate conductivity

• Narrow band gap

• Either Electrons or Holes

as Majority Charge Carriers

• Fermi Level can be shifted

EF

Ele

ctro

n E

ner

gy

Band Overlapping

Conduction Band

Valence Band

Metal

Ele

ctro

n E

ner

gy

Eg

Valence Band

Conduction Band

EF

Intrinsic Semiconductor

Metal Semi Conductor Junction

Need for Metal SC Junction

• As metal contacts

• To connect external circuitry with the device

Semiconductor Device

Junction formation b/w metal contact and SC

Effect of Metal SC Junction

• Variation in Device Behavior

• Control May lost

V

Schottky Barrier

Metal and N-Type SC

Φ𝑚 = Work fn. Of Metal

Φ𝑠 = Work fn. Of SC

Φ𝑚 > Φ𝑠

𝑞χ =Electron Affinity

Schottky Barrier

Formation Of Junction

Fermi level aligning at equilibrium

Creation of Contact Potential= 𝑉𝑜

𝑉𝑜 = Φ𝑚 − Φ𝑠

Potential Barrier For electron

injection= Φ𝐵

Φ𝐵 = Φ𝑚 − χ

This barrier is called Schottky

Barrier

Schottky Barrier

Metal and P-Type SC

Φ𝑚 = Work fn. Of Metal

Φ𝑠 = Work fn. Of SC

Φ𝑚 < Φ𝑠

𝑞χ =Electron Affinity

Schottky Barrier

Fermi level aligning at

equilibrium

Creation of Contact

Potential= 𝑉𝑜

𝑉𝑜 = Φ𝑠 − Φ𝑚

Potential Barrier For electron

injection= Φ𝐵

𝑞Φ𝐵

Formation Of Junction

Rectifying Contacts

• Forward Biasing Schottky Barrier

• 𝑉𝑜 𝑉𝑜 − 𝑉

• Electron Diff. becomes easier from SC to M

• Here it is behaving like a F.B pn junction diode.

F.B. Schottky Barrier

Rectifying Contacts

R.B. Schottky Barrier

• Reverse Biasing Schottky Barrier

• 𝑽𝒐 𝑽𝒐 + 𝑽

• Electron flow from SC to M becomes Negligible

• Here it is behaving like a R.B PN junction diode.

• Electron flow from M to SC is retarded due to barrier 𝜱𝒎 − 𝝌 in both cases

Rectifying Contacts

• The resulting diode equation of

Schottky diode is similar to that

form of p-n junction.

𝐼 = 𝐼𝑜(𝑒𝑞𝑣

𝑘𝑇 − 1)

• Resulting 𝐼 − 𝑉 curve is similar to a

pn junction diode

• In Schottky diode, the reverse

saturation current depends only on

the size of barrier Φ𝐵

Ohmic Contacts

The current and voltage must be

proportional:

• Having I-V characteristic must be

linear in both direction- Low

Resistance.

• IC contains thousands of P-N which

must be connected or interconnected

for Proper use of Device.

Ideal MS Contact

Assumptions:

• M and S are in intimate

contact, on atomic scale

• No oxides or charges at the

interface

• No intermixing at the

interface

Ohmic MS Contacts

Ways to achieve Ohmic MS contacts

• Reduce the Schottky barrier height. How???

• Reduce the Schottky barrier width (depletion width). How?

How would each approach give us an ohmic contact?

M-S will be Ohmic

• Ohmic contact occur when the induced charge in the semiconductor during the fermi level alignment is the Majority carriers.

When M < S:

• Fermi level aligned at equilibrium by transforming electrons from metal to semi conductor.

When M < S:

• Barrier for carriers is small

and easily overcome by a

small voltage.

• No depletion region occur in

the semiconductor since

Fermi level calls for

accumulation of majority

carriers in the semi

conductors

• Ohmic contact are formed by

doping the semiconductor

heavily

When M > S:

• Easy flow of holes across the junction

• No depletion region occur in these region

Practical Ohmic contact

In practice most M-S are rectifying

To achieve the contact which can conduct on both

directions we doped the semiconductor heavily.

W is so narrow that carrier can tunnel through the

barrier.

Flow of charge by Tunneling

• Narrow space charge region will make more

tunneling effect and small applied voltage is

required

Flow of charge by Tunneling

Typical Schottky barrier

• Surface state leads to charge metal-semiconductor interference. These surface states often lies in the semiconductor band gap and pin the Fermi level at the fixed position regardless of the metal used.

Fermi level pinning by interference states in compounds semiconductors 𝐸𝑓 pinned near 𝐸𝑐-0.8ev in n-type GaAs, regardless of the choice of metal.