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VLSI DesignSystem-on-Chip Design

Overview of System on a Chip

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System on Chip Design

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System on Chip Design

A complete System on a Chip (SoC) design flow beginning with a design specification and ending with a working SoC. Creation of RTL level modules designed for reuse, integration of Intellectual Property (IP) for both RTL level and physical level IP, IC verification, and the creation of self-checking test benches for SoC designs.

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System on Chip Design

System-on-a-chip (SoC) is a major revolution taking place in the design of integrated circuits due to the unprecedented levels of integration possible. As a result, new methodologies and tools are demanded to address design, verification and test problems presented by SoCs in this rapidly evolving area.

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System on Chip Design

The key concept in SoC/IP design is that a chip can be constructed rapidly using third-party and internal IP, where IP refers to a pre-designed behavioral or physical descriptions of a standard component.

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System on Chip Design

According to the International Technology Roadmap for Semiconductors, "Innovation in the techniques used in circuit and system design will be essential to maintain the historical trends in performance improvement."

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SOC example and VLSI system

For DSM, Interconnects between chips and within chipsdominate the performance of your system !!

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SOC example

General purpose processor and DSP processor are hard cores (Hard IP)– A pre-designed layout– Programmed, Interface to standard buses

Bus interface unit (Soft IP)– A synthesizable module in Verilog, VHDL, C– Internal buses, External buses (PCI, ISA, etc)

Glue Logic

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SOC Example

Analog: A/D and RF circuitry MEMS: Micro-Electrical Mechanical

Systems Sensors

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An Example: System on A Chip Architecturefrom Palmchip corporation

A BUS ARCHITECTURE FOR SYSTEM-ON-CHIP DESIGNS

11from Atmel corporation

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SOC Applications

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Our Course: System on Chip Design and Architecture

1. VLSI Integrated Circuit Design: A Design Perspective, emphasis on system performance. Materials mainly from the textbook, some from other books or papers

2. System Introduction

Multimedia Application, Wireless Application

Telecommunications, Computer Arithmetic, and others

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Why VLSI?

Integration improves the design: lower parasitics = higher speed;

– lower power;– physically smaller = higher speed.

Integration reduces manufacturing cost (almost) no manual assembly.

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VLSI and you

Microprocessors:– desktop personal computers;– notebook computers– microcontrollers.– pocket PCs/games

DRAM/SRAM/Flash Memory/EEPROM. Special-purpose processors.

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Moore’s Law

Gordon Moore: co-founder of Intel. Predicted that number of transistors per chip

would grow exponentially (double every 18 months).

Exponential improvement in technology is a natural trend: steam engines, dynamos, automobiles.

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Moore’s Law plot

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The cost of fabrication

Current cost: $2-3 billion. Typical fab line occupies about 1 city

block, employs a few hundred people. Most profitable period is first 18 months-2

years.

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Cost factors in ICs

For large-volume ICs:– packaging is largest cost;– testing is second-largest cost.

For low-volume ICs, design costs may swamp all manufacturing costs.

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The VLSI design process May be part of larger product design. Major levels of abstraction:

– specification;– architecture;– logic design;– circuit design;– layout.

The VLSI design process = SOC design process

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Challenges in VLSI design

Multiple levels of abstraction: transistors to CPUs.

Multiple and conflicting constraints: low cost and high performance are often at odds.

Short design time: Late products are often irrelevant.

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Dealing with complexity

Divide-and-conquer: limit the number of components you deal with at any one time.

Group several components into larger components:– transistors form gates;– gates form functional units;– functional units form processing elements;– etc.

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Layout and its abstractions

Layout for dynamic latch:

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Stick diagram

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Transistor schematic

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Mixed schematic

inverter

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Levels of abstraction

Specification: function, cost, etc. Architecture: large blocks. Logic: gates + registers. Circuits: transistor sizes for speed, power. Layout: determines parasitics.

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Circuit abstraction

Continuous voltages and time:

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Digital abstraction

Discrete levels, discrete time:

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Register-transfer abstraction

Abstract components, abstract data types:

+

+

0010

0001

0100

0111

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Top-down vs. bottom-up design

Top-down design adds functional detail.– Create lower levels of abstraction from upper

levels. Bottom-up design creates abstractions from

low-level behavior. Good design needs both top-down and

bottom-up efforts.

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Design abstractions

specification

behavior

register-transfer

logic

circuit

layout

English

Executableprogram

Sequentialmachines

Logic gates

transistors

rectangles

Throughput,design time

Function units,clock cycles

Literals, logic depth

nanoseconds

microns

function cost

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Design validation

Must check at every step that errors haven’t been introduced - the longer an error remains, the more expensive it becomes to remove it.

Forward checking: compare results of less- and more-abstract stages.

Back annotation: copy performance numbers to earlier stages.

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Manufacturing test

Not the same as design validation: just because the design is right doesn’t mean that every chip coming off the line will be right.

Must quickly check whether manufacturing defects destroy function of chip.

Must also speed-grade.