Www.nanocmos.ac.uk Meeting the Design Challenges of Nano-CMOS Electronics Asen Asenov (PI), Richard...

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www.nanocmos.ac.uk Meeting the Design Challenges of Nano-CMOS Electronics Asen Asenov (PI), Richard Sinnott (eSDirector), all partners e-Science Pilot Project 11 PDRAs 7 Science 4 e-Sci 9 PhD £3.7M EPSRC £4.5M FEC £5.7M with IC

Transcript of Www.nanocmos.ac.uk Meeting the Design Challenges of Nano-CMOS Electronics Asen Asenov (PI), Richard...

www.nanocmos.ac.uk

Meeting the Design Challenges of Nano-CMOS

Electronics

Meeting the Design Challenges of Nano-CMOS

Electronics

Asen Asenov (PI), Richard Sinnott (eSDirector), all partners

e-Science Pilot Project

11 PDRAs 7 Science4 e-Sci9 PhD

£3.7M EPSRC£4.5M FEC£5.7M with IC

www.nanocmos.ac.uk

I have been here beforeI have been here beforeNASA

Late 90ies

InformationPowerGridIPG

Glasgow was the overseas

node

www.nanocmos.ac.uk

ContentContent

The partners

Motivation

The challenge

The eScience and Grid approach

Current status

The next phase

www.nanocmos.ac.uk

Advanced Processor Technologies Group (APTGUM)

Device Modelling Group (DMGUG)

Electronic Systems Design Group (ESDGUS)

Intelligent Systems Group (ISGUY)

National e-Science Centre (NeSCG)

Microsystems Technology Group (MSTGUG)

Mixed-Mode Design Group in IMNS (MMDGUE)

National e-Science Centre (NeSCE)

e-Science NorthWest Centre (eSNW)

University PartnersUniversity Partners

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Industrial PartnersIndustrial PartnersGlobal EDS vendor and world TCAD leader600 licences for grid implementation, model implementation

QuickTime™ and aGIF decompressor

are needed to see this picture.

UK fabless design company and world microprocessor leaderCore IP, simulation tools, staff time

UK fabless design company and world mixed mode leaderAdditional PhD studentship for mixed mode design

Global semiconductor player with strong UK presenceAccess to technology, device data, processing

Global semiconductor player with strong UK presenceAccess to technology, device data, processing

Global semiconductor player with UK presenceCASE studentship, interconnects

Trade association of the microelectronics industry in the UKRecruiting new industrial partners and dissemination

www.nanocmos.ac.uk

The ChallengeThe Challenge

International Tech nology Roadmap for Semiconductors Year 2005 2010 2015 2020

MPU Half Pitch (nm) 90 45 25 14

MPU Gate Length (nm) 32 18 10 6

2005 edition Toshiba 04

Device diversification

90nm: HP, LOP, LSTP

45nm: UTB SOI

32nm: Double gate

25 nm

Bulk MOSFET

FD SOI

UTB SOI

FinFET

HP(MPU)

LOP

LSTP

Stat.Sets

230 nm

Bulk MOSFET

Standard

SingleSet

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The variability is becoming a major headache

The variability is becoming a major headache

G. Declerck, Keynote talk, VLSI Technol. Symp. 2005

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Deterministic variability Deterministic variability

Geometryvariation

Strainvariation

OPC

Strain

Syn

opsy

s

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Statistical variability

The simulationParadigm now

A 22 nm MOSFETIn production 2008

A 4.2 nm MOSFETIn production 2023

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0.0 0.2 0.4 0.6 0.8 1.00.0

0.2

0.4

0.6

0.8

1.0

Vou

t2(V

)

Vout1

(V)Vout1 [V]

Vout2 [V]

Statistical variability Statistical variability

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Performance/Power/Yield (PPY) trade-off

Performance/Power/Yield (PPY) trade-off

Power

Performance

957535 5

Yield, %

Power

Performance

35 5

Yield, %95

75

90nm TN 45nm TN

www.nanocmos.ac.uk

Delivering new resultsDelivering new results

CHARACTE-RISTICS

DE

VIC

ES

COMPACTDEVICE

PARAMETERS

CHARACTE-RISTICS

CIR

CU

ITS

CIRCUIT SUMULATORS

SYSTEM SIMULATORS

Hierarchical IC Simulation

Simulators

COMPACTCIRCUIT

PARAMETERS

Data Abstraction

CO

MP

AC

TC

IRC

UIT

MO

DE

LS

CO

MP

AC

TD

EV

ICE

MO

DE

LS

PA

RA

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TE

RE

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RA

CT

OR

PA

RA

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TE

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RA

CT

OR

MEASUREMENTS

DEVICE SIMULATORS

PROCESS SIMULATORS

TC

AD

Simple conceptIntegrated Hierarchical

Statistical Design

Complex data and workflows

Data and Compute Intensive

Security Sensitive

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ObjectivesObjectives Understanding and forecasting the behaviour,

characteristics and variability of next generation nano-CMOS devices using Grid-enabled statistical 3D numerical simulations;

Developing compact model and parameter extraction strategies to capture new device characteristics and variability (based on physical device simulation and early research devices), creating efficient databases for circuit design;

Developing hybrid, Grid based device/circuit simulation techniques applicable to novel nano-CMOS devices with significant variability;

Investigating the impact of new device architectures and device variability on well established design components, sub-systems and systems presently designed using conventional MOSFET architectures;

Developing novel design concepts that cope with increased variability, using specific properties of the new devices;

Learning how electronics researchers can use e-Science technologies to support their work, improve their productivity and enable them to undertake research hitherto impossible.

www.nanocmos.ac.uk

The Development Challenge

The Development Challenge

Electronic design teams currently use different tools, have different data formats, need access to large scale compute resources, generate vast amounts of data, work independently of device engineers.

We are building an integrated Grid infrastructure which will revolutionise nanoCMOS design by hiding the complexity of the statistical design making it a completely integrated collaborative process.

www.nanocmos.ac.uk

Dealing with the complexity Dealing with the complexity

CHARACTE-RISTICS

DE

VIC

ES

COMPACTDEVICE

PARAMETERS

CHARACTE-RISTICS

CIR

CU

ITS

CIRCUIT SUMULATORS

SYSTEM SIMULATORS

Hierarchical IC Simulation

Simulators

COMPACTCIRCUIT

PARAMETERS

Data Abstraction

CO

MP

AC

TC

IRC

UIT

MO

DE

LS

CO

MP

AC

TD

EV

ICE

MO

DE

LS

PA

RA

ME

TE

RE

XT

RA

CT

OR

PA

RA

ME

TE

RE

XT

RA

CT

OR

MEASUREMENTS

DEVICE SIMULATORS

PROCESS SIMULATORS

TC

AD

CHARACTE-RISTICS

DE

VIC

ES

COMPACTDEVICE

PARAMETERS

CHARACTE-RISTICS

CIR

CU

ITS

CIRCUIT SUMULATORS

SYSTEM SIMULATORS

Hierarchical IC Simulation

Simulators

COMPACTCIRCUIT

PARAMETERS

Data Abstraction

CO

MP

AC

TC

IRC

UIT

MO

DE

LS

CO

MP

AC

TD

EV

ICE

MO

DE

LS

PA

RA

ME

TE

RE

XT

RA

CT

OR

PA

RA

ME

TE

RE

XT

RA

CT

OR

MEASUREMENTS

DEVICE SIMULATORS

PROCESS SIMULATORS

TC

AD

Year 1DMGUGNeSCGNeSCEeSNW

Year 2-4ALL

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Synopsis .tif file input

Manual ExtractionOf Doping Profiles

Doping Profiles

Current WorkflowCurrent Workflow

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Doping Profiles

Current WorkflowCurrent Workflow

Manually generatedInput file

+

+

Atomistic Simulation

Simulation TimeOf between 1K-50K

CPU Hours

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Current WorkflowCurrent Workflow

Atomistic Simulation

200-1000x High Drain Bias IV’s

200-1000x Low Drain Bias IV’s

100-1000Mb Data

Synopsys Aurora

Shell Scripts

Simulation TimeOf between 1K-50K

CPU Hours

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Current WorkflowCurrent Workflow

Synopsys Aurora

Aurora ExtractionStrategy

Uniform DeviceSimulation Data

Synopsys Aurora

Aurora Extraction Strategy

200-1000 xData files

200-1000Spice Compact

Models

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Grid stretch focused on realising scientific needs Grid stretch focused on realising scientific needs

Optimised nanoCMOS Grid Infrastructure

Resource Mgt Framework

Data Mgt Framework

Advanced Security Framework

Workflow Mgt Framework

Security attributes definition

Policy Decision/Enforcement Points

Attribute Request/Release Policies

Identity Management

Trust FederationAccounting Components

Information Services

Meta-scheduling Services

Reservation/Allocation Services

Resource Broking Service

Data Access/Linkage/Integration

Replication/Movement

Metadata/Provenance

Storage/Curation Services

Domain Knowledge Capture/Pres.

Data Transformation

Workflow Definition

Robust Enactment

Dependency Mgt

Job submission/mgt

Computational Steering

Visualisation Services

www.nanocmos.ac.uk

Balsa high-level asynch. circuit

synthesis tool used, e.g. for timing verification Expressivity of myGrid

Taverna workflow design,

FreeFluo enactment? myGrid workflow =>

Grid service development

Meta-data capture/data annotation

Control loops for optimisation,

concurrency needed

Feed requirements into OMII-UK for language and enactment engine

enhancements

Typical existing application

Typical existing application

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Can solve licensing issues on GridCan solve licensing issues on Grid

451 group identified this as key area Grid community 451 group identified this as key area Grid community mustmust addressaddress

(…IECnet)(…IECnet)

Fine grained authorisation readily supported by Fine grained authorisation readily supported by Shibboleth and associated technologies such as PERMISShibboleth and associated technologies such as PERMIS

Is being deployed across UK academia to replace Is being deployed across UK academia to replace existing Athens systemexisting Athens system

essential to address gap between essential to address gap between researchresearch and and GridGrid communitiescommunities

consider number of active UK e-Science certs vs Athens consider number of active UK e-Science certs vs Athens accountsaccounts

Future Grids must be harmonised with wider Future Grids must be harmonised with wider e-e-InfrastructureInfrastructure developments developments

Using the Grid should be no different than using any other Using the Grid should be no different than using any other internet based system from researcher perspectiveinternet based system from researcher perspective

Why Shibboleth…?Why Shibboleth…?

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DyVOSE Delegation Issuing Service

DyVOSE Delegation Issuing Service

PERMIS based Authorisation checks/decisions

Glasgow Education

VO policies

Glasgow EdinburghCondor pool

Grid BLASTData

Service Nucleotide+ Protein

Sequence DB

Grid-data Client

Grid BLASTService

Edinburgh Education VO policies

LDAP LDAP

Implemented by Students

Protein/nucleotide sequence data returned based on student team and Edinburgh policy

data input

Job scheduling/data management

Glasgow SoA using Edinburgh DIS

Glasgow nanoCMOS policies

Edinburgh nanoCMOS policies

Edinburgh nanoCMOS data sets

Edinburgh nanoCMOS services

Glasgow nanoCMOS researcher

s

Glasgow nanoCMOS services

Create new ACs for Glasgow nanoCMOS

users/roles

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Roles, attributes, licenses,… needed to make authorisation

decision

Distinguished Name

Shibboleth-based access to/usage of Grid Resources

Shibboleth-based access to/usage of Grid Resources

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Shibboleth Enabled Portal - The New Workflow

Shibboleth Enabled Portal - The New Workflow

Institutional Login

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The New Workflow - Unified SimulationThe New Workflow - Unified Simulation

Logged In To PortalShibboleth Attributes determine permissions from attributes

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The New Workflow - Unified Simulation

Stage 1: Create a New Job TicketThis will be automated in the very near future

www.nanocmos.ac.uk

The New Workflow - Unified SimulationThe New Workflow - Unified Simulation

Stage 2: File UploadThe desired .tif doping profile and atomistic input file are uploaded to the server

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The New Workflow - Unified SimulationThe New Workflow - Unified Simulation

Stage 3: Atomistic SimulationExtraction, mesh generation, simulation, and aurora output phases are now combined

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The New Workflow - Unified SimulationThe New Workflow - Unified Simulation

Stage 4: Aurora SimulationInput the extraction strategy that you wish to use and run aurora.

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The New Workflow - Unified SimulationThe New Workflow - Unified Simulation

Stage 5: Your compact models sirSelect the data you require and download it.

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OMII-Security PortletsOMII-Security Portlets to developing family of JSR- to developing family of JSR-168 compliant portlets for: 168 compliant portlets for:

scoping of attributes, e.g. only accept scoping of attributes, e.g. only accept Shibboleth attributes and assertions from nanoCMOS Shibboleth attributes and assertions from nanoCMOS partnerspartners

dynamic portal configuration management, e.g. dynamic portal configuration management, e.g. configure portal content based on user privileges configure portal content based on user privileges (security attributes)(security attributes)

attribute release policies, e.g. only release my attribute release policies, e.g. only release my nanoCMOS specific attributes to nanoCMOS partnersnanoCMOS specific attributes to nanoCMOS partners

OMII-RAVEOMII-RAVE

With Cardiff University to integrate Resource With Cardiff University to integrate Resource Aware Visualisation Environment into OMIIAware Visualisation Environment into OMII

Visualisation key component and will help Visualisation key component and will help computational steeringcomputational steering

Other new projects supporting nanoCMOSOther new projects supporting nanoCMOS

www.nanocmos.ac.uk

MSTGUGMSTGUG

Cell fragments

Reduce deterministic variability:

develop regular cell fragmentsoptimise the fragments to reduce deterministic variability

Characterise the statistical variability

full 3D simulation of statistical variability in the fragmentstiming variability

www.nanocmos.ac.uk

APTGUMAPTGUM

Balsa synthesis

World’s leading public domain async synthesis tool

developed at UoMmultiple back-end libraries with differing timing assumptions

Results from eScience:improved understandingof economy/reliabilitytrade-offs on futuretechnologies

www.nanocmos.ac.uk

ISGUYISGUYRedundancy for fault tolerant design

Different hardware Configurations can meet the fitness criteria

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ESDGUSESDGUS

World-leading research Behavioural Simulation (VHDL-AMS)Fault Simulation/Modelling

Results from eScience:Grid-enabled simulationtechnology

Behavioural Analogue Fault Simulation