Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO...
-
Upload
walter-lawrence-hawkins -
Category
Documents
-
view
217 -
download
0
Transcript of Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO...
![Page 1: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/1.jpg)
Tezzaron Semiconductor 11/15/2013 1
A Perspective on Manufacturing 2.5/3D
Bob Patti, CTO
![Page 2: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/2.jpg)
Tezzaron Semiconductor 11/15/2013 2
Span of 3D IntegrationRich and Varied Technologies
CMOS 3DCMOS 3D
Analog
Flash
DRAM
DRAM
CPU
Analog
Flash
DRAM
DRAM
CPU
3D Through Via Chip Stack
100,000,000s/sqmmTransistor to Transistor Ultimate goal
1s/sqmmPeripheral I/O Flash, DRAMCMOS Sensors
Tezzaron 3D-ICs
100-1,000,000/sqmm1000-10M Interconnects/device
Packaging Wafer Fab
IBMIBM/Samsung
![Page 3: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/3.jpg)
Tezzaron Semiconductor 11/15/2013 3
3rd Si thinned to 5.5um
2nd Si thinned to 5.5um
1st Si bottom supporting wafer
SiO2
![Page 4: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/4.jpg)
Tezzaron Semiconductor 11/15/2013 4
0.6um SOI TSV
120K TSVs
![Page 5: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/5.jpg)
Tezzaron Semiconductor 11/15/2013 5
Tezzaron 3D Devices
![Page 6: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/6.jpg)
Tezzaron Semiconductor 11/15/2013 6
3D DRAMsOctopus I• 1-4Gb• 16 Ports x 128bits (each way) • @1GHz
– CWL=0 CRL=2 SDR format– 5ns closed page access to first data (aligned)– 12ns full cycle memory time– >2Tb/s data transfer rate
• Max clk=1.6GHz• Internally ECC protected, Dynamic self-repair, Post attach repair• 115C die full function operating temperature
Octopus II• 4-64Gb• 64-256 Ports x 64bits (each way)• @1GHz
– 5-7ns closed page access to first data (aligned)– 12ns full cycle memory time– >16Tb/s data transfer rate– 4096 banks– 2+2pJ/bit
![Page 7: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/7.jpg)
Tezzaron Semiconductor 11/15/2013 7
Gen4 “Dis-Integrated” 3D Memory
DRAM layers4xnm node
Controller layer contains: senseamps, CAMs, row/column decodes and test engines. 40nm node
I/O layer contains: I/O, interface logic and R&R control CPU. 65nm node
2 million vertical connections per lay per die
Better yielding than 2D equivalent!
![Page 8: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/8.jpg)
Tezzaron Semiconductor 11/15/2013 8
2.5/3D in Combination
CC
FPGA (4Xnm)
Active Silicon Circuit Board
2 Layer Processor2 Layer Processor3 Layer 3D Memory
CC
Organic Substrate
level#0
level#1
level#2
level#3
Solder Bumps
μBumps
C4 Bumps
Die to Wafer Cu Thermal Diffusion Bond
level#4
IME A-Star / Tezzaron Collaboration
IME A-Star / Tezzaron Collaboration
![Page 9: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/9.jpg)
Tezzaron Semiconductor 11/15/2013 9
Tezzaron Dummy Chip C2C Assembly
Memory die
X-ray inspection indicated no significant solder voids
C2C sample
X-section of good micro bump
CSCAN showed no underfill voids (UF: Namics 8443-14)
![Page 10: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/10.jpg)
Tezzaron Semiconductor 11/15/2013 10
WHAT IS IMPORTANT?
![Page 11: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/11.jpg)
Tezzaron Semiconductor 11/15/2013 11
10um TSV20um Pitch
TSV Pitch ≠ Area ÷ Number of TSVs• TSV pitch issue example
– 1024 bit busses require a lot of space with larger TSVs– They connect to the heart and most dense area of processing
elements– The 45nm bus pitch is ~100nm; TSV pitch is >100x greater– The big TSV pitch means TOF errors and at least 3 repeater
stages
FPU
1024 bit busSingle layer interconnect
1um TSV2um Pitch
![Page 12: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/12.jpg)
Tezzaron Semiconductor 11/15/2013 12
Die to Wafer – 2.5D
• KGD• Multilayer capability• Incremental risk buy down• Extends SOC concepts
RPI/Dr. James Lu
![Page 13: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/13.jpg)
Tezzaron Semiconductor 11/15/2013 13
DRC, LVS, Transistor synthesis, Crossprobing.
Multiple tapeouts, 0.35um-45nm
>20GB, ~10B devices
Independent tech files for each tier.
Saves GDSIIas flipped or rotated.
Custom output streams for 3D DRC / LVS.
Tools
MAX-3D by Micro Magic, Inc. Fully functional 3D layout editor. Mentor and Tezzaron Optimize
Calibre 3DSTACK for 2.5/3D-ICs
![Page 14: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/14.jpg)
Tezzaron Semiconductor 11/15/2013 14
Tezzaron/Novati 2.5/3D Technologies
• “Volume” 2.5D and 3D Manufacturing• Interposers
– High K Caps– Photonics– Passives– Power transistors
• Development of More than Moore Technologies– microfluidics– integrated sensors– image enhancement technologies
• Cu-Cu, DBI®, Oxide, IM 3D assembly
![Page 15: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/15.jpg)
Tezzaron Semiconductor 11/15/2013 15
Capabilities
Over 150 production grade tools
68000 sq ft Class 10 clean room
24/7 operations & maintenance
Manufacturing Execution Systems (MES)
IP secure environments, robust quality systems
ITAR registered
Full-flow 200mm silicon processing, 300mm back-end (Copper/Low-k)
Process library with > 25000 recipes
Novel materials (ALD, PZT, III-V, CNT, etc)
Copper & Aluminum BEOL
Contact through 193nm lithography
Silicon, SOI and Transparent MEMS substrates
Electrical Characterization and Bench Test Lab
Onsite analytical tools and labs: SIMS, SEM, TEM, Auger, VPD, ICP-MS, etc
Facility Overview
IN NOVATI ON
TECHNOLOGIES
ISO 9001:2008 13485:2013
TRUST 2013
![Page 16: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/16.jpg)
Tezzaron Semiconductor 11/15/2013 16
THE ROAD AHEAD…
![Page 17: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/17.jpg)
Tezzaron Semiconductor 11/15/2013 17
Near End-of-Line TSV Insertion
poly
STI
SINM1
M2
M3
M4
M5
M6
M7
5.6µTSV is 1.2µWide and ~10µ deep
W
M8TM
M4
M52x,4x,8x Wiring level~.2/.2um S/W
![Page 18: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/18.jpg)
Tezzaron Semiconductor 11/15/2013 18
3082901CMP1 - Edge
![Page 19: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/19.jpg)
Tezzaron Semiconductor 11/15/2013 19
100mm InP/CMOS
![Page 20: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/20.jpg)
Tezzaron Semiconductor 11/15/2013 20
![Page 21: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/21.jpg)
Tezzaron Semiconductor 11/15/2013 21
Embedded Die to Wafer with Wafer Cap
![Page 22: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/22.jpg)
Tezzaron Semiconductor 11/15/2013 22
SensorAnalog
DigitalHost Wafer / Motherboard
Dummy strip with pad cuts and Al bond pads
TSV Sensor Driver Strip
![Page 23: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/23.jpg)
Tezzaron Semiconductor 11/15/2013 23
DBI Die to Wafer Attach
![Page 24: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/24.jpg)
Tezzaron Semiconductor 11/15/2013 24
Die to Wafer in Process
![Page 25: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/25.jpg)
Tezzaron Semiconductor 11/15/2013 25
Die Placement Finished
![Page 26: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/26.jpg)
Tezzaron Semiconductor 11/15/2013 26
DBI Add TSV Silicon Strips for Receiving Sensor Driver Connections
![Page 27: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/27.jpg)
Tezzaron Semiconductor 11/15/2013 27
DBI Add Dummy Silicon Strips with TSVs at pads for Wire Bonding and to Prevent Thinning Process Rounding Off Die
Edges
![Page 28: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/28.jpg)
Tezzaron Semiconductor 11/15/2013 28
Thin Die and Dummy Strips to Analog TSVs and then Backside Process Analog Layer and Sensor Driver Connection
Strips
![Page 29: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/29.jpg)
Tezzaron Semiconductor 11/15/2013 29
Populate Sensor Die using Microbump or DBI
![Page 30: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/30.jpg)
Tezzaron Semiconductor 11/15/2013 30
• 16x100G Optical Transceivers– 8 Optical I/O per
Couplers
• Four optical power supplies
• Photonic Interposer with TSVs
14nm FF Chip
Photonics for Short Haul
![Page 31: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/31.jpg)
Tezzaron Semiconductor 11/15/2013 31
Double Sided Silicon Interposer
![Page 32: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/32.jpg)
Tezzaron Semiconductor 11/15/2013 32
Integrating Fluidics into 3D: Liquid Cooling
It’s a MEMS, 2.5D SOC/SIP future…
![Page 33: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/33.jpg)
Tezzaron Semiconductor 11/15/2013 33
• SIP/SSIP– Power Conversion– Cooling– Photonics
• Optimization– Extending to power
• Mixed PCB/IC Metaphor
“5.5D” Systems
![Page 34: Tezzaron Semiconductor 11/15/2013 1 A Perspective on Manufacturing 2.5/3D Bob Patti, CTO rpatti@tezzaron.com.](https://reader037.fdocuments.us/reader037/viewer/2022103122/56649ce15503460f949ab609/html5/thumbnails/34.jpg)
Tezzaron Semiconductor 11/15/2013 34
Summary
• Industry has the momentum– Generating tools and technology– Problems are now deemed solvable
• 3D is proving value– There is production and it is expanding
• CMOS to MEMS• CMOS to sensors
SensorsComputing
MEMSCommunications