Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov.

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Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov

Transcript of Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov.

Page 1: Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov.

Test ISIS1 P-well device on board V1.4

RAL Z. Zhang & K. Stefanov

Page 2: Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov.

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Content

• Why new test board (V1.4)– Test with board V1.2– Looking for direct evidence

• Result on new board– Photo gate events counts– Storage pixel events counts

• Conclusion

Page 3: Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov.

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Test on Board V1.2

• Several indirect methods were used – Ratio of event count on photo gate over storage pixel

• Normalize the date for comparison• Useful number for the device: ratio of real and “fake” events

– Compare the ratio for different devices and settings• Normal device • Medium doped device• Heaviest doped device and different CLK amplitude

• No direct indication on punch-through

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Ratio with Fixed Photo Gate Voltage

Ratio vs Threshold (PG=18V)

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P-well_1(4V) P-well_1(8V) P-well_2(4V ) Normal

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Ratio with Fixed Threshold

Ratio of event count (Threshold = 1110 e-)

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P-well_1(4V) P-well_1(8V) P-well_2(4V) Normal

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Looking for Direct Evidence

• New test board– Reduce the photo gate voltage – Reduce the offset of CLK – Minimize the change from V1.2– Change the voltage of substrate

• Punch-through on photo gate

• Result on storage pixel

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Ratio with Punch-through

Ratio vs PG Voltage CLK offset = -4 V thresold =1110e

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P-well1 Normal ISIS1

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Event Count with Punch-throgh

Event count with different CLK offset

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Events Counts on Storage pixel (1)CLK p-p= 4V; bias from -2 to 1 V; Normalized histogram plot

Offset = -2 V (1221) Offset = -1 V (1222) Offset = 0 V (1223)

Normal ISIS1 (833)Offset = 2 V (1225)Offset = 1 V (1224)

Page 10: Test ISIS1 P-well device on board V1.4 RAL Z. Zhang & K. Stefanov.

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Events count on Storage pixel(2)

Offset = -3 V (1220) Offset = -2 V (1221) Offset = -1 V (1222)

Offset = 2V (1225)Offset = 1 V (1224)Offset = 0 V (1223)

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Events counts on storage pixel(3)

Storage pixel event count

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Conclusion

• The function of p-well has been seen directly:– It shields the storage pixels from collecting charges

generated in p region– It guides the charges in p region into photo gate

• The ratio (real /“fake” events) is increased– Over same integration time, one storage pixel, the

ratio can reach ~60 ( ~ 7 for normal ISIS1) – We have 20 storage pixels, looking forward to

ISIS(2+)