SST-1 Data Acquisition & Control

H D Pujara

Institute for Plasma Research

pujara@ipr.res.in

Institute for Plasma ResearchInstitute for Plasma Research

Plan of the Talk

Brief Introduction of SST-1

Objective of data acquisition and Control

Timing System

PXI & CAMAC based Data Acquisition system

Major Constituents of Control systems

Software aspects

ADITYAADITYA SINP SINP TokamakTokamak Major Radius R0 0.75 m 0.30 m Minor Radius a 0.25 m 0.075 m Toroidal Field BT 1.50 T 2.00 T Plasma Current Ip 250 kA 75 kA Pulse Duration 250 ms 20-30 ms Plasma Cross-section Circular Circular Configuration Poloidal Limiters Poloidal Limiters Coils Type (TF & PF) Copper Water cooled Copper Current Drive & Heating Ohmic Transformer Ohmic transformer

(Air Core) (Iron Core) Vacuum vessel Vessel with Electrical break Conducting Shell Design & Fabrication Indigenous M/S Toshiba, Japan Installation 1989 1987

Indian Tokamaks

ISOMETRIC CUT- VIEW OF SST-1

SST1 MACHINE PARAMETERS

MAJOR RADIUS : 1.1MMINOR RADIUS : 0.2 MELONGATION : 1.7-2TRIANGULARITY : 0.4-0.7TOROIDAL FIELD : 3TPLASMA CURRENT : 220 kA. ASPECT RATIO : 5.2SAFETY FACTOR : 3AVERAGE DENSITY : 1X 1013cm-3

AVERAGE TEMP. : 1.5 keV

PLASMA SPECIES : HYDROGEN

PULSE LENGTH : 1000s

CONFIGURATION : DOUBLE NULL: : POLOIDAL DIVERTER

HEATING & CURRENT DRIVE: LOWER HYBRID : 1.0 MWNEUTRAL BEAM : 0.8 MWICRH : 1.0 MWTOTAL INPUT POWER : 1.0 MW

FUELLING : GAS PUFFING

CRYOSTAT

VACUUM VESSEL

LN2 PANELS AND SHEILDS

VACUUM SYSTEM

TF M AGNETS16 SUPER CONDUCTING

PFM AGNETS9 SUPERCONDUCTING

SUPERCONDUCTINGM GNETS

TR1 OR CENTRAL SOLENOID TR2 TR3

OHM IC TRANSFORM ER VERTCAL FIELD COILVF1, 1 PAIR OF COILS

OUT SIDE COILS

RADIAL AND VERTICALCONTROL COILS

PF6 M AGNET

INVESSEL COILS

COPPER M AGNETS

M AGNET SYSTEM

LIQUID NITROGEN SYSTEM

LIQUID HELIUM SYSTEM

CRYGENIC SYSTEM

M ACHINE SUPPORT STRUCTURE

CENTRAL SUPPORT STRUCTURE

TF SUPPORT STRUCTURE

SUPPORT STRCTURE

ICRH

ECRH

NBI

AUXILARY HEATING SYSTEM

DIAGONATICS

DATA AQUISISION AND CONTROL

POW ER SUPLY

SST-1

MAJOR RADIUS = 1.1m MINOR RADIUS = 0.2 m

ASPECT RATIO = 5.5 ELONGATION = 1.7-2

TRIANGULARITY = 0.4-0.7 TOROIDAL FIELD = 3T

PLASMA CURRENT = 220 kA

AVERAGE DENSITY = 1X 1013cm-3

AVERAGE TEMP. = 1.5 keV

PLASMA : HYDROGEN

PULSE LENGTH : 1000S

MACHINE PARAMETERSMACHINE PARAMETERS

Vacuum Subsystem

Vacuum Vassal made up of

16 Wedge shape sections

16 Interconnection ring

• Cryostat

• Pumping system

• Gas Feed System

• VESSEL SECTOR : 1

• INTERCONNECTING RING : 1

• TOP VERTICAL PORT : 1

• BOTTOM VERTICAL PORT : 1

• RADIAL PORT : 1

• RADIAL PORT FLANGE : 1

• RADIAL PORT BLANKING

FLANGE : 1

VACUUM VESSEL MODULEVACUUM VESSEL MODULE TOP PORT

RADIAL PORT

VESSEL SECTOR

VESSEL RING

BOTTOM PORT

BLANKING

FLANGE

PORT FLANGE

SST1 CRYOSTAT

Cryostat Parameters:

Vertical Height : 2.6 m

Outer Diameter : 4.4 m

Inner Diameter : 0.355 m

Wall Thickness : 10 mm

Total Surface Area : 59 m2

Total Volume : 39 m3

Total Weight : 4520 kg

Material : SS 304L

SST-1 MAGNET SYSTEM

Supercondcting Magnets:

• Toroidal Field (TF) Coils : 16 Nos.

• Poloidal Field (PF) Coils : 9 Nos.Copper Magnets (Water Cooled) :

• Ohmic Transformer (TR) Coils : 7 Nos.

• Poloidal Field (PF ) Coils ( in-Vessel): 2 Nos.

• Position Control Coils ( in-Vessel) : 2 Nos.

Requirements:

• Confinement, Shaping and Equilibrium Fields

• Ohmic Flux Storage

• Feed-Back Control

Coil type

#

coils

Coil

Radius (m)

Vertical Location

(m)

Winding Cross-section (mm2)

#

turns

PF1 1 0.45 0.0 71x320 80 PF2 2 0.45 0.43 71x163 40 PF3 2 0.50 0.93 136x380 192 PF4 2 1.72 1.03 85x136 40 PF5 2 2.01 0.65 85x136 40 PF6 2 1.35 0.35 100x100 16

SST-1 Poloidal Field CoilsSST-1 Poloidal Field Coils

Design Drivers:Design Drivers:

•Support single & double null equilibria with wide range of Triangularity ( 0.4-0.7), Elongations ( 1.7-1.9), li (0.75 -1.4), p ( 0.01-0.85) & slot divertor configuration

• Limiter operation during Plasma current ramp up

Parameters of PF Coils

Gas feed System

• Plasma of Hydrogen gas• Gas fueling during normal operation of

1000 sec.• Uniform gas distribution. • 28 pizo electric gate valve around the

machine.• Plasma Density control for constant density• Online feed control by adjusting gas flow.

Auxiliary Heating system• Lower hybrid current drive (LHCD) system. - Responsible for driving the plasma and maintain

current for 1000 sec.-One Megawatts of CW power at 3.7Ghz-Two High Power Klystron, each delivering 500KW

- Ohmically driven Ip (110KA to 220Kam) will be Taken over by LHCD

- Circular plasma will be shaped with PF coils- Will be lunched through redial port to a grill of 64

wave guides- Pressured transmission line to avoid the Breakdown

Ion Cyclotron Resonance Freq.• Tetrode based 1.5 MW ICRF system. • Frequency of operation 20 to 92 MHz• Temp of 1.0KeV• Lunched through radial port, four antennas 375Kw

each • Pressurized 90 meter long & 9 inch dia 50 ohm

transmission line• Online stub and frequency matching for optimum

power transfer.• Reflected power will be compensated with hike in

input RF power.

Electron Cyclotron Resonance Freq. Heating.

• Gyrotron Based 200KW CW @ 84GHz

• Focused Microwave beam of 18 mm radius.

SST1 ECRH SST1 ECRH SYSTEMSYSTEM

Main Parameters Main Parameters

• Gyratron Frequency : 82.6 GHz

• Output Power : 200 kW CW

• Output Mode : HE-11

• Operating TF Field :

• Fundamental : 3 T

• 2nd Harmonic : 1.5 T

• Exit dimensions of Waveguide : 63.5 mm

Objectives:Objectives:

• Pre-IonisationPre-Ionisation & Plasma start up& Plasma start up

• Electron Cyclotron Heating to assist Current drive during LHCDElectron Cyclotron Heating to assist Current drive during LHCD

Frequency : 3.7 GHz.Power ( 2 klystrons each of 500 kW CW): 1 MWAntenna type : Grill# of subwaveguides : 32 x 2rowsPeriodicity (with 2mm thick septa) : 9 mmSubwaveguide opening : 76 x7 mm2

Design NII (at 90o phasing) : 2.25

NII variation (from 40o to 60o phasing) : 1.0 - 4.0

Klystron input power : 10Watt

SST-1 LHCD SYSTEMSST-1 LHCD SYSTEM

Plasma Facing Components of SST-1

Design Drivers:

• Steady state heat and particle removal

• 1 MW power Input

• Surface temperature 1000 0C

• Baking up to 350 0C

• Electromagnetic forcesss during VDE, disruptions and halo currents

• Modularity

• Isostatically pressed, low ash content,Graphite

• Tiles mechanically attached to High strength copper alloy (CuZr & Cu CrZr) backplate;

• Cooling tubes (SS304) embedded in & brazed to the back plates.

PLASMA FACING COMPONENTS OF SST-1

SST-1 is a steady state device…

The system must capable enough to acquire all required physics information..

Due to continuous nature of operation … no physics information should be lost..

And no unnecessary data should be acquired.

If required … must offer lossless acquisition..

Provide support for real time visualization of data.

On line processing for Physics Information.

Remote operation, processing and viewing…

GUI based local and synchronous operations.

Tagged with events for post processing and viewing.

Distributed DAS for batter data managements

Objective and Requirements of DAS

Concept of event for data reduction, Scheduled and un scheduled events.

performance enhancement with growing tech

Most of the Tokamak operates in pulse mode

Discharge duration could be few seconds

Captures data during discharge. 

  Retrieves it later on for analysis

Display of data as a single trace.

Do not demand any need of viewing data during discharge since discharge is limited for few seconds

Generates manageable data during shot-10Mb or so

How SST-1 DAS Differs

However SST1 will be operated under steady State for 1000 Seconds

Generates large amount of data

Demands online viewing 1000 seconds20 minutes, can’t wait till end of the pulse

Online processing to infer physics parameter like Density, Plasma current

Demands large local buffers for storage

Demands transfer to host-as fast as possible for loss less acquisition

Storage for post processing

These all puts significant effect on acquisition instruments

Tagging of events and time

Large amount of data

Network load increases substantially

Storage requirements grows enormously

Processing needs also grows and demands faster CPUs

Large buffers or Multi buffer schemes

Deterministic nature of network and minimum latency

Here the root cause is LARGE AMOUNT OF DATA

Above requirements poses many Technical problems

How one can reduce the data? – EVENT DRIVEN SAMPLING

  Acquire data at lower sampling rate during low activity period

Change Sampling rate as and when important event occurs

Revert-back to normal sampling rate after /\ t

If everything is sequential and pre determined ---window based acquisition

Event driven sampling

         Depends on number of events, duration of events.         Sampling rate during event.         Base level Sampling rate.         Depends on diagnostic and its needs. 

How much reduction in data one can achieve in Event base triggering?

                      Selection of digitizer which can accepts such events triggering.         Time tagging of events while storing the data.         Event recording- Sampling rate, event etcs needs to be stored for post archival. 

What are the problems caused by event driven sampling Scheme?

  Each diagnostic has to identify the events, its duration and required Sampling rate.

         Each sub-system like NBI, LHCD, ICRH etc. Has to identify events.

         Generation of events- Electronics hardware.

Encoding of events- numbering of events.

   Distribution of events to various sub-systems and digitizers,

Its Time criticality .

This basically demands a very unique timing/triggering system.

Employ various diagnostics to study the various parameters like

Electron Density

Electron Temperature

Soft X-Ray radiation

Plasma Current

Loop Voltage

Charge-exchange

Spectroscopy

Bolo meters

Microwave Interferometer

Thomson scattering

Langmiur Probes

S.N DIAGNOSTICS No. of channels

Sampling Freq

Type of Acquisition

Remarks

1 Mirnov coils 44 1Mhz Event based 100ms Multiple window# Current Ramp up# LHCD / NBI ON# Gas puff/ Pellet# Current ramp downor Disruption

2 Two component Magnetic probes

48 10KHz Continuous Control + Daq

3 Halo Rogowskicoils

50 1Mhz Event Based 100ms multiple windows# Z-position(thres)# Disruption

4 Saddle loops 16 1 kHz Continuous control + DAQ

5 Rogowski coils 4 10KHz Continuous control + DAQ

6 Fiber optics Current sensor

2 10KHz Continuous control + DAQ

7 Voltage Loops 24 10KHz Continuous control + DAQ

8 Diamagnetic Loops 4 10KHz Continuous Monitor + DAQ

9 Hall sensors 24 10KHz Continuous Control + DAQ

10 Bolometer System 1020

100Hz20KHz

ContinuousContinuous

 

Diagnostics and EventsDiagnostics and Events

100ms Multiple window# Current Ramp up

# LHCD / NBI ON

# Gas puff

# Current ramp down

# Disruption

11 SXR Imaging System 10125

100Hz1Mhz

ContinuousEvent Based

Monitor + DAQ100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# Disruption12 HXR

Tomography10100

100Hz1MHz

ContinuousEvent Based

 100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# Disruption13 Sodium Iodide (NI) 2

5 

100Hz1MHz 

ContinuousEvent Based

 100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# Disruption14 VUV Broadband 2

510KHz1MHz

ContinuousEvent Based

 100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# Disruption15 FIR interferometer 24 10KHz Continuous Digital Counts

16 Spectroscopy 128

10KHz1MHz

ContinuousEvent Based

 100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# MARFE / DP# Disruption17 ECE Radiometer 16

81KHz1Mhz

ContinuousEvent Based

 100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# MARFE / DP# Disruption18 Langmuir Probes 32

6410KHz1MHz

ContinuousEvent Based

 100ms multiple windows# NBI ON (L-H trans & H mode)# Gas puff/pellet# MARFE / DP# Disruption19 Michelson @

Interferometry       

20 Charge Exchange 8      

S.N DIAGNOSTICS No. of channels

Type of Acquisition

Sampling Freq KHZ

Bytes/Sample

Duration Sec

Mbytes No of Events

44 1 0.5 22 5

2 Two component Magnetic probes

48 Continuous

10 2 1000 960

Halo Rogowski 50 1 0.5 25 5coils

4 Saddle loops 16 Conti 1 2 1000 325 Rogowski coils 4 Conti 10 2 1000 806 Fiber optics

Current sensor2 Conti

nuous10 2 1000 40

7 Voltage Loops 24 Conti 10 2 1000 4808 Diamagnetic

Loops4 Conti

nuous10 2 1000 80

9 Hall sensors 24 Conti 10 2 1000 48010 Conti 0.1 2 1000 2

20 Conti 20 2 100010 Conti 0.1 2 1000 2

125 Event Based

1000 1 0.5 63 5

HXR 10 Continuous

0.1 2 1000 2

Tomography 100 Event Based

1000 1 0.5 50 5

2 Continuous

0.1 2 1000 0.4

5 Event Based

1000 1 0.5 2.5 5

2 Continuous

10 2 1000 40

Event based

3 1000Event Based

1 Mirnov coils 1000

10 Bolometer System

11 SXR Imaging System

12

13 Sodium Iodide (NI)

14 VUV Broadband

Diagnostics and Data Volume

Total of 250 Data channels demanding Continuous Acquisition for all 1000 sec. @ 10Khz sampling

Generate 3.5 Gbytes of data.

Total of 450 Channels at fast sampling rate @1Mhz, event based…

Number of schedule and unscheduled events about 5

Generate 3.5 Mbytes/sec

Total Data 225 Mbyte on board

timing/triggering system

Timing System

SST-1 is consists of various subsystems

Subsystems are Physically wide apart.

Time synchronization between the subsystem is required for proper and reliable operation of Experiment.

Exchange of events between sub systems is essential for smooth operation. Deterministic distribution within 5 micro sec

Common clock reference for tight simultaneity between subsystem and central control.

Event based sampling to limit data volume and not to lose the physics information.

Constituents of Timing system

Master Control Unite (Event Sequencer & distributor)VME based CPUFiber Optic communication Link @100Mbits/secTree Structure

Event Encoder Module8 Event Inputs16 bit codeFiber optic link with master unit

Timer ModuleEvent DecoderProgrammable Delay & Trigger generators.Reference ClockFiber optic link with master unit

Available BUS Options

ISA 8bit, 16 bit, Max 8MB/s Limitation of slots

PCI 32Bit, 132Mbyte/sec

PXI Extension of PCI, Sync. Clock, Trigger lines, Local Bus EMI/EMC, Cooling, Pug & Play, VISA

VME 32/64Bit, 40/80MB

CPCI 32Bit 64Bit 132/256MB/s

IEEE1934 Serial Bus, 200/400Mbits

VXI 32Bit, 40MB/s 10MHz sync clock, Trigger lines, Local Bus, Module ID, Resource manager, EMI/EMC

CAMAC

ISA 8bit, 16 bit, Max 8MB/s Limitation of slotsPCI 32Bit, 132Mbyte CPCI 32Bit 64Bit

132/256MB/sPXI Extension of PCI, sync. Clock, Trigger lines, Local Bus EMI/EMC, cooling , P & P VISA

VME 32/64Bit, 40/80MB

IEEE1934 Serial Bus, 200M/400Mbits

CAMAC

Available BUS Options For Instrumentations

VXI 32Bit, 40MB/s 10MHz sync clock, Trigger lines, Local Bus,Model ID, P & P, Resource manager EMI/EMC , VISA

What is the solution Considering the data rate generation as per the requirements

For Fast Diagnostics demanding higher sampling rateData must be stored on Onboard MemoryMulti Buffer or Segmented memory for different events

For Slow Diagnostics Demanding Continuous Loss less acquisition.Volume of data generation is less per secFIFO/Dual Ported RAM bufferFast back planeData streaming to disk

PXI for Slow Diagnostics: The PXI based system has been chosen. The major reason of choosing PXI is that it is based on the industry standard PCI bus. For making it perfect for instrumentations, the additional trigger lines, local bus and aclock signal has been incorporate. In addition the chassis complieswith EMC/EMI standard. All the PXI module comes bundled with Plug and Play driver for windows platform. The bus offersa transfer rate of 132Mbytes @33MHz & Fiber optic link to host.

Fast Diagnostics: CAMAC based stand alone system has been chosen. For this a ISA bus based 16 Bit Crate Controller and a special digitizer supporting multiple segments of memory for Events has be developed in house.

Opted for

   CAMAC based- Computer Automated Measurement And Control.

Fast Diagnostics

     VME For control applications

PXI for Slow Diagnostics

Data Streaming to the disk

Opted for

PCI bus

• PCI bus developed by Intel.

• Introduced in 1993.

486 motherboards use PCI as well.

• Clearly is the Bus of the ‘future’

PCI Highlights

• 32-bit bus that normally runs at a maximum of 33 MHz• Greater system performance ,with a maximum data

transfer rate of 132MB/s• Offers excellent expandability for high-performance

peripheral devices• investment spanning multiple CPU generations • Processor independent

Computer Bus Architecture

CPU

local bus (32-bit)

PCI Bridge32-bit

RAM

PCI bus 32-bit

Hard drive Video ISA bridge PCI Slot

16-bitISA Slot

PCI bus

33 MHz, 32-bit, address

lines and data lines are shared– Memory (where cards live)– IO (chip connection)– Configuration

• Bios on bootup

• Each slot on the PCI bus

has the configuration registers

shown at the right.

0x000x040x080x0C0x100x140x180x1C0x200x240x280x2C0x300x340x380x3C

31 16 15 0Device ID Vendor ID

Status Command

Class Code Rev

BIST Header Latency Cache

Base Address Registers

Cardbus CIS Pointer

Subsystem ID SubVendor ID

Reserved

Reserved

Expansion ROM Base Address

MaxLat MinGnt Int Pin Int Line

• Wide Industry Support Wide Industry Support

• Plug and Play capability Plug and Play capability

• Thousands of software productsThousands of software products

• 32-bit data transfers at 33 MHz 32-bit data transfers at 33 MHz (132 Mbytes/sec)(132 Mbytes/sec)

• PCI is a PCI is a de factode facto standard standard• Automatic Resource Allocation

BIOS will normally "lock" the "PCI IRQ and DMA Settings"

• PCI IRQ and DMA Settings can also be set manually

The PCI bus The PCI bus

1 2 3 4 1 2 3 4 But limited slots….

Peripheral Sizes in PCI and CompactPCI

PCIPCI PXI/CompactPCIPXI/CompactPCI

HalfHalfSizeSize

3U3U

FullFullSizeSize

6U6U

PCI boards can be redesigned to PCI boards can be redesigned to fit in PXI/CompactPCI with littlefit in PXI/CompactPCI with littleor no electrical changes.or no electrical changes.

•Eurocard Packaging Proven over decades of use in industrial applications (VME, VXI, etc.)Defined by IEEE 1101 Standard

PC Motherboard = Controller + Backplane

1 2 3 4 5 6 7 81 2 3 4 5 6 7 8

1 2 3 4 1 2 3 4

PC MotherboardPC Motherboardwith 4 PCI slotswith 4 PCI slots

CompactPCICompactPCIEmbeddedEmbeddedControllerController

CompactPCICompactPCI8-slot8-slot

BackplaneBackplane

Trigger Bus

Sys

tem

Co

ntr

oll

er

Sta

r T

rig

ger

Co

ntr

oll

er

Per

iph

eral

Per

iph

eral

Per

iph

eral

10 MHzCLK

132 Mb/s, 33 MHz, 32-bit Computer Bus

Star Trigger

Local Bus

Electrical ExtensionsElectrical Extensions::

• Integrated 8 Trigger Lines, 10 MHz reference clock, Star Trigger Bus

• Local Bus between adjacent slots 13 lines

Mechanical Extensions

Mandatory Active Cooling

• System-level environmental specificationsfor EMC, shock, vibration, and humidity

• Defined embedded controller location

PXI/CompactPCI Form Factors

64-bit PCI andPXI Features3U

PXI/CPCI J1

J2

32-bit PCI

6UPXI/CPCI

J5

J4

J3

J2

J1

64-bit PCI andPXI Features

32-bit PCI

PXI Reserved

PXI Reserved

PXI Reserved

6U Adapter Panel6U Adapter Panel

Software ExtensionsSoftware Extensions

PXI speeds application development because:PXI speeds application development because:

• PXI Controllers MUST support a standard PXI Controllers MUST support a standard software framework by including a pre-loaded software framework by including a pre-loaded OS: OS: – Windows NTWindows NT– Windows 9xWindows 9x

• Peripherals modules MUST be supplied with a Peripherals modules MUST be supplied with a WIN32 Device DriverWIN32 Device Driver

PXI and PC Software is IdenticalPXI and PC Software is Identical

• Operating systems and application software run unchanged on PXI systems

• Configuration tools recognize PXI modules as PCI devices

• Operating systems and application software run unchanged on PXI systems

• Configuration tools recognize PXI modules as PCI devices

PXI Also Works with Other Standards

VXI or VME Chassis

MXI

GPIB INSTRUMENT

GPIB

PXI Chassis

CompactPCI

• Embedded controllers– Most compact solution– Modular– Pentium and Pentium III Class

Controller Option

•Remote MXI-3 controllers

–Short or long 200 meter distance

–cupper or fiber connectivity 1.2Gbits/s

can sustain data transfers at over 80 Mbytes/s

–Fully transparent

–Low cost

MXI-3 Benefits

• More slots for PCs and PXI/CompactPCI• Very high performance serial fiber link 1.2GB/s• Easy to integrate — software transparent • 200 meter L O N G distances• Low cost

Control Panel

Flow

Pressure Alarm Conditions

STOP

Temperature

Front_end Electronics with built in Intelligence for Plasma Diagnostics.

Signal Originating from diagnostics has large dynamic ranges

Remote setting of front end electronics is required

Dynamic control of various settings of Front_end Electronics Gain, BWShielded twisted pair Cables

Opto Isolations

CANBuse base system, multi drop, serial bus @1MBits/s, msg exchange with priority, priority and address is part of msg,received by all, act if req.

During operation no entry to hall

PXI Based Lossless Continuous Data Acquit ion

Platform Windows2000

Development Tool

LabWindows/CVI

Data Socket based Client/Server Architecture

Direct Data Streaming to Hard Disk

1.2GB/s Fiber Optic Link

ulCount1 = SampRate1*Num_of_Channel*2;

piBuffer1 = (short *)malloc(ulCount1*2) ;

piHalfBuffer1 = (short *)malloc(ulCount1);

dSampRate = 1200000;

iHalfBufsToRead = iteration ;

GetCtrlVal (panelHandle, PANEL_LST1, &SampRate1);

DS_ControlLocalServer (DSConst_ServerLaunch);

Init_DA_Brds (1, &brd1); Init board AI_Configure (1, -1, 2, 10, 0, 1)

DS_Open ("dstp://202.41.112.140/dataport1", DSConst_Write,

DSCallback, NULL, &dsHandle);

DAQ_DB_Config(iDevice1, iDBmodeON)

SCAN_Start(iDevice1, piBuffer1, ulCount1, iSampTB1, uSampInt1, iScanTB1, uScanInt1);

Server Architecture

Wihle (loops <100)

DS_SetAttrValue (dsHandle, "Samp_Rate1", CAVT_FLOAT, &SampRate1, 0, 0);

DAQ_DB_HalfReady(iDevice1, &iHalfReady1,&iDAQstopped);

if ((iHalfReady1 == 1)

DAQ_DB_Transfer(iDevice1, piHalfBuffer1fwrite (piHalfBuffer1, 2,ulPtsTfr, ffp1);PlotY (panelHandle, PANEL_GRAPH

DS_SetDataValue (dsHandle, CAVT_SHORT|CAVT_ARRAYDS_Update(dsHandle);

STOP

DS_Open (URL, DSConst_ReadAutoUpdate, DSCallback, NULL, &dsHandle);

DS_EVENT_STATUSUPDATED:

DS_EVENT_DATAUPDATED

hr = DS_GetAttrType (dsHandle, "Samp_Rate1", &type))

If (data type matches)

DS_GetAttrValue (dsHandle, "Samp_Rate1", type, &SampRate1)

Client

DS_GetDataType

If (data type matches

DS_GetDataValue (dsHandle, type, dataArray

Integrate(input_integrater

PlotY (mainPanel, MAINPNL_GRAPH)

Observed Performance of PXI onWindows2000

Data Acquisition Module with 16 Channels, 12 Bit ADC, supporting aximum1.2Msamaples/sec. 2 channel DAC, 2 Channel of counter/timers and 8 Lines of gital I/O. Such three modules. ( 48 Ch of Analog In, 6 ch of Analog out, 24 I/O nd 6 counter timers)

Continuous Data Acquisition.... Acquisition Server (48 channel @ 10 kHz, writing to file for 1000 sec. and pushing the all 48 channel on network using Data Sockets )

Synchronized Continuous Acq. with start trigger (One common start trigger  to    one module and the same is applied to  rest by the back plain) 

Single Shot application..

On fly sampling rate changing in case of Scheduled Event triggering.

MultiTrigger: In case of event based sampling 100 events with time gap of 70msec can be acquired with ploting of the data and with out plot the subsequent time gap can be 15msec. (This was tried with pre/post trigger facility

Following performance was very recently

HP Vectra P-III @1.2 GHz supports 96 channels acquisition @10KHz with pushing all data no network and storing it on hard disk with few channels plotting on local machine.

Embedded PC of NI P-II @1.2GHz working supports up 96 channel @20KHz.

This is double the channel handling capacity compare with PCL machine working at P-III @500MHz

CAMAC based Data Acquisition for fast diagmnostics

Platform Windows2000

Development ToolLabWindows/CVI

Data Socket based Client/Server Architecture

On board memory, Multiple segments

Standalone CAMAC system

16 bit parallel crate controller

Data transfers under PIO and DMA mode

Device Driver with DAM for Windows2000 platform

Differential line drivers to support the longer distance

ISA bus

Crate Controller

CAMAC Digitizer for Fast Diagnostics

Selectable segment size

Facility for Onfly Reading

Design our own CAMAC Module

Supports Continuous, Transient and Monitoring Mode

Independent 8 bit ADC per channel, +/- 5 V

Four channel per module

512KB memory per channel

Single width CAMAC module

Digitizing rate up to 1MHz

Selectable pre/post trigger samples

FIFO

ON FLYREAD BUFFER

ADC

CLOCKGENERATOR

CLOCKSELECTION

CLOCKDIVISION

LATCH

LATCH

DAC

CONTINUOUSREAD BUFFER

TRANSIENTREAD BUFFER

RAM

ADDRESSCOUNTER

BUF1

BUF2

INSTRUMENTATIONAMPLIFIER

CAMACWRITELINES

INPUT SIGNAL

HF FF R CLOCK

OR

OR

CLOCKDIVISION

NOT

SAMPLINGCLOCK

COMPARATOR

STARTTRIGGER

INPUTSIGNAL

CAMACREADLINES

CLOCK

CLK ENW*

EF

HFFF

R

A0-A14R/WENB2

ENB1

CONTROL LOGIC

CAMAC DIGITIZER

Function

Decoder

START

RESET

SELECT SAMPLINGRATE

START DIGITIZING

START TRIGGER

STORE DATA IN FIFO & RAM

IS

STOPTRIGGER

ON FULL FLAG (FIFO)READ DATA FROM FIFO

READ DATA FROM RAM

STOP

START DIGITIZING

READ DATA FROM ADC ON-FLY

STOP

START DIGITIZING

START TRIGGER

READ DATA FROM FIFO ON LAM

STOP

FUNCTIONAL SEQUENCE OF CAMACBASED DUAL RATE DIGITIZER

IS

STOPTRIGGER

MODECONTINUOUS MODE TRANSIENT MODE

MONITORINGMODE

NO

YES

YES

NO

CLOCK GENERATOR

INSTRUMENTATION AMPLIFIER

CLOCK DIVISION

CLOCKSELECTION

RAM

ADDRESS COUNTER

READ BUFFER

FIFOADC

FOUR IDENTICAL CHANNELS

ANALOG

INPUT CAMAC

READ

LINES

CLOCK

WR

SAMPLING CLOCK

HIGH SPEED CAMAC DIGITIZER

OR

OR

OR

OR

HF

TRIGGER

CONTROL LOGIC

START

SAMPLING

CLOCK

HF R

CLK

ACQUISITION

WINDOW

CLOCK

OR

R/W

R

Objective and Requirements of Control

Since SST-1 is consist of many subsystem the major objective is to ensure reliable and smooth operation.

Provide Integrated interactive Remote control environment

Proper sequencing of subsystem for synchronized operation

Safety interlocks and fail safe measure under normal and abnormal conditions

Fast real time control of Plasma shape and position.

Interactive strategic control during the pulse.

Configuring and downloading operation parameters to various subsystem

Implementation approach

Hierarchical distributed control system.

Supervisory central control at the top Supervising subsystems andexchanging status , parameters and commands

Individual subsystems are directly controlled and monitored by itsown dedicated intelligent control system

For quicker and faster actions Interlocks and safety measures will be exercised by individual subsystem

For batter and Efficient managements of the system entire control activity has been divided in following groups

Machine Control system

Discharge Control System Diagnostic Control System

Machine Control

All the subsystem doing routine tasks like monitoring temp, water flow, vac pressure etc. are covered under machine control.

Status and heath of all the

subsystem will be monitored

under the Machine control

Down load of limit values and summary of status from subsystem

Power Supply System

Status of switch Yard

TF currents on/off,

limit values,

TF current profiles

Vacuum System

Control of vacuum pumping system,

sequencing gate valves,

Partial pressure measurements

Status of various components

Water Cooling System

Number of cooling system

for passive plate divertor

Copper coils

OT cooling system

temp

alarm and limit sets

water flow

water pressure etc

Discharge cleaning system

On/off,

Discharge currents

Cryogenics

status

Coil Protection and Monitoring system

Status

Limit values

Auxiliary Heating system

Status of LHCD, ICRH, NBI

Due to long discharge time.. One has a option of changing the strategy online depending upon the situations

Scheduled discharge phases can be dynamically changed…

Includes Plasma Current, Shape, Position and Density Control

Dynamic Discharge control System

Position and Shape Control

Target system PowerPC

Real Time OS….

VxWorks

Reflective Memory

for real time data sharingPlasma Position and Shape Control

Common algorithm to estimate the

Plasma Position and Shape

Based on Function Parameterization code

Relatively on slow time scale

Constraint due to Super conductor PF Coils

Rapid change of I is not permitted through PF due Quench

And L/R ratio Signal from 48 Mag probes, Plasma Currents ,

Flux loops and coil currents to determine the shape & Position.

Error in shape will be translated into correction PF current

Position Control will be fast

Time scale of the order of 100 micro sec.

Changing current in copper

conductor active

feed back coil

ADC - 96 ch

FIFO

VM E Bus RAM

LHCD Control

DSP Processor

Power Supply Control

Reflective Memory

Reflective Memory

Reflective Memory

FPDP (160 MB/s)

PCI (132 MB/s)

Real Time Network (13.6 Mbytes/s)

Real- Time position feedback (Loop back time = 100 us)

Diagnostics

Density and Plasma Current Control

Microwave

InterferometerPlasmaFringe

Counter

Gas Feed

Controller

Ref. Density

Piezo gate Valve

Plasma Current will be controlled

By controlling the LHCD power

Rogowski coils / Hall sensors

1 ms correction time scale

Electron density

10ms time scale

Control Overview

Software & H/W

Platforms….

Windows

Linux

Real-time Linux

VxWorks

Software Development Tools

Lab Windows/CVI

LabView

TCL/TK

MSSQL

ORACLE

EPICSHardware

CAMAC

PXI

VME

Reflective Memory

Processor

Pentium

PowerPC

Thanks…….