Signal Processing For Power Amplifiers - WOCC Michael Luddy.pdf · 4 The Need For Linearization PA...
Transcript of Signal Processing For Power Amplifiers - WOCC Michael Luddy.pdf · 4 The Need For Linearization PA...
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Signal Processing For Power Amplifiers
Michael Luddy4/23/2005
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Outline
Motivation and RequirementsCost impact
Architecture and AlgorithmsCFRDPD & MECMEQ
SimulationEnvironmentResults
Emerging Solutions and Future DirectionsDesign DirectionsConclusions
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Motivation
Motivation and RequirementsCost impact
Architecture and AlgorithmsCFRDPD & MECMEQ
SimulationEnvironmentResults
Emerging Solutions and Future DirectionsDesign DirectionsConclusions
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The Need For LinearizationPA performance effects Carrier ExpensesDigital Linearization techniques enable:
CapEx Reduction due to lower cost BTS (10-15%)Remove gain stages, circuit hand tuning
OpEx reduction due to higher efficiency PACurrent designs lose ~85% of PA power as heat Annual electrical costs avg ~$2500 per BTS
Performance targetsDouble efficiency of PA (from 12% to 25%) Increase ACLR by > 30 dB
Better than -45 dBc ACLRImprove OBO by more than 4 dBLess than 17.5% EVM
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Architecture and Algorithms
Motivation and RequirementsCost impactHigher density systems
Architecture and AlgorithmsCrest Factor Reduction CFRDigital Pre-Distortion & Memory Effects Comp DPD & MECModulator Equalization MEQ
SimulationEnvironmentResults
Emerging Solutions and Future DirectionsDesign DirectionsConclusions
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Signal Processing Features
Crest factor reduction (CFR)Provides more than 6dB improvement in PAR by reducing peak excursionsGoodness by measuring EVM, PCDE and ACLR
Digital pre-distortion (DPD) Correction of gain non-linearityMemory effects (temperature) correction
Modulator Equalization (MEQ)corrects impairments in analog modulator
Phase and gain imbalance, DC offsets
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Architecture Overview
BPF
Digital Signal Processing
Multicarrier combiner
Crest Factor Reduction
Digital Pre-Distortion
Memory effects compensation
Modulation Equalization
Adaptation Engine
Error Measurement
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Sign
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ath
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CFR Principles
Comparing WithClipping Threshold
Clipping Filtering
Crest Factor Reduction
Signal from MCC Signal to INF
≤
>
When magnitude exceeds threshold, CFR is performed.The basis of most CFR algorithms is clipping + filtering
][)max((log10 2
2
10 xExCF =
][][
2
2
rEeEEVM RMS =⎟⎟
⎠
⎞⎜⎜⎝
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10 rEeEPCDE k
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Overview of CFR Algorithms
Low complexity.LowLowLowCarrier Phase
Alignment
Peak regrowth is the main problem.LowLowLowError Shaping
The phase distortion should be dynamically distributed among different carriers.
LowLowHighDynamic Phase
Distortion
Similar to clipping and filtering.MediumMediumLowPeak Cancellation
Window length a compromise between ACLR and EVM.
MediumMediumMediumPeak Windowing
Simplest technique.MediumLowHighClipping
COMMENTSPCDEEVMACLRAlgorithm
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Memory EffectsSlow memory effects
Supply voltage variationAgingAmbient temperatureChannel switching
Fast memory EffectsFast memory effects refer to those which occur so fast that we can not correct them with an adaptation (e.g. LMS) of a predistortion table
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Digital Predistortion
Vin Vpred
Vin
Vout
Vin Vpred Vout
PAPredistorter
PAVDD
Maximum
improvement
level
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Digital Predistortion
Look Up Table for slow memory effectsPolynomial for fast memory effectsTraining at startup followed by adaptationDPD LUT uses simple well known techniques
LMS: Well understood, converges for monotonic non-linearity'sRLS: For faster convergence
Adaptation rate (~us) = impairmentsAdaptation engine operates on decimated signal
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Fast Memory Effects
Fast memory effects create a floor where DPD becomes ineffective, hence we predict thermally induced distortion
Prediction provides correction faster then LUT Prediction error measured in real time and improved in non-real time
Initial correction based on initial calibrationModeled with a polynomial to predict gain compressionDie temperature determined by signal envelope
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Modulator Equalization
Simplifies analog/IF designCorrects for modulator and DAC imperfections
Gain and phase imbalance DC offset
Gradient descent for 6 parametersInitial calibration the adaptation during system operation
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Measurement Interface
Measures AM/AM and AM/PM distortionOperates at Fcomposite
Uses generalized sampling theorem [Zhou]Low cost ADC
Hardware decimation and averaging of correction signal
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Simulation
MotivationCost impactHigher density systems
Architecture and AlgorithmsCFRDPD & MECMEQ
SimulationEnvironmentResults
Emerging Solutions and Future DirectionsDesign DirectionsConclusions
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Simulation Environment
4 carrier WCDMAAgilent ADS simulation platform
Digital simulation in PtolemyCo-simulated sequential algorithms with MatLab RF amplifier modeled with eesof (AET)
Adaptive peak windowing (Matlab)Bit accurate models using ~14 – 16 bitsSimple adaptation algorithm (MSE)
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CFR Results
Signal Range (dB)
CCDF
Spectrum
Frequency (GHz)
Original WCDMA signal
After clipping
After clipping + filtering
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DPD Results
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Emerging Solutions and Future Directions
MotivationCost impactHigher density systems
Architecture and AlgorithmsCFRDPD & MECMEQ
SimulationEnvironmentResults
Emerging Solutions and Future DirectionsDesign DirectionsConclusions
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Design Directions
High levels of digital integration (following Moore’s law) are possible thus allowing improvements in system performance with complex, but low cost and low power digital circuitry.Synergistic engineering at the module level enables these promise of higher linearity and efficiencies.
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Conclusion
Total system design requires skills from packaging, RF design, Materials scientist and DSP designersHigh linearity and efficiency is achievableNew applications can benefit from DPD technology“Old” architecture can have new lives
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Thank You!