In-situ and Ex-situ Ohmic Contacts To Heavily Doped p-InGaAs TLM Fabrication by photolithography and...
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In-situ and Ex-situ Ohmic Contacts To Heavily Doped p-InGaAs • TLM Fabrication by photolithography and liftoff • Ir dry etched in SF 6 /Ar with Ni as etch mask; InGaAs isolation by wet etch • Separate probe pads from contacts to minimize parasitic metal resistance • Gap Spacing: 0.5 – 25 µm (verified by SEM) • Resistance measured by 4155C parameter analyzer References: 1. M. J. W. Rodwell, M. L. Le, B. Brar, IEEE Proceedings, 96, Issue 2, Feb. 2008 pp 271 – 286 2. M. J. W Rodwell et al., Proceedings, IEEE Compound Semiconductor Integrated Circuit Symposium, 2008 3. Bell et. al., Surface Science 401 (1998) 125–137 4. Tan et. al. Phys. Rev. B 67 (2003) 035208 5. Griffith et al, Indium Phosphide and Related Materials, 2005. 6. Jain et al, IEEE Device Research Conference, 2010 TLM resistance as a function of pad spacing • Surface exposed to air • Oxidized with UV-ozone for 30 min • Dilute HCl (1:10) etch and DI rinse for 1 min each • Hydrogen cleaning at 70 o C for 30 min in MBE system • Surface morphology verified by RHEED • Ir deposition in the e-beam chamber connected to MBE chamber •Error due to extrapolation -Error in 4-point probe resistance measurements -Resolution error in SEM •Error due to processing - Variable gap along width (W) - Overlap resistance 0 0.5 1 1.5 2 2.5 3 3.5 0 1 2 3 4 5 6 R esistance ( ) Pad Spacing,d ( m) R d R c Process Surface Preparation ρ c (Ω- µm 2 ) ρ h (Ω- µm) In-situ As grown 1.0±0.6 11.5±3.3 Ex-situ (air exposure) HCl etch + H clean (MBE) 1.5 ± 0.9 17.4 ± 4.2 • Low contact resistivity with in-situ Ir contacts: ρ c ~ (1.0 ± 0.6) Ω-µm 2 • ρ c with ex-situ Ir contacts ((1.5 ± 0.9) Ω-µm 2 ) is comparable to that obtained with in- situ contacts. • Slight degradation in ρ c on annealing but contacts still suitable for THz transistors 20 nm Ti 500 nm Au 100 nm In 0.52 Al 0.48 As: NID buffer 100 nm In 0.53 Ga 0.47 As: C (p- type) 20 nm Ir 50 nm Ni Semi-insulating InP Substrate Cross-section schematic of the metal- semiconductor contact layer structure used for TLM measurements Schematic of the TLM pattern used for the contact resistivity measurement Ashish Baraskar 1 , Vibhor Jain 1 , Mark A. Wistey 3 , Evan Lobisser 1 , Brian J. Thibeault 1 , Arthur C. Gossard 1,2 , Mark J. W. Rodwell 1 1 ECE and 2 Materials Departments, University of California, Santa Barbara, CA 3 Electrical Engineering, University of Notre Dame, IN INTRODUCTION Ex-situ Contacts Characterization and Measurements Conclusions Error Analysis Why Ir? • Refractory metal (melting point ~ 2460 o C) • Work function ~ 5.7 eV; closer to E v for InGaAs • Easy to deposit by e-beam technique Acknowledgements: ONR, DARPA-TFAST, DARPA-FLARE Illustration of systematic error, either by R or by d, on the plot of resistance R versus pad spacing d Atomic H Cleaning: • Oxides and hydrocarbons form the majority of surface impurities • Atomic H reacts with oxides to form volatile products [3] As 2 O x + 2xH xH 2 O + As 2 In 2 O 3 /Ga 2 O 3 + 4H 2H 2 O + In 2 O/Ga 2 O In 2 O 3 /Ga 2 O 3 + 4H H 2 O + 2InOH/2GaOH • Similarly carbon containing complexes (InGaAs-C) are broken into volatile products Requirements for achieving low resistance, stable ohmic contacts • Higher number of active carriers • Better surface preparation techniques • Use of refractory metal for thermal stability • THz electronics limited by metal- semiconductor contacts • Need contact resistivity (ρ c )< 2x10 −8 Ω- cm 2 for f t and f max >1 THz [1] • Usually involve high temperature processing; high current densities (~100 mA/µm 2 ) • Unpredictable native oxides Fundamental Scaling Laws RC f in 2 1 eff cb bb C R f f 8 max GOAL: High Frequency Electronics Approach Less than 2 Ω-µm 2 contact resistivity required for simultaneous THz f t and f max [2] InP Bipolar Transistor Scaling Roadmap To double device bandwidth: • Cut transit time 2x • Cut RC delay 2x Scale contact resistivities by 4:1* bc W c T b T e W Emitte r 256 128 64 32 nm, width 8 4 2 1 Ω·µm 2 , access ρ Base 175 120 60 30 nm, contact width 10 5 2.5 1.25 Ω·µm 2 , contact ρ f t 520 730 1000 1400 GHz f max 850 1300 2000 2800 GHz • Scaled device thin base (For 80 nm device: t base < 25 nm) • Non-refractory contacts may diffuse at higher temperatures through base and short the collector • Pd/Ti/Pd/Au contacts diffuse about 15 nm in InGaAs on annealing 100 nm InGaAs grown in MBE 15 nm Pd/Ti diffusion Semiconductor epilayer growth by Solid Source Molecular Beam Epitaxy (SS-MBE)– p-InGaAs/InAlAs • Semi insulating InP (100) substrate • Unintentionally doped InAlAs buffer • Hole concentration determined by Hall measurements Epilayer Growth In-situ iridium (Ir) deposition immediately after film growth -E-beam chamber connected to MBE chamber -No air exposure after film growth In-situ contacts • Hole concentration saturates at high CBr 4 fluxes • Number of di-carbon defects increases as CBr 4 flux increases [4] Hole concentration Vs CBr 4 flux 10 19 10 20 40 50 60 70 80 0 10 20 30 40 50 60 hole concentration mobility Mobility (cm 2 -Vs) CBr 4 foreline pressure (mtorr) Hole Concentration (cm -3 ) 2 4 6 8 10 10 20 30 40 50 60 G roup V /G roup III H ole C oncentration (10 19 )cm -3 • As V/III ratio decreases hole concentration increases • hypothesis: As- deficient surface drives C onto group-V sites Hole concentration Vs V/III flux 4 10 19 8 10 19 1.2 10 20 1.6 10 20 2 10 20 300 350 400 450 Hole Concentration (cm -3 ) Substrate Tem p.( o C) Hole concentration Vs substrate temperature 10 19 10 20 0 20 40 60 80 100 Tsub = 460 o C Tsub = 350 o C CBr 4 foreline pressure (m torr) H ole C oncentration (cm -3 ) Tendency to form di-carbon defects increases as T sub increases [4] 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 3.5 ex-situ unannealed ex-situ annealed in-situ unannealed in-situ annealed Pad Spacing ( m) R esistance ( ) • Hole concentration, p = 1.5 x 10 20 cm -3 • Mobility, µ = 36 cm 2 /Vs • Sheet resistance, R sh = 105 ohm/ (100 nm thick film) Thermal Stability: • Contacts annealed under N 2 flow at 250 o C for 60 min. Process ρ c (Ω-µm 2 ) Un-annealed annealed In-situ 1.0±0.6 1.2±0.7 Ex-situ (air exposure) 1.5 ± 0.9 1.8 ± 0.9 Variable gap along width (W) 1.10 µm 1.04 µm Overlap Resistance EXPERIMENTAL DETAILS RESULTS TEM image of the Ir/p- InGaAs contact after annealing 200 nm InGaAs + InAlAs Ir / Ti Au ρ c lower than the best reported contacts to p-InGaAs (ρ c = 4 Ω-µm 2 ) [5,6] SEM images of the TLM sample illustrating the errors due to processing As flux: 1.5×10 - 6 torr p = 1.5×10 20 cm -3 TLM width: 25 µm Need a refractory metal for thermal stability
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Transcript of In-situ and Ex-situ Ohmic Contacts To Heavily Doped p-InGaAs TLM Fabrication by photolithography and...
In-situ and Ex-situ Ohmic Contacts To Heavily Doped p-InGaAs
• TLM Fabrication by photolithography and liftoff
• Ir dry etched in SF6/Ar with Ni as etch mask; InGaAs
isolation by wet etch
• Separate probe pads from contacts to minimize parasitic
metal resistance
• Gap Spacing: 0.5 – 25 µm (verified by SEM)
• Resistance measured by 4155C parameter analyzer
References:
1. M. J. W. Rodwell, M. L. Le, B. Brar, IEEE Proceedings, 96, Issue 2, Feb. 2008 pp 271 – 286
2. M. J. W Rodwell et al., Proceedings, IEEE Compound Semiconductor Integrated Circuit Symposium, 2008
3. Bell et. al., Surface Science 401 (1998) 125–137
4. Tan et. al. Phys. Rev. B 67 (2003) 035208
5. Griffith et al, Indium Phosphide and Related Materials, 2005.
6. Jain et al, IEEE Device Research Conference, 2010
TLM resistance as a function of pad spacing
• Surface exposed to air
• Oxidized with UV-ozone for 30 min
• Dilute HCl (1:10) etch and DI rinse for 1 min each
• Hydrogen cleaning at 70 oC for 30 min in MBE system
• Surface morphology verified by RHEED
• Ir deposition in the e-beam chamber connected to
MBE chamber
• Error due to extrapolation
- Error in 4-point probe resistance measurements
- Resolution error in SEM
• Error due to processing
- Variable gap along width (W)
- Overlap resistance
0
0.5
1
1.5
2
2.5
3
3.5
0 1 2 3 4 5 6
Res
ista
nce
(
)
Pad Spacing, d (m)
Rd
Rc
Process Surface Preparation
ρc (Ω-µm2) ρh (Ω-µm)
In-situ As grown 1.0±0.6 11.5±3.3
Ex-situ (air exposure)
HCl etch +
H clean (MBE)
1.5 ± 0.9 17.4 ± 4.2
• Low contact resistivity with in-situ Ir contacts:
ρc ~ (1.0 ± 0.6) Ω-µm2
• ρc with ex-situ Ir contacts ((1.5 ± 0.9) Ω-µm2) is
comparable to that obtained with in-situ contacts.
• Slight degradation in ρc on annealing but contacts still
suitable for THz transistors
20 nm Ti500 nm Au
100 nm In0.52Al0.48As: NID buffer
100 nm In0.53Ga0.47As: C (p-type)20 nm Ir
50 nm Ni
Semi-insulating InP Substrate
Cross-section schematic of the metal-semiconductor contact layer structure used for TLM measurements
Schematic of the TLM pattern used for the contact resistivity measurement
Ashish Baraskar1, Vibhor Jain1, Mark A. Wistey3, Evan Lobisser1, Brian J. Thibeault1, Arthur C. Gossard1,2, Mark J. W. Rodwell11ECE and 2Materials Departments, University of California, Santa Barbara, CA
3Electrical Engineering, University of Notre Dame, IN
INTRODUCTION Ex-situ Contacts
Characterization and Measurements
Conclusions
Error Analysis
Why Ir?
• Refractory metal (melting point ~ 2460 oC)
• Work function ~ 5.7 eV; closer to Ev for InGaAs
• Easy to deposit by e-beam technique
Acknowledgements:ONR, DARPA-TFAST, DARPA-FLARE
Illustration of systematic error, either by R or by d, on the plot of resistance R versus pad
spacing d
Atomic H Cleaning:
• Oxides and hydrocarbons form the majority of surface
impurities
• Atomic H reacts with oxides to form volatile products [3]
As2Ox + 2xH xH2O + As2
In2O3/Ga2O3 + 4H 2H2O + In2O/Ga2O
In2O3/Ga2O3 + 4H H2O + 2InOH/2GaOH
• Similarly carbon containing complexes (InGaAs-C) are
broken into volatile products
Requirements for achieving low resistance, stable ohmic contacts
• Higher number of active carriers
• Better surface preparation techniques
• Use of refractory metal for thermal stability
• THz electronics limited by metal-semiconductor contacts• Need contact resistivity (ρc)< 2x10−8 Ω-cm2 for ft and
fmax >1 THz [1]
• Usually involve high temperature processing; high current densities (~100 mA/µm2)• Unpredictable native oxides
Fundamental Scaling Laws
RCf in
2
1
effcbbb CR
ff
8max
GOAL: High Frequency Electronics
Approach
Less than 2 Ω-µm2 contact resistivity required for simultaneous THz ft and fmax [2]
InP Bipolar Transistor Scaling Roadmap
To double device bandwidth:
• Cut transit time 2x
• Cut RC delay 2x
Scale contact resistivities by 4:1*
bcWcTbT
eW
Emitter256 128 64 32 nm, width
8 4 2 1 Ω·µm2, access ρ
Base175 120 60 30 nm, contact width
10 5 2.5 1.25 Ω·µm2, contact ρ
ft 520 730 1000 1400 GHz
fmax 850 1300 2000 2800 GHz
• Scaled device thin base
(For 80 nm device: tbase < 25 nm)
• Non-refractory contacts may diffuse at higher
temperatures through base and short the collector• Pd/Ti/Pd/Au contacts diffuse about 15 nm in InGaAs on
annealing
100 nm InGaAs grown in MBE
15 nm Pd/Ti diffusion
Semiconductor epilayer growth by Solid Source Molecular Beam Epitaxy (SS-MBE)– p-InGaAs/InAlAs
• Semi insulating InP (100) substrate
• Unintentionally doped InAlAs buffer
• Hole concentration determined by Hall measurements
Epilayer Growth
In-situ iridium (Ir) deposition immediately after film growth-E-beam chamber connected to MBE chamber-No air exposure after film growth
In-situ contacts
• Hole concentration saturates at high CBr4 fluxes• Number of di-carbon defects increases as CBr4 flux increases[4]
Hole concentration Vs CBr4 flux
1019
1020
40
50
60
70
80
0 10 20 30 40 50 60
hole concentration
mobility
Mob
ility
(cm
2-V
s)
CBr4 foreline pressure (mtorr)
Hol
e C
once
ntr
atio
n (
cm-3)
2
4
6
8
10
10 20 30 40 50 60
Group V / Group III
Hol
e C
once
ntr
atio
n (
1019
) cm
-3
• As V/III ratio decreases hole concentration increases• hypothesis: As-deficient surface drives C onto group-V sites
Hole concentration Vs V/III flux
4 1019
8 1019
1.2 1020
1.6 1020
2 1020
300 350 400 450
Hol
e C
once
ntra
tion
(cm
-3)
Substrate Temp. (oC)
Hole concentration Vs substrate temperature
1019
1020
0 20 40 60 80 100
Tsub = 460 oC
Tsub = 350 oC
CBr4 foreline pressure (mtorr)
Ho
le C
on
cen
tra
tion
(cm
-3)
Tendency to form di-carbon defects increases as Tsub increases[4]
0
5
10
15
20
25
30
0 0.5 1 1.5 2 2.5 3 3.5
ex-situ unannealedex-situ annealedin-situ unannealedin-situ annealed
Pad Spacing (m)
Res
ista
nce
(
)
• Hole concentration, p = 1.5 x 1020 cm-3
• Mobility, µ = 36 cm2/Vs• Sheet resistance, Rsh = 105 ohm/ (100 nm thick film)
Thermal Stability:
• Contacts annealed under N2 flow at 250 oC for 60 min.
Process ρc (Ω-µm2)
Un-annealed annealedIn-situ 1.0±0.6 1.2±0.7
Ex-situ (air exposure) 1.5 ± 0.9 1.8 ± 0.9
Variable gap along width (W)
1.10 µm 1.04 µm
Overlap Resistance
EXPERIMENTAL DETAILS
RESULTS
TEM image of the Ir/p-InGaAs contact after annealing
200 nm InGaAs + InAlAs
Ir / Ti
Au
ρc lower than the best reported contacts to p-InGaAs (ρc = 4 Ω-µm2)[5,6]
SEM images of the TLM sample illustrating the errors due to processing
As flux: 1.5×10-6 torr
p = 1.5×1020 cm-3
TLM width: 25 µm
Need a refractory metal for thermal stability
