[IEEE 2013 IEEE International Electron Devices Meeting (IEDM) - Washington, DC, USA...

4
High-Performanc with R Wei Liu + , Jiahao Kang + , Wei Cao + , D + Department of Electrical and Com ++ Department of Electrical Email: {liuwei, jiahao_kang, weic Abstract Recently, Molybdenum Disulphide (MoS 2 ) promising candidate for low-power digital appli to monolayer (1L) MoS 2 , few-layer MoS 2 (FL-M due to its higher density of states (DOS). Howeve study of FL-MoS 2 field-effect-transistor (FET) paper, we report a high-performance FL-MoS 2 FE contact resistance (~0.8 k.μm) that is close to t silicon contacts in CMOS technology. A cor performance and the number of MoS 2 layers is e the design of high-performance FL-MoS 2 FET found that edge contacts (metal contact to each ed play a key role in the efficient injection of elect MoS 2 . This is confirmed by experiments as functional theory (DFT) calculations. Moreover MoS 2 (5 nm) FET is also demonstrated with saturation and high drive current (24 μA/μ source/drain doping. Introduction MoS 2 (Fig. 1a), one of the transition-met (TMDs) shows promising properties for future n to its non-zero band gap (Fig. 1b), atomic sc pristine interfaces (without out-of-plane dangling The atomically-thin 1L or few-layer (FL) MoS gate electrostatics to suppress short-channel-effec one of the major issues in scaled metal-oxide-se (MOSFETs) [2]. However, it has been challengi mobilities in 1L MoS 2 . While a theoretical ca room-temperature mobility of 1L MoS 2 up to experimental work on carrier transport in 1L substrates have reported low mobilities in th cm 2 /V.s [1]. In the meantime, the effect of h boosting the mobility of 1L MoS 2 is being explore hand, a high contact resistance between me degrades the performance of 1L MoS 2 devices. In fact, metal-semiconductor contact is one of that determine the performance of 2-d semiconductor devices [5]. Compared with 1L flakes (defined as several nm to sub-10 nm in higher DOS (Fig. 1c) than that of 1L MoS 2 , wh lower contact resistance and carry higher curr MoS 2 flakes retain the capability of overcoming desirable to study FL MoS 2 FET devices to max of future MoS 2 devices. However, the reported e exhibit high contact resistances and small ON-cu devices [6-8]. In addition, the effect of contacts FL MoS 2 FET and the mechanism of electron MoS 2 channel still remain unclear. In this pap demonstrate an approach to achieve high-perfo FETs and highlight the role of edge contacts in th Device Fabrication MoS 2 films are prepared by mechanical exf MoS 2 (purchased from SPI) on 90 nm SiO 2 ce Few-Layer-MoS 2 Field-Effect-Trans Record Low Contact-Resistance Deblina Sarkar + , Yasin Khatami + , Debdeep Jena ++ an mputer Engineering, University of California, Santa Barb l Engineering, University of Notre Dame, Notre Dame, IN cao, deblina, yasin} @ece.ucsb.edu; [email protected]; kaustav@ has emerged as a ications. Compared MoS 2 ) is attractive er, a comprehensive is lacking. In this ET with record low the value for metal- rrelation of device established to guide T. Moreover, it is dge of MoS 2 layers) trons from metal to s well as density r, a top gated FL- h a robust current μm) even without al dichalcogenides nanoscale FETs due cale thickness, and bonds, Fig. 1a) [1]. S 2 allows excellent cts (SCE), which is emiconductor-FETs ing to achieve high alculation predicted ~410 cm 2 /V.s [3], L MoS 2 on oxide e range of 0.1-10 high-κ dielectric in ed [4]. On the other tal and 1L MoS 2 f the critical factors dimensional (2-D) L MoS 2 , FL MoS 2 this work), have a hich can potentially rent. Moreover, FL g SCE. Hence, it is ximize performance experimental works urrents on FL MoS 2 on the operation of n injection into FL per, we report and ormance FL MoS 2 eir design. foliation from bulk 2 /Si substrate. The Fig. 1 (a) Various views of the lattice str no dangling bonds on the surface, whi scattering. (b) Band gap (calculated by D of number of layers. 1L MoS 2 has a dire bilayer and bulk (> ~5 L) have an indir 1.2 eV, respectively [9]. (c) DOS of 1L shows that bulk MoS 2 has higher DOS th Fig. 2 (a) Optical microscope images of FET with Ti contact on SiO 2 (90 nm)/S point-measurements, current flows from measured on V2 and V3. Channel resis V3)/I. The scale bar is 5 μm. (b) Sche device. Au (100 nm) deposited on top contact metals. (c) AFM image of fabric (d) AFM measured height of MoS 2 flak MoS 2 area is indicated by yellow dash lin sistor d Kaustav Banerjee + bara, CA 93106 N 46556 @ece.ucsb.edu ructures of TMDs. There are ch leads to reduced surface DFT) of MoS 2 as a function ct band gap of 1.8 eV, while rect band gap of 1.5 eV and L and bulk MoS 2 . It clearly han that of 1L MoS 2 . f 1L, 6 nm, and 10 nm MoS 2 Si (n ++ ) substrates. For four- m V1 to V4. Voltages are stance is calculated as (V2- ematic of a back-gated FET of Ti (10-50 nm) is used as cated MoS 2 back-gated FET. ke in (c) along the red line. ne in (c). IEDM13-499 19.4.1 978-1-4799-2306-9/13/$31.00 ©2013 IEEE

Transcript of [IEEE 2013 IEEE International Electron Devices Meeting (IEDM) - Washington, DC, USA...

Page 1: [IEEE 2013 IEEE International Electron Devices Meeting (IEDM) - Washington, DC, USA (2013.12.9-2013.12.11)] 2013 IEEE International Electron Devices Meeting - High-performance few-layer-MoS2

High-Performancwith R

Wei Liu+, Jiahao Kang+, Wei Cao+, D+Department of Electrical and Com

++Department of ElectricalEmail: liuwei, jiahao_kang, weic

Abstract

Recently, Molybdenum Disulphide (MoS2) promising candidate for low-power digital applito monolayer (1L) MoS2, few-layer MoS2 (FL-Mdue to its higher density of states (DOS). Howevestudy of FL-MoS2 field-effect-transistor (FET) paper, we report a high-performance FL-MoS2 FEcontact resistance (~0.8 kΩ.µm) that is close to tsilicon contacts in CMOS technology. A corperformance and the number of MoS2 layers is ethe design of high-performance FL-MoS2 FETfound that edge contacts (metal contact to each edplay a key role in the efficient injection of electMoS2. This is confirmed by experiments asfunctional theory (DFT) calculations. MoreoverMoS2 (5 nm) FET is also demonstrated withsaturation and high drive current (24 μA/μsource/drain doping.

Introduction MoS2 (Fig. 1a), one of the transition-met(TMDs) shows promising properties for future nto its non-zero band gap (Fig. 1b), atomic scpristine interfaces (without out-of-plane dangling The atomically-thin 1L or few-layer (FL) MoSgate electrostatics to suppress short-channel-effecone of the major issues in scaled metal-oxide-se(MOSFETs) [2]. However, it has been challengimobilities in 1L MoS2. While a theoretical caroom-temperature mobility of 1L MoS2 up to experimental work on carrier transport in 1Lsubstrates have reported low mobilities in thcm2/V.s [1]. In the meantime, the effect of hboosting the mobility of 1L MoS2 is being explorehand, a high contact resistance between medegrades the performance of 1L MoS2 devices. In fact, metal-semiconductor contact is one ofthat determine the performance of 2-dsemiconductor devices [5]. Compared with 1Lflakes (defined as several nm to sub-10 nm in higher DOS (Fig. 1c) than that of 1L MoS2, whlower contact resistance and carry higher currMoS2 flakes retain the capability of overcomingdesirable to study FL MoS2 FET devices to maxof future MoS2 devices. However, the reported eexhibit high contact resistances and small ON-cudevices [6-8]. In addition, the effect of contacts FL MoS2 FET and the mechanism of electronMoS2 channel still remain unclear. In this papdemonstrate an approach to achieve high-perfoFETs and highlight the role of edge contacts in th

Device Fabrication MoS2 films are prepared by mechanical exf

MoS2 (purchased from SPI) on 90 nm SiO2

ce Few-Layer-MoS2 Field-Effect-TransRecord Low Contact-Resistance Deblina Sarkar+, Yasin Khatami+, Debdeep Jena++ an

mputer Engineering, University of California, Santa Barbl Engineering, University of Notre Dame, Notre Dame, INcao, deblina, yasin @ece.ucsb.edu; [email protected]; kaustav@

has emerged as a ications. Compared MoS2) is attractive er, a comprehensive

is lacking. In this ET with record low the value for metal-rrelation of device established to guide T. Moreover, it is dge of MoS2 layers) trons from metal to s well as density r, a top gated FL-h a robust current μm) even without

al dichalcogenides nanoscale FETs due cale thickness, and bonds, Fig. 1a) [1].

S2 allows excellent cts (SCE), which is emiconductor-FETs ing to achieve high alculation predicted

~410 cm2/V.s [3], L MoS2 on oxide e range of 0.1-10

high-κ dielectric in ed [4]. On the other tal and 1L MoS2

f the critical factors dimensional (2-D) L MoS2, FL MoS2 this work), have a

hich can potentially rent. Moreover, FL g SCE. Hence, it is ximize performance experimental works urrents on FL MoS2 on the operation of

n injection into FL per, we report and ormance FL MoS2 eir design.

foliation from bulk 2/Si substrate. The

Fig. 1 (a) Various views of the lattice strno dangling bonds on the surface, whiscattering. (b) Band gap (calculated by Dof number of layers. 1L MoS2 has a direbilayer and bulk (> ~5 L) have an indir1.2 eV, respectively [9]. (c) DOS of 1Lshows that bulk MoS2 has higher DOS th

Fig. 2 (a) Optical microscope images ofFET with Ti contact on SiO2 (90 nm)/Spoint-measurements, current flows frommeasured on V2 and V3. Channel resisV3)/I. The scale bar is 5 µm. (b) Schedevice. Au (100 nm) deposited on top contact metals. (c) AFM image of fabric(d) AFM measured height of MoS2 flakMoS2 area is indicated by yellow dash lin

sistor

d Kaustav Banerjee+ bara, CA 93106 N 46556 @ece.ucsb.edu

ructures of TMDs. There are ch leads to reduced surface DFT) of MoS2 as a function ct band gap of 1.8 eV, while rect band gap of 1.5 eV and L and bulk MoS2. It clearly han that of 1L MoS2.

f 1L, 6 nm, and 10 nm MoS2Si (n++) substrates. For four-m V1 to V4. Voltages are stance is calculated as (V2-ematic of a back-gated FET of Ti (10-50 nm) is used as cated MoS2 back-gated FET. ke in (c) along the red line. ne in (c).

IEDM13-49919.4.1978-1-4799-2306-9/13/$31.00 ©2013 IEEE

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thickness of the MoS2 films are identified using optical microscope (Fig. 2a) and atomic force microscope (AFM) (Fig. 2c, d). The source and drain are defined by electron-beam lithography followed by metallization (Ti and Au). Fig. 2b shows the detailed information of our back-gated 1L MoS2 FET device.

Fig. 3 shows that annealing can significantly improve device performance and reduce the contact resistance. Before annealing, MoS2-Ti contact shows clear Schottky behavior as indicated by the nolinear Ids-Vds characteristics in Fig. 3a. After annealing, MoS2-Ti contact exhibits an ohmic behavior as confirmed by the linear Ids-Vds characteristics shown in Fig. 3b.

Mobility and Contact Resistance of MoS2 FET Mobilities of MoS2 with various thicknesses are extracted from the plots of channel conductance (G) as a function of back gate voltage (Vbg) shown in Fig. 4a, b, c, which are obtained from four-point-measurements. 1L MoS2 exhibits a mobility of 13.2 cm2/V.s

on SiO2 substrate. It is observed that mobility of MoS2 FET increases with thickness (for number of layers < 9L) as shown in Fig. 4d. Our FL MoS2 FETs show higher mobility than 1L MoS2 FET, in agreement with reported results [6]. However, for the first time, we present a systematic study of the dependence of mobility on the number of layers of MoS2. Bilayer MoS2 FET exhibits a mobility of 21 cm2/V.s. For few layer MoS2 (5L and 8L), the mobilities are ~55 cm2/V.s, which is nearly 4 times higher than that of 1L MoS2. It is known that scattering from the interface of MoS2-SiO2 is the major reason degrading the mobility of 1L MoS2. Hence, with increasing thickness of MoS2, interface scattering is partially screened, thereby leading to the enhancement of mobility that is mostly contributed from the upper layers. For the thickest MoS2 flake (15L), mobility slightly degrades to ~45 cm2/V.s. Hence, FL (5-15L) MoS2 shows good potential for applications in high performance digital circuits in terms of better mobility than that of 1L MoS2.

Fig. 5a, d show the transfer characteristics of back-gated (Fig. 5a/Fig. 5d: 1L/15L) MoS2 FETs with Ti contacts. They clearly display n-type behavior. As shown in Fig. 5e, the Ids-Vds curves of (15L) MoS2 FET display a better linear behavior and larger ON-current than that of 1L MoS2 FET (Fig. 5b). In general, the linear behavior of Ids-Vds curves of FET indicates that the contact is ohmic in nature. Compared to the small gate modulation of the channel resistance (Rchannel) (Fig. 5c, f), there is a very large gate modulation effect (~106) on the contact resistance (Rcontact) when the back gate voltage (Vbg) is swept from -30 V to 30 V, indicating that (1L or FL)

Fig. 3 Annealing effect on the contact and device performance. (a)Ids-Vds characteristics of MoS2 (5 nm) FET with Ti contact withoutannealing measured at 5×10-6 mbar. (b) Ids-Vds characteristics of the same device after annealing at 420 K at 5×10-6 mbar. All themeasurements are carried out at room temperature.

Fig. 4 Channel conductance (G) of (a) 1L, (b) 5L and (c) 15L MoS2FETs with Ti contact as a function of Vbg, values of G are measuredby four-point-measurements. (d) Intrinsic mobility (excluding theeffect of contacts) of MoS2 as a function of the number of layers.The mobility of MoS2 can be extracted as µ=(L/W)dG/dVbgCox

-1,where Cox is the capacitance of the 90 nm-thick bottom SiO2dielectric; L and W represent the length and width of the channel,respectively. It was found that the intrinsic mobilities of few layerMoS2 FETs (varying from 40 cm2/V.s to 100 cm2/V.s) show strongdependence on the original bulk samples from which they arederived. In this work, all the devices are fabricated based on theMoS2 purchased from SPI.

Fig. 5 Ids-Vbg characteristics of (a) 1L and (d) 15L MoS2 FETs(from Fig. 4) with Ti contacts, at Vds=0.1V. (b), (e) correspondingIds-Vds characteristics of (a) and (d), respectively. (c), (f) Rcontact,Rchannel, and source-drain resistance (Rtotal) as a function of Vbg for 1Land 15L, respectively. Rtotal = 0.01V/Ids, in which Ids is obtainedfrom two-terminal Ids-Vbg measurement. Rcontact of 1L MoS2 FETwith Ti contact is around 740 kΩ.µm at Vbg=30 V, while 15L MoS2FET with Ti contact exhibits a record low Rcontact of ~0.8 kΩ.µmwhen Vbg> -10 V.

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back-gated MoS2 FETs operate as unconvention(SB) FETs, in which switching occurs primarRcontact rather than Rchannel. Hence, a device wunderlap between gate and source/drain) is neeFET-like switching. Rcontact of 1L MoS2 FET around 740 kΩ.µm at Vbg=30 V, while the 15L Mrecord low Rcontact of ~0.8 kΩ.µm when Vbg> -4 Rcontact is close to the metal-silicon contacts in [10], and represents a major advancement from cart MoS2 transistors. Compared to FL MoS2 contact (4-17 kΩ.µm) [11], FL MoS2 FET with Ta smaller Rcontact that shows a smaller dependenindicating that Ti forms better contact with FL Au/Ni. The lower dependence of Rcontact on Vbg (wcertain value) also reflects that Ti can heavily dresulting in a good contact, which has also beenprevious theoretical work [5].

As shown in Fig. 6a, 15L MoS2-Ti contact hathan that of 1L MoS2-Ti contact, and the Rcontact oMoS2 decreases with increase of temperaturethermionic emission over the Schottky barrier temperatures, electrons can occupy higher energmore electrons flowing over the Schottky barrier the current injection, thereby reducing the However, when temperature is above 300 K, Rexhibits much smaller change (~0.2 kΩ.µm) tha(~30 kΩ.µm), indicating that thermionic emissioon 15L MoS2-Ti contact. This implies that the 15L MoS2-Ti contact is much smaller and thinnMoS2-Ti contact. Therefore, FL MoS2-Ti devcontacts, in which tunneling through the Schottkythe drive current due to the small and thin barrier.

Charge Injection from Metal to For a thick MoS2 flake, MoS2-Ti contact is e

Fig. 6 (a) Temperature dependent Rcontact of 1Lcontact at Vbg=30V. (b) Band diagram of 1L (tolight blue schematic shows Fermi distribution of metal) MoS2 back-gated FETs with Ti contact at s

Fig. 7 Rcontact of 30 nm (46L) MoS2-Ti contact. (30 nm MoS2 FET after annealing at 420 K at shows the optical image of the measured devicTi/100 nm Au. (b) Rcontact, Rchannel, and Rtotal as a f

nal Schottky Barrier rily by modulating

with top gate (with eded to avoid SB-with Ti contact is

MoS2 FET exhibits a V. This record low CMOS technology

current state-of-the-FETs with Au/Ni

Ti contacts exhibits nce on applied Vbg,

MoS2 than that of when Vbg is above a dope MoS2, thereby n confirmed by our

as a smaller Rcontact of both 1L and 15L due to enhanced (Fig. 6b). At high

gy levels leading to and contributing to contact resistance.

Rcontact of 15L MoS2 an that of 1L MoS2 n has lower impact Schottky barrier of ner than that of 1L vices enable better y barrier dominates .

o MoS2 expected to provide

lower Rcontact due to its multiple conducRcontact ~ 53 kΩ.µm (Fig. 7) is measuMoS2-Ti contact. Rcontact of this device that of 5L-15L MoS2-Ti contacts. ThiMoS2-Ti contact arises due to the fact tcontact the top several layers only, indicimportant for achieving low resistancmodulate the top layers due to the Vbg schigh Rcontact.

Fig. 8a shows the relaxed contact regMoS2 (3L) –Ti surface for DFT calculacontacting the top layer only), there is a Å-3) between the upper-most MoS2 layedensity stays constant between MoS2 l

L and 15L MoS2-Ti op) and 15L (down,electrons in contactsame gate voltage.

(a) Ids-Vds curves of 5×10-6 mbar. Inset

ce. Contact: 50 nmfunction of Vbg.

Fig. 9 DFT simulation of edge contactedge contact. (b) Side view of the relinterface between MoS2 (3L) -Ti. (c) PDwith Ti (L1, L2, L3 from top to bottostrong covalent bonds with Ti, hence loses its band gap, which is reflected byMoS2 layers shown in (c), indicating an

Fig. 8 DFT simulation of top contact. (contact regions at the interface betweenContour plots of the average electronrepresents the average electron density aside shows the plot of average electroncorresponding to MoS2 (3L) – Ti system(PDOS) of first layer (L1) (with Ti cosecond (L2) and third layer (L3) of MoSlayer (L1) of MoS2 due to the formatiogap of first layer (L1) MoS2 vanishes aftand L3 still have large Schottky barriers

cting channels. However, an ured from a 30 nm (~46L)

is significantly higher than is high Rcontact of the ~46L that the electrode metal may cating that edge-contacts are ce. In addition, Vbg cannot creening, hence resulting in a

gions at the interface between ations. For a top contact (Ti high electron density (0.027

er and Ti, while the electron layers (L1-L2 and L2-L3 in

t. (a) Schematic view of an laxed contact regions at the DOS of each layer of MoS2

om). Sulfur atoms can form the MoS2 (edge-contacted)

y the PDOS plots of the three ohmic contact.

(a) Side view of the relaxedn MoS2 (3L) –Ti surface. (b)n density. The contour plotalong the x-axis. Right hand

n density along the x-y planem. (c) Partial density of statesontact) MoS2. (d) PDOS ofS2. Ti only influences the topon of Ti-S bonds. The bandfter contact with Ti, while L2

(ΦSB).

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Fig. 8b). The doping effect on the first MoS2 layefrom the PDOS (Fig. 8c, d). After depositing Ti of MoS2, its band gap vanishes due to the dopinL2 and L3 still have the band gap. Therefore, focontacting the top layer only), the DFT calculatithat Ti solely influences the upper-most layer of Mexperimentally observed performance degradation

To achieve high current, most of the MoS2 layto the contact metal from the side or edge (edgeFig. 9a, b). The DFT calculation (Fig. 9c) showscan form strong covalent bonds with Ti atomprovide access to all available conducting channethe Rcontact.

Fig. 10a shows the temperature dependent MoS2 (15L) FET. At Vbg<-4V, Ids shows tempeindicating that thermionic emission dominates cudoes not significantly depend on the temperindicating that current is dominated by tunneliThus, for a good FL MoS2-Ti contact, tunnelcurrent due to sufficient electrostatic doping (Fig.

Fig. 10 (a) Temperature dependent Ids-Vbg chara(15L) FET, Vds=0.01 V. (b) Schematic of bandFET at different Vbg.

Fig. 11 (a) SEM image of a top-gated MoS2 FETop gate dielectric layer is 30 nm HfO2 depositdeposition (ALD) at 200 oC. (b) Ids-Vds curves of FET with Ti contact. Vtg varies from -1 V to 0 V(c) Ids-Vtg curve of a top-gate few-layer (5 nm) contact, Vds=0.1 V. (d) Ids-Vds curves of top-gatewith Ti contact. Vtg varies from -4.6 V to 2.2 VFew layer MoS2-FET with Ti contact exhibitssaturation and an ON/OFF ratio of about 106, andcurrent than that of 1L MoS2 FET as shown in (b)

er is also confirmed onto the first layer

ng effect. However, or a top contact (Ti ion (Fig. 8) reveals MoS2 leading to the n (Fig. 7). yers should connect e contact shown in

s that sulphur atoms ms, which not only

els but also reduces

Ids-Vbg curves for erature dependence, urrent, while current rature for Vbg>-4V ing when Vbg>-4V. ling dominates the . 10b).

With a top-gate geometry (Fig. 11modulating the Schottky barrier (due toand source/drain) and provide better eMoS2 FET with Ti contact exhibits a roan ON/OFF ratio of about 106 (Fig. 1compared to 1L MoS2 FET with Ti contdoping in the source/drain area, the ONcomparable to the recently reported KZrO2 (17.5 nm) top dielectric film [12]. further reduction of contact resistance ON-currents in future MoS2 FET device

SummaryIn summary, this work presents a high

with record low contact resistance (~0.8metal. For FL MoS2 devices, good edgenhance device performance. The bencontacts is demonstrated by our top-gatehigh ON current (24 μA/μm for 5 source/drain doping. As summarized in MoS2 FETs show better potential forcircuits due to their small contact resista

References[1] B. Radisavljevic, et al., Nature Nanote2011. [2] Y. Yoon, et al., Nano Letters, vol. 11, pp. [3] K. Kaasbjerg, et al., Physical Review B, v[4] M. S. Fuhrer and J. Hone, Nature Nanot2013. [5] J. Kang, et al., Tech. Dig. IEDM, 2012, pp[6] S. Kim, et al., Nature Communications, v[7] E. S. Kim, S. Kim, Y. S. Lee, et al., Tech. [8] T. N. Adam, et al., Device Research Confe[9] A. Kuc, N. Zibouche, T. Heine, arXiv:110[10] International Technology Roadmap http://www.itrs.net/. Source/drain parasitic se0.3 -0.5 kΩ.µm (290 Ω.µm, 405 Ω.µm and 4gate low standby power CMOS, respectivecontact resistance. [11] H. Liu, et al., ACS Nano, vol. 6, pp. 8563[12] H. Fang, et al., Nano Letters, pp.1991–1

acteristics for MoS2d diagram of MoS2

ET with Ti contact.ted by atomic layerf top-gated 1L MoS2V at a step of 0.2 V.

MoS2 FET with Tied 5 nm MoS2 FET

V at a step of 0.4 V.s a perfect currentd has a higher drive-).

Table I. Rcontact, intrinsic mobility ofthicknesses on SiO2 (90 nm)/Si substratFETs have Ti (10 nm)/Au (100 nm) cMoS2 FETs have Ti (50 nm)/Au (100calculated from channel conductancemeasurements)-Vbg plots at Vds= 0.01 V to 30 V. Note that back-gated devics hadevices, which can be attributed to thealways modulates the Schottky barrier avoltages can not thin the Schottky geometry (Fig.11a) of top-gated devices

Layer # 1L 2L Rcontact (KΩ.µm) 740 15.6

Mobility (cm2/V.s) ~13 ~21 Top gate ION (µA/µm)

Vds=1V 1.2

Vtg=0V N/A

Back gate ION (µA/µm) Vds=1V, Vbg=30V 10 20

1a), it is possible to avoid o the underlap between gate electrostatics (Fig. 11c). FL obust current saturation with 11d), and has higher current tact (Fig. 11b). Even without -current of our device is still

K-doped FL MoS2 FET with Doping can certainly lead to and hence, to even higher

es. y h performance FL MoS2 FET 8 kΩ.µm) using Ti as contact ge contacts can significantly nefit of making good edge ed FL MoS2 FET that exhibit

nm MoS2) even without Table I, few-layer (5L-15L) r high performance digital

ances and high mobilities.

s echnology, vol. 6, pp. 147-150,

3768-3773, 2011. vol. 85, 2012. technology, vol. 8, pp. 146-147,

p. 407-410. ol. 3, pp. 1011, 2012. Dig. IEDM, 2012, pp. 108-111.

ference (DRC), 2012, pp. 65-66. 04.3670 [cond-mat.mtrl-sci]

for Semiconductors (2012), eries resistance is in the range of 67 Ω.µm for Planar, SOI, Multi-ly), which is dominated by the

3-8569, 2012. 995, 2013.

f MoS2 FETs with various tes. 1L, 2L, 5L and 8L MoS2ontacts, while 15L and 46L 0 nm) contacts. Mobility is e (measured by four-point-

and Vbg is swept from -30 V ave higher ION than top-gated e fact that back gate voltage at S/D regions, while top gate

barrier due to the device s.

5L 8L 15L 46L 1.56 1.24 0.78 53 ~52 ~54 ~47 ~19

N/A 24 Vtg= -2.2V N/A N/A

46 40 30 6.7

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