Home Page of Dr. Dharmendra Kumar Pandey - Transistor Hybrid … · 2020. 7. 11. · from the DC...

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Transistor Hybrid equivalent circuit and Single stage CE Amplifier PPN College, Kanpur Department of Physics, P. P. N. (PG) College, Kanpur 208 001, U.P., India Email: [email protected], [email protected] Website: dkpandey.weebly.com Dharmendra Kumar Pandey 27 May 2020 1

Transcript of Home Page of Dr. Dharmendra Kumar Pandey - Transistor Hybrid … · 2020. 7. 11. · from the DC...

  • Transistor Hybrid equivalent circuitand Single stage CE Amplifier

    PPN College, Kanpur

    Department of Physics, P. P. N. (PG) College,

    Kanpur – 208 001, U.P., IndiaEmail: [email protected],

    [email protected]: dkpandey.weebly.com

    Dharmendra Kumar Pandey

    27 May 2020 1

    mailto:[email protected]

  • 27 May 2020 PPN College, Kanpur 2

    Transistor Configuration

    On the basis of common terminal between input and output

    • CB mode: Base is common between input and output

    • CE Mode: Emitter is common between input and output

    • CC mode: Collector is common between input and output

    On the basis of Biasing

    • R-R Bias: Cut-off mode

    Input/Ist Junction- Reverse Bias; Output/IInd Junction- Reverse Bias.

    • F-R Bias: Active mode

    Input/Ist Junction- Forward Bias; Outtput/IInd Junction- Reverse Bias.

    • F-F Bias: Saturation mode

    Input/Ist Junction- Forward Bias; Output/IInd Junction- Forward Bias.

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    Transistor Current and Voltage: Two-Port Network

    I1: Input current I2 : Output current

    V2: Output voltage

    • Relation in V and I provides: Four type of parameters

    Impedance Z, Admittance Y, Hybrid h, Inverse-hybrid g

    Both currents and Both voltages can be related by four types

    Transistor as two port or four

    terminal network

    V1: Input voltage

    I2 I1

    V1V2

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    )V,V(fI 211

    )V,V(fI 212

    2

    1

    2221

    1211

    2

    1

    V

    V

    Y Y

    Y Y

    I

    I

    2121111 VYVYI 2221212 VYVYI

    Transistor Current and Voltage: Two-Port Network

    2. Transistor V-I relation in terms of Admittance Parameters

    )I,I(fV 211

    )I,I(fV 212

    2

    1

    2221

    1211

    2

    1

    I

    I

    Z Z

    Z Z

    V

    V

    2121111 IZIZV 2221212 IZIZV

    1. Transistor V-I relation in terms of Impedance Parameters

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    Transistor Current and Voltage: Two-Port Network

    3. Transistor V-I relation in terms of hybrid Parameters

    )V,I(fV 211

    )V,I(fI 212

    2

    1

    2221

    1211

    2

    1

    V

    I

    h h

    h h

    I

    V

    2121111 VhIhV 2221212 VhIhI

    4. Transistor V-I relation in terms of Inverse hybrid Parameters

    )I,V(fI 211

    )I,V(fV 212

    2

    1

    2221

    1211

    2

    1

    I

    V

    g g

    g g

    V

    I

    2121111 IgVgI 2221212 IgVgV

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    )V,I(fV 211

    )V,I(fI 212

    2

    1

    2221

    1211

    2

    1

    V

    I

    h h

    h h

    I

    V

    2r1i2121111 VhIhVhIhV

    2o1f2221212 VhIhVhIhI

    Transistor hybrid equivalent circuit

    Transistor V-I relation in terms of hybrid Parameters

    02V1

    1i

    I

    Vh

    Four characteristic curves, Four hybrid Parameters

    Input characteristic curve: Graph between V1 and I1 at constants V2.

    hi: input impedance or resistance

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    Transistor hybrid equivalent circuit

    02I2

    1r

    V

    Vh

    Reverse voltage transfer characteristic: Graph between V1 and V2 at constants I2.

    hr: reverse voltage gain/ratio

    02V1

    2f

    I

    Ih

    Forward current transfer characteristic : Graph between I2 and I1 at constants V2.

    hf: forward current gain/ratio

    02I2

    2o

    V

    Ih

    Output characteristic: Graph between I2and V2 at constants I1.

    h0: output admittance

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    Transistor hybrid equivalent circuit

    2r1i1 VhIhV

    2o1f2 VhIhI

    Transistor hybrid equivalent circuit in CE mode

    cerebiebe VhihV

    ceoebfec Vhihi D

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    Characteristic curves in CE mode

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    Biasing of transistor

    Biasing is the process by which a proper DC source (VBB,VCC)/potential difference can be provided to the input andoutput circuit of the transistor.

    Type of Biasing1. Fixed Bias or Base Bias

    2. Collector to Base Bias

    3. Emitter Bias or Self Bias

    4. Potential Divider Bias

    Correct Biasing1. Q-point should not vary.

    2. Stability factor should be minimum.

    3. There should not be thermal runaway.

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    Stability Factor and Thermal runaway

    c

    B0C

    C

    dI

    dI1

    1

    dI

    dIS

    0CBC I)1(II

    1. T: increases ; ICO: Increases; IC: Increases

    2. If IC : increases then temp: increases and further ICO:Increases

    3. IC and Temp : continuously increases

    4. Due to heating: the self destruction of unstabilizedtransistor is known as thermal runaway.

    S :Minimum; Stability: High1. varies for same type/number of transistor2. Temperature causes change in leakage current

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    Q-point or operating point

    Q-point is an acronym for Quiescent point. Q-point is the operating pointof the transistor (ICQ,VCEQ) at which it is biased. The concept of Q-point isused when transistor act as an amplifying device and hence is operated inactive region of input output characteristics. To operate the BJT at a pointit is necessary to provide voltages and currents through external sources.

    Why stabilization of operating point is needed?In practice the operating point varies shifts due to drift in temperature e.t.c. Astemperature increases Ico, β, Vbe gets affected. The reverse saturation currentalmost doubles for every 10 degree rise in collector junction temperature. Thebase to emitter voltage decreases by 2.5 milli volts for every one degree rise intemperature. Hence the operating point should be stabilized against thevariations in temperature so that it remains stable. To achieve this biasing circuitsare introduced.

    The operating point of a device, also known as a bias point, quiescentpoint or Q-point, is the steady-state DC voltage or current at a specifiedterminal of an active device such as a transistor with no input signalapplied.

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    Q-point or operating point : DC Load Line

    1. (Vcc, 0) is cut off point where transistorenters in to cut off region from active region2. (0, Vcc/Rc) is saturation point where the

    transistor enters saturation region.

    CCCECC RIVV

    C

    CCCE

    CC

    R

    VV

    R

    1I

    Best Q-point position

    2

    VV CCCE

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    Q-point or operating point : AC Load Line

    It is straight line through thequiescent operating point buthaving slope corresponding toAC load resistance. The AC loadseen by the amplifier is differentfrom the DC load, and so theslope of AC load line is different.The AC load line indicates themaximum possible output-voltage swing, called the peak-to-peak output voltage (Vpp) for agiven amplifier configuration.This maximum Vpp is oftenreferred to as the compliance ofthe amplifier.

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    Q-point or operating point : AC Load Line

    1C

    1C1C

    RR

    RRR IIRRac

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    Potential Divider biasing of transistorDC equivalent of PotentialDivider biasing of transistor

    Potential Divider Biasing of TransitorThe voltage divider bias method is the most prominent method for of providingbiasing and stabilization. Here, two resistors R1 and R2 are employed, which areconnected to VCC and provide biasing. The resistor RE employed in the emitterprovides stabilization.

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    Voltage across R2 = V2=VTh

    From the above expression, it is evident that IC doesn’t depend upon β. VBE isvery small that IC does not get affected by VBE at all. Thus IC in this circuit isalmost independent of transistor parameters and hence good stabilization isachieved. Stability factor =1

    Potential Divider Biasing of Transitor

    Applying KVL in base emitter junction

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    Potential Divider Biasing: Numerical

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    Potential Divider Biasing: Numerical

    Example: Convert this previous emitter-bias example to voltage divider bias.Given that-

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    CE amplifier

    B

    Ci

    i

    i(ac) A

    in

    LV

    R

    RA

    in

    L2P

    R

    RA

    ======================

    b

    be

    21

    21in

    i

    V

    RR

    RRR

    LC

    LCac

    RR

    RRR

    in

    acV

    R

    RA

    in

    ac2P

    R

    RA

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    CE amplifier: Numerical

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    CE amplifier

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    CE amplifier

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    CE amplifier : Hybrid equivalent circuit

    R1 and R2: Biasing resistancewhich forms potential divider toprovide source (V2=VTh=VBB) toinput circuit.

    RC : Biasing resistance toprovide appropriate source tooutput circuit.

    RE : Stabilization resistance.

    CB : Base capacitor whichforward only ac voltage of inputsignal for the amplification.

    CE : By pass capacitor whichbypasses ac voltage through itto reduce the potential dropthrough RE.

    CC : Collector capacitor whichforwards only amplified acvoltage in output.

    VCC : Power dc source

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    vv

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    CE amplifier hybrid equivalent circuit : Working

    In put and out putvoltage are inopposite phase.

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    CE amplifier hybrid equivalent circuit : Working

    Since hre and hoe has very small values therefore they can beneglected. So, simplified hybrid equivalent circuit becomes as

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    In the above circuit, rL=RC.If load resistance RL is connected across output then rL=RL II RC.Similarly In case of potential divider biasing, The input impedance ofinput circuit = hie II RB ; where RB=R1 II R2.

    CE amplifier hybrid equivalent circuit : Working

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    CE amplifier hybrid equivalent circuit : Working

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    Numerical

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    Numerical

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    Numerical

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    Numerical

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    Numerical

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    Numerical

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    Numerical

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    Numerical

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  • PPN College, Kanpur

    A Lot of Thanksfor kind attention

    27 May 2020 37