Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

ECEN325: ElectronicsSummer 2018

Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET)

Announcements & Reading

• HW5 due today• Exam 2 on July 20

• MOSFET Reading• Razavi Ch6 – MOSFET Models• Razavi Ch7 – MOSFET Amplifiers

2

MOSFET Circuit Symbols

3

NMOS PMOS

• MOSFETs are 4-terminal devices• Drain, Gate, Source, & Body

• Body terminal generally has small impact in normal operation modes, thus device is generally considered a 3-terminal device• Drain, Gate, and Source are respectively similar to the Collector, Base,

and Emitter of the BJT

• 2 complementary MOSFETS: NMOS, PMOS

NMOS Physical Structure

4[Karsilayan]

n+

n+

CMOS Physical Structure

5[Karsilayan]

VTH Definition

• The threshold voltage, VTH, is the voltage at which an “inversion layer” is formed• For an NMOS this is when the concentration of

electrons equals the concentration of holes in the p- substrate

6

[Silva]

CH 6 Physics of MOS Transistors 7

Drain Current Derivation: Channel Charge Density

The incremental channel charge density is equal to the gate capacitance times the gate-channel voltage in excess of the threshold voltage.

ox

oxox

THGCox

tC

VVWCQ

:area gateunit per Capacitane where

)(

[Razavi]

CH 6 Physics of MOS Transistors 8

Drain Current Derivation: Charge Density at a Point

Let x be a point along the channel from source to drain, and V(x) its potential; the expression above gives the charge density (per unit length).

THGSox VxVVWCxQ )()(

[Razavi]

CH 6 Physics of MOS Transistors 9

Drain Current Derivation: Charge Density and Current

The current that flows from source to drain (electrons) is related to the charge density in the channel by the charge velocity.

vQI

[Razavi]

CH 6 Physics of MOS Transistors 10

Drain Current Derivation: Triode Region (Small VDS) Current Equation

DSDSTHGSoxnD

THGSLx

xVxV

xV oxnD

nTHGSoxD

n

VVVVLWCI

xdVVxVVWCdxI

dxxdVVxVVWCvxQI

dxdVv

DS

21

)()(

)()(

:VelocityElectron

0 0

[Razavi]

Triode or Linear Region

• Channel depth and transistor current is a function of the overdrive voltage, VGS-VT, and VDS

• Because VDS is small, VGC is roughly constant across channel length and channel depth is roughly uniform

11

x=0 x=L

VDS

DSDSTnGSOXnDS VVVVCLWI 5.0

00 V DSVLV LxVxV DS

LxVVxVVxV DSGSGSGC

TnGSox

DS

VVCLWR

1

For small VDS

[Silva]

L

W

tox

N+ N+

VDSGNDVGS Drain current: Expression used in SPICE level 1

W

tox

N+ N+

VDSGNDVGS

Non-linear channel

Linear approximation

VDS

ID

VDSsat

IDsat

VGS > VT

MOS Equations in Triode Region (Large VDS)

This doesn’t really happen

DSDSTnGSOXnDS VVVVCLWI 5.0

TnGSDSsat VVV

Triode Region Channel Profile

13

[Sedra/Smith] LxVVxVVxV DSGSGSGC

• If VGC is always above VT throughout the channel length, the transistor current obeys the triode region current equation

Saturation Region Channel Profile

14

[Sedra/Smith]

LxVVxVVxV DSGSGSGC

• When VDS VGS-VTH=VOV, VGC no longer exceeds VTH, resulting in the channel “pinching off” and the current saturating to a value that is no longer a function of VDS (ideally)

Saturation Region

• Channel “pinches-off” when VDS=VGS-VTH and the current saturates• After channel charge goes to 0, the high lateral field “sweeps” the

carriers to the drain and drops the extra VDS voltage

15

x=0 x=L

VDSsat=VGS-VT

00 V DSVLV LxVxV DS

LxVVxVVxV DSGSGSGC VDS-VDSsat

TnGSDSsat VVV

[Silva]

22 TnGS

OXnDS VV

LWCI

TnGSDS VVV

DSDS

TnGSOXnDS VVVVLWCI

2

NMOS ID – VDS Characteristics

16

TNGSOV VVV [Sedra/Smith]

MOS “Large-Signal” Output Characteristic

17

[Sedra/Smith]

Note: Vov=VGS-VT

What about the PMOS device?

• The current equations for the PMOS device are the same as the NMOS EXCEPT you swap the current direction and all the voltage polarities

18

DSDSTnGSOXnDS VVVVCLWI 5.0 SDSDTpSGOXpSD VVVVC

LWI 5.0

22 TnGSOXnDS VVCL

WI 22 TpSGOXpSD VVCL

WI

Linear:

Saturation:

NMOS PMOS

NMOS PMOS

[Silva]

PMOS ID – VSD Characteristics

19

[Karsilayan]

(Saturation)

TPSGOV VVV

NMOS DC Operation (w/ infinite rout)

20

22

,(Active) Saturation

2 ,(Linear) Triode

0Cutoff

Condition BiasRegion

TNGSoxn

DSTNGSDSTNGS

DSDS

TNGSoxnDSTNGSDSTNGS

DSTNGS

DS

VVLWCIVVVVV

VVVVLWCIVVVVV

IVV

I

• In transistor model, often combine nCox term as a parameter KPN with units A/V2

• In lab, we combine nCox(W/L) term as a parameter N with units A/V2

[Karsilayan]

PMOS DC Operation (w/ infinite rout)

21

22

,(Active) Saturation

2 ,(Linear) Triode

0Cutoff

Condition BiasRegion

TPSGoxp

SDTPSGSDTPSG

SDSD

TPSGoxpSDTPSGSDTPSG

SDTPSG

SD

VVLWC

IVVVVV

VVVVLWCIVVVVV

IVV

I

• In transistor model, often combine pCox term as a parameter KPP with units A/V2

• In lab, we combine pCox(W/L) term as a parameter P with units A/V2

[Karsilayan]