BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

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BSDL Extensions for dot6 Michael Sberro JTAG course 2005
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Transcript of BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

Page 1: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

BSDL Extensions for dot6

BSDL Extensions for dot6

Michael SberroJTAG course 2005

Michael SberroJTAG course 2005

Page 2: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

AgendaAgenda

• Short Review

• Some BSR cells for dot6

• Dot6 example device

• Short Review

• Some BSR cells for dot6

• Dot6 example device

Page 3: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

Short ReviewShort Review• AC and DC tests are very common in dot6

since it does not separate digital & analog signals

• Dot6 enables BS testing between DC-coupled pins and AC-coupled pins

according to test modes

• In addition to the DC-extest of dot1, dot6 has AC extests (extest_train, extest_pulse)

• AC and DC tests are very common in dot6 since it does not separate digital & analog

signals

• Dot6 enables BS testing between DC-coupled pins and AC-coupled pins

according to test modes

• In addition to the DC-extest of dot1, dot6 has AC extests (extest_train, extest_pulse)

Page 4: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

AC/DC Selection CellsAC/DC Selection Cells

The AC_SelX cell captures the state of its “shift_In” line in the rising edge of the TCKThe AC_SelX cell captures the state of its

“shift_In” line in the rising edge of the TCK

Page 5: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

AC_1 Output Data CellAC_1 Output Data Cell

• Dot1: BC cells test pins connectivity

• The corresponding in dot6 are AC cells. Additional logic is added:

Mux, controlled by AC_mode pin to select between DC or AC extests;

XOR gate (captured sig., AC test sig.)

• Dot1: BC cells test pins connectivity

• The corresponding in dot6 are AC cells. Additional logic is added:

Mux, controlled by AC_mode pin to select between DC or AC extests;

XOR gate (captured sig., AC test sig.)

Page 6: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

Mode 5 is 1 for extests

Page 7: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

AC_10 Self Monitoring Output Data Cell

AC_10 Self Monitoring Output Data Cell

• Monitors the state of its output driver

• Corresponds to BC_10

• Monitors the state of its output driver

• Corresponds to BC_10

Page 8: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

First time mode 5 is 0, for initial input, then it becomes constant 1

Page 9: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

Dot6 Example DeviceDot6 Example Device

The designer marks pins as DC or AC to benefit from the dot6 extra test resources.

The drivers and receivers are determined by these I/O pins.

The designer marks pins as DC or AC to benefit from the dot6 extra test resources.

The drivers and receivers are determined by these I/O pins.

Page 10: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

Diff., hence can be AC/DC

Ordinary DC

Ordinary DC

AC coupled integrated on chip

G and H form a differential bidirectional pin pair

Diff., support Extests

Page 11: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

…Now the device is added all the functionality of both standards:Dot1’s: TAP, BSR Dot6’s: AC cells, TRs (self ref.):

…Now the device is added all the functionality of both standards:Dot1’s: TAP, BSR Dot6’s: AC cells, TRs (self ref.):

Page 12: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.
Page 13: BSDL Extensions for dot6 Michael Sberro JTAG course 2005 Michael Sberro JTAG course 2005.

Thanks…Thanks…