Apple M50 PVT.

TABLE_TABLEOFCONTENTS_ITEM

















TABLE_TABLEOFCONTENTS_HEAD
















TABLE_TABLEOFCONTENTS_HEAD




























ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPDENG

DATE

APPDCK

ECNZONEREV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTIOND

SIZE

APPLICABLENOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OFSHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

12345678

12345678

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE








05/18/06IM4,2 - REV APDF DATECSA CONTENTS SYNC MASTER

MASTER2 2 MASTERSystem Block Diagram

39 45 MASTERMASTERFW: DECAPS

40 46 MASTERMASTERFIREWIRE CONNECTORS

41 47 MASTERMASTERUSB Device Interfaces

42 53 MASTERMASTERAIRPORT CONN

47 61 MASTERMASTERNB THERMAL

48 63 01/05/2006M38SPI BOOTROM

49 65 MASTERMASTERFan 0, 1 & System Temp

50 66 MASTERMASTERFan 2 & HD Temp

MASTER3 3 MASTERPower Block Diagram

38 44 MASTERMASTERFW: FW323-06

53 72 05/12/2006AUDIOAUDIO: SPEAKER AMP

54 73 05/12/2006AUDIOAUDIO: CONNECTORS

55 74 05/12/2006AUDIOAUDIO: POWER SUPPLIES

56 75 MASTERMASTERIMVP6 CPU VCore Regulator

PDF CSA CONTENTS DATESYNC MASTER

58 77 (MASTER)(MASTER)PWR GOOD

59 78 (MASTER)(MASTER)3V DC/DC 2.5V

60 79 MASTERMASTER1.8V & 1.2V VREG

61 80 MASTERMASTER1.5V_S0 & 1.05V_S0 VREG

62 82 MASTERMASTER5V DC/DC

63 83 MASTERMASTERS0 AND S3 FETS

64 94 MASTERMASTERInternal Display Conns

65 95 MASTERMASTEREXTERNAL TMDS

66 96 MASTERMASTERTMDS/Inverter/ExtVGA

67 97 MASTERMASTERExternal Display Conns

51 67 01/05/2006M38TPM

52 68 05/12/2006AUDIOAUDIO: CODEC

MASTER23 23 MASTERSB: 3 OF 4

MASTER8 8 MASTERCPU 2 OF 2-PWR/GND

MASTER9 9 MASTERCPU DECAPS & VID<>

MASTER10 10 MASTERCPU TEMP SENSOR

57 76 (MASTER)(MASTER)CPU & SYSTEM SENSE CIRCUITRIES

M3811 11 01/05/2006CPU ITP700FLEX DEBUG

M113 13 01/05/2006NB PEG / Video Interfaces

MASTER14 14 MASTERNB Misc Interfaces

M115 15 01/05/2006NB DDR2 Interfaces

MASTER16 16 MASTERNB Power 1

19 (MASTER)19 (MASTER)NB (GM) Decoupling

20 M120 01/05/2006NB Config Straps

MASTER4 4 MASTERTable Items

M4017 17 01/05/2006NB Power 2

M118 18 01/05/2006NB Grounds

PRODUCTION RELEASED440263A 06/22/0405/18/06

1 97

SCHEM VALLCO

051-7032 A

M3821 21 01/05/2006SB: 1 OF 4

MASTER7 7 MASTERCPU 1 OF 2-FSB

M3824 24 01/05/2006SB: 4 OF 4

MASTER25 25 MASTERSB:DECOUPLING

MASTER26 26 MASTERSB: MISC

MASTER27 27 MASTERSB: SMB HUB AND ALIAS

M112 12 01/05/2006NB CPU Interface

MASTER29 29 MASTERDDR2 SO-DIMM Connector B

MASTER30 30 MASTERMemory Active Termination

MASTER31 31 MASTERMemory Vtt Supply

MASTER32 33 MASTERCLOCKS

MASTER33 34 MASTERCLOCKS: TERMINATIONS

MASTER34 38 MASTERDisk Connectors

MASTER35 41 MASTERETHERNET CONTROLLER

MASTER36 42 MASTERETHERNET MISC

MASTER37 43 MASTERETHERNET CONNECTOR

22 MASTER22 MASTERSB: 2 OF 4

MASTER5 5 MASTERFUNC TEST 1 OF 2

MASTER6 6 MASTERPower Conn / Alias

46 60 12/09/2005M38LPC+ CONN

45 59 (MASTER)(MASTER)SMC & TPM SUPPORT

44 58 01/05/2006M1SMC

5443 MASTERMASTERPCIE PORT ALIASES

MASTER28 28 MASTERDDR2 SO-DIMM Connector APreliminary

DSIZE

OFSHT

DRAWING NUMBER



III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT


12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

J6601 HD TSENS

NB- GTCORE (1.50V)

PAGE 94

6DUAL CHANNEL LVDS - 6BIT

VGA FOR DEBUG

64-BIT

VIDEO

U3301

CK410

PAGE 33

CLOCKS TERMS

PAGE 34

J6000

LPC+ CONNPAGE 60

TPMU6700

J2901 ALS+ATS TSENS

J6500,J6501,J6600 FAN CONNS

J6602 ODD TSENS

FANMLB

U1000 CPU TSENS

U6100 GPU+NB TSENS

PAGE 11

J1101

CONNITP

PAGE 23

GPIOS

PAGE 24

U6300/01

PAGE 63

BOOTROM

RMT

U5800

J2800J2900

DIMM’S CK410M

U3301

AIRPORT

J5300

J5300 (AIRPORT CONN)

PAGE 23

SMB

PAGE 22

USB

BT

CONN

J4700

PAGE 48

65

1

IR

CAMERA

732

PAGE 47

INTERFACEBNDI

3,7

0,2,4

JE350

J5300

40 PAGE 47

USB

CONNECTORS

JE310/JE320/JE330PAGE 67

SMC

PAGE 58

JE000, JE001

4-BIT (3.3V/33MHZ)

LPC

PAGE 21

PAGE 44

FW323-06

PAGE 21

SPI

PAGE 22PAGE 22

DMI

S/PDIF

INTERFACE

BNDI

MIC IN

JE350

PAGE 73

J7300

CONNECTORLINE IN

PORT B

PORT A

PORT C

PAGE 68

STA9221AUDIO CODEC

PORT F

PAGE 73

J7301

AMPPAGE 72

J7303

U6800

SPEAKER

PAGE 153

CONNECTORCOMBO OUT

OPTICAL OUT

LINE OUT

SPEAKERCONNECTOR

AZALIA

21

PCI

PAGE 22

PAGE 46

CONNECTORSFIREWIRE A

0

FIREWIRE A

33MHZ32-BIT

2 Diff pairs

PORT

PORT

PAGE 21

PAGE 28-29

DIMM

J2800

J2900

TERM

PARALLEL

PAGES 30

PAGE 41

U4101

PAGE 43

JD600

4 Diff pairs

CONNECTORETHERNET

GIG ETHERNET

YUKON

X1 - 1.5GHZ

X1 - 1.5GHZ

1.2V/1.5GHZ

AIRPORT

PAGE 53

MINI-PCIE

#1

PAGE 22

PCI-E

#2-5

#0

PORT

UATACONNECTOR

PAGE 38

OPTICAL

JC901

UATA

SATA

PAGE 21

SATA0

HARD DRIVE

PAGE 38

SATA2

SBCORE (1.05V)

13

PAGE

J9402

PAGE 94

LVDS(INTERNAL)(TMDS - VGA)

CPUCORE (~1.2V)

PAGE 8

PAGE 7

(1.83/2.17GHZ)

DDR2 - DUAL CHAN

1.8V/667MHZ

64-BIT

PAGE 16-17

JC900

MAIN MEMORY

SATA

CONTROL = 2.5V

MISC

CORE

1.2V/800MHZ

J0700

FSB

667MHZ

PAGE 12

U1200

PAGE 15

4-BIT

DMIPAGE 14

DMI

U2100

SPI

MINI-DVI

J9700

PAGE 14

CONNECTOR

UATA/66/100

3.3V/66MHZ/133MHZ

System Block Diagram

97

051-7032 A

2

SYNC_MASTER=MASTER SYNC_DATE=MASTER

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PP5V_S5_AUDIO

PAGE 82

2.5V @ 0.9A

ENET

SMC

LCDSB

SPI_BOOTROM

FW

FANS

AUDIO CODECHARD DRIVE

SB_GPIO

ENETTPMBT

PP3V3_S3

PAGE 78

PP3V3_S53.35V @ 4.0A

FET

PAGE 42

2.5V @ ?APP2V5_S3

PAGE 83

PP3V3_S0

FET

TMDSNB_GRAPHICS

2.5V @ 0.426A ???PP2V5_S5

PAGE 78

PP2V5_S0

FETPAGE 83

NB_DRAM

DRAM_IODRAM_CORE

12V, 180W, 15A

S5

TMDS

1.81V @ 10APP1V8_S3

PAGE 79

PP1V8_S0

FETPAGE 83

ENET_CORE

CK410TMDSAIRPORT

ODDPAGE 83

1.21V @ 0.426A

AC/DC POWER SUPPLY

PP1V2_S3

PAGE 79

NB_PCIECPU_AVDD

NB_CORENB_GRAPHICS

SB_IOPP1V5_S0

PAGE 80

1.50V @ 10.12ANB_FSBSB_CORE

CPU_FSB

NB_VTTSB_CPU_IO

PP1V05_S0

PAGE 80

1.05V @ 5.4A

CPU_COREPPVCORE_CPU_S0

PAGE 75

1.3V @ 36AAUDIO(ALTERNATE)

PP12V_S0SPK_AMP

FET

PAGE 83HDD

FWAUDIO(+VREG)

TMDSNB_GRAPHICS

SB

2.5V @ 0.9APP5V_S5

PAGE 82

USB

IRFHB

HDDODDSB

PAGE 83FET

PP5V_S3

PP5V_S0

FETPAGE 83

FANPANEL INVERTER

Power Block Diagram

051-7032 A

973


Preliminary

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM



TABLE_5_ITEM

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

USE BOM OPTION MEROM FOR MEROM PROCESSOR

ALTERNATE PARTS MECHANICAL PARTS

341S1859 IC EFI BOOTROM DEV M50

338S0274

(335S0382)

COMMON OPS REQUESTED QUAL PARTS

337S3280

(335S0384)

M50 1.83G LOW SPEED CPU (D0)337S3242 M38 CPU(C0)

1 CRITICALBT2600BAT,COIN,3V,220MAH,CR2032742-0048

1 IC,CY28445-5,CLK GEN,68PIN QFN U3301 CRITICAL359S0101

IC,88E8053,GIGABIT ENET XCVR,64P QFN,NO U4101 CRITICAL1338S0270

IC,FW32306,1394A LINK,TQFP U44001 CRITICAL338S0279

YONAH_1_831 CRITICAL825-6447 BARCODE LABEL, M50 [EEE:V3M]

MLB1PCB,FAB,MLB,M501820-1960

1341T0021 EFI ROM,M50 CRITICALU6301

U5800 CRITICALIC,SMC,M501341T0022

IC,TPM,TSSOP,28P U67001341S1789 CRITICAL LEMENU

CRITICAL1 IC,CPU VREG,IMVP,TWO PHASE U7500353S1465

378S0141 LED601,LED602,LED603378S0140

U5940353S1278 SMC VREF353S1381

U7500 CPU VREG, NON-SCREENED PART353S1235 353S1465

CRITICAL YONAH_1_83CPU1 M38 CPU (C0)337S3242

U2100IC,SB,652BGA1 CRITICAL343S0385

CRITICAL1725-0720 MYLAR BLACK LED CVR, M50 CVR1

SUBASSY, M50 CPU HEATSINK1603-9186 HS1 CRITICAL

603-9187 1 CRITICALHS2SUBASSY, M50 NB HEATSINK

IC,ENET LAN ROM CRITICALU41021341S1797

IC,CPU-SKT,479BGA511S0025 J0700 CRITICAL1

WASH1MYLAR WASHER1 CRITICAL725-0668

FACTORY SHORTAGE126S0091 126S0092 C625

CRITICAL124-0359 PCAP,120UF,16V,20%,ELEC C6505,C6504,C66023

155S0295 L9703 CRITICAL1 CHOKE,COMMON_MODE,165OHM,4PIN

SYNC_DATE=MASTERSYNC_MASTER=MASTER

A

4 97

051-7032

Table Items

051-7032 1 PCB,SCHEM,MLB,M50 SCH1

IC,945GT,NORTHBRIDGE338S0298 U12001 CRITICAL

Preliminary

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

A

A

A

A

A

A

PP

A

A

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

PPIN

IN

IN

IN

IN

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

IN

IN

IN

IN

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE NEAR R2800 AND R2801

BOTTOM OF THE BOARD.AROUND SLOT ON TOP ANDCONNECT THE SHAPESTHIS TEST POINT USED TO

LAYOUT NOTE: PLACE NEAR U1200 LAYOUT NOTE: PLACE NEAR U4101


LAYOUT NOTE: PLACE NEAR J0700

8 TESTPOINTS


MISC GROUND VIAS

LAYOUT NOTE: PLACE NEAR U2100

INVERTER DOES NOT USE THIS SIGNAL

SPARE USB PORT

P4MMSM OMIT1PP600

P4MMOMITSM1PP607

P4MMOMITSM1PP697

P4MMOMITSM1PP698

SM OMITP4MM

1PP699

P4MMOMITSM1PP6A0

SM OMITP4MM

1PP6A1

SM OMITP4MM

1PP6A3 P4MMOMITSM1PP6A2

SMP4MMOMIT1PP6A4

P4MMOMITSM1PP6A5

P4MMOMITSM1PP6A6

OMITP4MM

SM1PP608

SM OMITP4MM

1PP6A7

P4MMOMITSM1PP6A8

SM OMITP4MM

1PP6B1

SM OMITP4MM

1PP6A9

P4MMOMITSM1PP6B0

P4MMOMITSM1PP6B2

SM OMITP4MM

1PP6B3

P4MMOMITSM1PP6B4

SMP4MMOMIT1PP6B6OMITSMP4MM

1PP6B5

P4MMOMITSM1PP609

P4MMOMITSM1PP6B7

P4MMOMITSM1PP6B8

SM OMITP4MM

1PP6C1

SM OMITP4MM

1PP6B9

P4MMOMITSM1PP6C0

P4MMOMITSM1PP6C2

SM OMITP4MM

1PP6C3

P4MMSM OMIT1PP6C5 P4MM

OMITSM1PP6C4

P4MMOMITSM1PP6C6

SM OMITP4MM

1PP610

P4MMOMITSM1PP6C8

SMP4MMOMIT1PP6C7

SMP4MMOMIT1PP6D0

SM OMITP4MM

1PP6D1

SM OMITP4MM

1PP6D3

P4MMOMITSM1PP6D2

P4MMOMITSM1PP6D4

P4MMOMITSM1PP6D5

P4MMOMITSM1PP6D6

P4MMOMITSM1PP611

P4MMOMITSM1PP6D8 P4MMOMITSM1PP6D7

P4MMOMITSM1PP6D9

SM OMITP4MM

1PP6E0

SM OMITP4MM

1PP612OMITP4MM

SM1PP613SM OMIT

P4MM1PP614SM

P4MMOMIT1PP615

SM OMITP4MM

1PP616

P4MMSM OMIT1PP601

P4MMOMITSM1PP617

P4MMSM OMIT1PP618

P4MMOMITSM1PP619

P4MMSM OMIT1PP632

P4MMSM OMIT1PP631

SM OMITP4MM

1PP6E1

OMITSMP4MM

1PP634

SM-TP50-TOP

1PP1200

SM-TP50-TOP

1PP1201

SM-TP50-TOP

1PP1202

SM-TP50-TOP

1PP700

SM-TP50-TOP

1PP702

SM-TP50-TOP

1PP2800

P4MMOMITSM1PP633

SM-TP50-TOP

1PP2801

SM-TP50-TOP

1PP2802

58 59 60

58 59 60

58 59 60

58 59 60

58 60

7 11

7 11

7 11

7 11

7 11

58 59 60

58 59 60

6 26 59 65 66 76 77 78 79 80 83

6 59 79 80 82 83

6 76 77 78 79 80 82 83

6 79 83

6 75 76

P4MMOMITSM1PP635 21 24 25 26

59

59

26

HOLE-VIA1

ZH500

HOLE-VIA1

ZH501

HOLE-VIA1

ZH502

HOLE-VIA1

ZH503

HOLE-VIA1

ZH504

HOLE-VIA1

ZH505

HOLE-VIA1

ZH506

HOLE-VIA1

ZH507

P4MMOMITSM1PP602

SM OMITP4MM

1PP636

HOLE-VIA1

ZH508

HOLE-VIA1

ZH509

HOLE-VIA1

ZH510

HOLE-VIA1

ZH511

HOLE-VIA1

ZH512

OMITP4MM

SM1PP637

HOLE-VIA1

ZH513

HOLE-VIA1

ZH514

HOLE-VIA1

ZH515

HOLE-VIA1

ZH516

SM OMITP4MM

1PP638

HOLE-VIA1

ZH517

HOLE-VIA1

ZH518

HOLE-VIA1

ZH519

HOLE-VIA1

ZH520

HOLE-VIA1

ZH521

OMITSMP4MM

1PP640

HOLE-VIA1

ZH522

HOLE-VIA1

ZH523

HOLE-VIA1

ZH524

HOLE-VIA1

ZH525

HOLE-VIA1

ZH526

P4MMOMITSM1PP639

HOLE-VIA1

ZH527

HOLE-VIA1

ZH528

HOLE-VIA1

ZH529

OMITP4MM

SM1PP4100SM OMIT

P4MM1PP4101

P4MMOMITSM1PP641

SM OMITP4MM

1PP5E1

P4MMOMITSM1PP5E2

22 58

34

29

29

SM OMITP4MM

1PP669OMITSMP4MM

1PP670

SMP4MMOMIT1PP671

SM OMITP4MM

1PP642

P4MMSM OMIT1PP672

P4MMOMITSM1PP643

P4MMOMITSM1PP645

SM OMITP4MM

1PP644

HOLE-VIA1

ZH599

OMITP4MM

SM1PP603

SM OMITP4MM

1PP648

SM OMITP4MM

1PP646OMITP4MM

SM1PP647

SM OMITP4MM

1PP650 P4MMOMITSM1PP649

OMITP4MM

SM1PP652 P4MMOMITSM1PP651

P4MMOMITSM1PP653

P4MMOMITSM1PP654

SM OMITP4MM

1PP655

P4MMOMITSM1PP620

SM OMITP4MM

1PP657OMITSMP4MM

1PP656

P4MMOMITSM1PP658

P4MMOMITSM1PP660

SM OMITP4MM

1PP659

P4MMOMITSM1PP662OMITSMP4MM

1PP661

SM OMITP4MM

1PP663

P4MMOMITSM1PP623 P4MMOMITSM1PP622P4MM

SM OMIT1PP621

P4MMSM OMIT1PP625

OMITP4MM

SM1PP624

P4MMOMITSM1PP626OMITP4MM

SM1PP627OMITP4MM

SM1PP628

SM OMITP4MM

1PP629

P4MMOMITSM1PP630

P4MMOMITSM1PP664

P4MMOMITSM1PP666

SM OMITP4MM

1PP665

SM OMITP4MM

1PP604

SM OMITP4MM

1PP667

P4MMOMITSM1PP668

P4MMOMITSM1PP673

SM OMITP4MM

1PP674

SM OMITP4MM

1PP675

OMITP4MM

SM1PP677

SMP4MMOMIT1PP605

SM OMITP4MM

1PP676

P4MMSM OMIT1PP678

P4MMOMITSM1PP679

SM OMITP4MM

1PP680

SM OMITP4MM


P4MMOMITSM1PP683

SM OMITP4MM

1PP684

P4MMOMITSM1PP685

P4MMOMITSM1PP686

SMP4MMOMIT1PP606

P4MMOMITSM1PP688

SM OMITP4MM

1PP687

SM OMITP4MM

1PP689

P4MMOMITSM1PP690

SM OMITP4MM

1PP691

OMITSMP4MM


P4MMOMITSM1PP694

SM OMITP4MM

1PP695SM

P4MMOMIT1PP696

FUNC TEST 1 OF 2

051-7032

975

A


FUNC_TEST=TRUE

NO_TEST=TRUEMAKE_BASE=TRUE

NC_PEG_R2D_C_N<8>


NC_PEG_D2R_N<13>NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PEG_D2R_N<12>

NO_TEST=TRUENC_PEG_D2R_N<8>MAKE_BASE=TRUE


NC_PEG_D2R_N<9>


NC_PEG_D2R_N<15>


NC_PEG_D2R_N<11>

NO_TEST=TRUETP_MEM_B_A<15>

NO_TEST=TRUENC_PEG_R2D_C_N<15>MAKE_BASE=TRUE





NC_PEG_R2D_C_N<12>






PEG_R2D_C_N<7>

PEG_R2D_C_N<6>

PEG_R2D_C_N<9>

PEG_R2D_C_N<8>

PEG_R2D_C_N<12>

PEG_R2D_C_N<11>

PEG_R2D_C_N<14>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

PEG_D2R_N<3>

PEG_D2R_N<5>

PEG_D2R_N<6>

PEG_D2R_N<8>

PEG_D2R_N<9>

PEG_D2R_N<10>

PEG_D2R_N<11>

PEG_D2R_N<12>

PEG_D2R_N<13>

PEG_D2R_N<15>





NC_PEG_D2R_N<14>




MEM_A_DQ<39>

MEM_A_DQ<25>

MEM_A_DQ<16>

FSB_D_L<0>

TP_LVDS_BKLTENMAKE_BASE=TRUE

LVDS_BKLTEN

USB_F_N

USB_F_P

=PP1V05_S0_CPU

FUNC_TEST=TRUESMC_TRST_LFUNC_TEST=TRUESMC_TMS

NB_CLK_DREFSSCLKIN_P

FSB_REQ_L<1>

FSB_REQ_L<3>

NB_CLK_DREFCLKIN_P

NB_CLK_DREFCLKIN_N

NB_CLK100M_GCLKIN_N

NB_CLK100M_GCLKIN_P

MEM_B_DQS_N<7>

MEM_B_DQS_P<7>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>

MEM_B_DQS_N<5>

MEM_B_DQS_P<5>

MEM_B_DQS_N<4>

MEM_B_DQS_P<4>

MEM_B_DQS_N<3>

MEM_B_DQS_P<3>

MEM_B_DQS_N<2>

MEM_B_DQS_P<2>

MEM_B_DQS_N<1>

MEM_B_DQS_P<1>

MEM_B_DQS_N<0>

MEM_B_DQS_P<0>

MEM_B_DQ<48>

MEM_B_DQ<62>

MEM_B_DQ<44>

MEM_B_DQ<38>

MEM_B_DQ<25>

MEM_B_DQ<8>

MEM_B_DQ<23>

MEM_B_DQ<6>

MEM_A_DQS_N<7>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_P<5>

MEM_A_DQS_N<4>

MEM_A_DQS_N<3>

MEM_A_DQS_P<4>

MEM_A_DQS_P<3>

MEM_A_DQS_N<2>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_DQS_P<0>

MEM_A_DQ<59>

MEM_A_DQ<47>

MEM_A_DQ<54>

MEM_A_DQ<7>

MEM_A_DQ<14>

MEM_VREF_NB_1

MEM_VREF_NB_0

DMI_S2N_P<0>

DMI_S2N_N<0>

NB_CLK_DREFSSCLKIN_N

CPU_NMI

FSB_CLK_CPU_P

CPU_INTR

CPU_STPCLK_L

CPU_A20M_L

CPU_INIT_L

FSB_DSTBP_L<2>

FSB_DSTBN_L<2>

FSB_DINV_L<1>

FSB_DSTBP_L<1>

FSB_DSTBN_L<1>

FSB_D_L<16>

FSB_DINV_L<0>

FSB_D_L<16>

FUNC_TEST=TRUEPP12V_S5

NO_TEST=TRUETP_MEM_B_A<14>

NO_TEST=TRUETP_PCI_CLK_SPARE

NO_TEST=TRUESPI_ARB

FSB_DINV_L<0>

FSB_DSTBP_L<0>

FSB_DSTBN_L<0>

FSB_D_L<0>

FSB_DSTBN_L<3>

FSB_REQ_L<4>

FSB_CLK_NB_P

FSB_A_L<6>

FSB_ADSTB_L<1>

SB_CLK48M_USBCTLR

SB_CLK14P3M_TIMER

PM_SYSRST_L

SB_CLK100M_DMI_N

SB_CLK100M_DMI_P

DMI_N2S_P<0>

PCIE_B_D2R_N

PCIE_B_D2R_P

PCIE_A_D2R_P

PCIE_A_D2R_N

ENET_CLK100M_PCIE_P

ENET_CLK100M_PCIE_N

FSB_BREQ0_L

IDE_PDIOR_L

SB_CLK100M_SATA_N

IDE_PDD<9>

PCI_CLK_SB

IDE_PDIORDY

MEM_VREF

NB_FSB_VREF

FSB_DSTBP_L<1>

FSB_A_L<27>

FSB_DSTBN_L<0>

FSB_DINV_L<2>

FSB_CLK_NB_N

FSB_DINV_L<1>

CPU_SMI_L

FSB_CLK_CPU_N

FSB_ADSTB_L<0>

FSB_A_L<27>

FSB_A_L<6>

FSB_LOCK_L

SB_CLK100M_SATA_P

FSB_REQ_L<0>

FSB_DPWR_L

FSB_REQ_L<2>

FSB_DSTBN_L<1>

FSB_DSTBN_L<2>

FSB_D_L<41>

FSB_DSTBP_L<3>

FSB_DINV_L<3>

CPU_IGNNE_L

FSB_BNR_L

FSB_HIT_L

FSB_HITM_L

FSB_CPURST_L

FSB_LOCK_L

FSB_DSTBP_L<3>

FSB_DINV_L<3>

FSB_D_L<59>

FSB_DINV_L<2>

FSB_DSTBN_L<3>

FUNC_TEST=TRUESMC_TCK

FUNC_TEST=TRUESMC_TDI

FUNC_TEST=TRUESMC_TDO

FUNC_TEST=TRUESMC_TX_L

FUNC_TEST=TRUEPP1V8_S3

FUNC_TEST=TRUEPP5V_S5FUNC_TEST=TRUEPP3V3_S5

FUNC_TEST=TRUEPPVCORE_CPU

FUNC_TEST=TRUEXDP_TCK

FUNC_TEST=TRUEXDP_TDI

FUNC_TEST=TRUEXDP_TMS

FUNC_TEST=TRUEXDP_TRST_L

FUNC_TEST=TRUESMC_RX_L

FUNC_TEST=TRUESMC_MANUAL_RST_L

FUNC_TEST=TRUEPOWER_BUTTON_L

FUNC_TEST=TRUEPP3V3_S5_SB_RTC

PM_CLKRUN_L

DMI_N2S_N<0>

FUNC_TEST=TRUEXDP_TDO

FUNC_TEST=TRUESW_RST_BTN_L

FSB_ADSTB_L<0>

NB_RST_IN_L_R

FSB_DSTBP_L<2>

FSB_D_L<59>

=PP1V05_S0_FSB_NB

TP_USB_F_PMAKE_BASE=TRUE

TP_USB_F_NMAKE_BASE=TRUE

PEG_D2R_N<14>

PEG_D2R_N<7>

PEG_D2R_N<4>

PEG_R2D_C_N<10>

PEG_R2D_C_N<4>

PEG_R2D_C_N<5>NO_TEST=TRUENC_PEG_R2D_C_N<4>

MAKE_BASE=TRUE

VR_PWRGOOD_DELAY

FSB_DBSY_L

FSB_D_L<41>

FSB_DSTBP_L<0>

FSB_ADSTB_L<1>

TP_SLOT

=PP1V8_S3_MEM

11

67

9

60

12

8

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

58

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

58

12

12

12

19

75

12

12

12

29

28

28

28

7

7

34

12

12

34

34

34

34

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

19

19

22

22

34

21

34

21

21

21

21

7

7

7

7

7

7

7

7

7

7

7

7

7

12

34

7

7

34

34

26

34

34

22

54

54

54

54

41

41

12

38

34

38

34

38

29

7

7

7

7

34

7

21

34

7

7

7

7

34

12

12

12

7

7

7

7

7

21

12

12

12

11

7

7

7

7

7

7

44

22

7

7

7

12

26

12

7

7

7

28

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

13

15

15

15

5

13

22

22

6

14

7

7

14

14

14

14

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

15

14

14

14

14

14

7

7

7

7

7

7

5

5

5

5

5

5

5

5

5

5

5

5

5

7

12

5

5

23

23

23

22

22

14

22

22

22

22

34

34

7

21

21

21

22

21

28

12

5

5

5

5

12

5

7

7

5

5

5

5

21

7

7

7

5

5

5

5

5

7

7

7

7

7

5

5

5

5

5

5

23

14

5

14

5

5

6

13

13

13

13

13

13

14

7

5

5

5

6

Preliminary

125

125

125

125

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

HDD POWER CONNCHASSIS GND

"S3" RAILS

USING S3 TO DRIVE S0 OK IN THIS CASE

USING S3 TO DRIVE S0 OK IN THIS CASE

"S0" RAILS

ON IN RUN AND SLEEPONLY ON IN RUN

SILKSCREEN:2

GND RAILS

"S5" RAILS

AC/DC CONN

SILKSCREEN:1SILKSCREEN:RUNSILKSCREEN:3

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)

OMITSM

21

XW601

OMITSM

21

XW602CRITICAL

74LC125

TSSOP

314

17

2

U600

0.1UF

CERM402

20%10V2

1 C600

2.0X1.25MM-SMGREEN-3.6MCD

2

1

LED601

OMITSM

21

XW604

OMITSM

21

XW605

4P25R3P5

OMIT

1

ZH601

OMIT

4P25R3P51

ZH602

OMIT

4P25R3P51

ZH603

NOSTUFF

20%0.01UF

CERM16V

4022

1 C601

NOSTUFF

0.01UF

CERM402

16V20%

2

1 C602

NOSTUFF

0.01UF

CERM16V20%

4022

1 C603MF-LF

5%1/16W

402

330

2

1R602

5%

402MF-LF1/16W

0

NOSTUFF

21

R603

OMIT

4P25R3P51

ZH604

0.01UF

NOSTUFF

402

20%

CERM16V2

1 C604

160R138

OMIT

1

ZH606

TSSOP

CRITICAL

74LC1256

14

47

5

U600

TSSOP

74LC125

CRITICAL

814

107

9

U600

74LC125

CRITICAL

TSSOP

1114

137

12

U600

MF-LF1/16W

68

5%402

21

R612

1/16WMF-LF

68

5%402

21

R611

68

MF-LF1/16W

4025%

21

R614

1/16WMF-LF

68

5%402

21

R615

MF-LF1/16W

68

4025%

21

R616

1/16WMF-LF

68

5%402

21

R617

MF-LF402

68

1/16W5%

21

R618

4025%

68

MF-LF1/16W

21

R619

MF-LF

5%1/16W

402

330

2

1R600


2

1

LED602

MF-LF

DEVELOPMENT

1/16W

402

5%330

2

1R605

GREEN-3.6MCD2.0X1.25MM-SM

DEVELOPMENT

2

1

LED600

I632

NOSTUFF

0.1UF

603

20%25VCERM2

1 C621

603

20%25VCERM

0.1UF

2

1 C620

10UF10%

1210CERM16V

2

1 C62410UF

CERM

NOSTUFF

20%

805-2

10V2

1 C622

CERM10V

10UF20%

805-22

1 C623

GREEN-3.6MCD2.0X1.25MM-SM2

1

LED603

MF-LF1/16W

402

3305%

2

1R601

CRITICAL

88737-0553M-ST-SM

5

4

3

2

1

J602

6.3X5.5-SMELEC16V20%100UF

CRITICAL

2

1 C625

M-RT-TH2

CRITICAL

39-30-3058

5

4

3

2

1

J601

Power Conn / Alias

051-7032

6 97

A


=PP1V5_S0_CPU

=PP1V5_S0_NB_3GPLL

=PP1V5_S0_SB_VCCUSBPLL

=PP1V5_S0_AIRPORT

=PP1V8_S0_TMDS

=PP5V_S0_SATA

=PP5V_S0_DEBUG

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUEVOLTAGE=5V

PP5V_S0

=PP5V_S0_PATA

=PP5V_S0_SB

=PP4V5_S0_AUDIO_ANALOG

=PP12V_S0_FAN

PP12V_S0_AUDIO_SPKRAMPMAKE_BASE=TRUE

MAKE_BASE=TRUEVOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

PP4V5_S0_AUDIO_ANALOG

=PP3V3_S0_NB

=PP3V3_S0_TMDS

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_AIRPORT

=PP3V3_S0_PCI

=PP3V3_S0_AUDIO

=PP3V3_S0_IMVP

=PP3V3_S0_CK410

=PPSPD_S0_MEM

=PP3V3_S0_TPM

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_HD_TSENS

=PP3V3_S0_ODD_TSENS

=PP3V3_S0_FAN

=PP3V3_S0_PATA

=PP3V3_S0_SB_PM

=PP3V3_S0_SB_PCI

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_VCC3_3_PCI

=PP3V3_S0_SB_VCC3_3

=PP3V3_S0_SB

=PP3V3_S0_SB_GPIO

=PP3V3_S0_NB_VCC_HV

=PP3V3_S0_LCD

=PP3V3_S0_SATA

MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_LINE_WIDTH=0.6MM

PP3V3_S0

=PP2V5_S0_NB_VCCA_LVDS

VOLTAGE=5VMAKE_BASE=TRUE

PP5V_S5

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

=PP2V5_S0_TMDS

=PP2V5_S0_NB_DISP_PLL

=PP2V5_S0_NB_VCCSYNC

=PP2V5_S0_NB_VCC_TXLVDS

MAKE_BASE=TRUE


VOLTAGE=12V

PP12V_S5


MAKE_BASE=TRUE

GND_CHASSIS_BNDI

VOLTAGE=0

PP1V05_S0

MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.3MMVOLTAGE=1.05VMAKE_BASE=TRUE

=PP12V_S5_CPU

=PP12V_S5_FW

=PP3V3_S5_SMC

=PP3V3_S5_DEBUG

=PP3V3_S5_ROM

=PP3V3_S5_LCD

=PP5V_S5_SB

=PP5V_S5_AUDIO_LDO

=PP5V_S3_BNDI

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM

PP3V3_S5

=PP3V3_S5_2V5_LDO

=PP3V3_S5_SB_IO

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_USB

=PP3V3_S5_SB

=PP5V_S0_MEMVTT

VOLTAGE=5VMIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE


PP5V_S3

=PP3V3_S3_BT

=PP1V8_S3_1V2_LDO

=PP1V8_S3_MEM

=PP3V3_S3_ENET

PLT_RST_L

POWER_GOOD

GND_CHASSIS_ODD_TEMP

GND_CHASSIS_AUDIO_INTERNAL

ZH704P1

=PP1V8_S3_MEM_NB

=PP1V5_S0_SB_VCC1_5_A_ARX


MAKE_BASE=TRUEVOLTAGE=1.8V

PP1V2_S3

=PP5V_S0_NBISENSE

=PP1V5_S0_NB_VCCD_LVDS

=PP5V_S5_AUDIOPP5V_S5_AUDIOMAKE_BASE=TRUE

=PP3V3_S5_FW

=PP3V3_S5_SB_PM

=PP1V5_S0_NB_PLL

=PP1V5_S0_NB_VCCAUX

=PPVCORE_S0_SB

=PP3V3_S3_TPM=PP1V05_S0_SB_CPU_IO

=PP1V05_S0_NB_VTT

=PP1V05_S0_FSB_NB

=PP5V_S0_NB_TVDAC

=PPVCORE_S0_CPU

PP3V3_LCD_CONN

LCD_SHOULD_ON ITS_RUNNING

PP3V3_S0

=PP5V_S0_TMDS

=PP12V_INVERTER

=PP12V_S0_SATA

=PP12V_S0_AUDIO_SPKRAMPMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM


PP12V_S0

=PP1V2_S3_LAN

=PP5V_S3_USB

=PP1V5_S0_NB_TVDAC

SYS_POWERFAIL_L

GND_CHASSIS_AUDIO_EXTERNAL

PP3V3_S5

U600_6

MIN_LINE_WIDTH=0.6MM



PPVCORE_CPU

PP0V9_S0


MAKE_BASE=TRUE


VOLTAGE=0.9V

U600_3

U600_8

U600_11

SMC_LRESET_L

NB_RST_IN_L

TMDS_RESET_L

ENET_RST_L

TPM_LRESET_L

AIRPORT_RST_L

DEBUG_RST_L

GND_AUDIO

GND_AUDIO_SPKRAMP

GND_CHASSIS_USB

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0MAKE_BASE=TRUE

GND_CHASSIS_IO_LEFT

GND_CHASSIS_FIREWIRE

GND_CHASSIS_VGA

GND_CHASSIS_RJ45

MAKE_BASE=TRUE


VOLTAGE=0

GND_CHASSIS_IO_RIGHT

ZH702P1

ZH703P1

PP3V3_S5

ITS_PLUGGED_IN

PP3V3_S3

ITS_ALIVE

=PP0V9_S0_MEM_TERM

=PP0V9_S0_MEMVTT_LDO

GPU_PWM_RST_L

=PP1V05_S0_CPU

=PP1V5_S0_SB

=PP1V8_S0_MEMVTT



PP1V8_S3



PP3V3_S3

ZH701P1

=PP2V5_S0_NB_VCCA_3GBG


=PP1V5_S0_NB_VCCD_HMPLL

=PPVCORE_S0_NB

=PP1V5_S0_NB_PCIE

=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCC1_5_A


MAKE_BASE=TRUEVOLTAGE=0


PP1V5_S0

PP1V8_S0

VOLTAGE=3.3VMAKE_BASE=TRUE



VOLTAGE=3.3VMAKE_BASE=TRUE


PP2V5_S0

=PP2V5_S0_NB_CRTDAC

=PP3V3_S0_SATA

=PP12V_S0_SATA

ZH702P1

=PP5V_S0_SATA

=PP1V5_S0_SB_VCCSATAPLL

POWER_GOOD

PP12V_S5_AC_DC

83

83

83

80

80

80

79

79

79

94

78

94

78

78

83

83

77

83

77

77

76

82

76

76

76

76

61

83

80

66

61

66

66

59

82

79

65

59

65

65

11

74

41

80

78

59

41

59

59 83

9

83

20

97

73

66

27

26

79

19

77

26 26

29

43

19

19

46

25

19

76

26

82

26

76

26 59

8

83

59

19

19

25

83

66

19

96

25

72

29

25

65

25

25

25

25

23

19

10

19

59

17

76

80

59

6

27

25

25

25

83

28

42

16

25

17

45

23

25

24

19

12

9

10

83

19

78

6

75

74

6 53

30

7

79

53

19

17

19

19

19

19

25

25

25

17

25

8

19

24

53

95

6

60

75

38

25

68

65

83

14

95

24

53

44

68

75

33

28

67

24

66

66

59

38

26

26

24

24

24

22

21

17

94

6

6

17

5

95

19

19

6

5

47

34

76

46

58

60

63

94

25

82

47

5

78

22

24

24

24

22

23

31

59

47

79

5

41

22

6

66

73

14

24

79

80

6

68

44

11

19

19

24

67 21

17

5

19

8

94 6

97

94

6

72

76

42

47

6

76

73

5

5

58

14

95

42

67

53

60

74

72

47

46

97

43

6

5 6

29

31

94

5

25

31

5

6

17

6

17

16

13

6

19

24

24

24

80

83

6 83

19

6

6

6

6

24

6

76

Preliminary

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

IN

IN

IN

IN

IN

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

A3*

A4*

A5*

A6*

A8*

A10*

A11*

A12*

A13*

A16*

A15*

A14*

ADSTB0*

REQ2*

REQ0*

REQ1*

REQ3*

REQ4*

A17*

A18*

A19*

A20*

A21*

A23*

A22*

A24*

A25*

A26*

A29*

A28*

A27*

A31*

A30*

ADSTB1*

A20M*

FERR*

IGNNE*

STPCLK*

LINT1

LINT0

SMI*

RSVD10

RSVD9

RSVD5

RSVD4

RSVD3

RSVD2

RSVD1

RSVD8

RSVD7

RSVD6

RSVD11

ADS*

BNR*

BPRI*

DEFER*

DRDY*

DBSY*

BR0*

IERR*

INIT*

LOCK*

RESET*

RS0*

RS1*

RS2*

TRDY*

HIT*

HITM*

BPM0*

BPM2*

BPM1*

BPM3*

PRDY*

PREQ*

TCK

TDI

TDO

TMS

TRST*

DBR*

PROCHOT*

THERMDA

THERMDC

THERMTRIP*

RSVD12

RSVD13

RSVD16

RSVD19

RSVD18

RSVD17

RSVD20

BCLK0

BCLK1

RSVD15

RSVD14

A7*

A9*

ADDR GROUP0

XDP/ITP SIGNALS

CONTROL

ADDR GROUP1

RESERVED

HCLK

THERM

(1 OF 4)

PSI*

SLP*

PWRGOOD

DPRSTP*

DPSLP*

DPWR*

COMP2

COMP3

COMP1

COMP0

DSTBP3*

DSTBN3*

DINV3*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D52*

D53*

D51*

D50*

D49*

D48*

DINV2*

DSTBN2*

D47*

DSTBP2*

D45*

D46*

D44*

D43*

D42*

D41*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

BSEL2

DSTBN1*

BSEL0

BSEL1

TEST2

GTLREF

DINV1*

DSTBP1*

D31*

D30*

D29*

D26*

D27*

D28*

D24*

D25*

D23*

D21*

D22*

D20*

D19*

D18*

D16*

D17*

DINV0*

DSTBP0*

DSTBN0*

D15*

D14*

D13*

D12*

D11*

D10*

D9*

D8*

D7*

D6*

D5*

D4*

D3*

D2*

D1*

D0*

TEST1

NC

(2 OF 4)

MISC

DATA GRP0

DATA GRP2

DATA GRP1

DATA GRP3

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LAYOUT NOTE:

COMP1,3 CONNECT WITH ZO=55OHM, MAKE

COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE

TRACE LENGTH SHORTER THAN 0.5".

TRACE LENGTH SHORTER THAN 0.5".

CPU IS HOT

AND CPU VR TO INFORM

CPU_PROCHOT_L TO SMC

CONNECTOR, NEED TERM

NO SPACE FOR ITP

ON ITP SIGNALS?

FSB_IERR# WITH A GND

SYMBOL NEED TO CHECK

0.1" AWAY

PLACE TESTPOINT ON

SHOULD CONNECT TO

PM_THRMTRIP#

ICH6-M AND GMCH

WITHOUT T-ING (NO

STUB)

NOTE: DUMMY PINPIN ACTUALLY DRIVEN BY ITP

LAYOUT NOTE: 0.5" MAX LENGTH

CPU SCH AND PCB

TP_CPU_M_TEST4

PLACE GND VIA W/IN 1000 MILS

ROUTE TO TP VIA AND

SPARE[7-0],HFPLL:

TP_CPU_M_TEST3

NO STUFF R0701 IF USING ITP

1/16W

402MF-LF

54.91%

2

1R0703

68

1/16W5%

402MF-LF

2

1R0704

1K

MF-LF402

1%1/16W

2

1R0705

2.0K

MF-LF402

1%1/16W

2

1R0706

1/16W1%

402MF-LF

54.921

R0720

1/16W

402MF-LF

54.9

1%

21

R0721

1/16W1%

402MF-LF

54.921

R0722

54.9

4021%

21R0719

27.421R0718

54.9

4021%

21R0717

402

27.421R0716

NOSTUFF

402

021

R0730

NOSTUFF

1/16W5%

402MF-LF

1K

2

1R071251

1/16W5%

402MF-LF

2

1R0707

OMIT

CPUYONAH-SKT

BGA

AB6

G2

AB5

C7

A25

A24

AB3

AA6

AC5

D5

A3

B2

V3

T2

N5

M4

AA3

AB2

C24

AA4

C23

D22

AF1

C1

D3

F6

D2

T22

B25

C3

AA1

G3

F4

F3

B1

L5

J3

K2

H2

K3

D21

AC1

AC2

H4

B4

C6

B3

C4

D20

E4

G6

A5

F21

H5

E1

C20

F1

G5

AC4

AD1

AD3

AD4

E2

A21

A22

V4

L2

H1

J1

N2

M1

K5

M3

L4

Y1

W2

J4

Y4

W5

W3

T3

T5

R4

U2

Y5

U4

A6

W6

R3

U5

Y2

R1

P1

P4

L1

P2

P5

N3

J0700

OMIT

YONAH-SKTCPUBGA

D25

C26

D7

D6

AE6

A2

AD26

AE24

Y25

N25

G22

AD23

W24

M24

H23

D24

B5

E5

AC20

V23

M26

J26

G24

K24

E23

AF26

AF22

AF25

AE25

E25

AD21

AE21

AD24

AF23

AE22

AD20

AC25

AB21

AA21

AB22

G25

AC23

AC22

AA24

AC26

Y22

Y26

AA26

Y23

W22

AB25

F23

U22

U25

U23

W25

V26

V24

AB24

AA23

N24

T25

H22

L26

R24

T24

P23

P22

P25

M23

L23

L22

L25

E26

R23

P26

K25

N22

H25

K22

F26

H26

J23

J24

F24

E22

V1

U1

U26

R26

C21

B23

B22

J0700

402MF-LF1/16W

54.91%

2

1R0702

54.9

MF-LF402

1%1/16W

2

1R0701


CPU 1 OF 2-FSB

7

A051-7032

97

CPU_INIT_L

FSB_BREQ0_L

=PP1V05_S0_CPU

FSB_A_L<6>

TP_CPU_A39_L

TP_CPU_EXTBREF

TP_CPU_A32_L

TP_CPU_SPARE0

XDP_BPM_L<2>

XDP_TDI

XDP_TRST_L

FSB_RS_L<2>

XDP_BPM_L<5>

XDP_BPM_L<4>

=PP1V05_S0_CPU

CPU_PROCHOT_L

FSB_DINV_L<0>

XDP_BPM_L<3>

CPU_PWRGDXDP_TDI

XDP_TCK

XDP_TMS

=PP1V05_S0_CPU

=PP1V05_S0_CPU

FSB_A_L<3>

FSB_A_L<4>

FSB_A_L<5>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<10>

FSB_A_L<11>

FSB_A_L<12>

FSB_A_L<13>

FSB_A_L<16>

FSB_A_L<15>

FSB_A_L<14>

FSB_ADSTB_L<0>

FSB_REQ_L<2>

FSB_REQ_L<0>

FSB_REQ_L<1>

FSB_REQ_L<3>

FSB_REQ_L<4>

FSB_A_L<17>

FSB_A_L<18>

FSB_A_L<19>

FSB_A_L<20>

FSB_A_L<21>

FSB_A_L<23>

FSB_A_L<22>

FSB_A_L<24>

FSB_A_L<25>

FSB_A_L<26>

FSB_A_L<29>

FSB_A_L<28>

FSB_A_L<27>

FSB_A_L<31>

FSB_A_L<30>

FSB_ADSTB_L<1>

CPU_A20M_L

CPU_FERR_L

CPU_IGNNE_L

CPU_STPCLK_L

CPU_NMI

CPU_INTR

CPU_SMI_L

TP_CPU_APM1_L

TP_CPU_APM0_L

TP_CPU_A36_L

TP_CPU_A35_L

TP_CPU_A34_L

TP_CPU_A33_L

TP_CPU_A38_L

TP_CPU_A37_L

TP_CPU_HFPLL

FSB_ADS_L

FSB_BNR_L

FSB_BPRI_L

FSB_DEFER_L

FSB_DRDY_L

FSB_DBSY_L

FSB_LOCK_L

FSB_CPURST_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_TRDY_L

FSB_HIT_L

FSB_HITM_L

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_TCK

XDP_TDO

XDP_TMS

XDP_DBRESET_L

CPU_THERMD_P

CPU_THERMD_N

PM_THRMTRIP_L

TP_CPU_SPARE6

TP_CPU_SPARE5

FSB_CLK_CPU_P

FSB_CLK_CPU_N

TP_CPU_SPARE1

FSB_A_L<7>

CPU_TEST1

FSB_D_L<0>

FSB_D_L<1>

FSB_D_L<2>

FSB_D_L<3>

FSB_D_L<4>

FSB_D_L<5>

FSB_D_L<6>

FSB_D_L<7>

FSB_D_L<8>

FSB_D_L<9>

FSB_D_L<10>

FSB_D_L<11>

FSB_D_L<12>

FSB_D_L<13>

FSB_D_L<14>

FSB_D_L<15>

FSB_DSTBN_L<0>

FSB_D_L<17>

FSB_D_L<16>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20>

FSB_D_L<22>

FSB_D_L<21>

FSB_D_L<23>

FSB_D_L<25>

FSB_D_L<24>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<29>

FSB_D_L<30>

FSB_D_L<31>

FSB_DSTBP_L<1>

FSB_DINV_L<1>

CPU_TEST2

CPU_BSEL<1>

CPU_BSEL<0>

FSB_DSTBN_L<1>

CPU_BSEL<2>

FSB_D_L<32>

FSB_D_L<33>

FSB_D_L<34>

FSB_D_L<35>

FSB_D_L<36>

FSB_D_L<37>

FSB_D_L<38>

FSB_D_L<39>

FSB_D_L<40>

FSB_D_L<41>

FSB_D_L<42>

FSB_D_L<43>

FSB_D_L<44>

FSB_D_L<46>

FSB_D_L<45>

FSB_DSTBP_L<2>

FSB_D_L<47>

FSB_DSTBN_L<2>

FSB_DINV_L<2>

FSB_D_L<48>

FSB_D_L<49>

FSB_D_L<50>

FSB_D_L<51>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<54>

FSB_D_L<55>

FSB_D_L<56>

FSB_D_L<57>

FSB_D_L<58>

FSB_D_L<59>

FSB_D_L<60>

FSB_D_L<61>

FSB_D_L<62>

FSB_D_L<63>

FSB_DINV_L<3>

FSB_DSTBN_L<3>

FSB_DSTBP_L<3>

CPU_COMP<0>

CPU_COMP<1>

CPU_COMP<3>

CPU_COMP<2>

FSB_DPWR_L

CPU_DPSLP_L

CPU_DPRSTP_L

FSB_SLPCPU_L

CPU_PSI_L

FSB_DSTBP_L<0>

FSB_IERR_L

CPU_GTLREF

TP_CPU_SPARE2

TP_CPU_SPARE3

TP_CPU_SPARE4

TP_CPU_SPARE7

11

11

11

11

9

9

9

9

8

8

8

8

7

11

7

11

11

11

7

7

12

11

11

59

21

12

6

12

7

11

6

12

7

7

7

6

6

12

12

12

12

12

12

12

12

21

21

21

21

21

21

12

12

12

11

12

12

7

11

7

26

21

34

34

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

75

12

5

5

5

5

11

5

5

12

11

11

5

59

5

11

21 5

5

5

5

5

12

12

12

12

12

12

12

12

12

12

12

12

5

5

5

5

5

5

12

12

12

12

12

12

12

12

12

12

12

12

5

12

12

5

5

21

5

5

5

5

5

12

5

12

12

12

5

5

5

12

12

12

5

5

11

11

5

5

5

11

10

10

14

5

5

12

5

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

5

12

5

12

12

12

12

12

12

12

12

12

12

12

12

12

12

5

5

34

34

5

34

12

12

12

12

12

12

12

12

12

5

12

12

12

12

12

5

12

5

5

12

12

12

12

12

12

12

12

12

12

12

5

12

12

12

12

5

5

5

5

21

21

12

75

5

Preliminary

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

VCC_67

VCC_64

VCC_66

VCC_65

VCC_63

VCC_62

VCC_61

VCC_59

VCC_60

VCC_58

VCC_57

VCC_56

VCC_54

VCC_55

VCC_53

VCC_51

VCC_52

VCC_49

VCC_50

VCC_48

VCC_47

VCC_46

VCC_44

VCC_45

VCC_43

VCC_41

VCC_42

VCC_40

VCC_39

VCC_38

VCC_36

VCC_37

VCC_33

VCC_35

VCC_34

VCC_31

VCC_32

VCC_29

VCC_30

VCC_28

VCC_26

VCC_27

VCC_23

VCC_25

VCC_24

VCC_22

VCC_21

VCC_20

VCC_18

VCC_19

VCC_17

VCC_16

VCC_15

VCC_13

VCC_14

VCC_12

VCC_10

VCC_11

VCC_8

VCC_9

VCC_7

VCC_6

VCC_5

VCC_3

VCC_4

VCC_2

VCC_1 VCC_68

VCC_69

VCC_71

VCC_70

VCC_72

VCC_74

VCC_76

VCC_75

VCC_78

VCC_77

VCC_79

VCC_81

VCC_80

VCC_84

VCC_82

VCC_83

VCC_86

VCC_85

VCC_87

VCC_89

VCC_88

VCC_90

VCC_91

VCC_92

VCC_94

VCC_93

VCC_95

VCC_96

VCC_97

VCC_99

VCC_98

VCC_100

VCCP_1

VCCP_2

VCCP_3

VCCP_4

VCCP_5

VCCP_6

VCCP_7

VCCP_9

VCCP_8

VCCP_11

VCCP_10

VCCP_12

VCCP_13

VCCP_14

VCCP_16

VCCP_15

VCCA

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VSSSENSE

VCCSENSE

VCC_73(3 OF 4)

VSS_82

VSS_83

VSS_84

VSS_85

VSS_87

VSS_86

VSS_88

VSS_89

VSS_90

VSS_92

VSS_91

VSS_93

VSS_94

VSS_95

VSS_97

VSS_96

VSS_100

VSS_98

VSS_99

VSS_102

VSS_101

VSS_105

VSS_103

VSS_104

VSS_106

VSS_107

VSS_110

VSS_109

VSS_108

VSS_111

VSS_112

VSS_115

VSS_114

VSS_113

VSS_116

VSS_117

VSS_118

VSS_120

VSS_119

VSS_123

VSS_121

VSS_122

VSS_124

VSS_125

VSS_128

VSS_126

VSS_127

VSS_129

VSS_130

VSS_133

VSS_131

VSS_132

VSS_134

VSS_135

VSS_138

VSS_136

VSS_137

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_146

VSS_144

VSS_145

VSS_147

VSS_148

VSS_151

VSS_150

VSS_149

VSS_152

VSS_153

VSS_156

VSS_155

VSS_154

VSS_157

VSS_158

VSS_159

VSS_161

VSS_160

VSS_162

VSS_1

VSS_2

VSS_3

VSS_5

VSS_4

VSS_6

VSS_7

VSS_8

VSS_10

VSS_9

VSS_11

VSS_12

VSS_15

VSS_13

VSS_14

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_23

VSS_22

VSS_21

VSS_24

VSS_25

VSS_28

VSS_27

VSS_26

VSS_29

VSS_30

VSS_33

VSS_32

VSS_31

VSS_34

VSS_35

VSS_38

VSS_37

VSS_36

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_46

VSS_44

VSS_45

VSS_47

VSS_48

VSS_51

VSS_49

VSS_50

VSS_52

VSS_53

VSS_56

VSS_54

VSS_55

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_63

VSS_62

VSS_64

VSS_65

VSS_66

VSS_69

VSS_68

VSS_67

VSS_70

VSS_71

VSS_74

VSS_73

VSS_72

VSS_75

VSS_76

VSS_79

VSS_78

VSS_77

VSS_80

VSS_81

(4 OF 4)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LAYOUT NOTE:

TO CONNECT A DIFFERENCTIAL PROBE

TRANSMISSION LINE

RESISTORS TERMINATE THE 55 OHM

LOCATION WHERE THE TWO 54.9 OHM

BETWEEN VCCSENSE AND VSSSENSE AT THE

PROVIDE A TEST POINT (WITH NO STUB)

TO VCCSENSE_P/N WITH NO STUB

LAYOUT NOTE: CONNECT R0802-03

VCCA=1.5 ONLY

0.01UF

CERM402

20%16V

2

1C0800

6.3V20%10UF

CERM805-1

2

1 C0801

1/16W1%

402MF-LF

100

2

1R0803

1/16W1%

402MF-LF

100

2

1R0802

YONAH-SKT

BGACPU

OMIT

AE7

AE2

AF2

AE3

AF4

AE5

AF5

AD6

AF7

N21

M21

K21

J21

M6

K6

J6

G21

W21

V21

T6

T21

R6

R21

N6

V6

B26

AF18

AF17

AF15

AF14

AF12

AF10

AF9

AE20

AE18

AE17

A20

AE15

AE13

AE12

AE10

AE9

AD18

AD17

AD15

AD14

AD12

A18

AD10

AD9

AD7

AC18

AC17

AC15

AC13

AC12

AC9

AC7

A17

AB7

AB20

AB18

AB17

AB15

AB14

AB12

AB10

AC10

AB9

A15

AA20

AA18

AA17

AA15

AA13

AA12

AA10

AA9

AA7

F20

A13

F18

F17

F15

F14

F12

F10

F9

F7

E20

E18

A12

E17

E15

E13

E12

E10

E9

E7

D18

D17

D15

A10

D14

D12

D10

D9

C18

C17

C15

C13

C12

C10

A9

C9

B20

B18

B17

B15

B14

B12

B10

B9

AF20

B7

A7 J0700

BGA

YONAH-SKT

CPU

OMIT

V22

V5

V2

U24

U21

U6

U3

T26

T23

T4B6

T1

R25

R22

R5

R2

P24

P21

P6

P3

N26

A26

N23

N4

N1

M25

M22

M5

M2

L24

L21

L6

A23

L3

K26

K23

K4

K1

J25

J22

J5

J2

H24

A19

H21

H6

H3

G26

G23

G1

G4

F25

F22

F2

A16

F19

F16

F13

F11

F8

F5

E24

E21

E19

E16

A14

E14

E11

E8

E6

E3

D26

D23

D19

D16

D13

A11

D11

D8

D4

D1

C25

C22

C2

C19

C16

C14

A8

C11

C8

C5

AF24

AF21

AF19

B24

AF16

AF13

AF11

AF8

AF6

AF3

AE26

AE23

AE19

AE16

B21

AE14

AE11

AE8

AE4

AE1

AD25

AD22

AD19

AD16

AD13

B19

AD11

AD8

AD5

AD2

AC24

AC21

AC19

AC16

AC14

AC11

B16

AC8

AC6

AC3

AB26

AB23

AB19

AB16

AB13

AB11

AB8

B13

AB4

AB1

AA25

AA22

AA19

AA16

AA14

AA11

AA8

AA5

B11

AA2

Y24

Y21

Y6

Y3

W26

W23

W4

W1

V25

B8

A4 J0700

CPU 2 OF 2-PWR/GND

051-7032 A

8 97


CPU_VID<1>

CPU_VID<3>

CPU_VID<4>

CPU_VID<6>

CPU_VCCSENSE_P

=PP1V5_S0_CPU

=PPVCORE_S0_CPU

=PP1V5_S0_CPU

CPU_VCCSENSE_N

=PPVCORE_S0_CPU

=PPVCORE_S0_CPU

=PP1V05_S0_CPU

CPU_VID<0>

CPU_VID<2>

CPU_VID<5>

11

76

76 76

9

9

9 9

7

8

8

8

8 8

6

75

75

75

75

75

6

6

6

75

6 6

5

75

75

75

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM



TABLE_5_ITEM

BOM TABLE.

CAVITY ON L1 (NORTH SIDE

PLACE 6 INSIDE SOCKET

CAVITY ON L1 (SOUTH SIDE

WE HAD A 330UF ELEC CAP HERE FOR 1.05V RAIL - CHECK WE CAN REMOVE

CPU HEATSINK MOUNTING HOLES

VCCP CORE DECOUPLING

ON L8 (NORTH SIDE SECONDARY)

PLACE INSIDE SOCKET CAVITY

NEED LARGE BULK FOR 1.05V

VCC CORE DECOUPLINGDESIGN FOR 44 CERAMIC AND 3 ELECT BULK 1800UF

PRIMARY)

SOUTH SIDE SECONDARY

CAVITY ON L8 (SOUTH SIDE


CAVITY ON L8 (NORTH SIDE



SECONDARY)

PRIMARY)

SECONDARY)

VCC CORE COUPLING CAPSUSES DIFFERENT VALUES FORMEROME VS. YONAH. SEE

X5R

20%6.3V

22UF

8052

1 C900

6.3V20%

805X5R

22UF

OMIT

2

1 C996

6.3V20%

805X5R

22UF

OMIT

2

1 C993

X5R805

20%6.3V

22UF

OMIT

2

1 C994

6.3V20%

805X5R

22UF

OMIT

2

1 C995

6.3V20%

805X5R

22UF

OMIT

2

1 C988

X5R805

20%6.3V

22UF

OMIT

2

1 C992

X5R805

20%6.3V

22UF

OMIT

2

1 C991

6.3V20%

805X5R

22UF

OMIT

2

1 C990

X5R805

20%6.3V

22UF

OMIT

2

1 C98922UF

OMIT

X5R

20%

805

6.3V2

1 C941

805

20%

X5R6.3V

22UF

OMIT

2

1 C942

805

20%

X5R6.3V

22UF

OMIT

2

1 C943

805

20%

X5R

22UF6.3V

OMIT

2

1 C944

805

20%

X5R6.3V

22UF

OMIT

2

1 C945

805

20%

X5R6.3V

22UF

OMIT

2

1 C946

NOSTUFF

20%2.5VTANTD2T

470UF3 2

1 C947

805X5R6.3V20%22UF

2

1 C901

805X5R

20%

OMIT

6.3V

22UF

2

1 C902

805X5R

20%6.3V

22UF

2

1 C904

6.3V20%

805X5R

22UF

NOSTUFF

2

1 C905

X5R6.3V20%

805

22UF

OMIT

2

1 C906

805X5R6.3V

22UF20%

2

1 C907

805X5R6.3V20%22UF

2

1 C908

805X5R6.3V20%22UF

2

1 C909

805X5R6.3V20%22UF

2

1 C910

805

6.3V20%22UF

X5R2

1 C911

805X5R

20%6.3V

22UF

2

1 C912

805

6.3VX5R

20%22UF

2

1 C913

X5R6.3V20%

805

22UF

NOSTUFF

2

1 C914

X5R

20%22UF

805

6.3V

NOSTUFF

2

1 C915

22UF20%6.3VX5R805

OMIT

2

1 C916

X5R

20%

805

6.3V

22UF

NOSTUFF

2

1 C917

805

6.3V20%

X5R

22UF

2

1 C918

22UF6.3V

805

20%

X5R

OMIT

2

1 C919

805X5R

20%6.3V

22UF

OMIT

2

1 C920

20%

805X5R

22UF6.3V

OMIT

2

1 C921

805

20%22UF

OMIT

X5R6.3V

2

1 C922

20%

805X5R6.3V

22UF

2

1 C923

805X5R

20%6.3V

22UF

2

1 C924

20%

805X5R6.3V

22UF

OMIT

2

1 C925

20%0.1UF

402

10VCERM2

1 C926

805X5R6.3V20%22UF

2

1 C928

805X5R6.3V20%22UF

2

1 C929

X5R

20%6.3V

805

22UF

2

1 C930

805

20%6.3V

22UF

X5R

OMIT

2

1 C931

6.3VX5R

20%

805

22UF

NOSTUFF

2

1 C932

0.1UF

CERM10V

402

20%2

1 C93420%

402

10VCERM

0.1UF2

1 C935

CERM10V

402

0.1UF20%

2

1 C93620%0.1UF

402

10VCERM2

1 C937

CERM10V

402

0.1UF20%

2

1 C938

805X5R

20%6.3V

22UF

OMIT

2

1 C939

6.3VX5R

20%

805

22UF

NOSTUFF

2

1 C903

4P75R4

OMIT

1

ZH607

20%0.01UF

402

16VCERM 2

1C950

4P75R4

OMIT

1

ZH608

16V20%

CERM

0.01UF

402

2

1C951

4P75R4

OMIT

1

ZH609

16V20%

CERM

0.01UF

402

2

1C952

4P75R4

OMIT

1

ZH610

16V20%

CERM

0.01UF

402

2

1C953

X5R805

20%6.3V

22UF

OMIT

2

1 C999

6.3V20%

805X5R

22UF

OMIT

2

1 C998

X5R805

20%6.3V

22UF

OMIT

2

1 C997


A051-7032

9 97

CPU DECAPS & VID<>

C922,C925,C906,C939,C919,C993,C942,C991,C995,C990,C989,C988,C920,C997,C992,C994,C996,C921,C999,C943,C998,C944,C945,C946,C941,C916,C931,C902138S0552 28 CAP,22UF,6.3V,20%,X5R,0805MEROM

C922,C925,C906,C939,C919,C993,C942,C991,C995,C990,C989,C988,C920,C997,C992,C994,C996,C921,C999,C943,C998,C944,C945,C946,C941,C916,C931,C90228138S0558YONAH

CAP,10UF,6.3V,20%,X5R,0805

=PP1V05_S0_CPU

CPU_HS_ZH608 CPU_HS_ZH609CPU_HS_ZH607 CPU_HS_ZH610

=PPVCORE_S0_CPU

11 8 7

76

6

8

5

66

6

Preliminary

D+

D-

ALERT*/

THM*

SCLK

SDATA

VDD

GND

THM2* IO

IO

IO

IN

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ADD GND GUARD TRACES FOR CPU_THERMD_P/N

ROUTE ON SAME LAYER WITH 0.254MM TRACE WIDTH & SPACING.

TEMPORARILY REMOVED BOMOPTION=CPU_TSENS_EXT

CPU THERMAL SENSOR

NOTE: SYMBOL SHOULD BE SHOWN ADT7461A

THEN THIS SHOULD BE S5

IF CPU T DIODE TO BE READ IN OFF STATE,

NOTE:

LAYOUT NOTE:

LAYOUT NOTE:

PLACE R1002 AND R1018 SUCH THAT THEY SHARE ONE PAD

PLACE R1017 AND R1019 SUCH THAT THEY SHARE ONE PAD

ADT7461

MSOP

CRITICAL

1

4

7

8

5

3

2

6

U1000

402

CPU_TSENS_INT

1/16WMF-LF

1%

49921

R1002

50V

402CERM

10%0.001UF

NOSTUFF

2

1 C1000

402

16V10%

X5R

0.1UF

2

1 C1001

402

CPU_TSENS_INT

1/16WMF-LF

1%

49921

R1017

402

10K

MF-LF1/16W5%

2

1R1001

402

1/16W5%

MF-LF

10K

2

1R1000

SM-2MT-BLK-LF

CRITICAL

DEVELOPMENT

2

1

4

3

J1000

402

CPU_TSENS_EXT

1/16W5%

MF-LF

021

R1018

402

CPU_TSENS_EXT

0

MF-LF

5%1/16W

21

R1019

402

NOSTUFF

0

MF-LF

5%1/16W

21

R1005

CPU TEMP SENSOR

051-7032 A

10 97

=SMB_THRM_DATA

CPU_THERMD_EXT_N

CPU_THERMD_EXT_P

THERM_DX_N

THERM_DX_P

CPU_THERMD_N

CPU_THERMD_P THERM_DX_P

PM_THRM_LTHRM_ALERT_L

=SMB_THRM_CLK

THRM_THM

THERM_DX_N

PP3V3_S0 94 83 76 61 59 41

58

26

59

10

10

7

7 10

23

59 10

6

Preliminary

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IO

IO

IO

IO

IO

IO

OUT

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX

ITP TCK SIGNAL LAYOUT NOTE:

THAT MAY IMPACT ITP FUNCTIONALITYP7 HAS OTHER PULL UP RESISTORS

(FROM CK410M HOST 133/167MHZ)

(DEBUG PORT RESET)(AND WITH RESET BUTTON) TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.NC

NC

NC

(DBA#)

(DBR#)

(DEBUG PORT ACTIVE)

CPU ITP700FLEX DEBUG SUPPORT

(FBO)

(TCK)

518S0320

ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

CONNECTOR’S FBO PIN.

ITP

402

1/16W1%

22.6

MF-LF

21

R1100

22.6

MF-LF1/16W1%

402

ITP

21

R1102

MF-LF

ITP

402

1%1/16W

54.9

2

1R1103

ITP

0.1UF10%

X5R402

16V2

1 C1100

ITP

1/16W5%

MF-LF402

240

2

1R1104

DEVELOPMENT

52435-2872F-RT-SM

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J1101

1/16WMF-LF

1%54.9

4022

1R1101

MF-LF1/16W5%

402

680

2

1R1106

SYNC_MASTER=M38

9711

A051-7032

SYNC_DATE=01/05/2006

CPU ITP700FLEX DEBUG

XDP_DBRESET_L

XDP_TRST_L

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_BPM_L<3>

XDP_TCK

CPU_XDP_CLK_NCPU_XDP_CLK_P

XDP_TCK

XDP_TMSXDP_TDI

XDP_BPM_L<2>

XDP_BPM_L<4>

XDP_BPM_L<5>

=PP1V05_S0_CPU

=PP3V3_S5_SB_PM

ITP_TDO

ITPRESET_L

XDP_TDO

FSB_CPURST_L

=PP1V05_S0_CPU

11

11

9

9

8

8

11

11

7

12

7

26

7

7

7

7

7

6

23

7

7

6

7

5

7

7

7

5

34

34

5

5

5

7

7

7

5

6

5

5

5

Preliminary

IO

IO

IO

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

IO

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IN

IO

IN

IO

IO

HD4*

HD6*

HD16*

HTRDY*

HSLPCPU*

HRS1*

HRS0*

HHITM*

HLOCK*

HHIT*

HDSTBP2*

HDTSBP3*

HDSTBP1*

HDSTBP0*

HDSTBN3*

HDSTBN1*

HDSTBN2*

HDSTBN0*

HDINV2*

HDINV3*

HDINV1*

HDINV0*

HDVREF

HDRDY*

HDPWR*

HDEFER*

HDBSY*

HCPURST*

HBREQ0*

HBPRI*

HBNR*

HAVREF

HCLKIN*

HCLKIN

HYSWING

HYRCOMP

HYSCOMP

HXSWING

HXSCOMP

HXRCOMP

HA13*

HADS*

HADSTB0*

HD3*

HD2*

HD1*

HD0*

HD63*

HD62*

HD61*

HD60*

HD59*

HD58*

HD57*

HD56*

HD55*

HD54*

HD53*

HD52*

HD51*

HD50*

HD49*

HD48*

HD47*

HD46*

HD45*

HD44*

HD43*

HD42*

HD41*

HD40*

HD39*

HD38*

HD37*

HD36*

HD35*

HD34*

HD33*

HD32*

HD31*

HD29*

HD28*

HD27*

HD26*

HD25*

HD24*

HD23*

HD22*

HD21*

HD20*

HD19*

HD18*

HD17*

HD15*

HD10*

HD11*

HD12*

HD13*

HD14*

HD5*

HD7*

HD8*

HD9*

HA30*

HA29*

HA28*

HA27*

HA26*

HA25*

HA24*

HA23*

HA31*

HA20*

HA19*

HA18*

HA16*

HA15*

HA14*

HA21*

HA22*

HA17*

HA9*

HA8*

HA7*

HA6*

HA5*

HA4*

HA3*

HA10*

HA11*

HA12*

HADSTB1*

HREQ0*

HREQ1*

HREQ2*

HREQ3*

HD30*

HREQ4*

HRS2*

(1 OF 10)

HOST

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

0.1uF10%16VX5R402

2

1C1211

402MF-LF1/16W1%200

2

1R1211

402MF-LF1/16W1%100

2

1R1210

402MF-LF1/16W

1%54.9

2

1R1220

24.91%

1/16WMF-LF402

2

1R1221

402MF-LF1/16W1%221

2

1R1225

100

402MF-LF1/16W1%

2

1R1226

10%16VX5R402

0.1uF

2

1 C1226

0.1uF10%16VX5R402

2

1 C1236

402MF-LF1/16W1%221

2

1R1235

402MF-LF1/16W

1%54.9

2

1R1230

100

402MF-LF1/16W1%

2

1R123624.9

1%1/16WMF-LF402

2

1R1231

OMIT

945GM

NB

BGA

W1

U1

Y1

E4

E2

E1

E7

E3

D6

E6

B4

A8

F8

B8

G8

D8

B3

D4

D3

K13

AC5

AA5

T6

K3

AC4

Y5

T7

K4

H8

J9

AB10

U3

W8

J7

C3

A7

K1

K9

G2

AC8

AD4

AD10

AB5

G1

AC6

AD7

AC1

AD9

AD1

AC2

AB3

AC11

AB11

AC9

K2

AB4

AA1

Y8

AA10

AA6

AA2

AA7

AA4

W2

AB8

H3

Y10

W5

Y7

Y3

W3

W4

AA9

AB7

T5

W6

J6

T9

U5

W7

T4

T8

T1

W9

T11

U11

U9

H1

U7

T3

W11

T10

G4

K11

J3

H4

J8

K7

J1

F1

B7

AG1

AG2

C7

F6

C6

J13

C13

B9

E8

F9

G12

F11

G11

E11

C9

D14

C14

H9

A14

C12

B14

B12

F12

G13

E13

A13

A12

C11

A11

D12

F14

J15

H13

J14

D9

G14

J12

H11

U1200

051-7032

9712

A

NB CPU InterfaceSYNC_DATE=01/05/2006SYNC_MASTER=M1

NB_FSB_XRCOMP

=PP1V05_S0_FSB_NB

=PP1V05_S0_FSB_NB

=PP1V05_S0_FSB_NB

FSB_RS_L<2>

FSB_REQ_L<4>

FSB_D_L<30>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_ADSTB_L<1>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<10>

FSB_A_L<3>

FSB_A_L<4>

FSB_A_L<5>

FSB_A_L<6>

FSB_A_L<7>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<17>

FSB_A_L<22>

FSB_A_L<21>

FSB_A_L<14>

FSB_A_L<15>

FSB_A_L<16>

FSB_A_L<18>

FSB_A_L<19>

FSB_A_L<20>

FSB_A_L<31>

FSB_A_L<23>

FSB_A_L<24>

FSB_A_L<25>

FSB_A_L<26>

FSB_A_L<27>

FSB_A_L<28>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<15>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20>

FSB_D_L<21>

FSB_D_L<22>

FSB_D_L<23>

FSB_D_L<24>

FSB_D_L<25>

FSB_D_L<26>

FSB_D_L<27>

FSB_D_L<28>

FSB_D_L<29>

FSB_D_L<31>

FSB_D_L<32>

FSB_D_L<33>

FSB_D_L<34>

FSB_D_L<35>

FSB_D_L<36>

FSB_D_L<37>

FSB_D_L<38>

FSB_D_L<39>

FSB_D_L<40>

FSB_D_L<41>

FSB_D_L<42>

FSB_D_L<43>

FSB_D_L<44>

FSB_D_L<45>

FSB_D_L<46>

FSB_D_L<47>

FSB_D_L<48>

FSB_D_L<49>

FSB_D_L<50>

FSB_D_L<51>

FSB_D_L<52>

FSB_D_L<53>

FSB_D_L<54>

FSB_D_L<55>

FSB_D_L<56>

FSB_D_L<57>

FSB_D_L<58>

FSB_D_L<59>

FSB_D_L<60>

FSB_D_L<61>

FSB_D_L<62>

FSB_D_L<63>

FSB_ADSTB_L<0>

FSB_ADS_L

FSB_A_L<13>

NB_FSB_XSCOMP

NB_FSB_XSWING

NB_FSB_YSCOMP

NB_FSB_YRCOMP

NB_FSB_YSWING

FSB_CLK_NB_P

FSB_CLK_NB_N

FSB_BNR_L

FSB_BPRI_L

FSB_BREQ0_L

FSB_DBSY_L

FSB_DEFER_L

FSB_DPWR_L

FSB_DRDY_L

FSB_DINV_L<3>

FSB_DSTBN_L<1>

FSB_DSTBP_L<0>

FSB_HIT_L

FSB_LOCK_L

FSB_HITM_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_SLPCPU_L

FSB_TRDY_L

FSB_D_L<16>

FSB_D_L<0>

FSB_D_L<3>

FSB_D_L<7>

FSB_D_L<8>

FSB_D_L<9>

FSB_D_L<10>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<2>

FSB_D_L<1>

FSB_DINV_L<2>

FSB_DINV_L<1>

FSB_DSTBN_L<0>

FSB_DINV_L<0>

FSB_DSTBP_L<3>

FSB_DSTBP_L<2>

FSB_DSTBP_L<1>

FSB_DSTBN_L<3>

FSB_DSTBN_L<2>

FSB_D_L<17>

NB_FSB_VREF

FSB_A_L<30>

FSB_A_L<29>

FSB_CPURST_L

19

19

19

12

12

12

6

6

6

7

7

7

7

7

7

7

7

7

7

7

34

34

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

5

5

5

7

5

7

5

5

5

5

5

7

7

7

7

7

7

5

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

5

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

5

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

5

7

7

7

7

5

7

7

5

5

5

7

5

5

7

5

7

5

5

5

5

5

5

7

7

7

7

5

5

7

7

7

7

7

7

7

7

7

7

5

5

5

5

5

5

5

5

5

7

5

7

7

Preliminary

CRT_BLUE*

CRT_BLUE

CRT_GREEN*

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED*

HSYNC

CRT_DDC_DATA

CRT_VSYNC

CRT_IREF

TV_IRTNC

TV_IRTNB

TV_IREF

TV_IRTNA

TV_DACB_OUT

TV_DACC_OUT

TV_DACA_OUT

LB_DATA2

LB_DATA1

LB_DATA0

LB_DATA2*

LB_DATA1*

LB_DATA0*

LA_DATA2

LA_DATA1

LA_DATA0

LA_DATA2*

LA_DATA1*

LA_DATA0*

LB_CLK

LB_CLK*

LA_CLK

LA_CLK*

L_VDDEN

L_VREFL

L_VREFH

L_VBG

L_IBG

L_DDC_CLK

L_DDC_DATA

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN0

EXP_A_RXN1

EXP_A_RXN2

EXP_A_RXN3

EXP_A_RXN4

EXP_A_RXN5

EXP_A_RXN6

EXP_A_RXN7

EXP_A_RXN8

EXP_A_RXN9

EXP_A_RXN10

EXP_A_RXN11

EXP_A_RXN12

EXP_A_RXN13

EXP_A_RXN15

EXP_A_RXN14

EXP_A_RXP0

EXP_A_RXP1

EXP_A_RXP2

EXP_A_RXP4

EXP_A_RXP3

EXP_A_RXP5

EXP_A_RXP6

EXP_A_RXP7

EXP_A_RXP10

EXP_A_RXP9

EXP_A_RXP8

EXP_A_RXP11

EXP_A_RXP12

EXP_A_RXP14

EXP_A_RXP13

EXP_A_RXP15

EXP_A_TXN1

EXP_A_TXN0

EXP_A_TXN3

EXP_A_TXN2

EXP_A_TXN6

EXP_A_TXN5

EXP_A_TXN4

EXP_A_TXN7

EXP_A_TXN8

EXP_A_TXN9

EXP_A_TXN10

EXP_A_TXN11

EXP_A_TXN12

EXP_A_TXN14

EXP_A_TXN13

EXP_A_TXN15

EXP_A_TXP0

EXP_A_TXP2

EXP_A_TXP1

EXP_A_TXP3

EXP_A_TXP4

EXP_A_TXP5

EXP_A_TXP7

EXP_A_TXP6

EXP_A_TXP8

EXP_A_TXP9

EXP_A_TXP10

EXP_A_TXP12

EXP_A_TXP11

EXP_A_TXP13

EXP_A_TXP14

EXP_A_TXP15

L_CLKCTLB

L_BKLTEN

L_CLKCTLA

L_BKLTCTL

(3 OF 10)

LVDS

TV

VGA

PCI-EXPRESS GRAPHICS

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

IO

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SDVO_FLDSTALL#

SDVO Alternate Function

SDVO_TVCLKIN#

SDVO_INT#

SDVO_TVCLKIN

SDVO_INT

SDVO_FLDSTALL

SDVOB_GREEN

SDVOB_RED

SDVOC_CLKN

SDVOC_BLUE#

SDVOC_GREEN#

SDVOC_RED#

SDVOB_CLKN

SDVOB_BLUE#

SDVOB_GREEN#

SDVOB_RED#

SDVOB_CLKP

SDVOB_BLUE

SDVOC_RED

SDVOC_GREEN

SDVOC_BLUE

SDVOC_CLKP

Otherwise, tie VCCD_LVDS to GND also.

LVDS Disable

VCCD_LVDS must remain powered with proper decoupling.

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie

filtering components. Unused DAC outputs should

Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.

VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

Component: DACA, DACB & DACC

Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and

connect to GND through 75-ohm resistors.

S-Video: DACB & DACC only

Unused DAC outputs must remain powered, but can omit

HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core

TV-Out Signal Usage:

Composite: DACA only

TV-Out Disable

CRT Disable

Can leave all signals NC if LVDS is not implemented

Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is usedBGA

NB945GM

OMIT

B19

B18

B16

J20

A19

C18

A16

F29

F28

D30

D29

G30

F30

E27

E26

A37

A36

B35

B34

C37

B37

A33

A32

C32

C33

F32

C35

B38

G25

G26

H29

H30

J30

D32

G23

R40

P36

N40

M36

L40

J36

H40

G36

AB40

AA36

Y40

W36

V40

T36

F40

D36

T40

R36

P40

N36

M40

L36

J40

H36

AC40

AB36

AA40

Y36

W40

V36

G40

F36

R38

P34

N38

M34

L38

J34

H38

G34

AB38

AA34

Y38

W34

V38

T34

F38

D34

T38

R34

P38

N34

M38

L34

J38

H34

AC38

AB34

AA38

Y34

W38

V34

G38

F34

D38

D40

H23

B21

A21

J22

B22

C22

C25

C26

D23

E23

U1200402MF-LF1/16W1%24.9

2

1R1310

051-7032 A

9713

SYNC_MASTER=M1 SYNC_DATE=01/05/2006

NB PEG / Video Interfaces

TV_DACA_OUT

TV_DACB_OUT

TV_DACC_OUT

TV_IREF

TV_IRTNA

TV_IRTNB

TV_IRTNC

CRT_BLUE_L

CRT_BLUE

CRT_GREEN_L

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED_L

CRT_DDC_DATA

CRT_IREF

LVDS_B_DATA_P<2>

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<0>

LVDS_B_DATA_N<2>

LVDS_B_DATA_N<1>

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_A_DATA_P<1>

LVDS_A_DATA_P<0>

LVDS_A_DATA_N<2>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<0>

LVDS_B_CLK_P

LVDS_B_CLK_N

LVDS_A_CLK_P

LVDS_A_CLK_N

LVDS_VDDEN

LVDS_VREFL

LVDS_VREFH

TP_LVDS_VBG

LVDS_IBG

LVDS_DDC_CLK

LVDS_DDC_DATA

PEG_COMP

PEG_D2R_N<0>

PEG_D2R_N<1>

PEG_D2R_N<2>

PEG_D2R_P<0>

PEG_D2R_P<2>

PEG_D2R_P<4>

PEG_D2R_P<3>

PEG_D2R_P<5>

PEG_D2R_P<6>

PEG_D2R_P<7>

PEG_D2R_P<10>

PEG_D2R_P<9>

PEG_D2R_P<8>

PEG_D2R_P<11>

PEG_D2R_P<12>

PEG_D2R_P<14>

PEG_D2R_P<13>

PEG_D2R_P<15>

PEG_R2D_C_N<1>

PEG_R2D_C_N<0>

PEG_R2D_C_N<3>

PEG_R2D_C_N<2>

PEG_R2D_C_P<0>

PEG_R2D_C_P<2>

PEG_R2D_C_P<1>

PEG_R2D_C_P<3>

PEG_R2D_C_P<4>

PEG_R2D_C_P<5>

PEG_R2D_C_P<7>

PEG_R2D_C_P<6>

PEG_R2D_C_P<8>

PEG_R2D_C_P<9>

PEG_R2D_C_P<10>

PEG_R2D_C_P<12>

PEG_R2D_C_P<11>

PEG_R2D_C_P<13>

PEG_R2D_C_P<14>

PEG_R2D_C_P<15>

LVDS_BKLTEN

=PP1V5_S0_NB_PCIE

LVDS_CLKCTLB

CRT_VSYNC_R

CRT_HSYNC_R

PEG_D2R_P<1>

LVDS_CLKCTLA

LVDS_BKLTCTL

PEG_D2R_N<15>

PEG_D2R_N<11>

PEG_D2R_N<12>

PEG_D2R_N<13>

PEG_D2R_N<14>

PEG_D2R_N<7>

PEG_D2R_N<9>

PEG_D2R_N<3>

PEG_D2R_N<4>

PEG_D2R_N<5>

PEG_D2R_N<6>

PEG_D2R_N<8>

PEG_D2R_N<10>

PEG_R2D_C_N<6>

PEG_R2D_C_N<5>

PEG_R2D_C_N<4>

PEG_R2D_C_N<7>

PEG_R2D_C_N<8>

PEG_R2D_C_N<9>

PEG_R2D_C_N<10>

PEG_R2D_C_N<11>

PEG_R2D_C_N<12>

PEG_R2D_C_N<14>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

19

96

96

96

96

96

96

96

96

96

96

96

96

97

96

97

96

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

94

95

95

95

95

95

95

95

95

95

5

6

94

96

96

95

94

94

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

Preliminary

SM_CS0*RSVD15

RSVD14

SM_CKE2

RSVD2

RSVD3

RSVD6

RSVD4

RSVD5

RSVD8

RSVD7

RSVD9

RSVD1

RSVD10

RSVD11

RSVD12

RSVD13

CFG1

CFG0

CFG2

CFG3

CFG4

CFG6

CFG5

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG17

CFG16

CFG15

CFG18

CFG19

CFG20

PM_BM_BUSY*

PM_EXTTS0*

PM_EXTTS1*

PW_THRMTRIP*

PWROK

RSTIN*

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC*

CLK_REQ*

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC0

NC1

NC13

NC12

NC11

NC10

NC18

NC17

NC16

NC15

NC14

SM_CK0

SM_CK1

SM_CK2

SM_CK0*

SM_CK3

SM_CK1*

SM_CK2*

SM_CK3*

SM_CKE0

SM_CKE1

SM_CKE3

SM_CS1*

SM_CS2*

SM_CS3*

SMOCDCOMP0

SMOCDCOMP1

SM_ODT1

SM_ODT0

SM_ODT2

SMRCOMP*

SM_ODT3

SMRCOMP

SMVREF0

SMVREF1

G_CLKIN*

G_CLKIN

D_REFCLKIN*

D_REFCLKIN

D_REFSSCLKIN*

D_REFSSCLKIN

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP2

DMI_TXP1

DMI_TXP3

DDR MUXING

CFG

NC

PM

CLK

DMI

MISC

(2 OF 10)

RSVD

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

IN

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

NC

NC

NC

NC

IPU

IPU

NC

NCIPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPD

IPU

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

(D_PLLMON1#)

(VSS_MCHDETECT)

(H_PCREQ#)

(H_PLLMON1#)

(H_PLLMON1)

(TV_DCONSEL1)

(TV_DCONSEL0)

(TESTIN#)

(H_PROCHOT#)

(D_PLLMON1)

(H_EDRDY#)

(LB_DATAP3)

(LB_DATAN3)

(LA_DATAP3)

(LA_DATAN3)

IPD

IPD

NC

NC

OMIT

945GMNBBGA

AK41

AK1

AV9

AT9

AF10

AL20

AU21

AY20

BA12

BA13

AW21

AY21

AW12

AW13

AY29

BA29

AT20

AU20

AY40

AW40

AY7

AW7

AT1

AR1

AW35

AY35

H27

H28

K30

J19

H7

AF11

AG11

F7

F3

R32

D27

D28

A34

A35

A41

J29

T32

AH34

AH33

G6

H26

F25

G28

B41

BA1

BA2

BA3

BA39

BA40

BA41

C1

A3

A39

A4

A40

AW1

AW41

AY1

AY41

B2

C41

D1

K28

AF33

AG33

AG41

AF37

AE41

AC37

AH41

AG37

AF41

AE37

AG39

AF35

AE39

AC35

AH39

AG35

AF39

AE35

C40

D41

A27

A26

H32

G16

D16

D19

E18

F15

E15

F18

J26

J18

K27

J25

H15

G18

H16

C15

K15

G15

D15

E16

K18

K16

U1200

100

5%1/16WMF-LF402

21

R1430

1/16WMF-LF

5%

402

10K

2

1R1441

MF-LF1/16W

5%

402

10K

2

1R1440

20%10VCERM402

0.1uF

2

1 C1416

20%10VCERM402

0.1uF

2

1C1415

80.6

MF-LF402

1%1/16W

2

1R1410

80.6

MF-LF402

1%1/16W

2

1R1411

10K

MF-LF402

5%1/16W

2

1R1420

14 97

A051-7032

NB Misc InterfacesSYNC_DATE=MASTERSYNC_MASTER=MASTER

TP_NB_RSVD4_F7

TP_NB_RSVD3_F3

PM_EXTTS_L

NB_RST_IN_L_R

CLK_NB_OE_L

NB_CLK_DREFCLKIN_N

NB_CLK_DREFCLKIN_P



=PP3V3_S0_NB

NB_TV_DCONSEL1

NB_TV_DCONSEL0

TP_NB_XOR_LVDS_A35

TP_NB_TESTIN_L

PM_DPRSLPVR

=PP3V3_S0_NB

NB_CFG<18>

NB_CFG<13>

NB_CFG<11>

NB_CFG<8>

NB_RST_IN_L

DMI_N2S_P<3>

DMI_N2S_P<1>

DMI_N2S_P<2>

DMI_N2S_P<0>

DMI_N2S_N<3>

DMI_N2S_N<2>

DMI_N2S_N<1>

DMI_N2S_N<0>

DMI_S2N_P<3>

DMI_S2N_P<2>

DMI_S2N_P<1>

DMI_S2N_P<0>

DMI_S2N_N<3>

DMI_S2N_N<2>

DMI_S2N_N<1>

DMI_S2N_N<0>

NB_CLK100M_GCLKIN_P

NB_CLK100M_GCLKIN_N

MEM_ODT<3>

MEM_ODT<0>

MEM_CKE<3>

MEM_CKE<1>

MEM_CKE<0>

MEM_CLK_N<3>

MEM_CLK_N<2>

MEM_CLK_N<1>

MEM_CLK_P<3>

MEM_CLK_N<0>

MEM_CLK_P<2>

MEM_CLK_P<1>

MEM_CLK_P<0>

NB_SB_SYNC_L

SDVO_CTRLDATA

SDVO_CTRLCLK

VR_PWRGOOD_DELAY

PM_THRMTRIP_L

PM_BMBUSY_L

NB_CFG<20>

NB_CFG<19>

NB_CFG<15>

NB_CFG<16>

NB_CFG<17>

NB_CFG<14>

NB_CFG<10>

NB_CFG<9>

NB_CFG<7>

NB_CFG<5>

NB_CFG<6>

NB_CFG<4>

NB_CFG<3>

NB_BSEL<2>

NB_BSEL<0>

MEM_CS_L<0>

NB_CFG<12>

MEM_ODT<2>

MEM_ODT<1>

MEM_CS_L<3>

MEM_CS_L<2>

MEM_CS_L<1>

MEM_CKE<2>

=PP1V8_S3_MEM_NB

MEM_RCOMP_L

MEM_RCOMP

MEM_VREF_NB_0

MEM_VREF_NB_1

TP_NB_XOR_LVDS_A34

TP_NB_XOR_LVDS_D28

TP_NB_XOR_LVDS_D27

TP_NB_XOR_FSB2_H7

NB_BSEL<1>

20

20

19

19

75

19

59

34

34

34

34

14

75

14

22

22

22

22

34

34

30

30

30

30

30

26

30

30

30

30

30

30

30

16

58

5

33

5

5

5

5

6

23

6

20

6

22

22

22

5

22

22

22

5

22

22

22

5

22

22

22

5

5

5

29

28

29

28

28

29

29

28

29

28

29

28

28

22

95

95

5

23

20

20

20

20

20

20

34

34

28

29

28

29

29

28

29

6

34

Preliminary

SA_DQ1

SA_DQ0

SA_DQ2

SA_DQ3

SA_DQ4

SA_DQ5

SA_DQ6

SA_DQ7

SA_DQ8

SA_DQ9

SA_DQ10

SA_DQ12

SA_DQ11

SA_DQ13

SA_DQ14

SA_DQ15

SA_DQ16

SA_DQ17

SA_DQ18

SA_DQ19

SA_DQ20

SA_DQ21

SA_DQ22

SA_DQ23

SA_DQ24

SA_DQ25

SA_DQ26

SA_DQ27

SA_DQ29

SA_DQ28

SA_DQ30

SA_DQ31

SA_DQ32

SA_DQ33

SA_DQ35

SA_DQ34

SA_DQ36

SA_DQ37

SA_DQ38

SA_DQ39

SA_DQ40

SA_DQ41

SA_DQ42

SA_DQ43

SA_DQ44

SA_DQ46

SA_DQ45

SA_DQ47

SA_DQ48

SA_DQ49

SA_DQ50

SA_DQ51

SA_DQ52

SA_DQ53

SA_DQ54

SA_DQ55

SA_DQ56

SA_DQ57

SA_DQ58

SA_DQ59

SA_DQ60

SA_DQ61

SA_DQ62

SA_DQ63

SA_BS1

SA_BS0

SA_BS2

SA_CAS*

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS2

SA_DQS1

SA_DQS3

SA_DQS5

SA_DQS4

SA_DQS6

SA_DQS7

SA_DQS3*

SA_DQS2*

SA_DQS4*

SA_DQS5*

SA_DQS6*

SA_DQS7*

SA_MA1

SA_MA0

SA_MA2

SA_MA3

SA_MA5

SA_MA4

SA_MA6

SA_MA7

SA_MA9

SA_MA8

SA_MA10

SA_MA11

SA_MA12

SA_MA13

SA_RAS*

SA_RCVENIN*

SA_RCVENOUT*

SA_WE*

SA_DQS1*

SA_DQS0*

(4 OF 10)

DDR SYSTEM MEMORY A

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

SB_DQ1

SB_DQ0

SB_DQ2

SB_DQ3

SB_DQ4

SB_DQ5

SB_DQ6

SB_DQ7

SB_DQ8

SB_DQ9

SB_DQ10

SB_DQ12

SB_DQ11

SB_DQ13

SB_DQ14

SB_DQ15

SB_DQ16

SB_DQ17

SB_DQ18

SB_DQ19

SB_DQ20

SB_DQ21

SB_DQ22

SB_DQ23

SB_DQ24

SB_DQ25

SB_DQ26

SB_DQ27

SB_DQ29

SB_DQ28

SB_DQ30

SB_DQ31

SB_DQ32

SB_DQ33

SB_DQ35

SB_DQ34

SB_DQ36

SB_DQ37

SB_DQ38

SB_DQ39

SB_DQ40

SB_DQ41

SB_DQ42

SB_DQ43

SB_DQ44

SB_DQ46

SB_DQ45

SB_DQ47

SB_DQ48

SB_DQ49

SB_DQ50

SB_DQ51

SB_DQ52

SB_DQ53

SB_DQ54

SB_DQ55

SB_DQ56

SB_DQ57

SB_DQ58

SB_DQ59

SB_DQ60

SB_DQ61

SB_DQ62

SB_DQ63

SB_BS1

SB_BS0

SB_BS2

SB_CAS*

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM5

SB_DM4

SB_DM7

SB_DM6

SB_DQS0

SB_DQS2

SB_DQS1

SB_DQS3

SB_DQS5

SB_DQS4

SB_DQS6

SB_DQS7

SB_DQS3*

SB_DQS2*

SB_DQS4*

SB_DQS5*

SB_DQS6*

SB_DQS7*

SB_MA1

SB_MA0

SB_MA2

SB_MA3

SB_MA5

SB_MA4

SB_MA6

SB_MA7

SB_MA9

SB_MA8

SB_MA10

SB_MA11

SB_MA12

SB_MA13

SB_RAS*

SB_RCVENIN*

SB_RCVENOUT*

SB_WE*

SB_DQS1*

SB_DQS0*

(5 OF 10)

DDR SYSTEM MEMORY B

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

NC

NC

NC

BGA

945GMNB

OMIT

AY14

AK24

AK23

AW14

AT16

AW17

AU17

AV17

AU16

BA17

BA16

AW16

AV12

AV20

AT17

AU13

AU14

AY16

AH5

AG5

AN3

AP3

AL8

AN8

AM12

AN12

AM21

AM22

AN27

AN28

AU33

AT33

AK32

AK33

AP33

AN35

AH31

AF8

AF4

AH6

AG9

AJ32

AF6

AG4

AF9

AG7

AL2

AN1

AT3

AV2

AN2

AP1

AK35

AW2

AY2

AL5

AT5

AN9

AP9

AK7

AK8

AN7

AK9

AJ36

AL12

AL14

AT12

AT13

AP12

AP13

AR14

AR12

AT21

AP20

AM33

AP24

AL23

AN20

AP21

AL22

AP23

AP26

AM24

AL28

AK28

AM31

AN24

AM26

AL27

AK26

AN33

AM34

AM36

AN38

AP31

AR31

AJ34

AJ35

AH4

AR3

AL9

AM14

AN22

AL26

AM35

AJ33

AY13

BA20

AV14

AU12

U1200

BGA

945GMNB

OMIT

AR27

AK18

AK16

AU23

AW27

AV27

AV28

AU27

AT28

AT27

AR28

AY24

AR23

AY27

BA27

AV24

AW24

AY23

AP5

AN5

AT7

AR7

AT10

AR10

AP16

AR16

AP29

AR29

AT35

AU35

AU39

AT39

AM40

AM39

AV41

AT40

AP41

AJ3

AJ5

AK5

AT4

AN41

AK3

AK4

AR5

AV4

AY5

AW5

AY9

AY10

AW4

BA4

AK38

AW10

BA10

AJ8

AK10

AH11

AK13

AN10

AJ9

AH10

AJ11

AJ38

AL15

AP15

AM16

AN17

AN14

AP14

AL19

AM19

AW29

AV29

AR41

AW31

AU31

AU29

AT31

BA33

AY33

AP34

AP35

AU36

BA36

AP39

AP36

AR36

AV36

BA38

AY38

AW38

AR40

AP38

AV38

AU38

AJ37

AK39

AN4

BA5

AH8

AL17

BA31

AT36

AR38

AK36

AR24

AY28

AV23

AT24

U1200

SYNC_DATE=01/05/2006SYNC_MASTER=M1

NB DDR2 Interfaces

051-7032 A

9715

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DQ<2>

MEM_B_DQ<3>

MEM_B_DQ<4>

MEM_B_DQ<5>

MEM_B_DQ<6>

MEM_B_DQ<7>

MEM_B_DQ<8>

MEM_B_DQ<9>

MEM_B_DQ<10>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<13>

MEM_B_DQ<14>

MEM_B_DQ<15>

MEM_B_DQ<16>

MEM_B_DQ<17>

MEM_B_DQ<18>

MEM_B_DQ<19>

MEM_B_DQ<20>

MEM_B_DQ<21>

MEM_B_DQ<22>

MEM_B_DQ<23>

MEM_B_DQ<24>

MEM_B_DQ<25>

MEM_B_DQ<26>

MEM_B_DQ<27>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<30>

MEM_B_DQ<31>

MEM_B_DQ<32>

MEM_B_DQ<33>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<36>

MEM_B_DQ<37>

MEM_B_DQ<38>

MEM_B_DQ<39>

MEM_B_DQ<40>

MEM_B_DQ<41>

MEM_B_DQ<42>

MEM_B_DQ<43>

MEM_B_DQ<44>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<47>

MEM_B_DQ<48>

MEM_B_DQ<49>

MEM_B_DQ<50>

MEM_B_DQ<51>

MEM_B_DQ<52>

MEM_B_DQ<53>

MEM_B_DQ<54>

MEM_B_DQ<55>

MEM_B_DQ<56>

MEM_B_DQ<57>

MEM_B_DQ<58>

MEM_B_DQ<59>

MEM_B_DQ<60>

MEM_B_DQ<61>

MEM_B_DQ<62>

MEM_B_DQ<63>

MEM_B_BS<1>

MEM_B_BS<0>

MEM_B_BS<2>

MEM_B_CAS_L

MEM_B_DM<0>

MEM_B_DM<1>

MEM_B_DM<2>

MEM_B_DM<3>

MEM_B_DM<5>

MEM_B_DM<4>

MEM_B_DM<7>

MEM_B_DM<6>

MEM_B_DQS_P<0>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<3>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<6>

MEM_B_DQS_P<7>

MEM_B_DQS_N<3>

MEM_B_DQS_N<2>

MEM_B_DQS_N<4>

MEM_B_DQS_N<5>

MEM_B_DQS_N<6>

MEM_B_DQS_N<7>

MEM_B_A<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<3>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<10>

MEM_B_A<11>

MEM_B_A<12>

MEM_B_A<13>

MEM_B_RAS_L

MEM_B_WE_L

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_A_DQ<2>

MEM_A_DQ<3>

MEM_A_DQ<4>

MEM_A_DQ<6>

MEM_A_DQ<7>

MEM_A_DQ<8>

MEM_A_DQ<9>

MEM_A_DQ<10>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<13>

MEM_A_DQ<14>

MEM_A_DQ<15>

MEM_A_DQ<16>

MEM_A_DQ<17>

MEM_A_DQ<18>

MEM_A_DQ<19>

MEM_A_DQ<20>

MEM_A_DQ<21>

MEM_A_DQ<22>

MEM_A_DQ<23>

MEM_A_DQ<24>

MEM_A_DQ<25>

MEM_A_DQ<26>

MEM_A_DQ<27>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<30>

MEM_A_DQ<31>

MEM_A_DQ<32>

MEM_A_DQ<33>

MEM_A_DQ<35>

MEM_A_DQ<34>

MEM_A_DQ<36>

MEM_A_DQ<37>

MEM_A_DQ<38>

MEM_A_DQ<39>

MEM_A_DQ<40>

MEM_A_DQ<41>

MEM_A_DQ<42>

MEM_A_DQ<43>

MEM_A_DQ<44>

MEM_A_DQ<46>

MEM_A_DQ<45>

MEM_A_DQ<47>

MEM_A_DQ<48>

MEM_A_DQ<49>

MEM_A_DQ<50>

MEM_A_DQ<51>

MEM_A_DQ<52>

MEM_A_DQ<53>

MEM_A_DQ<54>

MEM_A_DQ<55>

MEM_A_DQ<56>

MEM_A_DQ<57>

MEM_A_DQ<58>

MEM_A_DQ<59>

MEM_A_DQ<60>

MEM_A_DQ<61>

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_A_BS<1>

MEM_A_BS<0>

MEM_A_BS<2>

MEM_A_CAS_L

MEM_A_DM<0>

MEM_A_DM<1>

MEM_A_DM<2>

MEM_A_DM<3>

MEM_A_DM<5>

MEM_A_DM<4>

MEM_A_DM<7>

MEM_A_DM<6>

MEM_A_DQS_P<0>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_P<3>

MEM_A_DQS_P<5>

MEM_A_DQS_P<4>

MEM_A_DQS_P<6>

MEM_A_DQS_P<7>

MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQS_N<4>

MEM_A_DQS_N<5>

MEM_A_DQS_N<6>

MEM_A_DQS_N<7>

MEM_A_A<1>

MEM_A_A<0>

MEM_A_A<2>

MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<9>

MEM_A_A<8>

MEM_A_A<10>

MEM_A_A<11>

MEM_A_A<12>

MEM_A_A<13>

MEM_A_RAS_L

MEM_A_WE_L

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_DQ<5>

29

29

29

29

29

29

29

29

30

30

30

30

29

29

29

29

29

29

29

29

29

29

29

29

29

29

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

29

29

28

28

28

28

28

28

28

28

30

30

30

30

28

28

28

28

28

28

28

28

28

28

28

28

28

28

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

28

28

29

29

29

29

29

29

5

29

5

29

29

29

29

29

29

29

29

29

29

29

29

29

29

5

29

5

29

29

29

29

29

29

29

29

29

29

29

29

5

29

29

29

29

29

5

29

29

29

5

29

29

29

29

29

29

29

29

29

29

29

29

29

5

29

29

29

29

29

29

29

29

29

29

29

29

29

5

5

5

5

5

5

5

5

5

5

5

5

5

5

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

5

5

28

28

28

28

28

28

5

28

28

28

28

28

28

5

28

5

28

28

28

28

28

28

28

28

5

28

28

28

28

28

28

28

28

28

28

28

28

28

5

28

28

28

28

28

28

28

5

28

28

28

28

28

28

5

28

28

28

28

5

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

5

5

5

5

5

5

5

5

5

5

5

5

5

5

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

5

5

28

Preliminary

VCC_SM19

VCC_SM107

VCC_SM105

VCC_SM106

VCC_SM102

VCC_SM104

VCC_SM103

VCC_SM100

VCC_SM101

VCC_SM98

VCC_SM99

VCC_SM97

VCC_SM95

VCC_SM96

VCC_SM93

VCC_SM94

VCC_SM92

VCC_SM91

VCC_SM90

VCC_SM89

VCC_SM88

VCC_SM86

VCC_SM87

VCC_SM85

VCC_SM84

VCC_SM83

VCC_SM81

VCC_SM80

VCC_SM82

VCC_SM79

VCC_SM78

VCC_SM77

VCC_SM74

VCC_SM75

VCC_SM76

VCC_SM73

VCC_SM72

VCC_SM70

VCC_SM71

VCC_SM68

VCC_SM67

VCC_SM69

VCC_SM65

VCC_SM66

VCC_SM64

VCC_SM63

VCC_SM62

VCC_SM61

VCC_SM60

VCC_SM59

VCC_SM58

VCC_SM56

VCC_SM57

VCC_SM55

VCC_SM53

VCC_SM54

VCC_SM52

VCC_SM50

VCC_SM51

VCC_SM49

VCC_SM48

VCC_SM46

VCC_SM47

VCC_SM44

VCC_SM45

VCC_SM43

VCC_SM41

VCC_SM42

VCC_SM40

VCC_SM39

VCC_SM37

VCC_SM38

VCC_SM36

VCC_SM34

VCC_SM35

VCC_SM32

VCC_SM33

VCC_SM30

VCC_SM31

VCC_SM28

VCC_SM29

VCC_SM27

VCC_SM26

VCC_SM25

VCC_SM23

VCC_SM24

VCC_SM22

VCC_SM21

VCC_SM20

VCC_SM18

VCC_SM16

VCC_SM17

VCC_SM15

VCC_SM13

VCC_SM14

VCC_SM11

VCC_SM12

VCC_SM10

VCC_SM9

VCC_SM8

VCC_SM7

VCC_SM6

VCC_SM5

VCC_SM4

VCC_SM3

VCC_SM0

VCC_SM1

VCC_SM2

VCC_110

VCC_109

VCC_108

VCC_105

VCC_106

VCC_107

VCC_104

VCC_103

VCC_101

VCC_100

VCC_102

VCC_98

VCC_99

VCC_96

VCC_97

VCC_95

VCC_94

VCC_93

VCC_92

VCC_91

VCC_90

VCC_88

VCC_89

VCC_87

VCC_86

VCC_85

VCC_83

VCC_84

VCC_82

VCC_80

VCC_81

VCC_79

VCC_78

VCC_76

VCC_77

VCC_74

VCC_73

VCC_75

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_65

VCC_64

VCC_62

VCC_63

VCC_61

VCC_60

VCC_59

VCC_57

VCC_58

VCC_55

VCC_56

VCC_53

VCC_54

VCC_52

VCC_50

VCC_51

VCC_49

VCC_46

VCC_47

VCC_48

VCC_44

VCC_45

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_34

VCC_35

VCC_33

VCC_32

VCC_31

VCC_30

VCC_28

VCC_29

VCC_25

VCC_26

VCC_27

VCC_24

VCC_23

VCC_21

VCC_20

VCC_22

VCC_13

VCC_14

VCC_12

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_4

VCC_5

VCC_6

VCC_2

VCC_3

VCC_0

VCC_1

(6 OF 10)

VCC

VCCAUX_NCTF57

VCCAUX_NCTF56

VCCAUX_NCTF55

VCCAUX_NCTF54

VCCAUX_NCTF53

VCCAUX_NCTF52

VCCAUX_NCTF51

VCCAUX_NCTF50

VCCAUX_NCTF49

VCCAUX_NCTF47

VCCAUX_NCTF48

VCCAUX_NCTF45

VCCAUX_NCTF44

VCCAUX_NCTF46

VCCAUX_NCTF40

VCCAUX_NCTF39

VCCAUX_NCTF37

VCCAUX_NCTF38

VCCAUX_NCTF36

VCCAUX_NCTF34

VCCAUX_NCTF35

VCCAUX_NCTF32

VCCAUX_NCTF33

VCCAUX_NCTF31

VCCAUX_NCTF30

VCCAUX_NCTF29

VCCAUX_NCTF27

VCCAUX_NCTF28

VCCAUX_NCTF26

VCCAUX_NCTF24

VCCAUX_NCTF25

VCCAUX_NCTF22

VCCAUX_NCTF21

VCCAUX_NCTF23

VCCAUX_NCTF42

VCCAUX_NCTF43

VCCAUX_NCTF41

VCCAUX_NCTF19

VCCAUX_NCTF20

VCCAUX_NCTF18

VCCAUX_NCTF17

VCCAUX_NCTF16

VCCAUX_NCTF14

VCCAUX_NCTF15

VCCAUX_NCTF13

VCCAUX_NCTF12

VCCAUX_NCTF11

VCCAUX_NCTF9

VCCAUX_NCTF10

VCCAUX_NCTF8

VCCAUX_NCTF7

VCCAUX_NCTF6

VCCAUX_NCTF5

VCCAUX_NCTF4

VCCAUX_NCTF3

VCCAUX_NCTF1

VCCAUX_NCTF0

VCCAUX_NCTF2

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF7

VSS_NCTF8

VSS_NCTF5

VSS_NCTF6

VSS_NCTF4

VSS_NCTF2

VSS_NCTF3

VSS_NCTF0

VSS_NCTF1

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF60

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF56

VCC_NCTF55

VCC_NCTF53

VCC_NCTF54

VCC_NCTF52

VCC_NCTF50

VCC_NCTF51

VCC_NCTF49

VCC_NCTF48

VCC_NCTF46

VCC_NCTF47

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF41

VCC_NCTF40

VCC_NCTF42

VCC_NCTF38

VCC_NCTF39

VCC_NCTF36

VCC_NCTF37

VCC_NCTF34

VCC_NCTF35

VCC_NCTF33

VCC_NCTF31

VCC_NCTF32

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF18

VCC_NCTF19

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF13

VCC_NCTF14

VCC_NCTF11

VCC_NCTF12

VCC_NCTF10

VCC_NCTF8

VCC_NCTF9

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF0

VCC_NCTF1

(7 OF 10)

NCTF

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

impacting part performance.

NCTF balls are Not Critical To Function

These connections can break without

Layout Note:

Place near pin BA23

Place near pin BA15

Layout Note:

1.05V or 1.5V

(Need to better define cavity)

Layout Note:

Place in cavity

OMIT

BGA

NB

945GM

AT6

AV6

AW6

AY6

BA6

AP8

AR8

AT8

AV8

AW8

AT34

AY8

BA8

AK11

AG12

AH12

AJ12

AK12

AH13

AJ13

AJ14

AU34

AJ15

AR15

AT15

AU15

AV15

AW15

AY15

BA15

AH16

AJ16

AV34

AH17

AJ17

AJ18

AJ19

AK19

AP19

AR19

AT19

AU19

AV19

AW34

AW19

AY19

BA19

AK20

AK21

AJ22

AK22

AP22

AR22

AT22

AY34

AU22

AV22

AW22

AY22

BA22

AJ23

BA23

AH24

AJ24

AH25

BA34

AJ25

AH26

AJ26

AR26

AT26

AU26

AV26

AW26

AY26

BA26

AU40

AH27

AJ27

AH28

AJ28

AH29

AJ29

AK29

AL29

AM29

AM30

AM41

AN30

AP30

AR30

AT30

AU30

AV30

AW30

AY30

BA30

AJ1

AV1

AJ6

AK6

AL6

AN6

AP6

AR6

AR34

AT41

AU41

N19

Y19

AA19

AB19

L20

M20

N20

P20

W20

Y20

V32

AB20

AC20

L21

M21

N21

W21

AA21

AC21

L22

M22

W32

N22

P22

W22

Y22

AB22

AC22

L23

M23

N23

P23

Y32

Y23

AA23

AB23

M24

N24

P24

L25

M25

N25

L26

AA32

N26

P26

L27

M27

N27

P27

L28

M28

N28

P28

J33

R28

T28

U28

V28

Y28

AA28

AB28

L29

M29

P29

L33

R29

U29

V29

W29

Y29

AA29

L30

M30

N30

P30

N33

R30

T30

U30

V30

W30

Y30

AA30

M31

N31

P31

P33

R31

T31

V31

W31

AA31

J32

L32

M32

L16

N32

M16

N16

M17

N17

P17

L18

M18

N18

L19

M19

P32

W33

AA33

U1200

20%0.47uF

CERM-X5R6.3V

402

2

1 C161010UF

CERM

20%6.3V

805-1

2

1 C1621

6.3V20%

10UF

CERM805-1

2

1C1620

OMIT

BGA

NB945GM

AE18

AE19

AE20

AE21

AE22

AE23

AE24

AE25

U17

Y17

AC17

AE26

AE27

AF23

AG23

AF24

AG24

R15

T15

U15

V15

W15

Y15

AA15

AB15

AF25

AC15

AD15

AE15

AF15

AG15

R16

T16

U16

V16

W16

AG25

Y16

AA16

AB16

AC16

AD16

AE16

AF16

AG16

R17

T17

AF26

V17

W17

AA17

AB17

AD17

AE17

AF17

AG17

R18

AF18

AG26

AG18

R19

AF19

AG19

AF20

AG20

AF21

AG21

AF22

AG22

AF27

AG27

R27

T27

T18

U18

V18

U27

W18

Y18

AA18

AB18

AC18

AD18

T19

U19

V19

AD19

V27

R20

T20

U20

V20

AD20

R21

T21

U21

V21

AD21

W27

R22

T22

U22

V22

AD22

R23

T23

U23

V23

AD23

Y27

R24

T24

U24

V24

W24

Y24

AA24

AB24

AC24

AD24

AA27

R25

T25

U25

V25

W25

Y25

AA25

AB25

AC25

AD25

AB27

R26

T26

U26

V26

W26

Y26

AA26

AB26

AC26

AD26

AC27

AD27

U1200

20%0.47uF

CERM-X5R6.3V

402

2

1 C1611

20%0.47uF

CERM-X5R6.3V

402

2

1C16120.47uF20%

CERM-X5R6.3V

402

2

1 C16130.47uF

20%

CERM-X5R6.3V

402

2

1C1614

0.47uF20%

CERM-X5R6.3V

402

2

1 C1615

16 97

A051-7032

NB Power 1SYNC_DATE=MASTERSYNC_MASTER=MASTER

NB_VCCSM_LF4

NB_VCCSM_LF5

NB_VCCSM_LF2

NB_VCCSM_LF1

=PP1V8_S3_MEM_NB

=PPVCORE_S0_NB

PP1V5_S0_NB_FILT_VCCAUX

=PPVCORE_S0_NB

19

19

19

14

16

19

16

6

6

17

6

Preliminary

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT15

VTT14

VTT16

VTT18

VTT17

VTT19

VTT20

VTT21

VTT22

VTT23

VTT24

VTT25

VTT27

VTT26

VTT28

VTT29

VTT31

VTT30

VTT32

VTT34

VTT33

VTT35

VTT36

VTT37

VTT39

VTT38

VTT40

VTT41

VTT42

VTT43

VTT44

VTT45

VTT48

VTT46

VTT47

VTT49

VTT50

VTT52

VTT51

VTT53

VTT55

VTT54

VTT57

VTT56

VTT58

VTT59

VTT60

VTT61

VTT62

VTT64

VTT63

VTT65

VTT66

VTT67

VTT69

VTT68

VTT70

VTT71

VTT73

VTT72

VTT74

VTT76

VTT75

VCCSYNC

VCC_TXLVDS0

VCC_TXLVDS1

VCC_TXLVDS2

VCC3G0

VCC3G1

VCC3G3

VCC3G2

VCC3G4

VCC3G6

VCC3G5

VCCA_3GPLL

VCCA_3GBG

VSSA_3GBG

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCCA_DPLLB

VCCA_DPLLA

VCCA_HPLL

VSSA_LVDS

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG

VSSA_TVBG

VCCA_TVDACC0

VCCA_TVDACC1

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACA0

VCCA_TVDACA1

VCCD_HMPLL0

VCCD_HMPLL1

VCCD_LVDS2

VCCD_LVDS0

VCCD_LVDS1

VCCD_TVDAC

VCC_HV1

VCC_HV2

VCC_HV0

VCCD_QTVDAC

VCCAUX19

VCCAUX18

VCCAUX17

VCCAUX16

VCCAUX14

VCCAUX15

VCCAUX13

VCCAUX12

VCCAUX11

VCCAUX10

VCCAUX0

VCCAUX1

VCCAUX2

VCCAUX3

VCCAUX4

VCCAUX6

VCCAUX5

VCCAUX9

VCCAUX8

VCCAUX7

VCCAUX21

VCCAUX20

VCCAUX23

VCCAUX24

VCCAUX22

VCCAUX25

VCCAUX26

VCCAUX29

VCCAUX28

VCCAUX27

VCCAUX30

VCCAUX31

VCCAUX33

VCCAUX32

VCCAUX34

VCCAUX35

VCCAUX36

VCCAUX38

VCCAUX37

VCCAUX39

VCCAUX40

POWER

(8 OF 10)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NBBGA

945GM

OMIT

L14

M14

M1

N1

P1

R1

AB1

D2

M2

N14

P2

R2

M3

N3

P3

R3

M4

N4

P4

M5

P14

N5

P5

R5

A6

M6

P6

R6

M7

N7

P7

R14

M8

N8

P8

R8

M9

N9

P9

M10

N10

P10

T14

R10

M11

N11

P11

R11

L12

M12

N12

P12

R12

V14

T12

U12

V12

W12

Y12

AA12

AB12

L13

M13

N13

W14

R13

T13

U13

V13

W13

Y13

AA13

AB13

AC13

AD13

AB14

AC14

G20

B39

G21

H41

H22

D21

H19

C28

B28

A28

AH2

AH1

AF30

AG30

AH30

AJ30

AK30

AD12

AL30

AE12

AF12

AE13

AF13

Y14

AE14

AF14

AG14

AH14

P15

AC31

AH15

P16

P19

AH19

AH20

AJ20

AH21

AJ21

AH22

AE28

AE31

AF28

AG28

AC29

AD29

AE29

AF29

AG29

AC30

AD30

AE30

AF31

AK31

F20

E20

D20

C20

F19

E19

H20

AF2

A38

AF1

C39

B26

E21

F21

AC33

G41

A30

B30

C30

B25

B23

A23

L41

N41

R41

V41

Y41

AB41

AJ41

U1200

CERM-X5R402

6.3V

0.47uF20%

2

1C1711

402

6.3VCERM-X5R

20%0.47uF

2

1C1713

402

0.22UF20%6.3VX5R2

1 C1712


NB Power 2

051-7032 A

9717


PP1V5_S0_NB_VCCD_QTVDAC

=PP3V3_S0_NB_VCC_HV


PP3V3_S0_NB_VCCA_TVDACB

PP3V3_S0_NB_VCCA_TVDACC

GND_NB_VSSA_TVBG

PP3V3_S0_NB_VCCA_TVBG

PP1V5_S0_NB_VCCA_MPLL

GND_NB_VSSA_LVDS


PP1V5_S0_NB_VCCA_DPLLB

PP1V5_S0_NB_VCCA_DPLLA

PP1V5_S0_NB_VCCA_3GPLL


GND_NB_VSSA_3GBG

=PP1V05_S0_NB_VTT


PP2V5_S0_NB_VCCSYNC

NB_VTTLF_CAP2

PP2V5_S0_NB_VCCA_CRTDAC

PP1V5_S0_NB_VCCD_TVDAC


PP3V3_S0_NB_VCCA_TVDACA

PP1V5_S0_NB_VCCA_HPLL

GND_NB_VSSA_CRTDAC

PP1V5_S0_NB_VCC3G

NB_VTTLF_CAP1

NB_VTTLF_CAP3

19

19

19

19

19

19

19

19

16

19

6

6

19

19

19

19

19

19

6

19

19

19

6

19

6

6

19

19

19

6

19

19

19

19

Preliminary

VSS_1

VSS_0

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_9

VSS_8

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_19

VSS_18

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_28

VSS_27

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_37

VSS_36

VSS_39

VSS_38

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_49

VSS_48

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_57

VSS_56

VSS_59

VSS_58

VSS_61

VSS_60

VSS_64

VSS_63

VSS_62

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_73

VSS_72

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_82

VSS_80

VSS_81

VSS_84

VSS_83

VSS_85

VSS_87

VSS_86

VSS_89

VSS_88

VSS_91

VSS_90

VSS_92

VSS_93

VSS_94

VSS_96

VSS_95

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_114

VSS_113

VSS_115

VSS_117

VSS_116

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_127

VSS_126

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_137

VSS_136

VSS_138

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_158

VSS_157

VSS_159

VSS_160

VSS_161

VSS_162

VSS_164

VSS_163

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_172

VSS_171

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS

(9 OF 10)

VSS_272

VSS_271

VSS_269

VSS_270

VSS_268

VSS_266

VSS_267

VSS_265

VSS_264

VSS_263

VSS_261

VSS_262

VSS_260

VSS_259

VSS_258

VSS_256

VSS_257

VSS_255

VSS_254

VSS_253

VSS_251

VSS_252

VSS_250

VSS_248

VSS_249

VSS_247

VSS_246

VSS_245

VSS_243

VSS_244

VSS_242

VSS_241

VSS_240

VSS_238

VSS_239

VSS_237

VSS_236

VSS_235

VSS_233

VSS_234

VSS_232

VSS_231

VSS_230

VSS_228

VSS_229

VSS_227

VSS_225

VSS_226

VSS_224

VSS_223

VSS_222

VSS_220

VSS_221

VSS_219

VSS_218

VSS_217

VSS_215

VSS_216

VSS_214

VSS_213

VSS_212

VSS_210

VSS_211

VSS_209

VSS_207

VSS_208

VSS_205

VSS_206

VSS_204

VSS_202

VSS_203

VSS_201

VSS_200

VSS_199

VSS_197

VSS_198

VSS_196

VSS_195

VSS_194

VSS_192

VSS_193

VSS_191

VSS_190

VSS_189

VSS_187

VSS_188

VSS_186

VSS_184

VSS_185

VSS_183

VSS_182

VSS_180

VSS_181

VSS_273

VSS_274

VSS_276

VSS_275

VSS_277

VSS_279

VSS_278

VSS_281

VSS_280

VSS_282

VSS_283

VSS_284

VSS_286

VSS_285

VSS_287

VSS_288

VSS_289

VSS_291

VSS_290

VSS_293

VSS_292

VSS_294

VSS_296

VSS_295

VSS_297

VSS_299

VSS_298

VSS_301

VSS_302

VSS_300

VSS_304

VSS_303

VSS_305

VSS_306

VSS_307

VSS_309

VSS_308

VSS_311

VSS_310

VSS_312

VSS_313

VSS_314

VSS_315

VSS_317

VSS_316

VSS_318

VSS_319

VSS_320

VSS_322

VSS_321

VSS_323

VSS_324

VSS_325

VSS_327

VSS_326

VSS_328

VSS_329

VSS_330

VSS_332

VSS_331

VSS_334

VSS_333

VSS_335

VSS_337

VSS_336

VSS_338

VSS_339

VSS_340

VSS_342

VSS_343

VSS_341

VSS_345

VSS_344

VSS_346

VSS_347

VSS_348

VSS_350

VSS_349

VSS_352

VSS_351

VSS_353

VSS_354

VSS_355

VSS_356

VSS_357

VSS_358

VSS_359

VSS_360

VSS

(10 OF 10)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NB

945GM

BGA

OMIT

AF34

AG34

AK34

AN34

D35

F35

G35

H35

J35

L35

AP40

M35

N35

P35

R35

T35

V35

W35

Y35

AA35

AB35

AV40

AH35

AR35

AV35

BA35

B36

C36

AC36

AE36

AF36

AG36

F41

AH36

AN36

AW36

AY36

D37

F37

G37

H37

J37

L37

J41

M37

N37

P37

R37

T37

V37

W37

Y37

AA37

AB37

M41

AH37

AK37

C38

AE38

AF38

AG38

AH38

AM38

AT38

D39

P41

F39

G39

H39

J39

L39

M39

N39

P39

R39

T39

T41

V39

W39

Y39

AA39

AB39

AC39

AJ39

AN39

AR39

AV39

W41

AW39

AY39

AW23

AL24

AU24

BA24

A25

D25

E25

H25

K25

P25

B40

AK25

D26

F26

K26

M26

AN26

B27

C27

F27

G27

AE40

J27

AK27

AM27

AP27

E28

J28

W28

AC28

AD28

AM28

AF40

AP28

AU28

AW28

BA28

A29

B29

C29

E29

G29

K29

AG40

N29

T29

AB29

AN29

AT29

E30

AB30

Y31

AB31

AG31

AH40

AJ31

AN31

AV31

AY31

B32

G32

AB32

AC32

AE32

AF32

AJ40

AG32

AH32

B33

D33

F33

G33

H33

M33

R33

T33

AK40

V33

Y33

AB33

AE33

AR33

AV33

AW33

C34

AC34

AE34

AN40

AA41

AC41

U1200

NB945GM

BGA

OMIT

AL1

C2

F2

H2

J2

N2

T2

U2

Y2

AB2

AD2

AJ2

AK2

AP2

AR2

AT2

G3

AA3

AC3

AD3

AF3

AG3

AH3

AL3

AV3

AW3

AY3

C4

F4

J4

R4

U4

Y4

AJ4

AL4

AP4

AR4

AY4

AD5

AF5

AV5

B6

H6

K6

N6

U6

Y6

AB6

AD6

AG6

D7

G7

R7

AC7

AF7

AH7

AJ7

AL7

AP7

AV7

BA7

C8

K8

U8

AA8

AD8

AG8

A9

E9

G9

R9

Y9

AB9

AH9

AR9

AW9

BA9

U10

W10

AC10

AG10

AJ10

AL10

AP10

AV10

B11

D11

J11

Y11

AA11

AD11

E12

H12

K12

AC12

AY12

B13

D13

F13

P13

AG13

AL13

AM13

AN13

AR13

AV13

E14

H14

K14

U14

AA14

AD14

AK14

AT14

BA14

A15

B15

L15

M15

N15

AK15

AM15

AN15

C16

F16

J16

AL16

AN16

AV16

AK17

AM17

AP17

AR17

AY17

A18

D18

H18

P18

AH18

C19

G19

K19

W19

AC19

AN19

A20

B20

K20

AA20

AM20

AR20

AW20

C21

H21

J21

K21

P21

Y21

AB21

AL21

AN21

AR21

AV21

BA21

A22

D22

E22

F22

G22

K22

AA22

C23

F23

J23

K23

W23

AC23

AH23

AM23

AN23

AT23U1200


NB Grounds

051-7032 A

9718

Preliminary

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

NR/FBINEN

OUT

GND

NC

NC

NOISE

GND

VOUT

CONT

VIN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ON THESE 2 RAILS

PLACE CAPS NEAR NB EDGE

Layout Note:

Layout Note:

These are the power signals that leave the NB "block"

Layout Note:

These 4 0.1uF caps should

Should be 1%

Layout Note: Route to caps, then GND

on opposite side.

10uF caps should

Place in cavity

Layout Note:

be close to MCH

be within 5 mm of NB edge

1uH, 20%

Place L and C

close to MCH

Layout Note:

be placed in cavity

3GPLL 10uF cap should

Layout Note:

WAS A 330UF ELEC - CHECK WE CAN REMOVE

WAS A 330UF ELEC - CHECK WE CAN REMOVE

(MCH TV OUT CHANNEL C 3.3V PWR)MCH VCCA_TVDACC FILTER

MCH VCCA_TVBG FILTER(MCH TV DAC BAND GAP 3.3V PWR)


Layout Note:

These 8 caps should be

within 6.35 mm of NB edge

MCH VCCA_TVDACC FILTER(MCH TV OUT CHANNEL B 3.3V PWR)

(MCH TV OUT CHANNEL A 3.3V PWR)MCH VCCA_TVDACC FILTER

GMCH VCCD_QTVDAC FILTER

GMCH VCCD_TVDAC FILTER(MCH TVDAC DEDICATED PWR 1.5V)

(MCH TVDAC DIGITAL QUIET 1.5V PWR)

GMCH VCCA_DPLL_B FILTER(MCH DISPLAY B PLL 1.5V PWR)

(MCH DISPLAY A PLL 1.5V PWR)

MCH VCCA_DPLLA FILTER


(MCH CRTDAC ANALOG 2.5V PWR)


(MCH LVDS ANALOG 2.5V PWR)

MCH VCCA_LVDS FILTER

be within 5 mm of NB edge

945 EDS: 1210?

MCH VCCA_CRTDAC BYPASS

Place on the edge

Layout Note:

945 EDS: 5 mOhm, 1nH (1210?)

GMCH VCCTX_LVDS BYPASS

This 0.1uF cap should

Layout Note:

FILTERING REQUIRED FOR

(MCH H/V SYNC 2.5V PWR)

MCH VCCSYNC BYPASS

GMCH VCCD_LVDS BYPASS

MCH DISPLAY PLL POWER LDOPower Interface

INTEGRATED GFX (PG. 333)(MCH LVDS DIGITAL 1.5V PWR)

(MCH LVDS DATA/CLK TX 2.5V PWR)

within 6.35 mm of NB edge

These 2 caps should be

Layout Note:

220UF

SMB2POLY2.5V20%

2

1 C1970

X5R6.3V

402

0.22uF20%

2

1 C19672.2UF10%

603CERM16.3V

2

1 C1966

CERM6.3V20%4.7uF

603

2

1 C1965

0.1uF

10VCERM402

20%

2

1 C197610UF

805-1

6.3V20%

CERM 2

1C19751/16WMF-LF402

1%

0.5121

R1975

0805

1.0UH-220MA-0.12-OHM

21

L1975

20%

402CERM10V

0.1uF

2

1 C191810VCERM402

20%0.1uF

2

1 C191510UF

805-1

6.3V20%

CERM2

1 C1914

0.1uF20%

402CERM10V

2

1 C1916

1K

402

5%

MF-LF1/16W

21

R1980

1K5%1/16WMF-LF4022

1R19811K5%1/16W

402MF-LF

2

1R1983

1K

1/16WMF-LF402

5%

21

R1982

1210

91NH21

L1970

16V22000pF-1000mA

NFM18

31

2

C1921

0.1uF

CERM10V20%

402

2

1C1920

22000pF-1000mA

NFM1816V

31

2

C1923

CERM

20%

402

10V

0.1uF

2

1C1922

180-OHM-1.5A

0603

21

L1922

1/16W

402MF-LF

5%

121

R1950

402CERM

1UF10%6.3V

2

1 C1953

1/16W5%

1

402MF-LF

21

R1951

805-1

10UF

6.3VCERM

20%

2

1 C1952

CERM402

1UF10%6.3V

2

1 C1954

16VCERM

10%

402

0.01uF

2

1 C1951

SOT23-5TPS73115

5

4

1

2

3

U1900

402CERM

10%1UF6.3V

2

1 C1950

SOT-363BAT54DW

5

6 1

D1986

1%

10

1/16W

402MF-LF

21

R1985

0603

180-OHM-1.5A

21

L1985 22000pF-1000mA16V

NFM18

31

2

C1986

0.1uF

10V20%

402CERM 2

1C1985

CERM402

16V10%0.01uF

2

1 C19810.1uF20%

402CERM10V

2

1 C1980

I243

22000pF-1000mA

NFM1816V

31

2

C1994

20%

CERM10V

0.1uF

402

2

1C1993

NFM18

22000pF-1000mA16V

31

2

C1996

20%

402CERM10V

0.1uF

2

1C1995

16V22000pF-1000mA

NFM18

31

2

C1998

0.1uF

10V20%

402CERM 2

1C1997

SOT-363BAT54DW

2

3 4

D1986

22000pF-1000mA16V

NFM18

31

2

C1992

20%0.1uF

10VCERM402

2

1C199110UF

6.3VCERM805-1

20%

2

1 C1990

180-OHM-1.5A

0603

21

L1990

MF-LF

10

402

1/16W1%

21

R1990

402

1UF10%6.3VCERM2

1 C1942

402CERM16V10%0.01uF

2

1 C1941

SOT23-5-LFMM157

51

4

2

3

U1901

CERM402

1UF10%6.3V2

1 C1940

0.1uF

402CERM10V20%

2

1 C191110UF

805-1

6.3VCERM

20%

2

1 C1910

0.1uF20%

402CERM10V

2

1 C1913

603

20%

CERM

4.7uF

6.3V2

1 C1912

402

10V20%

CERM

0.1uF

2

1 C1917

I276

0.1uF20%10VCERM402

2

1 C1962

POLY2.5V20%220UF

SMB2

2

1 C196420%

POLY2.5V

220UF

SMB2

2

1C1963

180-OHM-1.5A

0603

21

L1910

10UF20%

6.3VX5R603

2

1C1926

603X5R

6.3V20%

10UF

2

1C1927

180-OHM-1.5A

0603

21

L1923

10UF20%

X5R6.3V

6032

1C1924

603X5R

6.3V20%

10UF

2

1C1987

0603

FERR-120-OHM-0.2A

21

L1934

0.22uF20%6.3VX5R402

2

1 C1907

10UF

805-1

6.3V20%

CERM2

1 C197210UF

805-1

6.3V20%

CERM2

1 C1971

0.22uF20%6.3VX5R402

2

1 C1906

402

6.3V

0.22uF20%

X5R2

1 C19051UF

CERM6.3V

402

10%

2

1 C1904

0.1uF20%

CERM10V

402

2

1 C1937

CERM402

20%0.1uF

10V2

1 C1935

X5R805

20%6.3V

22uF

2

1C1934

0603

FERR-120-OHM-0.2A

21

L1936

20%6.3V

805X5R

22uF

2

1C1936

805-1

6.3V20%

CERM

10UF

2

1 C190310UF

805-1

6.3V20%

CERM2

1 C1902

NB (GM) DecouplingSYNC_MASTER=(MASTER)

051-7032 A

9719

SYNC_DATE=(MASTER)

=PPVCORE_S0_NB

GND_NB_VSSA_CRTDAC


PP2V5_S0_NB_VCCA_CRTDACVOLTAGE=2.5VMIN_LINE_WIDTH=1.0 mm

MIN_NECK_WIDTH=0.35MMMIN_LINE_WIDTH=1.0 mmVOLTAGE=2.5VPP2V5_S0_NB_CRTDAC_F

MIN_LINE_WIDTH=1.0 mmVOLTAGE=1.5V


PP1V5_S0_NB_VCCD_TVDAC

MIN_NECK_WIDTH=0.35MMMIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_TVDACVOLTAGE=1.5V

PP1V5_S0_NB_VCCD_QTVDAC

MIN_NECK_WIDTH=0.35MMMIN_LINE_WIDTH=1.0 mmVOLTAGE=1.5V

MIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=0.35MM

PP3V3_S0_NB_TVDAC VOLTAGE=3.3V

=PPVCORE_S0_NB


=PP2V5_S0_NB_DISP_PLL


TPS73115_NR

VOLTAGE=3.3V


PP3V3_S0_NB_TVDAC_F

MIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.5VMIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_MPLL


=PP1V5_S0_NB_VCCAUX

PP2V5_S0_NB_VCCSYNC

=PP1V5_S0_NB_VCCAUX



=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB_PLL

=PP1V8_S3_MEM_NB



=PP3V3_S0_NB

=PP3V3_S0_NB_VCC_HV

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_HPLL


PP2V5_S0_NB_CRTDAC_FOLLOW


PP1V5_S0_NB_VCC3G


=PP5V_S0_NB_TVDAC


MEM_VREF_NB_1

=PP1V8_S3_MEM_NB

MEM_VREF_NB_0

=PPVCORE_S0_NB

GND_NB_VSSA_LVDS


=PP2V5_S0_NB_CRTDAC


PP1V5_S0_NB_VCCA_DPLLA

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_DPLLBVOLTAGE=1.5V


=PP5V_S0_NB_TVDAC

MM1573DN_NR


PP3V3_S0_NB_TVDAC_FOLLOW

=PP1V5_S0_NB

VOLTAGE=3.3VMIN_LINE_WIDTH=1.0 mmMIN_NECK_WIDTH=0.35MM

PP3V3_S0_NB_VCCA_TVDACA

GND_NB_VSSA_TVBG


PP3V3_S0_NB_VCCA_TVBG



PP3V3_S0_NB_VCCA_TVDACC


VOLTAGE=3.3VPP3V3_S0_NB_VCCA_TVDACB


=PP3V3_S0_NB_VCC_HV=PP1V5_S0_NB_VCCAUX=PP2V5_S0_NB_VCCA_3GBG

=PP1V05_S0_FSB_NB

=PP1V5_S0_NB_PLL

=PP1V05_S0_NB_VTT

=PP1V5_S0_NB_3GPLL


PP1V5_S0_NB_VCCA_3GPLL

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=1.0 mmVOLTAGE=1.5VPP1V5_S0_NB_3GPLL_F


GND_NB_VSSA_3GBG

=PP1V05_S0_NB_VTT

=PP1V5_S0_NB_3GPLL

=PP1V5_S0_NB_PCIE

=PP1V5_S0_NB


MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MMVOLTAGE=1.5V

PP1V5_S0_NB_QTVDAC


VOLTAGE=1.5V

MIN_NECK_WIDTH=0.35MMMIN_LINE_WIDTH=1.0 mm

PP1V5_S0_DPLL

=PP1V5_S0_NB_TVDAC


19

19

19

19

19

19

19

16

19

19

20

19

19

16

19

19

19 19

12

19

19

19

16

16

6

17

19

19

19

17

17

19

19

14

17

17

14

17

19

17

14

14

14

16

17

19 19

17 19 17

6

19

17

19

17

19

13

19

17

19

17

6

17

17

17

17

6

6

6

17

6

6

17

6

6

6

6

6

6

6

6

6

6

17

17

6

6

5

6

5

6

17

6

6

17

17

6 6

17

17

17

17

17

6 6 6

5

6

6

6

17

17

6

6

6

6

16

6

6

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Internal pull-ups

Internal pull-up

RESERVED

RESERVED

NB_CFG<11>

NB_CFG<10>

High = Mobile CPUNB_CFG<7>

RESERVED

Internal pull-up

DMI x2 Select

PROBABLY NOT NEEDED

PROBABLY NOT NEEDED

Lane Reversal

NB_CFG<4>

NB_CFG<3>

RESERVED

NB_CFG<13:12>

NB_CFG<14>

NB_CFG<5>NB_CFG<15>

NB_CFG<16>NB_CFG<6>

NB_CFG<17>

NB_CFG<18>NB_CFG<8>

NB_CFG<9> NB_CFG<19>

NB_CFG<20>

Low = DMIx2

High = DMIx4

Low = RESERVED

High = Normal

PCIE Graphics

RESERVED

CPU Strap

RESERVED

Low = Reversed

Internal pull-up

11 = Normal Operation

10 = All-Z Mode Enabled

01 = XOR Mode Enabled

00 = Partial Clock Gating Disable

RESERVED

Internal pull-up

RESERVED

High = Enabled

Low = Disabled

RESERVED

FSB Dynamic

ODT

or PCIe x1

Low = Only SDVO

High = Both active

945 External Design Spec says reserved

Internal pull-down

Internal pull-down

Internal pull-down

Low = 1.05V

High = 1.5V

Low = Normal

High = Reversed

DMI Lane

Reversal

VCC Select

Interop. Mode

PCIe Backward

NBCFG_DMI_X2

MF-LF1/16W

2.2K5%

4022

1R2075

NBCFG_DYN_ODT_DISABLE

402MF-LF1/16W5%2.2K

2

1R2085

MF-LF

NBCFG_VCC_1V5

2.2K5%1/16W

4022

1R2058

NBCFG_DMI_REVERSE

2.2K5%1/16WMF-LF402

2

1R2059

2.2K5%1/16WMF-LF402

NBCFG_SDVO_AND_PCIE

2

1R2060

NO STUFF

2.2K5%1/16WMF-LF402

2

1R2077

NBCFG_PEG_REVERSE

2.2K5%1/16WMF-LF402

2

1R2079


NB Config Straps

051-7032 A

9720

=PP3V3_S0_NB

=PP3V3_S0_NB

=PP3V3_S0_NB

NB_CFG<18>

NB_CFG<19>

NB_CFG<20>

NB_CFG<16>

NB_CFG<5>

NB_CFG<7>

NB_CFG<9>

20

20

20

19

19

19

14

14

14

6

6

6

14

14

14

14

14

14

14

Preliminary

IO

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IO

IO

IO

IO

IN

IO

DDACK*

SATARBIASN

SATARBIASP

SATA_CLKN

SATA_CLKP

SATA_2TXP

SATA_2TXN

SATA_2RXN

SATA_2RXP

SATA_0TXP

SATA_0TXN

SATA_0RXP

SATA_0RXN

SATALED*

ACZ_SDOUT

ACZ_SDIN1

ACZ_SDIN2

ACZ_SDIN0

ACZ_SYNC

ACZ_BIT_CLK

LAN_TXD2

LAN_TXD0

LAN_TXD1

LAN_RXD1

LAN_RXD2

LAN_RSTSYNC

LAN_RXD0

LAN_CLK

EE_SHCLK

EE_CS

INTVRMEN

INTRUDER*

RTCRST*

RTCX2

RTCX1

THRMTRIP*

STPCLK*

NMI

SMI*

RCIN*

INTR

INIT*

INIT3_3V*

IGNNE*

GPIO49/CPUPWRGD

FERR*

TP1/DPRSTP*

TP2/DPSLP*

A20M*

CPUSPL*

A20GATE

LFRAME*

LDRQ1*/GPIO23

LDRQ0*

LAD3

LAD2

LAD0

LAD1

EE_DOUT

EE_DIN

ACZ_RST*

DIOR*

IDEIRQ

DIOW*

IORDY

DDREQ

DD0

DD1

DD3

DD2

DD5

DD4

DD6

DD7

DD8

DD11

DD9

DD10

DD12

DD13

DD14

DD15

DA0

DA1

DA2

DCS3*

DCS1*

AC-97/

AZALIA

RTC

LPC

LAN

CPU

IDE

SATA

(1 OF 6)

OUT

OUT

OUT

IN

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

IN

IN OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(WEAK INT PU)

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

NOTE: DDREQ HAS INTERNAL 11.5K PD

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

INTEL HIGH DEFINITION AUDIO

ACZ_SDOUT

ACZ_SYNC

ACZ_BIT_CLK

ACZ_RST#

ACZ_SDIN[0-2]

INTERNAL 20K PD ENABLED WHEN

INTERNAL 20K PD

AC ’07

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED



INTERNAL 20K PD ENABLED DURING RESET AND WHEN

INTERNAL 20K PD

INTERNAL 20K PD ENABLED WHEN


NONE

INTERNAL 20K PD

INTERNAL 20K PD ONLY ENABLED IN S3COLD

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

NOTE: DD<7> HAS INTERNAL 11.5K PD

(HSTROBE)

(STOP)

20K PD

20K PD

20K PD

(DSTROBE)

< 2 IN OF R2107 W/O STUB

LAYOUT NOTE: R2108 TO BE

CHANGED TO 54.9 FOR

LAYOUT NOTE: R2107 TO BE

< 2 IN OF SB

BOM CONSOLIDATIONNOTE: RISING-EDGE TRIGGERED AT CPU

NOTE: KEYBOARD CONTROLLER RESET CPU

POR IS SMC WILL PUT LAN INT’F

NOTE:

INTO RESET STATE TO SAVE PWR.


INTEL CONFIRMS OK TO LEAVE PINS AS NC

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU

NOTE: PULLED UP PER INTELNOTE: R2110=56 IN CV.

CHANGED TO 54.9 FOR

BOM CONSOLIDATION

NOTE: R2108=56 IN CV.

(WEAK INT PD)

(INT PU)

(INT PU)

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

NOSTUFF

1/16WMF-LF

0

5%402

21

R2100

NOSTUFF

402

2.2K

5%1/16WMF-LF

21

R2101

MF-LF

5%

39402

1/16W

21R21953921R2198

3921R2197

3921R2196

402

10K5%1/16WMF-LF

2

1R2199

BGASB

ICH7-M

OMIT

AH25

AF24

AF26

AH22

AF23

AG10

AH10

AF18

AE1

AF1

AH6

AG6

AE7

AF7

AH2

AG2

AE3

AF3

AB2

AB1

AA3

AG23

AH24

AB3

AA5

AC3

V7

V6

U7

T5

V4

U5

U3

V3

Y6

AC4

AB5

AA6

AG16

W4

Y5

AF25

AG21

AF22

AG22

AH16

AG24

AG26

Y1

Y2

W3

W1

AH15

AF15

AE15

AF16

AF12

AE12

AC12

AD12

AC13

AD14

AF13

AG13

AC15

AH14

AH13

AF14

AC14

AB13

AE14

AB15

AD16

AE16

AF17

AE17

AH17

AG27

R6

T4

T1

T3

T2

R5

U1

AH28

AE22

U2100 402

10K5%1/16WMF-LF

2

1R2194

332K402

1%1/16WMF-LF

2

1

R2105

24.9

MF-LF1/16W 1%

402

21

R2107402MF-LF

1/16W 1%

54.9

2

1

R2108

MF-LF1/16W

40254.9

1%

21

R2110

A

21 97

051-7032

SYNC_MASTER=M38 SYNC_DATE=01/05/2006

SB: 1 OF 4

TP_SB_XOR_V7

TP_SB_XOR_V6

TP_SB_XOR_U7

TP_SB_XOR_Y2

TP_SB_XOR_Y1

TP_SB_XOR_W1

SB_INTVRMEN

=PP1V05_S0_SB_CPU_IO

CPU_FERR_L

SB_A20GATE

CPU_RCIN_L

SATA_C_D2R_P

IDE_PDDACK_L

SATA_RBIAS_N

SATA_RBIAS_P

SB_CLK100M_SATA_N

SB_CLK100M_SATA_P

SATA_C_R2D_C_P

SATA_C_R2D_C_N

SATA_C_D2R_N

SATA_A_R2D_C_P

SATA_A_R2D_C_N

SATA_A_D2R_P

SATA_A_D2R_N

TP_SB_SATALED_L

SB_ACZ_SDATAOUT

TP_SB_ACZ_SDIN1

TP_SB_ACZ_SDIN2

ACZ_SDATAIN<0>

SB_ACZ_SYNC

SB_ACZ_BITCLK

SB_SM_INTRUDER_L

SB_RTC_X1

CPU_THERMTRIP_R

CPU_STPCLK_L

CPU_NMI

CPU_SMI_L

CPU_INTR

CPU_INIT_L

FWH_INIT_L

CPU_IGNNE_L

CPU_PWRGD

CPU_DPRSTP_L

CPU_DPSLP_L

CPU_A20M_L

TP_CPU_CPUSLP_L

SB_ACZ_RST_L

IDE_PDIOR_L

IDE_IRQ14

IDE_PDIOW_L

IDE_PDIORDY

IDE_PDDREQ

IDE_PDD<0>

IDE_PDD<1>

IDE_PDD<5>

IDE_PDD<4>

IDE_PDD<7>

IDE_PDD<8>

IDE_PDD<11>

IDE_PDD<9>

IDE_PDD<10>

IDE_PDD<12>

IDE_PDD<13>

IDE_PDD<14>

IDE_PDD<15>

IDE_PDA<0>

IDE_PDA<1>

IDE_PDA<2>

IDE_PDCS3_L

IDE_PDCS1_L

ACZ_SYNC SMC_RCIN_L


PM_THRMTRIP_LACZ_SDATAOUT

IDE_PDD<6>

=PP3V3_S0_SB_GPIO

=PP3V3_S0_SB_GPIO

LPC_AD<0>

LPC_AD<1>

LPC_AD<2>

LPC_AD<3>

TP_SB_DRQ0_L

TP_SB_GPIO23

LPC_FRAME_L

SB_RTC_X2

SB_RTC_RST_L

ACZ_BITCLK

ACZ_RST_L

PP3V3_S5_SB_RTC

TP_SB_XOR_U3

TP_SB_XOR_U5

TP_SB_XOR_V4

TP_SB_XOR_T5

TP_SB_XOR_W3

TP_SB_XOR_V3

IDE_PDD<2>

IDE_PDD<3>

25

25 27

27

26

24

24

59

23

23

67

67

67

67

67

25

21

34

34

7

7

7

7

7

60

7

75

7

38

38

38

21

14

21

21

60

60

60

60

60

24

6

7

38

38

38

38

5

5

38

38

38

38

38

38

38

68

26

26

5

5

5

5

5

59

5

7

7

7

5

5

38

38

5

38

38

38

38

38

38

38

38

5

38

38

38

38

38

38

38

38

38

38

68 58

6

7 68

38

6

6

58

58

58

58

58

26

26

68

68

5

38

38

Preliminary

IN

IO

IO

IO

IO

IO

IO

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IN

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

DMI_ZCOMP

DMI_CLKP

DMI_IRCOMP

USBRBIAS*

USBRBIAS

DMI0RXN

DMI0RXP

DMI0TXN

DMI0TXP

DMI2TXN

DMI2TXP

DMI3RXN

DMI3TXP

DMI3TXN

DMI3RXP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP4N

OC0*

OC1*

OC2*

OC3*

OC4*

OC6*/GPIO30

OC5*/GPIO29

SPI_CLK

SPI_CS*

SPI_MOSI

SPI_MISO

SPI_ARB

DMI_CLKN

DMI2RXP

DMI2RXN

DMI1TXP

DMI1TXN

DMI1RXN

DMI1RXP

PERN1

PERP1

PETN1

PETP1

PERN2

PERP2

PETN2

PETP2

PERN3

PERP3

PETN3

PETP3

PERN4

PERP4

PETN4

PETP4

PERN5

PERP5

PETN5

PETP5

PERN6

PERP6

PETN6

PETP6

OC7*/GPIO31

PCI-EXP

(3 OF 6)

DMI

SPI

USB

REQ4*/GPIO22

REQ0*

MCH_SYNC*

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

GPIO5/PIRQH*

GPIO4/PIRQG*

GPIO3/PIRQF*

GPIO2/PIRQE*

GPIO17/GNT5*

GPIO1/REQ5*

GNT4*/GPIO48

C/BE0*

C/BE1*

DEVSEL*

PERR*

STOP*

PCIRST*

PME*

PLTRST*

TRDY*

FRAME*

IRDY*

PCICLK

PAR

PLOCK*

SERR*

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

AD30

AD31

C/BE2*

C/BE3*

GNT0*

REQ1*

GNT1*

REQ2*

GNT2*

REQ3*

GNT3*

PIRQA*

PIRQB*

PIRQC*

PIRQD*

RSVD0

RSVD1

RSVD2

RSVD3

MISC

INT I/F

PCI

(2 OF 6)

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

IO

IO

IO

IO

OUT

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

R2211

NOTE: FWH_WP_L NOT USED

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

(INT PD)

(INT PD)

(AKA TP3, INTERNAL 20K PU)

GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

PLACE R2204 < 1/2 IN FROM SB

LAYOUT NOTE:

PLACE R2203 < 1/2 IN FROM SB

LAYOUT NOTE:

NOTE:

LPC (DEFAULT)

PCI

SPI UNSTUFF

STUFF

UNSTUFFUNSTUFF

UNSTUFF

STUFF01

10

11

STRAP R2210

(INT 20K PU)

NOTE: CHANGE SYMBOL

TO RSVD[1-9]

GNT5# GNT4#

SB BOOT BIOS SELECT

TARGETING FWH BIOS SPACE)IE SB INVERTS A16 FOR ALL CYCLES(STRAPPED TO TOP-BLOCK SWAP MODE

NO STUFF - DEFAULT

STUFF - A16 SWAP OVERRIDE

NOTE:

EXTERNAL 0

EXTERNAL 1

EXTERNAL 2

AIRPORT (MINI-PCIE)

CAMERA

CF/SD

BT

IR

BOM NOTE FOR PD ON PCI_GNT3_L:

NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L

GNT[0-3]# HAVE INT 20K PUENABLED ONLY WHEN PCIRST#=0AND PWROK=H

1/16W 402

24.9

MF-LF 1%

21

R2203

10K1/16WMF-LF

5%

4022

1R2222

402

22.6

1%1/16WMF-LF

21

R2204

1/16W5%10K

MF-LF4022

1R222310K5%1/16WMF-LF4022

1R2225

402MF-LF1/16W

10K5%

2

1R2226

10K5%1/16WMF-LF4022

1R2299

OMIT

BGASB

ICH7-M

D2

D1

N3

N4

M2

M1

L5

L4

K2

K1

J3

J4

H2

H1

G3

G4

F2

F1

P5

P2

P6

R2

P1

R27

N27

L27

J27

G27

E27

R28

N28

L28

J28

G28

E28

T24

P25

M25

K25

H25

F25

T25

P26

M26

K26

H26

F26

B3

A2

C3

E5

D4

D5

C4

D3

C25

D25

AE27

AE28

AC27

AC28

AD24

AD25

AA27

AA28

AB25

AB26

W27

W28

Y25

Y26

U27

U28

V25

V26

U2100

OMIT

BGA

ICH7-MSB

F14

F15

B10

F21

AH8

AG8

AE9

AD9

AH4

AG4

AD5

AE5

A13

E13

C17

C16

D7

B19

C26

E11

B5

C5

B4

A3

C9

B18

A9

E10

AH20

A7

G7

F8

F7

G8

D8

C8

A14

F13

D17

D16

E7

F16

A12

C15

D12

C12

B15

C14

A15

A17

E17

A18

E16

D6

E6

F18

B6

C7

A6

A8

B9

D9

E9

F10

F11

A10

A16

A11

D11

C11

E12

G13

G15

C13

B12

D14

E14

C18

E18

U2100

MF-LF

5%

402

10K1/16W

2

1R2200

402MF-LF

5%10K1/16W

2

1R225010K5%1/16WMF-LF4022

1R2251

MF-LF1/16W5%10K

4022

1R2255

402MF-LF1/16W5%10K

2

1R2298

MF-LF

402 5%

10K

1/16W

2

1

R2205

402

10KMF-LF

5%1/16W

NOSTUFF2

1

R2206

MF-LF1/16W

10K

402 5%

2

1

R2207

VOLTAGE=0

1/16WMF-LF

5%1K

4022

1 R2211


SB: 2 OF 4

A

22 97

051-7032

SB_GPIO30

PCI_REQ1_L

SB_CRT_TVOUT_MUX

PCI_REQ3_L

PCI_AD<7>

PCI_AD<6>

TP_PCI_GNT2_L

PCI_REQ2_L

PCI_GNT3_L

PCI_PME_FW_L

BOOT_LPC_SPI_L

PCI_GNT1_L

SB_GPIO31

SPI_SO

SPI_SCLK

ODD_PWR_EN_L

SB_GPIO_48

SPI_SI

USB_D_OC_L

USB_B_OC_L

USB_E_OC_L

USB_A_OC_L

SB_GPIO31

SPI_CE_L

PCI_REQ0_L

NB_SB_SYNC_L

TP_SB_RSVD9

SB_GPIO4

SB_GPIO3

SB_GPIO2

PCI_C_BE_L<0>

PCI_C_BE_L<1>

PCI_DEVSEL_L

PCI_PERR_L

PCI_STOP_L

PCI_RST_L

TP_PCI_PME_L

PLT_RST_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_CLK_SB

PCI_PAR

PCI_LOCK_L

PCI_SERR_L

PCI_AD<0>

PCI_AD<1>

PCI_AD<2>

PCI_AD<3>

PCI_AD<4>

PCI_AD<5>

PCI_AD<8>

PCI_AD<9>

PCI_AD<10>

PCI_AD<11>

PCI_AD<12>

PCI_AD<13>

PCI_AD<14>

PCI_AD<15>

PCI_AD<16>

PCI_AD<17>

PCI_AD<18>

PCI_AD<19>

PCI_AD<20>

PCI_AD<21>

PCI_AD<22>

PCI_AD<23>

PCI_AD<24>

PCI_AD<25>

PCI_AD<26>

PCI_AD<27>

PCI_AD<28>

PCI_AD<29>

PCI_AD<30>

PCI_AD<31>

PCI_C_BE_L<2>

PCI_C_BE_L<3>

TP_PCI_GNT0_L

INT_PIRQA_L

INT_PIRQB_L

INT_PIRQC_L

DMI_IRCOMP_R

SB_CLK100M_DMI_P

USB_RBIAS_PN

DMI_N2S_N<0>

DMI_N2S_P<0>

DMI_S2N_N<0>

DMI_S2N_P<0>

DMI_S2N_N<2>

DMI_S2N_P<2>

DMI_N2S_N<3>

DMI_S2N_P<3>

DMI_S2N_N<3>

DMI_N2S_P<3>

USB_A_N

USB_A_P

USB_B_N

USB_B_P

USB_C_N

USB_C_P

USB_D_N

USB_D_P

USB_E_P

USB_F_N

USB_F_P

USB_G_N

USB_G_P

USB_H_N

USB_E_N

SB_GPIO30

SB_GPIO29

SB_CLK100M_DMI_N

DMI_N2S_P<2>

DMI_N2S_N<2>

DMI_S2N_P<1>

DMI_S2N_N<1>

DMI_N2S_N<1>

DMI_N2S_P<1>

PCIE_A_D2R_N

PCIE_A_D2R_P

PCIE_A_R2D_C_N

PCIE_A_R2D_C_P

PCIE_B_D2R_N

PCIE_B_D2R_P

PCIE_B_R2D_C_N

PCIE_B_R2D_C_P

PCIE_C_D2R_N

PCIE_C_D2R_P

PCIE_C_R2D_C_N

PCIE_C_R2D_C_P

PCIE_D_D2R_N

PCIE_D_D2R_P

PCIE_D_R2D_C_N

PCIE_D_R2D_C_P

PCIE_E_D2R_N

PCIE_E_D2R_P

PCIE_E_R2D_C_N

PCIE_E_R2D_C_P

PCIE_F_D2R_N

PCIE_F_D2R_P

PCIE_F_R2D_C_N

PCIE_F_R2D_C_P

PP1V5_S0_SB_VCC1_5_B=PP3V3_S5_SB_IO

USB_C_OC_L

USB_A_OC_L

USB_B_OC_L

USB_E_OC_L

USB_D_OC_L

USB_C_OC_L

SB_GPIO29

SPI_ARB

USB_H_P

INT_PIRQD_L

TP_SB_XOR_AD5

TP_SB_XOR_AG4

TP_SB_XOR_AH4

TP_SB_XOR_AD9

TP_SB_XOR_AE5 TP_SB_XOR_AE9

TP_SB_XOR_AG8

TP_SB_XOR_AH8

=PP3V3_S0_SB

=PP3V3_S5_SB_USB

27

27

60

63

63

63

47

47

63

38

44

44

44

44

44

44

34

44

34

14

14

14

14

34

54

54

54

54

25 27

47

47

47

47

58

44

25

22

26

96

26

44

44

26

27

44

58

27

22

58

58

26

94

58

22

22

22

22

22

58

26

14

26

26

26

44

44

26

26

26

44

6

26

26

26

5

44

26

26

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

44

26

26

26

5

5

5

5

5

14

14

14

14

14

14

47

47

53

53

47

47

47

47

47

5

5

47

47

47

47

22

22

5

14

14

14

14

14

14

5

5

54

54

5

5

54

54

54

54

54

54

54

54

54

54

54

54

54

54

54

54

54

54

24 6

22

22

22

22

22

22

22

5

47

26

6

6

Preliminary

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

IO

IO

OUT

OUT

OUT

IN

IN

IO

IN

IN

IO

IN

IN

IN

IN

OUT

IO

IO

IN

OUT

IN

OUT

IN

OUT

GPIO19/SATA1GP

GPIO21/SATA0GP

GPIO36/SATA2GP

CLK48

GPIO37/SATA3GP

CLK14

SUSCLK

SLP_S3*

SLP_S4*

SLP_S5*

PWROK

TP0/BATLOW*

GPIO16/DPRSLPVR

PWRBTN*

LAN_RST*

RSMRST*

GPIO10

GPIO9

GPIO12

GPIO14

GPIO13

GPIO24

GPIO15

GPIO25

GPIO35

GPIO38

GPIO39

SMBCLK

SMBDATA

LINKALERT*

SMLINK1

SMLINK0

RI*

SYS_RST*

SPKR

SUS_STAT*

GPIO0/BM_BUSY*

GPIO18/STPPCI*

GPIO11/SMBALERT*

GPIO20/STPCPU*

GPIO26

GPIO28

GPIO27

GPIO32/CLKRUN*

GPIO33/AZ_DOCK_EN*

WAKE*

GPIO34/AZ_DOCK_RST*

SERIRQ

THRM*

GPIO7

GPIO6

VRMPWRGD

GPIO8

(4 OF 6)

SMB

GPIO

PWR MNGT

SYS GPIO

CLKS

SATA GPIO

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

HI = PRESENT

LO = NOT PRESENT

SV_SET_UP IS LINDACARD DETECT

NOTE:

NOTE:SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’FIN RESET STATE TO SAVE PWR

DEF=GPI

DEF=GPI

DEF=GPI

OD

(INT 20K PU)

NOTE FOR GPIO25:

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

LAYOUT NOTE:

(INT WEAK PD)

NOTE: RESERVED FOR FUTURE

NOT USED

NOTE FOR R2323 (DEF=NOSTUFF)

SB WILL DISABLE TCO TIMERSTRAPPING @ PWROK RISING:

SYSTEM REBOOT FEATURE

RESERVED FOR MOBILEAZALIA DOCKING INT’F

- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS

100 21 R2302100 21 R2303

100 21 R2305

10K1/16W

MF-LF5%

402

NOSTUFF

2

1

R2306

1/16W

MF-LF5%

402

10K

2

1

R2307

10K

5%MF-LF

1/16W4022

1

R2308

NOSTUFF

402

01/16W

MF-LF5%

2

1

R2309

10K1/16W

MF-LF5%

4022

1

R2310

10K

402

NOSTUFF

5%MF-LF

1/16W2

1

R2311

402

5%MF-LF

1/16W10K

2

1

R2313

5%MF-LF

1/16W0

NOSTUFF

4022

1

R2314

5%MF-LF

1/16W10K

4022

1

R2316

5%MF-LF

1/16W10K

4022

1

R2317

5%MF-LF

1/16W402

10K

2

1

R2318

10K1/16W

MF-LF5%

4022

1

R2319

10K1/16W

MF-LF5%

4022

1

R2320

SM-LF

10K5%1/16W

5678

4321

RP2300

100K

1/16WMF-LF402

5%

21R2399

1K

402

5%MF-LF

1/16W2

1

R2398

402

8.2K1/16W

MF-LF5%

2

1

R2397

402

10K1/16W

5%MF-LF2

1

R2396

5%

402MF-LF

1/16W8.2K

2

1

R2395 OMIT

BGASB

ICH7-M

F20

AD22

C21

AF20

A22

C20A27

A19

A25

B25

B22

C22

F22

D23

B24

AH21

Y4

A28

AA4

C23

A26

C19

E20

E21

AC18

AC21

AE20

AD20

AE19

AH19

AD21

U2

AC19

AG18

E23

B21

A21

D20

R3

AF19

AF21

AH18

AC20

AC22

E22

R4

E19

F19

B23

A20

AB18

B2

AC1

U2100

MF-LF1/16W5%10K

4022

1R2390

10K5%

MF-LF1/16W

4022

1R2388

NOSTUFF

10K1/16W

MF-LF5%

4022

1

R2387

1K

402

NO_REBOOT_MODE

1/16W

5%MF-LF2

1

R232310K

MF-LF

5%402

1/16W

NOSTUFF

2

1

R232610K

4021/16W

MF-LF5%

NOSTUFF

2

1

R2327

MF-LF1/16W

8.2K

402

5%2

1

R2343


A

23 97

051-7032

SB: 3 OF 4

=PP3V3_S5_SB_PM

PM_SLP_S3_L

SUS_CLK_SB

SB_CLK48M_USBCTLR

SB_CLK14P3M_TIMER

SB_GPIO26

SMB_ALERT_L

=PP3V3_S5_SB

SMB_DATA

SB_SPKR

PM_BMBUSY_L

FWH_MFG_MODE

TP_AZ_DOCK_RST_L

PATA_PWR_EN_L

=PP3V3_S5_SB

SATA_C_PWR_EN_L

=PP3V3_S0_SB_GPIO

CRB_SV_DET

SMS_INT_L

PATA_PWR_EN_L

SMC_SB_NMI

BIOS_REC

FWH_MFG_MODE

=PP3V3_S5_SB

CRB_SV_DET

TP_SB_GPIO38

TP_SB_GPIO6

IDE_RESET_L

=PP3V3_S5_SB

=PP3V3_S5_SB

VR_PWRGD_CK410

TP_AZ_DOCK_EN_L

BIOS_REC

PM_SUS_STAT_L

PM_SYSRST_L

PM_RI_L

SMLINK<0>

SMLINK<1>

SMB_LINK_ALERT_L

SATA_C_PWR_EN_L

SB_CLK100M_SATA_OE_L

TP_SB_GPIO25_DO_NOT_USE

SV_SET_UP

PM_LAN_ENABLE

PM_PWRBTN_L

PM_SB_PWROK

PM_SLP_S5_L

PM_SLP_S4_L

SB_GPIO37

SB_GPIO21

SB_GPIO19

SATA_C_DET_L

SMB_CLK

SV_SET_UP

SMC_EXTSMI_L

SMC_RUNTIME_SCI_L

PM_THRM_L

PCIE_WAKE_L

PM_CLKRUN_L

PM_STPCPU_L

PM_STPPCI_L

SMC_WAKE_SCI_L

PM_RSMRST_L

PM_BATLOW_L

INT_SERIRQ

=PP3V3_S0_SB_GPIO

PM_DPRSLPVR

67

80

26

26

27

26

26

26

60

27

79

25

25

23

25

25

25

67

58

58

67

23

11

77

34

34

23

23

21

58

23

23

23

60

26

60

77

60

58

53

44

60

21

75

6

58

59

5

5

6

27

14

23

23

6

23

6

23

26

23

58

23

23

6

23

38

6

6

26

23

58

5

23

33

23

58

58

26

58

58

38

27

23

58

58

10

41

5

33

33

58

58

58

58

6

14

Preliminary

(6 OF 6)

VSS

V5REF_SUS

VCC3_3

VCCDMIPLL

VCCSATAPLL

VCC3_3

VCCRTC

VCCUSBPLL

VCCSAUS1_5

VCC PAUX

USB COREVCC1_5_A

ARX

USB

PCI

IDE

VCCA3GP

CORE

ATX

VCC1_5_A

VCC3_3

VCC3_3

VCCSUS3_3

VCC1_5_A

VCCSUS3_3

VCCSUS3_3

VCC1_5_A

VCC1_5_A

VCC1_5_A

VCCLAN1_5

V_CPU_IO

VCC3_3/VCCHDA

VCCSUS3_3/VCCSUSHDA

VCCLAN_3_3

VCC1_05

V5REF

VCC1_5_B

(5 OF 6)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CODEC IC’S CONSIDERED SO FAR ARE 3.3V

DEPENDING ON VIO OF AZALIA INTERFACE

VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V

NOTE:

VOLTAGE GENERATED INTERNALLY

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

SO NO CONNECT HERE

CHANGE SYMBOL TO 1.05

CHANGE SYMBOL TO 1.05

S0 OR S3 IF NOT

S3 IF INTERNAL LAN IS USED

NOTE FOR VCCLAN_3_3:

0 0

OMIT

BGA

ICH7-MSB

AE21

AE18

AE13

AE11

AE8

AE4

AE2

AD23

AD19

AD15

AD11

AD8

AD7

AD4

AD3

AD1

AC11

AC9

AC5

AC2

AB28

AB27

AB24

AB21

AB19

AB16

AB14

AB11

AB6

AB4

AA26

AA25

AA24

AA1

Y28

Y27

Y24

Y3

W26

W25

W24

W6

V28

V27

V24

V15

V13

V2

U26

U25

U24

U17

U16

U15

U14

U13

U12

U4

T17

T16

T15

T14

T13

T12

T6

R18

R17

R16

R15

R14

R13

R12

R11

R1

P28

P27

P24

P17

P16

P15

P14

P13

P12

P4

P3

N26

N25

N24

AH27

AH23

AH12

AH7

N18

AH3

AH1

AG25

AG20

AG17

AG14

AG11

AG7

AG3

AG1

N17

AF28

AF27

AF11

AF8

AF4

AF2

AE25

AE24

N16

N15

N14

N13

N12

N11

N6

N5

N2

N1

M28

M27

M24

M17

M16

M15

M14

M13

M12

M5

M4

M3

L26

L25

L24

L15

L13

K28

K27

K24

J26

J25

J24

J5

J2

J1

H28

H27

H24

H5

H4

H3

G26

G25

G24

G21

G18

G14

G9

G6

G5

G2

G1

F28

F27

F12

F5

F4

F3

E15

E8

E4

E2

E1

D24

D21

D18

D13

D10

C27

C6

C2

B28

B26

B20

B17

B14

B11

B8

B1

A23

A4

U2100

OMIT

BGASB

ICH7-M

C1

K6

K5

K4

K3

G19

D22

D19

C24

E3

N7

M7

M6

L7

L6

L3

L2

L1

A24

P7

R7

G20

C28

K7

AD2

W5

W7

W2

V1

V5

Y7

AA2

AG28

AG15

AG12

AD18

AD13

AC16

AB20

AB12

G16

AA7

G12

G11

F9

D15

C10

B7

B16

B13

A5

AG19

AH11

B27

U6

AD27

AD26

AC26

AC25

Y23

Y22

W23

AC24

W22

V23

V22

U23

U22

T28

T27

T26

T23

T22

AC23

R26

R25

R24

R23

R22

P23

P22

N23

N22

M23

AB23

M22

L23

L22

K23

K22

J23

J22

H23

H22

G23

AB22

G22

F24

F23

E26

E25

E24

D28

D27

D26

AD28

AA23

AA22

AB10

AH5

AG5

AF6

AF5

AE6

AD6

J7

J6

H7

H6

A1

AC8

AB8

G17

F17

T7

AC7

AC17

AB17

AH9

AG9

AF9

AF10

AE10

AD10

AC10

AB9

AC6

AB7

P11

M18

M11

L18

L17

L16

L14

V18

L12

V17

V16

V14

V12

V11

U18

U11

T18

T11

P18

L11

AH26

AE26

AE23

F6

AD17

G10

U2100

SB: 4 OF 4SYNC_DATE=01/05/2006SYNC_MASTER=M38

A

24 97

051-7032






PP3V3_S5_SB_RTC





=PP3V3_S0_SB_VCC3_3



PP1V5_S0_SB_VCCDMIPLL

=PP3V3_S0_SB_VCC3_3


=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA



=PPVCORE_S0_SB

PP5V_S5_SB_V5REF_SUS

PP5V_S0_SB_V5REF

PP1V5_S0_SB_VCC1_5_B

26

25

25

25

25

25

25

25

25

25

25

24

21

25

25

24

25

24

25

25

24

21

25

25

25

25

6

6

6

6

6

5

6

6

6

6

6

6

6

25

6

6

6

6

6

6

25

25

22

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

3.56MM ON PRIMARY NEAR PIN AG5

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR



100-OHM,4A,0805

155S0247

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS A1 ... J7


PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

PLACEMENT NOTE:


3.56MM ON PRIMARY NEAR PIN U6



3.56MM ON PRIMARY NEAR PIN AD2

3.56MM ON PRIMARY NEAR PIN AH11

3.56MM ON PRIMARY NEAR PIN AG9

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2500 & C2505-07 < 2.54MM OF SB


PLACE C2504 < 2.54MM OF PIN F6 OF SB


PLACE C2503 < 2.54MM OF PIN AD17 OF SB

PLACEMENT NOTE:

NEAR PINS D28, T28, AD28

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACE C2509 NEAR PIN B27 OF SB

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACE CAP UNDER SB NEAR PINS V1,

V5, W2, OR W7

PLACE C2520 NEAR PIN E3 OF SB

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

NEAR PINS A5 ... G16

DISTRIBUTE IN PCI SECTION OF SB

PLACEMENT NOTE:

PLACE C2520 NEAR PIN C1 OF SB

PLACEMENT NOTE:

PLACE CAPS NEAR PIN W5 OF SB

PLACEMENT NOTE:

PLACE CAPS AT EDGE OF SB

PLACEMENT NOTE:

PLACE CAPS NEAR PINS

PLACEMENT NOTE:


PLACEMENT NOTE:

K3 ... N7 OF SB


PLACEMENT NOTE:

AB8 AND AC8 OF SB

PLACE NEAR PINS AE23, AE26 & AH26 OF SB

1UH,0.5A,20%,1206152S0315

SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON

A24 ... G19 AND P7 OF SB

220UF20%

POLY2.5V

SMB2

2

1 C2500

402

0.1UF10%16VX5R2

1 C2510

0

X5R16V10%0.1UF

4022

1 C2512

0

MF-LF5%

1

6031/10W

21

R2500

SOT23

BAT54E33

1D2501

SOT23

BAT54E33

1D2500

4.7UF20%6.3VCERM603

2

1 C2524

X5R16V10%0.1UF

4022

1 C2540

402

6.3VCERM

10%1UF

2

1 C2541

402

0.1UF10%16VX5R 2

1C2542

X5R

10%

402

0.1UF16V

2

1 C2503

0

X5R16V10%0.1UF

4022

1 C2504

0

MF-LF1/16W

402

10

1%

21

R2501

100-OHM-EMISM-3

21

L2500

0

402X5R16V10%0.1UF

2

1 C2505

402

0.1UF10%16VX5R2

1 C2506

402X5R16V10%0.1UF

2

1 C2507

12060.28-OHM

21

L2507

402CERM16V10%0.01UF

2

1 C250110UF

805-1CERM6.3V20%

2

1 C2508

0

402X5R16V10%0.1UF

2

1 C2509

0

0.1UF10%16VX5R402

2

1 C2511

0

10%16VX5R402

0.1UF

2

1 C2517

0

402X5R16V10%0.1UF

2

1 C2513

0

0

1UF10%

CERM6.3V

4022

1 C2514

0

10%16V

402

0.01UF

CERM2

1 C2520

402

16V10%0.01UF

CERM2

1 C2515

0

0

2.5V20%330UF

POLYCASE-C2

2

1 C2516100MF-LF402

1/16W

5%

2

1

R2502

402

6.3VCERM

10%1UF

2

1 C2502

X5R16V10%0.1UF

4022

1 C2518

0

402

0.1UF10%16VX5R2

1 C2519

0

X5R16V10%0.1UF

4022

1 C2521

0

10%

402X5R16V

0.1UF

2

1 C2522

402

0.1UF10%16VX5R2

1 C2523

0

402

0.1UF10%16VX5R2

1 C2525

0

402

10%

X5R16V

0.1UF

2

1 C2526

X5R16V10%0.1UF

4022

1 C2527

402

0.1UF10%16VX5R2

1 C2528

X5R16V10%0.1UF

4022

1 C2529

0

X5R16V10%0.1UF

4022

1 C2530

X5R16V10%0.1UF

4022

1 C2534

0

X5R16V10%0.1UF

4022

1 C2531

X5R16V10%0.1UF

4022

1 C2532

0

X5R16V10%0.1UF

4022

1 C2533

051-7032

9725

A

SB:DECOUPLINGSYNC_MASTER=MASTER SYNC_DATE=MASTER

=PP5V_S5_SB

PP5V_S5_SB_V5REF_SUS

MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=5V


PP3V3_S5_SB_RTC


PP1V5_S0_SB_R

MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.5V

VOLTAGE=1.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.15MM

PP1V5_S0_SB_VCCDMIPLL

=PP1V5_S0_SB

PP5V_S0_SB_V5REFMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=5V








=PPVCORE_S0_SB


=PP3V3_S0_SB_VCC3_3




=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB

=PP3V3_S5_SB

=PP5V_S0_SB

=PP3V3_S0_SB



PP1V5_S0_SB_VCC1_5_B

26 24

25

25

25

25

26

24

24

21

24

25

24

24

24

24

24

24

24

24

24

24

24

24

24

24

25

23

22

21

24

6

24

6

5

6

24

6

24

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

6

22

Preliminary

OUT

IO

IO

IN

IN

IN

IN

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

IN

IN

OUT

OUTIN

VCC

GND

IN

OUT

IN

IN

OUT

OUT

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

USING 1% FOR BOM CONSOLIDATION

PLACE R2603 IN ACCESSIBLE LOCATION

FLASH DURING DEVELOPMENTRESET_L IN CASE OF BAD SMCPROVIDE PADS TO SHORT THISRESISTOR TO GND USED TO

RESET

NOTE: ISL6262 SPEC (P 5) SAID TO USE 1.9K

SHOULD BE STUFFED WITH ITP & NO DEVELOPMENT

NOTE: R2696 CAN’T EXIST WITH BOTH ITP & DEVELOPMENT

0

1%

20.0K

4021/16W

MF-LF

21

R2600

BAT54E3

SOT2331

D2600

BAT54E3

SOT2331

D2601

SOT23-5

74LVC1G04DBVG44

5

3

2

U2603

402

20%10VCERM

0.1UF21

C2611

10%6.3VCERM402

1UF

2

1 C2605

SPSTSM-LF

DEVELOPMENT

43

21

SW2600

DEVELOPMENT

10K

MF-LF

5%1/16W

4022

1R26990

DEVELOPMENT

SOT143

MAX6816

4

32

1

U2699

402

DEVELOPMENT

20%10VCERM

0.1UF

2

1 C2699

DEVELOPMENT

402MF-LF1/16W5%100K

2

1R2698

0.1UF20%

DEVELOPMENT

10VCERM402

2

1 C2698

1%4021M1/16W

MF-LF

2

1

R2606 SB_SYSRST_4_PVT

402MF-LF1/16W5%10K

2

1R2697

MF-LF1/16W5%

0

402

NOT_DEVELOPMENT_PLUS_ITP

21

R2696

32.768KSM-LF

CRITICAL

41 Y2600

SOT23-5-LFMC74VHC1G08 5

4

1

2

3

U2601

SOT23-5-LF

DEVELOPMENT

MC74VHC1G085

4

1

2

3

U2698

DEVELOPMENT

MF-LF1/16W5%

1K

402

21

R2650

402

10K5%1/16WMF-LF

2

1R2651MF-LF1/16W 5%4021K

2

1

R260705%1/16WMF-LF402NOSTUFF2

1R2603

0

CRITICAL

BB1020SM

1

2

J2600

40210M

MF-LF1/16W 5%

2

1

R2609

1%

1.82K1/16WMF-LF402

21

R2611

402

0.1UF

CERM10V20%

21

C2607

402 5%MF-LF1/16W10K

21

R2612

0

15PF

CERM402 5%

50V

21

C2608

10K

21R2622

15PF

50V5%402

CERM

21

C2609

8.2K21R26238.2K21R26248.2K21R26258.2K21R2626

0

8.2K21R26278.2K21R2628

8.2K21R26298.2K21R2630

8.2K21R26318.2K21R2632

8.2K21R26338.2K21R2634

8.2K21R26368.2K21R2637

8.2K21R26388.2K21R26398.2K21R2640

8.2K21R26418.2K21R2642

8.2K21R2643

CERM6.3V10%1UF

4022

1 C2610

051-7032 A

26 97

SB: MISCSYNC_DATE=MASTERSYNC_MASTER=MASTER

ALL_SYS_PWRGD

MAKE_BASE=TRUESB_GPIO5ODD_PWR_EN_L

U2698_4

SMS_INT_L

PP3V3_S5

=PP3V3_S0_SB_PCI

PP3V3_S5

PCI_PERR_L

PCI_IRDY_L

PCI_FRAME_L

PCI_TRDY_L

PCI_STOP_L

PCI_REQ0_L

PCI_REQ2_L

VR_PWRGOOD_DELAY

SW_RST_DEBNC

XDP_DBRESET_L

PM_SB_PWROK

=PP3V3_S0_SB_PM

SB_GPIO2

SB_GPIO3

SB_GPIO4

INT_PIRQC_L

INT_PIRQD_L

INT_PIRQB_L

INT_PIRQA_L

PCI_REQ3_L

PCI_REQ1_L

PCI_LOCK_L

PCI_DEVSEL_L

PCI_SERR_L

PP3V3_S0

PP3V3_S0

CK410_PD_VTT_PWRGD_L

PPVBATT_S5_RTCMIN_LINE_WIDTH=0.6MMVOLTAGE=3.3V SB_SM_INTRUDER_L

=PP3V3_S5_SB

VR_PWRGD_CK410_LVR_PWRGD_CK410

PM_SYSRST_L

SB_RTC_X1

SB_RTC_X2

SW_RST_BTN_L

SB_RTC_RST_LVOLTAGE=3.3V

PPVBATT_S5_RTC_R


PP3V3_S5


PP3V3_S5_SB_RTC

83

83

83

80

80

80

79

79

79

78

78

94

94

78

77

77

83

83

77

76

76

76

76

76

66

66

61

61

66

65

65

59

59

65

59

59

41

41

59

25

26

26

75

26

26

25

58

26

24

77

58

6

6

44

44

44

44

44

14

11

38

44

27

27

44

44

10

10

33

23

23

6

21

58

22

23

5

6

5

22

22

22

22

22

22

22

5

7

23

6

22

22

22

22

22

22

22

22

22

22

22

22

6

6

21

6

75 23

5

21

21

21 5

5

Preliminary

IO

IO

IO

IO

IO

IO

IO

IO

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SB I2C BUSSESPCI CONTROL

2.2KNOSTUFF

21R27192.2K

NOSTUFF

21R2718

2.2K21R27292.2K21R2728

051-7032 A

27 97


SB: SMB HUB AND ALIAS

MAKE_BASE=TRUEPCI_REQ1_L PCI_FW_REQ_L

PCI_FW_GNT_LNO_TEST=TRUE

SMB_CLK

SMB_DATA

=PP3V3_S0_SB_GPIO

=PP3V3_S5_SB_IO

MAKE_BASE=TRUESMB_CLK

=I2C_MEM_SDA

=I2C_MEM_SCL

MAKE_BASE=TRUESMB_DATA

=SMB_AIRPORT_DATA

=SMB_AIRPORT_CLK

SMB_CK410_DATA

SMB_CK410_CLK

PCI_GNT3_L

MAKE_BASE=TRUEPCI_GNT1_L

TP_PCI_GNT3_LMAKE_BASE=TRUE

PCI_REQ3_L

23

27

29

29

27 26

27

27

21

22

23

28

28

23

53

53

33

33

26

22 44

44

23

23

6

6

22

22

22

Preliminary

DQ58

DQ59

SA1GNDVDDSPD

SDA

SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

One 0.1uF per connector

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =PP1V8_S3_MEM

Page Notes

Signal aliases required by this page:

BOM options provided by this page:

- =I2C_MEM_SDA

- =I2C_MEM_SCL

(NONE)

DDR2 Bypass Caps(For return current)

Power aliases required by this page:

NC

ADDR=0xA0(WR)/0xA1(RD)

NC

NC

NC

516S0403 SOME ANCHOR PINS CONNECTEDTO NETS TO IMPROVE PLANE POUR

DDR2 VRef

20%

402CERM

0.1uF

10V2

1 C2813

20%

402CERM

0.1uF

10V2

1 C2812

20%

402CERM

0.1uF

10V2

1 C2811

20%

402CERM

0.1uF

10V2

1 C2810

10V

0.1uF

CERM402

20%

2

1 C2819

10V

0.1uF

CERM402

20%

2

1 C2818

10V

0.1uF

CERM402

20%

2

1 C2817

10V

0.1uF

CERM402

20%

2

1 C2816

10V

0.1uF

CERM402

20%

2

1 C28210.1uF

10VCERM402

20%

2

1 C2820

10V

0.1uF

CERM402

20%

2

1 C2815

10V

0.1uF

CERM402

20%

2

1 C2814

CERM402

10V20%

0.1uF

2

1C2800

20%10UF

6.3VX5R603

2

1 C2804

20%10UF

6.3VX5R603

2

1 C2803

20%10UF

6.3VX5R603

2

1 C2802

20%10UF

6.3VX5R603

2

1 C2801

F-RT-SM1

CRITICAL

DDR2-SODIMM-STD

109

24

21

18

15

196

193

190

187

184183

178177

172

12

171

168

165

162161

156155

150149

145

9

144

139

138

133

132

128127

122121

7877

7271

6665

6059

5453

8

4847

4241

4039

3433

2827

3

21

199

112111

104103

9695

8887

118117

8281

195

197

200

198

110

108

114

163

120

83

69

50

115

119

80

84

86

116

205

204

203

202

201

186

188

167

169

146

148

129

131

68

70

49

51

29

31

11

13

25

23

16

194

192

182

180

14

191

189

181

179

176

174

160

158

175

173

6

159

157

154

152

142

140

153

151

143

141

4

136

134

126

124

137

135

125

123

76

74

19

64

62

75

73

63

61

58

56

46

44

17

57

55

45

43

38

36

22

20

37

35

7

5

185

170

147

130

67

52

26

10

79

166

164

32

30

113

85

106

107

91

93

92

94

97 98

99 100

89 90

105

101 102

J2800

10%2.2UF

6.3VCERM1

603

2

1C2850

402

10VCERM

20%0.1uF

2

1C28522.2UF

10%6.3VCERM1

603

2

1C2851

MF-LF402

1K1%1/16W

2

1R2800

1/16W1%

402MF-LF

1K

2

1R2801


28 97

A051-7032

DDR2 SO-DIMM Connector A

=PP1V8_S3_MEM

=PP1V8_S3_MEM

MEM_VREF

=PPSPD_S0_MEM

MEM_CLK_P<0>

MEM_A_DQ<52>

MEM_A_DQ<31>

MEM_A_DQ<63>

MEM_A_DQ<62>

MEM_A_DQS_P<7>

MEM_A_DQS_N<7>

MEM_A_DQ<60>

MEM_A_DQ<54>

MEM_CLK_N<1>

MEM_CLK_P<1>

MEM_A_DQ<53>

MEM_A_DQS_P<5>

MEM_A_DQS_N<5>

MEM_A_DQ<45>

MEM_A_DQ<44>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DM<4>

MEM_A_DQ<37>

MEM_A_DQ<36>

=PP1V8_S3_MEM

MEM_A_A<13>

MEM_ODT<0>

MEM_CS_L<0>

MEM_A_RAS_L

MEM_A_BS<1>

MEM_A_A<0>

MEM_A_A<2>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<11>

TP_MEM_A_A<14>

TP_MEM_A_A<15>

MEM_A_DQ<46>

MEM_A_DQ<47>

MEM_A_DM<6>

MEM_A_DQ<55>

MEM_A_DQ<61>

MEM_CKE<1>

MEM_A_DQ<30>

MEM_A_DQS_P<3>

MEM_A_DQS_N<3>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DM<2>

DIMM_OVERTEMP_L

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_CLK_N<0>

MEM_A_DQ<13>

MEM_A_DQ<7>

MEM_A_DM<0>

MEM_A_DQ<5>

MEM_A_DQ<4>

MEM_A_DQ<6>

MEM_A_DQ<12>

MEM_A_DQ<43>

=I2C_MEM_SCL

=I2C_MEM_SDA

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DM<7>

MEM_A_DQ<56>

MEM_A_DQ<50>

MEM_A_DQS_N<6>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DM<5>

MEM_A_DQ<41>

MEM_A_DQ<35>

MEM_A_DQS_P<4>

MEM_A_DQS_N<4>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_ODT<1>

MEM_CS_L<1>

MEM_A_CAS_L

MEM_A_WE_L

MEM_A_BS<0>

MEM_A_A<10>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<12>

MEM_A_BS<2>

MEM_CKE<0>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DM<3>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<11>

MEM_A_DQ<10>

MEM_A_DQS_P<1>

MEM_A_DQS_N<1>

MEM_A_DQ<9>

MEM_A_DQ<8>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQS_N<0>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_A_DQ<34>

MEM_A_DQ<40>

MEM_A_DQ<42>

MEM_A_DQS_P<6>

MEM_A_DQ<51>

MEM_A_DQ<57>

MEM_A_DQS_P<0>

MEM_A_DM<1>

=PP1V8_S3_MEM

=PP1V8_S3_MEM

MEM_VREF

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

VOLTAGE=0.9V

29

29 29

29

29

28

28

29

28

28

28

29

6

6

28

29

15

15

15

15

15

15

6

30

30

30

30

30

30

30

30

30

30

30

15

30

15

15

59

15

15

29

29

15

15

15

15

30

30

30

30

30

30

30

30

30

30

30

30

30

30

15

15

15

15

15

15

15

15

15

6

6

28

5

5

5

6

14

15

15

15

15

5

5

15

5

14

14

15

5

5

15

15

5

15

15

15

15

5

15

14

14

15

15

15

15

15

15

15

15

15

5

15

15

15

14

15

5

5

15

15

15

15

15

29

15

15

15

5

14

15

5

15

15

15

15

15

15

27

27

5

15

15

15

15

5

15

15

15

15

15

5

5

15

15

14

14

15

15

15

15

15

15

15

15

15

15

15

14

15

15

15

5

15

15

15

5

5

15

5

15

15

5

5

15

15

15

15

5

15

15

15

15

15

5

15

15

5

15

5

5

5

Preliminary

DQ58

DQ59

SA1GNDVDDSPD

SDA

SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Resistor prevents pwr-gnd short

The reference voltage must be provided

by another page.

(NONE)

- =I2C_MEM_SDA

- =I2C_MEM_SCL

DDR2 Bypass Caps(For return current)


Page NotesPower aliases required by this page:


516S0404

NC

NC

NC

NC

ADDR=0XA4(WR)/0XA5(RD)

NOTE: This page does not supply VREF.

- =PP1V8_S3_MEM

- =PPSPD_S0_MEM (2.5V - 3.3V)

SOME ANCHOR PINS CONNECTEDTO NETS TO IMPROVE PLANE POUR

1UF10%

CERM402

6.3V2

1 C2908

20%

402CERM10V

0.1uF

2

1C2900

10K5%1/16WMF-LF402

2

1R2900

1UF10%

CERM6.3V

402

2

1 C2909

402

6.3VCERM

10%1UF

2

1 C2910

402

6.3VCERM

10%1UF

2

1 C2911

402

6.3VCERM

10%1UF

2

1 C2915

402

6.3VCERM

10%1UF

2

1 C2914

402

1UF10%

CERM6.3V

2

1 C2913

402

1UF10%

CERM6.3V

2

1 C2912

402

6.3VCERM

10%1UF

2

1 C2919

402

6.3VCERM

10%1UF

2

1 C2918

402

1UF10%

CERM6.3V2

1 C2917

402

1UF10%

CERM6.3V2

1 C2916

402

6.3VCERM

10%1UF

2

1 C2923

402

6.3VCERM

10%1UF

2

1 C2922

402

1UF10%

CERM6.3V

2

1 C2921

402

1UF10%

CERM6.3V

2

1 C2920

DDR2-SODIMM-REV

F-RT-SM1

CRITICAL

109

24

21

18

15

196

193

190

187

184183

178177

172

12

171

168

165

162161

156155

150149

145

9

144

139

138

133

132

128127

122121

7877

7271

6665

6059

5453

8

4847

4241

4039

3433

2827

3

21

199

112111

104103

9695

8887

118117

8281

195

197

200

198

110

108

114

163

120

83

69

50

115

119

80

84

86

116

205

204

203

202

201

186

188

167

169

146

148

129

131

68

70

49

51

29

31

11

13

25

23

16

194

192

182

180

14

191

189

181

179

176

174

160

158

175

173

6

159

157

154

152

142

140

153

151

143

141

4

136

134

126

124

137

135

125

123

76

74

19

64

62

75

73

63

61

58

56

46

44

17

57

55

45

43

38

36

22

20

37

35

7

5

185

170

147

130

67

52

26

10

79

166

164

32

30

113

85

106

107

91

93

92

94

97 98

99 100

89 90

105

101 102

J2900

6.3VCERM1

603

10%2.2UF

2

1C2950

0.1uF20%

CERM10V

402

2

1C2952

603CERM16.3V10%

2.2UF

2

1C2951

DDR2 SO-DIMM Connector B

A051-7032

29 97


MEM_VREF

=PP1V8_S3_MEM

=PP1V8_S3_MEM=PP0V9_S0_MEM_TERM

=PP1V8_S3_MEM

=PPSPD_S0_MEM

MEM_CLK_P<3>

MEM_B_DQ<52>

MEM_B_DQ<31>

MEM_B_SPD_SA1

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQS_P<7>

MEM_B_DQS_N<7>

MEM_B_DQ<60>

MEM_B_DQ<54>

MEM_CLK_N<2>

MEM_CLK_P<2>

MEM_B_DQ<53>

MEM_B_DQS_P<5>

MEM_B_DQS_N<5>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DM<4>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_A<13>

MEM_ODT<2>

MEM_CS_L<2>

MEM_B_RAS_L

MEM_B_BS<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<11>

TP_MEM_B_A<14>

TP_MEM_B_A<15>

MEM_B_DQ<46>

MEM_B_DQ<47>

MEM_B_DM<6>

MEM_B_DQ<55>

MEM_B_DQ<61>

MEM_CKE<3>

MEM_B_DQ<30>

MEM_B_DQS_P<3>

MEM_B_DQS_N<3>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DM<2>

DIMM_OVERTEMP_L

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_CLK_N<3>

MEM_B_DQ<13>

MEM_B_DQ<7>

MEM_B_DM<0>

MEM_B_DQ<5>

MEM_B_DQ<4>

MEM_B_DQ<6>

MEM_B_DQ<12>

MEM_B_DQ<43>

=I2C_MEM_SCL

=I2C_MEM_SDA

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DM<7>

MEM_B_DQ<56>

MEM_B_DQ<50>

MEM_B_DQS_N<6>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DM<5>

MEM_B_DQ<41>

MEM_B_DQ<35>

MEM_B_DQS_P<4>

MEM_B_DQS_N<4>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_ODT<3>

MEM_CS_L<3>

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_BS<0>

MEM_B_A<10>

MEM_B_A<1>

MEM_B_A<3>

MEM_B_A<5>

MEM_B_A<8>

MEM_B_A<9>

MEM_B_A<12>

MEM_B_BS<2>

MEM_CKE<2>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DM<3>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQS_P<2>

MEM_B_DQS_N<2>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<11>

MEM_B_DQ<10>

MEM_B_DQS_P<1>

MEM_B_DQS_N<1>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQS_N<0>

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DQ<34>

MEM_B_DQ<40>

MEM_B_DQ<42>

MEM_B_DQS_P<6>

MEM_B_DQ<51>

MEM_B_DQ<57>

MEM_B_DQS_P<0>

MEM_B_DM<1>

=PPSPD_S0_MEM

=PP1V8_S3_MEM

29

29

29

29

28

28

28

29

29

28

28

6

6 30

6

28 15

15

15

15

15

15

15

30

30

30

30

30

30

30

30

30

30

30

30

15

15

15

59

15

28

28

15

15

15

15

30

30

30

30

30

30

30

30

30

30

30

30

30

30

15

15

15

15

15

15

15

15

15

28

6

5

5

5 6

5

6

14

15

15

15

5

5

5

15

15

14

14

15

5

5

15

5

15

5

15

15

15

15

14

14

15

15

15

15

15

15

15

15

5

5

15

15

15

15

15

14

15

5

5

15

15

5

15

15

28

15

15

15

15

14

15

15

15

15

15

5

15

15

27

27

15

15

15

15

15

5

15

5

15

15

15

5

5

15

15

14

14

15

15

15

15

15

15

15

15

15

15

15

14

15

15

15

5

15

15

15

5

5

15

15

15

15

5

5

15

5

15

15

5

15

15

15

15

15

5

15

15

5

15

6

5

Preliminary

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

One cap for each side of every RPAK, one cap for every two discrete resistors

BOMOPTION shown at the top of each group applies to every part below it

565% 1/16W MF-LF 402

21R3001

5% MF-LF 40256

1/16W21R3009

MF-LF 4025%56

1/16W21R3011

402MF-LF1/16W5%56 21R3025

5% 1/16W MF-LF 40256 21R3035

0

2

1

15 29

15 29

15 29

15 29

20%10VCERM402

0.1uF

2

1 C3004

10V

0.1uF

402CERM

20%

2

1 C3006

20%10VCERM402

0.1uF

2

1 C300820%10VCERM402

0.1uF

2

1 C3009

20%

CERM402

10V

0.1uF

2

1 C3013

402CERM10V20%0.1uF

2

1 C3014

402CERM10V20%0.1uF

2

1 C3015

5% 1/16W SM-LF56 63RP3000

5% 1/16W SM-LF56 54RP3000

5% 1/16W SM-LF56 81RP3000

5% 1/16W SM-LF56 72RP3000

5% SM-LF56

1/16W72RP3001

5% 1/16W SM-LF56 81RP3001

5% 1/16W SM-LF56 54RP3001

5% SM-LF56

1/16W63RP3001

5% SM-LF1/16W56 54RP3002

5% 1/16W SM-LF56 81RP3002

5% 1/16W SM-LF56 72RP3002 5% 1/16W SM-LF56 63RP3002

SM-LF1/16W5%56 81RP3003

SM-LF56

1/16W5%72RP3003

SM-LF5% 1/16W56 63RP3003

SM-LF5%56

1/16W54RP3003

SM-LF5% 1/16W56 81RP3004

SM-LF56

1/16W5%63RP3004

SM-LF56

1/16W5%54RP3004

SM-LF1/16W5%56 81RP3005

SM-LF56

1/16W5%72RP3005

SM-LF5% 1/16W56 63RP3005

56SM-LF5% 1/16W

54RP3005

SM-LF1/16W5%56 81RP3006

SM-LF56

1/16W5%72RP3006

56SM-LF5% 1/16W

63RP3006

565% SM-LF1/16W

54RP3007

5%56

SM-LF1/16W63RP3007

SM-LF56

1/16W5%72RP3007

SM-LF56

1/16W5%81RP3007

SM-LF5% 1/16W56 54RP3008

SM-LF56

1/16W5%63RP3008

SM-LF5% 1/16W56 72RP3008

SM-LF56

5% 1/16W81RP3008

SM-LF56

5% 1/16W81RP3009

SM-LF56

1/16W5%72RP3009

SM-LF5% 1/16W56 63RP3009 SM-LF5% 1/16W56 54RP3009

SM-LF56

1/16W5%63RP3010

SM-LF5% 1/16W56 72RP3010

561/16W5% SM-LF

81RP3010

5% 1/16W56

SM-LF

54RP3010

56SM-LF1/16W5%

81RP3011SM-LF5% 1/16W

56 72RP3011

SM-LF56

1/16W5%54RP3011

56SM-LF5% 1/16W

54RP3006

SM-LF5% 1/16W56 63RP3011

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

15 29

402CERM10V20%0.1uF

2

1 C3031

20%10VCERM402

0.1uF

2

1 C3032

402CERM10V20%0.1uF

2

1 C3043

402CERM10V20%0.1uF

2

1 C3036

402CERM10V20%0.1uF

2

1 C3037

402CERM10V20%0.1uF

2

1 C3038

402CERM10V20%0.1uF

2

1 C3001

402CERM10V20%0.1uF

2

1 C3000

402CERM10V20%0.1uF

2

1 C3040

CERM402

10V20%0.1uF

2

1 C3039

402CERM10V20%0.1uF

2

1 C30420.1uF

402CERM10V20%

2

1 C3041

0

1

0

1

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

14 28 29

14 28 29

15 28

15 28

15 28

15 28

15 28

2

3

2

3

402CERM10V20%0.1uF

2

1 C3033

402CERM10V20%0.1uF

2

1 C3030

10V20%

402CERM

0.1uF

2

1 C3011

20%10VCERM402

0.1uF

2

1 C3010

402CERM10V20%0.1uF

2

1 C3007

20%10VCERM402

0.1uF

2

1 C3005

20%10VCERM402

0.1uF

2

1 C3035

0

1

2

3

14 28 29

051-7032 A

9730

Memory Active Termination

MEM_A_A<13..0>

MEM_B_BS<2..0>

MEM_CS_L<3..0>

MEM_CKE<3..0>

MEM_ODT<3..0>

MEM_A_BS<2..0>

=PP0V9_S0_MEM_TERM

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<5>

MEM_A_WE_L

MEM_B_A<0>

MEM_B_A<3>

MEM_A_CAS_L

MEM_B_RAS_L

MEM_B_WE_L

MEM_B_CAS_L

MEM_B_A<2>

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<1>

MEM_B_A<4>

MEM_B_A<10>

MEM_A_RAS_L

29 6

Preliminary

VREF

VTT

GND

VTT_IN

ENVTTS

VDDQ VCC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


- =PP0V9_S0_MEMVTT_LDO

USING 1% FR BOM CONSOLIDATION

disable MEMVTT in sleep.

?Can 5V be S0 if 1V8 is S3?

If power inputs are not S0,

Page Notes

MEMVTT_EN can be used to

- =PP1V8_S0_MEMVTT

- =PP5V_S0_MEMVTT


Power aliases required by this page:

(NONE)

(NONE)

DDR2 Vtt Regulator

6.3V20%

10UF

CERM805-1

2

1C3101

CRITICAL

BD3533FVMMSOP-8

3

7

8

4

5 6

1

2

U3100

MEMVTT_EN_PU

1K

402MF-LF1/16W

5%

2

1R3100

CRITICAL

SMC-LF

150UF20%

POLY6.3V

C3105

6.3V20%

10UF

CERM805-1

2

1C3102

402MF-LF1/16W

221

1%

21

R3101

603CERM1

10%2.2UF

6.3V2

1C3109

402CERM10V

0.1UF20%

2

1C3110

6.3V10%1uF

CERM402

2

1 C3100

Memory Vtt Supply

051-7032 A

9731


U3100_VDDQ

MEMVTT_EN

=PP5V_S0_MEMVTT

MEMVTT_VREF

=PP0V9_S0_MEMVTT_LDO

=PP1V8_S0_MEMVTT

79

6

6

6

Preliminary

VTT_PWRGD*/PD

DOT96T/27MHZ_NON-SPREAD

SRCT_0/LCD100MT

CPUC2_ITP/SRCC_10

VDD48

XIN

VDD_PCI1

VDD_SRC0

VDD_REF

VDD_SRC1

VDD_SRC2

VDD_SRC3

REF1/FCTSEL0

REF0/FSC

FSA/48M

DOT96C/27MHZ_SPREAD

CLKREQ_8*

SRCT_8

SRCC_8

SRCT_7

SRCC_7

CLKREQ_6*

CPUT2_ITP/SRCT_10

IREF

SDATA

SCLK

VSS_REF

VSS_PCI1

VSS_PCI0

VSS_CPU

VSS48

VSS_SRC

PCIF1

PCI1

SRCT_5

THRML_PAD

PCI4

PCI2

FSB

CLKREQ_4*

SRCC_5

SRCC_4

SRCT_4

SRCT_3

CLKREQ_3*

SRCC_3

SRCC_2

SRCT_2

SRCC_1

CLKREQ_1*

SRCT_1

SRCC_0/LCD100MC

CPUC1

CPUT1

CPUC0

CPUT0

PCI_STP*

CPU_STP*

SRCC_6

CLKREQ_5*

SRCT_6

PCIF0/ITP_SEL

PCI5/FCTSEL1

PCI3

XOUT

VDDA

VSSA

VDD_PCI0

VDD_CPU

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IO

OUT

IN

IO

IO

OUT

OUT

IN

IN

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(ICH7M USB 48MHZ)

(FROM CPU VCORE PWR GOOD)

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

(GIGA LAN PCI-E 100 MHZ )

(WIRELESS PCI-E 100 MHZ )

(FROM GMCH CLK_REQ*)

(FROM ICH7 GPIO35)

(ICH7M DMI 100 MHZ )

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

(GPU PCI-E 100 MHZ )

(INT PU)

(INT PU)

(EACH POWER PIN PLACED ONE 0.1UF)(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

(SMC LPC 33MHZ)(TPM LPC 33MHZ)(FW PCI 33MHZ)

(ICH SATA 100 MHZ)

(INT PU)

FCTSEL0

SRCC0

SRCC0

SRCC0

SRCT0

100MT_SSTDOT96C

SPREAD27M NON

OFF LOW11

1

10

0 0

FCTSEL1

100MC_SST

PIN 11PIN 10

DOT96T

DOT96T

SRCT0

SRCT0

* FOR INT. GRAPHIC SYSTEM

* FOR EXT. GRAPHIC SYSTEM

PIN 6

(INT PU)

(INT PD)

(NOT USED )

(CPU HOST 133/167MHZ)

(INT PU) (SIGNAL NAME WILL BE CHANGED POST PROTO TO REMOVE 100M FROM SIGNAL NAME)

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

(ITP HOST 133/167MHZ)

(GMCH HOST 133/167MHZ)

(FROM ICH7 GPIO20 STPCPU* )(FROM ICH7 GPIO18 STPPCI* )

(GMCH G_CLKIN 100 MHZ )

(INT PD)

(ICH7M,SIO,LPC REF. 14.318MHZ)

(FOR PCI-E CARD)

(INT PU)

0

(PORT80 LPC 33MHZ)

(ICH7M PCI 33MHZ)

(ICH SM BUS)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(NO USED)

27MSPREAD

TBD

DOT96C

PIN 7

(INT PD)

(INT PU)

(INT PU)

603X5R

20%6.3V

10UF

2

1 C3309

FERR-120-OHM-1.5A

0402

21

L3302

402

0.1UF10%

X5R16V2

1 C330510%16VX5R402

0.1UF

2

1 C3306

16VX5R

0.1UF10%

4022

1 C3307

10%

402

0.1UF16VX5R2

1 C3308

CRITICALOMITCY284455QFN

50

51

2

39

31

52

66

62

46

5

38

35

28

17

12

49

67

61

43

3

69

33

29

26

23

21

18

15

13

10

32

30

27

24

22

19

16

14

11

48

47

53

54

1

68

56

65

64

63

58

57

40

8

4

6

7

37

42

45

36

41

44

55

34

25

60

20

59

9

U3301

402

15PF5%

CERM50V2

1 C3390

402

5%15PF50VCERM2

1 C3389

MF-LF

1%475

402

1/16W

2

1R3300

805-1

10UF

CERM6.3V20%

2

1 C3312

16V

0.1UF

402X5R

10%2

1 C3311

0.1UF

402

10%16VX5R2

1 C3304

X5R16V

402

0.1UF10%

2

1 C33030.1UF10%16VX5R402

2

1 C3302

402X5R16V

0.1UF10%

2

1 C3301

1UF6.3VCERM

10%

4022

1 C3310

603X5R6.3V20%10UF

2

1 C331610%

X5R16V

402

0.1UF

2

1 C3315

FERR-120-OHM-1.5A

0402

21

L3301

1UF10%

CERM6.3V

4022

1 C3314

402MF-LF1/16W5%

2.221

R3302

402

1/16W5%

MF-LF

121

R3303

603X5R6.3V20%10UF

2

1 C3317

MF-LF402

2.2

5%1/16W

21

R3304

10K5%MF-LF4021/16W

2

1R3301

CRITICAL

14.31818

5X3.2-SM

21

Y3301

A051-7032

33 97

CLOCKSSYNC_MASTER=MASTER SYNC_DATE=MASTER

PP3V3_S0_CK410_VDD_PCIMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3V

CK410_SRC8_PCK410_SRC_CLKREQ8_L

CK410_PD_VTT_PWRGD_L

CK410_CLK14P3M_TIMERCK410_REF1_FCTSEL0

CK410_PCIF0_CLK

CK410_XTAL_IN

CK410_PCI1_CLK

CK410_FSB_TEST_MODE

CK410_SRC1_N

PP3V3_S0_CK410_VDD48MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3V

=PP3V3_S0_CK410

CK410_SRC2_P

CK410_SRC3_N

CK410_PCI3_CLK

CK410_SRC6_PCK410_SRC6_N

CK410_SRC7_NCK410_SRC7_P

CK410_SRC8_N

CK410_SRC4_NCK410_SRC4_P

CK410_SRC5_N

SB_CLK100M_SATA_OE_L

CK410_SRC1_P

CK410_SRC_CLKREQ3_L

SMB_CK410_CLK

CK410_CPU2_ITP_SRC10_N

CK410_LVDS_NCK410_LVDS_P

CK410_SRC3_P

CK410_SRC2_N

CK410_SRC_CLKREQ1_L

CK410_PCI2_CLK

=PP3V3_S0_CK410

CK410_CPU0_P

CK410_SRC_CLKREQ6_L

CLK_NB_OE_LCK410_SRC5_P

SMB_CK410_DATA

CK410_IREF

CK410_PCIF1_CLK

CK410_PCI5_FCTSEL1

PP3V3_S0_CK410_VDD_REFVOLTAGE=3.3V

MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

CK410_CPU1_P

PM_STPPCI_LPM_STPCPU_L

CK410_CPU0_N

CK410_CPU2_ITP_SRC10_P

CK410_USB48_FSA

CK410_DOT96_27M_PCK410_DOT96_27M_N

CK410_PCI4_CLK

VOLTAGE=3.3VMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

PP3V3_S0_CK410_VDDA

CK410_XTAL_OUT

=PP3V3_S0_CK410

CK410_CPU1_N

VOLTAGE=3.3VMIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

PP3V3_S0_CK410_VDD_CPU_SRC33

33

33

34

34

26

34

34

34

34

34

34

6

34

34

34

34

34

34

34

34

34

34

34

23

34

34

27

34

34

34

34

34

34

34

6

34

53

14

34

27

34

34

34

23

23

34

34

34

34

34

34

6

34

Preliminary

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

OUTIN

OUTIN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: USE THESE PULL-DOWNS IF NOT CONNECTED TO GPIO’S

AND DISABLE THE OUTPUT IN THE CLOCK CHIPNO GPU SO LEAVE THIS CLK NOT CONNECTED

667MHZ

533MHZ

(166MHZ CPU CLK) R3461

R3452

R3461R3457R3452

R3463R3459R3454

NO STUFF

R3454R3459R3463

R3457

R3463

R3452R3457R3461

R3454R3459

STUFF

(133MHZ CPU CLK)

CPU DRIVEN

FSB FREQUENCY SELECT:

(SPARE CLK OE*)

(YUKON CLK OE*)

(GPU CLK OE*)

5 21 34

5 14 34

5 34 41

5 34 41

34 53

34 53

402

33

1/16W 5% MF-LF

21R3400

3321R340133

21R3402

3321R3403

3321R3404

3321R3405

3321R3406

33 21 R340733 21 R3408

33 21 R340933 21 R3410

33 21 R341133 21 R3412

33 21 R341333 21 R3414

33 21 R341533 21 R3416

33 21 R341733 21 R3418

33 21 R341933 21 R3420

33 21 R342133 21 R3422

MF-LF1/16W4021%

49.921R342949.921R3430

49.921R343149.921R3432

49.921R343349.921R3434

49.921R343549.921R3436

49.921R343749.921R3438

49.921R343949.921R3440

49.921R344149.921R3442

49.921R344349.921R3444

60

5 22

44

67

58

5

5 23

402MF-LF1/16W

1K

5%

21

R3462 402MF-LF1/16W5%1K

2

1R3460

2.2K

5%1/16WMF-LF402

21

R3451

5%1/16WMF-LF

0

4022

1R3463

0

MF-LF1/16W5%

402

NOSTUFF

2

1R3461

1/16WMF-LF

05%

402

NOSTUFF

2

1R3457MF-LF1/16W5%1K

4022

1R3456

05%1/16WMF-LF4022

1R3459

1/16W

1K

MF-LF5% 402

21

R3458

1/16W5%

MF-LF

56

402

NOSTUFF

2

1R3452

0

MF-LF1/16W5%

4022

1R3454

5%

1K

1/16W MF-LF 402

21

R3453

1K5%1/16W MF-LF 402

21

R3455

5 14 34

5 14 34 33 21 R347133 21 R3470

MF-LF

1K

4025%1/16W

21R3499

5 23

402MF-LF1/16W5%

2.2K21

R3497

MF-LF

33

1/16W 5% 402

21R3498

3321R3496

1K21R3495

1K21R3494

1K21R3493

33 21 R3492

33 21 R348933 21 R349033 21 R3491 49.921R3487

49.921R3488

49.921R348649.921R3485

33 21 R342533 21 R3426

5 14 34

5 14 34

49.921R344749.921R3448

49.921R344949.921R34505 12 34

5 12 34

5 7 34

5 7 34

5 14 34

5 21 34

5 22 34

5 22 34


A051-7032

34 97

CLOCKS: TERMINATIONS

TP_CK410_PCI5_FCTSEL1

CK410_SRC2_N

CPU_XDP_CLK_P

SB_CLK100M_SATA_N

NB_CLK_DREFCLKIN_P

NB_CLK_DREFCLKIN_N





CK410_LVDS_N

CK410_LVDS_P

CK410_SRC8_N

CK410_SRC8_P

CK410_CPU2_ITP_SRC10_N

CK410_CPU2_ITP_SRC10_P

CK410_CPU0_N

CK410_CPU0_P

CK410_CPU1_N

CK410_CPU1_P

CK410_CLK14P3M_TIMER

CK410_PCI5_FCTSEL1

FSB_CLK_NB_N

FSB_CLK_NB_P

FSB_CLK_CPU_P

CK410_SRC6_N

CPU_XDP_CLK_NMAKE_BASE=TRUE

FSB_CLK_XDP_NMAKE_BASE=TRUE

FSB_CLK_XDP_P

CK410_SRC3_N

SPARE_SRC3_P

FSB_CLK_NB_P

FSB_CLK_CPU_P

FSB_CLK_NB_N

FSB_CLK_CPU_N

CK410_SRC_CLKREQ8_L

CK410_SRC_CLKREQ1_L

CK410_SRC_CLKREQ3_L

TP_CLK14P3M_SPARECK410_REF1_FCTSEL0

TP_PCI_CLK_SPARECK410_PCI4_CLK

CK410_FSC

SB_CLK14P3M_TIMER

CK410_FSA

SB_CLK48M_USBCTLRCK410_USB48_FSA

CK410_SRC2_P

CK410_SRC5_P

CK410_SRC5_N

CK410_SRC4_P

CK410_SRC6_P

CK410_PCIF0_CLK

SB_CLK100M_SATA_N

SB_CLK100M_SATA_P

AIRPORT_CLK100M_PCIE_P

PCI_CLK_SB

PCI_CLK_FW

PCI_CLK_TPM

PCI_CLK_SMC

CK410_FSC

CPU_BSEL<1>

CK410_FSB_TEST_MODE

PP1V05_S0

PP1V05_S0

ENET_CLK100M_PCIE_P

ENET_CLK100M_PCIE_N

SB_CLK100M_SATA_P

SB_CLK100M_DMI_N

SB_CLK100M_DMI_P

AIRPORT_CLK100M_PCIE_N

NB_CLK100M_GCLKIN_N

NB_CLK100M_GCLKIN_P

FSB_CLK_XDP_P

FSB_CLK_XDP_N


FSB_CLK_CPU_N

NB_BSEL<1>

NB_BSEL<2>

CPU_BSEL<2>

PP1V05_S0

CPU_BSEL<0>

NB_BSEL<0>

CK410_FSA

SB_CLK100M_DMI_P

CK410_DOT96_27M_NCK410_DOT96_27M_P

ENET_CLK100M_PCIE_P

ENET_CLK100M_PCIE_N

SB_CLK100M_DMI_N


NB_CLK100M_GCLKIN_P

NB_CLK100M_GCLKIN_N

NB_CLK_DREFCLKIN_N

NB_CLK_DREFCLKIN_P

CK410_SRC4_N

CK410_SRC7_P

CK410_SRC7_N

CK410_SRC1_P

NC_CK410_SRC1_NNO_TEST=TRUEMAKE_BASE=TRUE

CK410_SRC1_N

PCI_CLK_PORT80

CK410_PCIF1_CLK

CK410_PCI1_CLK

CK410_PCI2_CLK

CK410_PCI3_CLK

SPARE_SRC3_N

SPARE_SRC7_N

SPARE_SRC7_P

CK410_SRC3_P

NC_CK410_SRC1_PNO_TEST=TRUE

MAKE_BASE=TRUE

34

34

34

34

34

34

34

34

80

80

41

41

34

34

34

34

34

34

80

21

14

14

14

14

12

12

7

34

34

34

34

21

22

22

53

14

14

53

7

34

33

33

33

11

5

5

5

5

5

33

33

33

33

33

33

33

33

33

33

33

33

5

5

5

33

11 34

34

33

33

33

33

33

33

34

34

33

33

33

33

33

33

33

34

7

33

6

6

5

5

5

5

5

34

5

5

34

34

34

5

14

14

7

6

7

14

34

33

33

33

33

33

33

33

33

33

33

Preliminary

OUT

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TO IMPROVE SIGNAL INTEGRITY.TRACE BETWEEN CAP AND CONNECTORREMOVED TEST POINTS FROM SHORT

PLACE < 0.5 IN FROM BALL OF U2100

VALUE=3900PF IN REFERENCE SCHEM

NOTE: ??? STUFFED PER LARRY

Per ATA Spec

Per ATA Spec

NOTE: ATA-2, NOW OBSOLETE

ARE CONTROLLED BY PP5V_S0 1MM / 0.6MM.

APPLY A WIDE TRACE SHAPE FROM JC901 TO C3805-06.PLACE C3805-06 CLOSE TO JC901 FOR PP5V_S0_PATA.

MIN_NECK & MIN_LINE WIDTH

Obsolete

NC

NC

NC

NC

NCNC

516S0327

PER ATA7 SPEC

"IDE ACTIVE"

SATA DIFF PAIR GND VIAS

518S0251

SATA CONNECTOR

PATA CONNECTOR

NOTE: GO TO SB AND SMC

SATA PORT 0 IS NOT USED

CAPS TO BE SAME DISTANCE

FROM SB WITHIN EACH PAIR

PLACE SHORT AT PACKAGE

(SB_GPIO14)

PULL UP TO 5V ON P26

NO STUFF

10K

2

1

R3852

1K

2

1

R38534.7K

2

1R3851

5%50V

CERM402

10pF

NO STUFF

2

1C3804

402

1/16W

6.2K5%

MF-LF2

1R38595%1/16WMF-LF402

0

2

1R3858DEVELOPMENT

1/16WMF-LF402

1%499

2

1

R3857

M-ST-SMEP00-081-91

CRITICAL

7

6

5

4

3

2

1

JC900

GREEN-3.6MCD

DEVELOPMENT

2.0X1.25MM-SM

21

LED3800

F-ST-SM

CRITICAL

804RVS-0501S5RGM

9

87

6

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

52

51

JC901

402

10V

CERM

20%0.1uF

2

1 C3805

HOLE-VIA-P5RP251

GV3808

HOLE-VIA-P5RP251

GV3806

HOLE-VIA-P5RP251

GV3801

HOLE-VIA-P5RP251

GV3803

HOLE-VIA-P5RP251

GV3805

HOLE-VIA-P5RP251

GV3807

HOLE-VIA-P5RP251

GV3802

HOLE-VIA-P5RP251

GV3804

0

805-2

10V

10UF20%

CERM2

1 C3806

4020.0047UF 21 C3800

0.0047UF402

21 C3801

0.0047UF402

21 C3802

4020.0047UF 21 C3803

NOSTUFF

10K

2

1

R3824

100

MF-LF1/16W5%

4022

1R3899

24.91/16WMF-LF4021%

21

R3897

0

402MF-LF1/16W5%1K

2

1R2389402

MF-LF1/16W5%

021

R3800

402MF-LF1/16W5%

0

NO STUFF

21

R3801

38 97

051-7032 A

Disk Connectors

SB_GPIO3

IDE_RESET_LMAKE_BASE=TRUESB_GPIO14 IDE_RESET_L_CONN

IDE_PDIOW_L

IDE_PDIORDY

IDE_IRQ14

IDE_PDA<1>

IDE_PDCS1_L

SATA_A_R2D_C_P

SATA_RBIAS_P

SATA_RBIAS_N

=PP5V_S0_PATA

IDE_PDDREQ

IDE_PDD<2>

IDE_PDD<3>

IDE_PDD<4>

IDE_PDCS3_L

IDE_DASP_L

IDE_PDD<5>

IDE_PDD<1>

IDE_PDD<0>

IDE_PDD<7>

IDE_PDD<6>

IDE_PDD<13>

IDE_PDDACK_L

IDE_PDD<14>

SATA_C_DET_L

SATA_A_D2R_N

SATA_A_D2R_P

TP_SATA_A_D2R_NMAKE_BASE=TRUE

TP_SATA_A_D2R_PMAKE_BASE=TRUE

TP_SATA_A_R2D_PMAKE_BASE=TRUE

TP_SATA_A_R2D_NMAKE_BASE=TRUE

=PP3V3_S0_PATA

NO_TEST=TRUESATA_C_D2R_C_P

NO_TEST=TRUESATA_C_D2R_C_N SATA_C_D2R_N

SATA_C_R2D_C_N

SATA_C_D2R_P

SATA_C_R2D_C_P

IDE_DASP_L_DS

IDE_PDA<2>IDE_PDA<0>

IDE_PDIOR_L

IDE_PDD<15>

IDE_PDD<12>

IDE_PDD<11>

IDE_PDD<10>

IDE_PDD<9>

IDE_PDD<8>

IDE_CSEL_PD

IDE_IOCS16_PU

=PP5V_S0_PATA

IDE_RESET_L_CONN

SATA_A_R2D_C_N

MAKE_BASE=TRUESATA_RBIAS

SATA_C_R2D_PNO_TEST=TRUE

SATA_C_R2D_NNO_TEST=TRUE

26

21

21

21

21

38

21

21

21

21

38

21

22

23 38

21

5

21

21

21

6

21

21

21

21

21

21

21

21

21

21

21

21

21

23

6

21

21

21

21

21 21

5

21

21

21

21

5

21

6

38

Preliminary

OUT

OUT

AVDDL0

AVDDL4

AVDD

THRML_PAD

VDDO_TTL0

AVDDL6

VDDO_TTL1

RX_N

TESTMODE

TSTPT

LINK*

LED_LINK10/100*

LED_LINK1000*

LED_ACT*

RSET

CTRL25

CTRL12

HSDACN

HSDACP

SWITCH_VAUX

SWITCH_VCC

VMAIN_AVLBL

VAUX_AVLBL

LOM_DISABLE*

XTALO

XTALI

SPI_DO

SPI_CLK

SPI_CS

SPI_DI

VPD_CLK

VPD_DATA

MDIP3

MDIN3

MDIN2

MDIP2

MDIN1

MDIP1

MDIN0

MDIP0

WAKE*

REFCLKN

TX_N

VDDO_TTL3

VDDO_TTL2

VDDO_TTL4

VDD0

VDD1

VDD3

VDD2

VDD6

VDD5

VDD4

VDD7

AVDDL1

AVDDL2

AVDDL5

VDD25

PERST*

REFCLKP

RX_P

AVDDL3

TX_P

PU_VDDO_TTL0

PU_VDDO_TTL1TEST

TESTTWSI

SPI

MAIN CLK

PCI EXPRESSANALOG

MEDIALED

E2

WC*

NC0NC1

VCC

VSS

SCL

SDA

IO

IO

IO

IO

IO

IO

IO

IO

IN

IN

IN

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LAYOUT NOTE: PLACE C4110-11 AT U4101

LAYOUT NOTE: PLACE C4112-13 AT U2100

OPTIONAL EXTERNAL LDO

NC

NC

NC

NC

50V5%27PF

402CERM2

1 C4116

5%

MF-LF

402

1/16W

4.7K 2

1R4122

MF-LF

4.7K

402

5%

1/16W

21R4123

16V

402X5R

10%0.1UF

2

1 C4101

OMIT

88E8053QFN

14

15

6

41

38

47

61

45

40

8 158

48

44

39

33

64

13

7 2

12

49

50

29

65

46

11

9

34

35

36

37

54

53

16

55

56

43

42

5

30

26

20

17

31

27

21

18

10

63

62

60

59

24

25

4

3

57

52

51

32

28

22

19

23

U4101

M24C08SO8

OMIT

7

4

8

5

6

2

1

3

U4102

16V10%

402X5R

0.1UF

2

1 C4140

0.1UF

40210V

CERM20%

21

C4110

402CERM10V

0.1UF20%

21

C4111 CERM

0.1UF20% 10V

402

21

C4112

0.1UF20% 10VCERM 402

21

C4113

MF-LF

4.75K

402

1%

1/16W

21R4102

4.7K 21 R41304.7K 21 R4131

0

MF-LF

402

5%

1/16W

NOSTUFF 2

1R4151

MF-LF

1/16W

0 5%

402

21R4150

SM-3.2X2.5MM

CRITICAL

25.0000M

3 1

4 2

Y4101

402

MF-LF

1/16W

1%49.92

1R4119

402

MF-LF

1/16W

1%49.92

1R4118

402

MF-LF

1/16W

1%49.92

1R4120

402

MF-LF

1/16W

1%49.92

1R4117

MF-LF

49.9

1%

1/16W

402

21R4103

MF-LF

1/16W

1%

402

49.92

1R4104

49.9

1/16W

MF-LF

402

1%

21R4105

MF-LF

1/16W

1%

402

49.92

1R4106

4.7K

1/16W

5%

402

MF-LF

21R4101 CERM

402

10%50V

0.001UF

2

1 C4106 0.001UF

CERM402

10%50V

2

1 C4107

50V

0.001UF

CERM402

10%2

1 C41170.001UF

CERM402

10%50V2

1 C4118

CERM402

10%50V

0.001UF

2

1 C410510%0.1UF

402

16VX5R2

1 C41040.1UF

X5R402

10%16V

2

1 C41030.1UF

X5R402

10%16V

2

1 C4102

CERM402

10%50V

0.001UF

2

1 C4150

10%0.1UF

X5R402

16V2

1 C4128

CERM50V

0.001UF

402

10%2

1 C413310%0.001UF

CERM402

50V2

1 C4134

50VCERM

0.001UF

402

10%2

1 C4131

10%0.001UF

CERM402

50V2

1 C41320.1UF

402X5R

10%16V

2

1 C41270.1UF10%

X5R402

16V2

1 C412610%0.1UF

X5R402

16V2

1 C4129

16V

0.1UF

X5R402

10%2

1 C4130CERM402

0.001UF10%50V

2

1 C41390.001UF

CERM402

10%50V

2

1 C41380.1UF

X5R402

10%16V2

1 C4137

402X5R

10%16V

0.1UF

2

1 C41360.1UF

X5R402

10%16V2

1 C4135

50V5%27PF

CERM402

2

1 C4115


A051-7032

9741

ETHERNET CONTROLLER

ENET_LED_ACT_L

PP3V3_S0

ENET_MDI_N<2>

PCIE_ENET_R2D_C_P

ENET_GATED_RST_LPCIE_WAKE_L

ENET_CLK100M_PCIE_N

PCIE_ENET_D2R_P

PCIE_ENET_D2R_N

PCIE_ENET_D2R_C_P

PCIE_ENET_D2R_C_N

=PP3V3_S3_ENET

=PP1V2_S3_ENET

ENET_MDI_N<3>ENET_MDI_P<3>

ENET_MDI_P<2>

ENET_MDI_P<1>

ENET_MDI_N<0>ENET_MDI_P<0>

=PP3V3_S3_ENET

=PP3V3_S3_ENET

ENET_VPD_DATA

ENET_VPD_CLK

ENET_MDI3ENET_MDI2

ENET_CLK100M_PCIE_P

ENET_CTRL12

ENET_CTRL25

=PP2V5_S3_ENET

ENET_LED_LINK_L

ENET_ANALOG_RSET

PCIE_ENET_R2D_C_N

ENET_LED_LINK1000_L

ENET_LED_LINK10_100_L

ENET_LOM_DIS_L

=PP3V3_S3_ENET

VMAIN_AVLBL

ENET_PU_VDDO_TTL1

=PP3V3_S3_ENET

=PP2V5_S3_ENET

ENET_MDI1

ENET_MDI_N<1>

ENET_MDI0

=PP1V2_S3_ENET

ENET_PU_VDDO_TTL0

ENET_VPD_DATA

ENET_VPD_CLK

ENET_XTALO

ENET_XTALI

PCIE_ENET_R2D_PPCIE_ENET_R2D_N

94 83 76 61 59

43

43

43

43

43

26

42

42

42

42

42

10

53

34

41

42

41

41

34

42

41

41

42

42

43

6

43

54

42

23

5

54

54

6

41

43

43

43

43

43

43

6

6

41

41

5

42

42

41

43

54

43

43

6

6

41

43

41

41

41

Preliminary

IN

IN

IN

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

20%6.3VX5R805

22UF

2

1 C420220%4.7UF

603CERM6.3V2

1 C4203

X5R402

10%16V

0.1UF

2

1 C42044.7K

MF-LF1/16W5%

4022

1R4202

CERM

20%6.3V

603

4.7UF

2

1 C4205

16V10%

X5R

0.1UF

402

2

1 C4206

16V10%

402X5R

0.1UF

2

1 C4210

603

6.3V20%

CERM

4.7UF

2

1 C4209

FERR-330-OHM

SM

21

L4201

FERR-330-OHM

SM

21

L4200

I38

805-1CERM

10UF20%6.3V

2

1 C4207

SOT223

PBSS5540Z

CRITICAL3

4 2

1

Q4201

20%6.3VX5R805

22UF

2

1 C4200

X5R16V10%

402

0.1UF

2

1 C4201

42 97

051-7032 A

ETHERNET MISC

Q4201_3


VOLTAGE=3.3V


PP2V5_S3_ENETMAKE_BASE=TRUE

MAKE_BASE=TRUEPP1V2_S3_ENET

VOLTAGE=1.2V


=PP1V2_S3_ENET

=PP2V5_S3_ENETENET_CTRL25

ENET_GATED_RST_LMAKE_BASE=TRUE

ENET_RST_L

=PP3V3_S3_ENET

=PP1V2_S3_LAN

TP_ENET_CTRL12MAKE_BASE=TRUE

ENET_CTRL12

43

41 6

41

41

43

41

41

41

6

6

Preliminary

IO

IO

IO

IO

IO

IO

IO

IO

1CT:1CT

1CT:1CT

MDI_3-

ENET_CTAP

MDI_0+

75 OHM

MDI_0-

MDI_1-

MDI_2+

MDI_2-75 OHM

RJ45CABLE SIDE

SECONDARY

J4

J8

J7

J6

J5

J1

J2

J3

1CT:1CT

RJ45CHIP SIDE

ENET_CTAP

MDI_1+

MDI_3+

PRIMARY

SHIELD 1000PF, 2000V

1CT:1CT

75 OHM

75 OHM

TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(514-0253)

RESISTOR PADS USED AS PLACEHOLDER FOR INDUCTOR IF NEEDED

0.1UF

CERM10V20%

4022

1 C43000.001UF50VCERM402

10%2

1 C4301

10%0.001UF

50VCERM402

2

1C4304

10%0.001UF50VCERM402

2

1 C4305

MF-LF

5%

0

805

1/8W

21

R4300

F-ANG-TH

OMIT

JFM38V10-0112-4F

9

8

7

6

5

4

3

2

10

1

13

12

11

JD600

DEVELOPMENT

330

603MF-LF1/10W5%

2

1R4301

DEVELOPMENT


2

1

LED4300

603

5%1/10WMF-LF

330

DEVELOPMENT

2

1R4302


DEVELOPMENT

2

1LED4301

603

5%1/10WMF-LF

330

DEVELOPMENT

2

1R4303


DEVELOPMENT

2

1LED4302

603

5%1/10WMF-LF

330

DEVELOPMENT

2

1R4304


DEVELOPMENT

2

1LED4303

0 21 R43500 21 R43510 21 R43520 21 R43530 21 R43540 21 R43550 21 R43560 21 R4357

CON,RJ-45 7 DEGRESS, 243DEG C514-0365 1 CRITICAL 17_INCH_LCDJD600

ETHERNET CONNECTOR

43

A051-7032

97

PP2V5_S3_ENETMIN_LINE_WIDTH=0.50mmMIN_NECK_WIDTH=0.38mm

PP2V5_ENET_CTAP

VOLTAGE=2.5V

GND_CHASSIS_RJ45

MAKE_BASE=TRUEENET_LED_ACT_L

LED4300_1 LED4302_1LED4301_1

=PP3V3_S3_ENET

LED4303_1

MAKE_BASE=TRUEENET_LED_LINK10_100_L

MAKE_BASE=TRUEENET_LED_LINK1000_L

MAKE_BASE=TRUEENET_LED_LINK_L

ENET_MDI_P<0>

ENET_MDI_N<0>

ENET_MDI_P<1>

ENET_MDI_N<1>

ENET_MDI_P<2>

ENET_MDI_N<2>

ENET_MDI_P<3>

ENET_MDI_N<3>

ENET_MDI_R_P<0>

ENET_MDI_R_N<0>

ENET_MDI_R_P<1>

ENET_MDI_R_N<1>

ENET_MDI_R_P<2>

ENET_MDI_R_N<2>

ENET_MDI_R_P<3>

ENET_MDI_R_N<3>

42 41

42

6

41

6

41

41

41

41

41

41

41

41

41

41

41

Preliminary

IO

IO

IO

OUT

PCI_AD1

VDD6

PCI_AD24

PCI_AD27

VDD5

XI

XO

RESET*

R1

R0

TPBIAS0

TPA0_P

TPA0_N

TPB0_P

TPB0_N

TPBIAS1

TPA1_P

TPA1_N

TPB1_P

TPB1_N

TPBIAS2

TPA2_P

TPA2_N

TPB2_P

TPB2_N

LPS

CPS

LKON

CNA

NANDTREE

CONTENDER

PC1

PC2

PC0

VAUX_PRESENT

NU2

NU1

MPCIACT*

SE

SM

TEST0

TEST1

PTEST

ROM_CLK

ROM_AD

PLLVSS

VSS0

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS8

VSS7

VSS9

VSS10

VSS11

VSS13

VSS12

VSSA0

VSSA1

VSSA2

VSSA3

CARDBUS*

PCI_INTA*

PCI_RST*

PCI_PME/CSTSCHG*

CLKRUN*

PCI_CLK

PCI_SERR*

PCI_PERR*

PCI_GNT*

PCI_REQ*

PCI_IDSEL

PCI_STOP*

PCI_DEVSEL*

PCI_TRDY*

PCI_IRDY*

PCI_FRAME*

PCI_PAR

PCI_CBE3*

PCI_CBE0*

PCI_CBE1*

PCI_CBE2*

PCI_AD31

PCI_AD30

PCI_AD29

PCI_AD26

PCI_AD28

PCI_AD25

PCI_AD21

PCI_AD22

PCI_AD23

PCI_AD20

PCI_AD19

PCI_AD18

PCI_AD17

PCI_AD16

PCI_AD13

PCI_AD15

PCI_AD14

PCI_AD11

PCI_AD12

PCI_AD8

PCI_AD10

PCI_AD9

PCI_AD6

PCI_AD7

PCI_AD3

PCI_AD5

PCI_AD4

PCI_AD2

PCI_AD0

PCI_VIOS

VDD10

VDD9

VDD8

VDD7

VDD4

VDD3

VDD1

VDD2

VDD0

PLLVDD

VDDA0

VDDA1

VDDA2

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IN

IO

IO

IO

IN

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: 1% FOR BOM CONSOLIDATION

T1: TP (?)

THESE POWER PLANES SHOULD BE MOSTLY ISOLATED

??? CHECK YELLOW EDS

USING PCI [1]

10K21

R4409

10K21

R4402

MF-LF1/16W5%10K

4022

1R4416

OMIT

FW32306TQFP

122

121

95

115

103

102

61

56

50

44

38

32

27

21

81

77

71

662

12

96

116

104

82

72

55

49

43

37

26

19

93

11

1

128

101

109

114

98

97

106

105

111

110

100

99

108

107

113

112

7

10

125

126

8

9

123

118

117

124

120

119

85

52

54

58

15

17

18

57

59

51

14

34

16

48

53

20

33

47

60

73

69

70

74

75

76

78

22

23

79

24

25

28

29

30

31

35

36

39

40

80

41

42

45

46

62

63

64

65

67

68

83

84

87

88

89

127

4

6

92

91

90

94

86

5

13

3

U4400

600-OHM-300MA

0402

21

L4409

10K 21 R4450

10K 21 R445110K 21 R4452

10K 21 R445310K 21 R445410K 21 R4455

2221R4403

1%1/16WMF-LF402

15021

R4407

NOSTUFF

MF-LF 402

0

1/16W 5%

21

R4411

CERM10V

402

20%0.1UF

2

1 C4410

CRITICAL

HC49-USMD24.576M

2

1 Y4400

402

412

1%1/16WMF-LF

21

R4410

CERM5% 40250V

27PF21

C4412

4025%50V CERM

27PF21

C4401

10V 20% CERM 402

0.1UF21

C4402

510K

1/16W 5% MF-LF 402

21

R4412

2.49K

402MF-LF1%1/16W

21

R4413

390K

5%1/16WMF-LF 402

21

R4414

FW: FW323-06

9744

A051-7032


PCI_FW_GNT_L

PCI_FW_REQ_L

PCI_AD<19>

=PP3V3_S5_FW

PCI_AD<1>

PCI_AD<24>

PCI_AD<27>

FW_XTAL_XI

FW_XTAL_X0

FW_RESET_L

FW_R1

FW_R0

FW_A_TPBIAS

FW_A_TPA_P

FW_A_TPB_P

FW_A_TPB_N

FW_B_TPBIAS

FW_B_TPA_P

FW_B_TPA_N

FW_B_TPB_P

FW_B_TPB_N

FW_C_TPBIAS

FW_C_TPA_P

FW_C_TPA_N

FW_C_TPB_P

FW_C_TPB_N

TP_FW_LPS

FW_CPS

TP_FW_LKON

TP_FW_CNA

TP_FW_NANDTREE

FW_PC0

TP_FW_VAUX_PRES

NC_FW_NU2

NC_FW_NU1

TP_FW_MPCIACT_L

FW_ROM_CLK

TP_FW_ROM_AD

FW_CARDBUS_L

INT_PIRQD_L

PCI_RST_FW_L

PCI_PME_FW_L

PM_CLKRUN_L

PCI_CLK_FW

PCI_SERR_L

PCI_PERR_L

PCI_STOP_L

PCI_DEVSEL_L

PCI_TRDY_L

PCI_IRDY_L

PCI_FRAME_L

PCI_C_BE_L<3>

PCI_C_BE_L<0>

PCI_C_BE_L<1>

PCI_C_BE_L<2>

PCI_AD<31>

PCI_AD<30>

PCI_AD<29>

PCI_AD<26>

PCI_AD<28>

PCI_AD<25>

PCI_AD<21>

PCI_AD<22>

PCI_AD<23>

PCI_AD<20>

PCI_AD<18>

PCI_AD<17>

PCI_AD<16>

PCI_AD<13>

PCI_AD<15>

PCI_AD<14>

PCI_AD<11>

PCI_AD<12>

PCI_AD<8>

PCI_AD<10>

PCI_AD<9>

PCI_AD<6>

PCI_AD<3>

PCI_AD<5>

PCI_AD<4>

PCI_AD<2>

=PP3V3_S0_PCI

FW_XTAL_X0

=PP12V_S5_FW_PHY

=PP3V3_S5_FW

FW_RESET_L

FW_XTAL_XI

FW_XTAL_XR

FW_A_TPA_N

=PP3V3_S5_FW

PCI_PAR

PCI_AD<7>

FW_PC1

FW_PC2

FW_CONTENDER

FW_TEST

FW_SE

FW_SM

PCI_RST_FW_LPCI_RST_L

VOLTAGE=3.3V


PP3V3_S5_FW_VDDA

PCI_AD<0>

=PP3V3_S5_FW

PCI_IDSEL

67

46

60

46

46

46

45

58

45

45

45

44

26

23

26

26

26

26

26

26

26

44

44

44

27

27

22

6

22

22

22

44

44

44

46

46

46

46

46

46

46

46

46

46

46

46

46

46

22

44

22

5

34

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

6

44

46

6

44

44

46

6

22

22

44 22

45

22

6

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

0.01UF20%16VCERM402

2

1 C45000.01UF20%16VCERM402

2

1 C45010.01UF20%16VCERM402

2

1 C4502

0.01UF20%16VCERM402

2

1 C4504

402CERM16V20%0.01UF

2

1 C45050.1UF10V

402CERM

20%2

1 C45060.1UF10V20%

CERM402

2

1 C4507

0.1UF10V20%

CERM402

2

1 C4508

CERM

20%10V

0.1UF

4022

1 C452120%

CERM10V

0.1UF

4022

1 C45200.01UF20%16VCERM402

2

1 C45230.01UF20%16VCERM402

2

1 C4522

CERM

10UF20%6.3V

805-12

1 C4515

CERM6.3V20%10UF

805-12

1 C4503

20%

CERM402

10V

0.1UF

2

1 C4509

402CERM

20%10V

0.1UF

2

1 C4510

051-7032 A

45 97

FW: DECAPSSYNC_DATE=MASTERSYNC_MASTER=MASTER

PP3V3_S5_FW_VDDA

=PP3V3_S5_FW46 44

44

6

Preliminary

TPI

VGND

VP

TPI#

TPO#

TPO

TPI

VGND

VP

TPI#

TPO#

TPO

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

"Snapback" & "Late VG" Protection

[ LATE VG NOTES ]

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP

R4690 VALUE WAS RECOMMENDED BY COLIN

3rd TPA/TPB pair unused

KCL = CABLE POWER + SYSTEM POWER = > 1.5 AMPS

POSSIBLE CURRENT SHARING SCENARIO

DESIGNED WITH INTENTION TO RESIZE FUSE LIMITS EQUAL FW SPEC 1.5A LIMIT

Termination

(TPA-)

ESD Rail

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

PORT 1

(TPB+)

(TPA+)

1394A

(TPB-)

(TPB+)

(TPA-)

(TPA+)

1394APORT 0

(TPB-)

Place close to FireWire PHY

12 VOLTS

"Snapback" & "Late VG" Protection

FW_VP MAX IS 33V

FW_VP MAX IS 33V

514-0251 20_INCH_VERSION SHOWN

514-0251 20_INCH_VERSION SHOWN

PLACE R4657 PADS INSIDE R4656

8 WATTS MAX

TO FW CDS PIN (CABLE POWER DETECT)

SMC

MURS320XXG

21

D4600

FF1W

1.3

20%

NOSTUFF

2512

21

R4656

0.01uF

402CERM16V20%

2

1C4626

BAV99DW-X-FSOT-363

3

5

4

DP4620SOT-363

BAV99DW-X-F

6

2

1

DP4620

UF01613-M33-4F

OMIT

CRITICAL

F-ST-TH

1

2

5

6

3

4

987 10

JE001

UF01613-M33-4F

OMIT

F-ST-TH

CRITICAL

1

2

5

6

3

4

987 10

JE000

16V20%

CERM402

0.01uF

2

1C4616

SOT-363BAV99DW-X-F

3

5

4

DP4610

BAV99DW-X-FSOT-363

3

5

4

DP4611

SOT-363BAV99DW-X-F

6

2

1

DP4610

BAV99DW-X-FSOT-363

6

2

1

DP4611

402

6.3V10%

CERM-X5R

0.33UF

2

1 C4660

MF-LF

56.2

402

1%1/16W

2

1R4661

MF-LF

56.21%

1/16W

4022

1R4660

6.3V

402

10%

CERM-X5R

0.33UF

2

1 C4650

MF-LF

56.21%1/16W

4022

1R465156.2

1%

402

1/16WMF-LF

2

1R4650

MF-LF

56.21%1/16W

4022

1R466356.2

1%1/16WMF-LF

4022

1R4662

MF-LF402

1/16W1%4.99K

2

1R4664

402CERM25V5%

220PF

2

1C4664

56.21%1/16WMF-LF4022

1R46531%

56.2

MF-LF402

1/16W

2

1R4652

402

1%1/16WMF-LF

4.99K

2

1R4654

25V5%

CERM402

220PF

2

1C4654

400-OHM-EMI

SM-1

21

L4690

CRITICAL

SOT23

BZX84C2V7-X-F

31

D4690

CRITICAL

120-OHM2012

4

32

1

FL4610

CRITICAL120-OHM2012

4

32

1

FLE011

CRITICAL

2012120-OHM

4

32

1

FL4620

CRITICAL 120-OHM2012

4

32

1

FLE021

FERR-160-OHM1206-LF

2

1

L4610

FERR-160-OHM1206-LF

2

1

L4620

MINISMD-LF

0.75AMP-13.2V

CRITICAL

21

F4602

BAV99DW-X-FSOT-363

3

5

4

DP4621SOT-363

BAV99DW-X-F

6

2

1

DP4621

I443

1/16W1%

MF-LF402

37421

R4690

50V

0.1UF10%

X7R603-1

2

1 C4615

603-1X7R

10%0.1UF50V

2

1 C4625

402CERM

10%0.001UF

50V2

1C4623

50V

0.001UF10%

CERM402

2

1C4622

50V

0.001UF10%

CERM402

2

1C4612

50V

0.001UF10%

CERM402

2

1C4613

402CERM

10%0.001UF

50V2

1C4621

402CERM

10%50V

0.001UF

2

1C4620

50V

0.001UF10%

CERM402

2

1C4610

50V

0.001UF10%

CERM402

2

1C4611

0

805MF-LF1/8W5%

21

R4657

CON,1394A 7 DEGREES, W/O RIBS514-0336 2 17_INCH_LCDCRITICALJE000,JE001

051-7032 A

9746

FIREWIRE CONNECTORS


PP12V_FWMIN_LINE_WIDTH=0.8MM


=PP12V_S5_FW

FW_PORT1_TPA_NMAKE_BASE=TRUE FW_PORT1_TPB_PMAKE_BASE=TRUE FW_PORT1_TPB_NMAKE_BASE=TRUE

FW_B_TPA_P

FW_A_TPB_N

FW_PORT1_TPB_P


MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

PPFW_PORT1_VP_FL

VOLTAGE=33V


VOLTAGE=33V

PPFW_PORT0_VP_FL


PP3V3_FW_ESD

PP3V3_FW_ESD

FW_PORT1_TPB_N

FW_PORT1_TPA_P

FW_PORT1_TPA_N

FW_PORT1_TPB_FL_N

FW_PORT1_TPB_FL_P

FW_PORT1_TPA_FL_N

FW_PORT1_TPA_FL_P

FW_PORT0_TPA_N

FW_PORT0_TPB_N

FW_PORT0_TPB_P

FW_PORT0_TPA_P

PP3V3_FW_ESD

FW_PORT0_TPA_FL_N

FW_PORT0_TPA_FL_P

FW_PORT0_TPB_FL_N

FW_PORT0_TPB_FL_P

=PP12V_S5_FW_PHY

FW_C_TPB_P

FW_C_TPA_N

MAKE_BASE=TRUETP_FW_C_TPB_N

MAKE_BASE=TRUETP_FW_C_TPB_P

MAKE_BASE=TRUETP_FW_C_TPA_N

FW_C_TPA_P

FW_C_TPBIASMAKE_BASE=TRUE

TP_FW_C_TPBIAS

MAKE_BASE=TRUETP_FW_C_TPA_P

MAKE_BASE=TRUEFW_PORT1_TPA_P

FW_A_TPB_P FW_PORT0_TPB_PMAKE_BASE=TRUE

MAKE_BASE=TRUEFW_PORT0_TPB_N

FW_A_TPA_NMAKE_BASE=TRUE

FW_PORT0_TPA_NFW_A_TPA_P FW_PORT0_TPA_P

MAKE_BASE=TRUE

VOLTAGE=0VFW_TPA_C<0>

FW_A_TPBIASVOLTAGE=1.86V

VOLTAGE=0VFW_TPA_C<1>

PPFW_PORTS_VP

PP3V3_FW_ESDMIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3V

MIN_NECK_WIDTH=0.25 mm

VOLTAGE=3.3VMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm

PP3V3_FW_ESD_F

VOLTAGE=1.86V

FW_B_TPBIAS

FW_B_TPB_NFW_B_TPB_PFW_B_TPA_N

FW_VP

MIN_LINE_WIDTH=0.8MMMIN_NECK_WIDTH=0.25MMVOLTAGE=33V

=PP3V3_S5_FW

FW_C_TPB_N

PP3V3_FW_ESD

PPFW_PORTS_VP

VOLTAGE=33V


45

46

46

44

44

44

44

44

44

6

46

46

46

44

44

46

6

6

46

46

46

46

46

46

46

46

46

46

44

46

44 46

46

44 46

44 46

44

46

46

44

44

44

44

6

46

46

Preliminary

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-2

SYM_VER-2

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

EN3*

EN1*EN2*

OC1*OC2*OC3*

IN1

IN2

OUT1

OUT2

OUT3

NCNC

NCGNDA GNDB

TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE C4742 CLOSED TO JE4702.

NEAR JE4702 PIN 14 IN THE

SB HAS INTERNAL 15K PULL-DOWNS

BLUETOOTH

ORDER LISTED, AND NOT ON

PLACE C4743, C4797 & L4740


External USB Ports

514-0247

IR CONNECTOR

MIC CONNECTOR


CAMERA CONNECTOR


MAKE SURE 6.3V CAP HERE IS OK


NOTE: STANDOFFS FOR J4700

514-0247

740S0032


D+

GND

PORT 2

D-

VDD

GND

514-0247

PORT 1

VDD

D-

D+

GND

TO M13D SLOT

BOTH SIDES OF THE PIN.

LAYOUT NOTE:

D+

STUFFING FOR PROTO, EVAL LATER

PORT 0

VDD

D-

STUFFING FOR PROTO, EVAL LATER

CRITICAL

120-OHM2012

4

32

1

L4712

0.01uF

CERM402

16V20%

2

1C4713

16VCERM

20%

402

0.01uF

2

1C4712

NOSTUFF

150UF

SMD2

6.3VPOLY

20%2

1 C4710SM

FERR-250-OHM21

L4710

16VCERM402

0.01uF20%

2

1C4723

16VCERM

0.01uF

402

20%2

1C4722

FERR-250-OHM

SM

21

L4720

CRITICAL

2012120-OHM

4

32

1

L4722

120-OHM2012

CRITICAL

4

32

1

L4732

16V

0.01uF

CERM402

20%2

1C4733

402

16V20%

0.01uF

CERM 2

1C4732

FERR-250-OHM

SM

21

L4730

0

402

NOSTUFF

21R4712

402

0NOSTUFF

21R4713

402

0NOSTUFF

21R4722

0

402

NOSTUFF

21R4723

402

0NOSTUFF

21R4732

0

402

NOSTUFF

21R4733

402

NOSTUFF

021

R4742

402

0

NOSTUFF

21

R4743

120-OHMCRITICAL

2012CAMERA

4

32

1

L4752

NOSTUFF

402

021

R4755

NOSTUFF

0

402

21

R4754

0.01uF20%

402

16VCERM

CAMERA

2

1C4743

CERM402

0.01uF20%16VCAMERA

2

1C4742

FERR-250-OHM

SM

CAMERA

21

L4740

5%MF-LF1/8W805

0

CAMERA

21

R4746

2012120-OHM

CRITICAL

4

32

1

L4742

0.75AMP-13.2V

MINISMD-LF

CRITICALCAMERA

21

F4701

805-1

10UF6.3V20%

CERM

CAMERA

2

1 C4797

BLUETOOTH

QT800101-1210S-8F

F-ST-SM

CRITICAL

9

87

65

43

2

10

1

J4700BLUETOOTH

402

10V20%

CERM

0.1UF2

1 C4798

F-ST-THUB01123M23-4F

OMIT

4

3

2

1

7

6

5

JE310

UB01123M23-4FF-ST-TH

OMIT

4

3

2

1

7

6

5

JE320

F-ST-TH

OMIT

UB01123M23-4F

4

3

2

1

7

6

5

JE330

BLUETOOTH

805-1

10UF6.3V20%

CERM2

1 C4799

BLUETOOTH

STDOFF-4OD4.5H-1.35-TH1

SDF4700

BLUETOOTH


SDF4701

RCLAMP0502BSC-75

CRITICAL

2

1

3

D4700

RCLAMP0502BSC-75

2

1

3

D4701

RCLAMP0502BSC-75

2

1

3

D4702

SOITPS2043B

CRITICAL

11

14

15

12

13

16

10

9

8

6

2

51

7

4

3

U4700

NOSTUFF

SMD2

6.3VPOLY

20%150UF

2

1 C4720

CRITICAL

ELEC6.3V20%1800UF

TH-KZJ-LF

2

1 C4700

CRITICAL

87212-0400L-BLKM-ST-SM

4

3

2

1

6

5

JE4700

CAMERA

M-RT-SM

CRITICAL

53261-0598

5

4

3

2

1

7

6

JE4702

53261-0398M-RT-SM

CRITICAL

3

2

1

5

4

JE4701

JE310,JE320,JE330USB RECEPTACLE,4P,UB1123-M50-4F514-0339 17_INCH_LCDCRITICAL3

USB Device Interfaces

9747

051-7032 A

=PP3V3_S3_BT

USB_BT_NMAKE_BASE=TRUE

GND_CHASSIS_BNDI


PP5V_USB2_PORT0VOLTAGE=5V

AUD_MIC_IN_N_CONN

AUD_MIC_IN_P_CONN

GND_AUDIO_MIC_CONN

USB_IR_P

USB_IR_N

=PP5V_S3_USB



USB_PORT0_P

VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

PP5V_USB2_PORT0_F

USB_PORT1_N

USB_A_OC_L



GND_CHASSIS_USB

MIN_LINE_WIDTH=0.6MMVOLTAGE=5V


PP5V_USB2_PORT2_F

USB_E_P

USB_E_N

USB_C_N

USB_C_P

USB_PORT2_P

USB_PORT2_N

USB_PORT1_P

GND_CHASSIS_USB

USB_G_N

USB_G_P

=PP5V_S3_BNDI

GND_CHASSIS_BNDI

GND_BNDIVOLTAGE=0V


PP5V_BNDI_LE340

USB_BT_PMAKE_BASE=TRUE

PP5V_S3_BNDI


USB_C_OC_L

USB_E_OC_L


PP5V_USB2_PORT1_F

USB_PORT0_N

USB_A_P

USB_A_N

USB_D_P

USB_D_N

GND_BNDI

PP5V_S3_BNDI

USB_H_P

=PP5V_S3_BNDIUSB_H_N

GND_CHASSIS_USB


VOLTAGE=0

USB_CAMERA_P

USB_CAMERA_N

47

47

47

22

22

47

47

47

47

6

6

73

73

73

6

22

6

22

22

22

22

6

6

6

47

47

22

22

22

22

22

22

47

47

22

6 22

6

Preliminary

KEY

IO

IO

IN

IN

IN

IO

IO

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


NOTE: STANDOFFS FOR J5300

PLACE R5302-03 SUCH THAT STUB LENGTH IS

MINIMIZED IF THE RESISTORS ARE NOT STUFFED

LAYOUT NOTE:

PLACE CAPS < 250 MILS FROM U2100


SDF5300


SDF5301

0.1UF21C5300

0.1UF21

C5301

ASOB226-S80N-7FF-RT-SM

CRITICAL

9

87

6

5251

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

54

53

J5300

20%0.1UF

402CERM10V

2

1 C5304

10VCERM

0.1UF20%

4022

1 C530520%

402CERM10V

0.1UF

2

1 C5306

20%0.1UF10VCERM402

2

1 C5307

CERM10V

0.1UF20%

4022

1 C530820%0.1UF

CERM402

10V2

1 C5310

10V

0.1UF20%

402CERM2

1 C5309

021R5302

021R5303

20%10VCERM

10UF

805-22

1 C5311

021

R5304

20%10VCERM

10UF

805-22

1 C5312

20%10VCERM

10UF

805-22

1 C53140.1UF20%10VCERM402

2

1 C5313


AIRPORT CONN

A

53 97

051-7032

PCIE_AIRPORT_D2R_N

PCIE_AIRPORT_R2D_C_P

PCIE_AIRPORT_R2D_N

PCIE_AIRPORT_R2D_P

PCIE_AIRPORT_R2D_C_N

AIRPORT_RST_L

CK410_SRC_CLKREQ6_L


=SMB_AIRPORT_DATA

=SMB_AIRPORT_CLKAIRPORT_CONN_CLK

PCIE_AIRPORT_D2R_P

PCIE_WAKE_L


PP3V3_S3AIRPORT_WAKE_L

AIRPORT_CONN_DATA

=PP3V3_S0_AIRPORT

=PP1V5_S0_AIRPORT

USB_B_P

USB_B_N

83

41

59

54

54

54

6

33

34

27

27

54

23

34

6

6

6

22

22

Preliminary

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

OUT

OUT

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

USED PCIE PORTS

PCIE PORT ALIASESSYNC_DATE=MASTERSYNC_MASTER=MASTER

9754

A051-7032

MAKE_BASE=TRUEPCIE_B_R2D_C_N

MAKE_BASE=TRUEPCIE_B_D2R_P PCIE_ENET_D2R_PMAKE_BASE=TRUE

PCIE_B_D2R_N

MAKE_BASE=TRUEPCIE_B_R2D_C_P

PCIE_ENET_D2R_N

MAKE_BASE=TRUEPCIE_A_D2R_N

MAKE_BASE=TRUEPCIE_A_D2R_P

PCIE_ENET_R2D_C_P

PCIE_ENET_R2D_C_N

PCIE_AIRPORT_D2R_P

PCIE_AIRPORT_D2R_N

MAKE_BASE=TRUETP_PCIE_C_R2D_C_N

PCIE_AIRPORT_R2D_C_P

PCIE_AIRPORT_R2D_C_N

TP_PCIE_F_D2R_NMAKE_BASE=TRUE

TP_PCIE_F_D2R_PMAKE_BASE=TRUE

MAKE_BASE=TRUETP_PCIE_F_R2D_C_P

MAKE_BASE=TRUETP_PCIE_F_R2D_C_N

PCIE_F_D2R_N

PCIE_F_D2R_P

PCIE_F_R2D_C_P

PCIE_F_R2D_C_N

MAKE_BASE=TRUEPCIE_A_R2D_C_N

MAKE_BASE=TRUEPCIE_A_R2D_C_P

PCIE_E_D2R_P

PCIE_E_D2R_N

PCIE_E_R2D_C_P

PCIE_E_R2D_C_N

PCIE_D_D2R_P

PCIE_D_D2R_N

PCIE_D_R2D_C_P

PCIE_D_R2D_C_N

PCIE_C_D2R_P

PCIE_C_D2R_N

PCIE_C_R2D_C_PMAKE_BASE=TRUE

TP_PCIE_C_R2D_C_P

MAKE_BASE=TRUETP_PCIE_E_D2R_N

MAKE_BASE=TRUETP_PCIE_E_D2R_P

TP_PCIE_E_R2D_C_PMAKE_BASE=TRUE

TP_PCIE_E_R2D_C_NMAKE_BASE=TRUE

TP_PCIE_D_D2R_PMAKE_BASE=TRUE

TP_PCIE_D_D2R_NMAKE_BASE=TRUE

TP_PCIE_D_R2D_C_NMAKE_BASE=TRUE

TP_PCIE_D_R2D_C_PMAKE_BASE=TRUE

TP_PCIE_C_D2R_PMAKE_BASE=TRUE

TP_PCIE_C_D2R_NMAKE_BASE=TRUE

PCIE_C_R2D_C_N

22

22

22

22

22

5

5

22

5

5

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

22

41

41

41

41

53

53

53

53

Preliminary

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

OUT

OUT

OUT

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*

P94/IRQ13*

P93/IRQ12*

P92/IRQ0*

P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*

P82/CLKRUN*

P80/PME*

P35/LRESET*

P34/LFRAME*

P10

P12

P13

P14

P15

P17

P31/LAD1

P30/LAD0

P32/LAD2

P33/LAD3

P36/LCLK

P37/SERIRQ

P44/TMO1

P77/AN7

P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45

P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27

P26

P25

P24

P23

P22

P21

P20

P41/TMO0

P52/SCL0

P60/KIN0*

P61/KIN1*

P62/KIN2*

P63/KIN3*

P64/KIN4*

P65/KIN5*

P66/IRQ6*/KIN6*

P67/IRQ7*/KIN7*

P70/AN0

P71/AN1

P72/AN2

P73/AN3

P74/AN4

P75/AN5

P84/IRQ3*/TXD1

P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC

PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2

PB3

PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5

PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CC

PA7/KIN15*/PS2CD

PD0/AN8

PD1/AN9

PD2/AN10

PD3/AN11

PD4/AN12

PD5/AN13

PD6/AN14

PD7/AN15

PF0/IRQ8*/PWM2

PF1/IRQ9*/PWM3

PB0/LSMI*

PB1/LSCI

PC0/TIOCA0/WUE8*

PC1/TIOCB0/WUE9*

PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12*

PC5/TIOCB1/TCLKC/WUE13*

PC6/TIOCA2/WUE14*

PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCK

PE2*/ETDI

PE3*/ETDO

PE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

VCC

VCC

AVCC

XTAL

EXTAL

AVCC

VCC

MD1

MD2

NMI

RES*

ETRST*

AVREF

AVSSVSS

(3 OF 4)

NC22

NC21

NC20

NC19

NC18

NC17

NC16

NC15

NC14

NC13

NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3

NC2

NC1

NC0

(4 OF 4)

OUT

OUT

IO

OUT

IN

IN

IN

OUT

IN

IO

IN

IO

OUT

OUT

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

OUT

IN

IN

OUT

OUT

IN

OUT

OUT

ININ

OUT

OUT

IO

IO

IO

IO

IN

IN

IN

OUT

OUT

OUT

IO

IN

IN

IN

IN

IO

IO

IN

IN

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SMC_XXX WHERE XXX IS THE PORT NUMBER.

CAN BE LEFT NO-CONNECTED.

UNUSED PINS HAVE THE FORMAT

LAYOUT NOTE:

SMC

PLACE R5899 AND C5820 NEAR SMC PIN N14,N15

VCL IS INTERNAL RAIL

PLACE C5807 NEAR PIN F1

LAYOUT NOTE:

DRIVEN OUTPUTS ALWAYS SO THEYTHEY ARE SET BY SOFTWARE TO BE

805

20%6.3VX5R

22UF

2

1 C5802

402

0.47UF20%6.3VCERM-X5R2

1 C5807

10V

0.1UF20%

CERM402

2

1 C5803

0.1UF20%

CERM10V

4022

1 C58205%

1/16W

4.7

402MF-LF

21

R5899

0.1UF20%10VCERM402

2

1 C5804

SM

OMIT

21

XW5800

402

10V20%0.1UF

CERM2

1 C580520%10VCERM402

0.1UF

2

1 C5806

BGA

OMIT

SMC_H8S2116

G2

H1

H2

J4

J3

J1

J2

K4

B6

A6

C6

D6

B7

A7

C7

P15

N13

R15

P14

R14

P13

R13

N12

J13

J12

K14

K13

K12

L15

L14

L13

F2

G4

G1

C1

D3

C2

B1

C3

D5

B5

A5

D7

A8

C8

D8

B9

A9

C9

D9

F14

E13

E15

E14

E12

D15

D14

D13

C15

D12

C14

B15

B14

A15

C13

B12 U5800

OMIT

SMC_H8S2116BGA

B3

D4

C4

K2

F3

E1

R7

P7

M8

R8

P8

N9

R9

P9

N5

P5

R5

M6

N6

R6

P6

M7

L2

L4

M1

M2

M3

M10

N10

R10

P10

N11

R11

P11

M11

H12

H13

H15

H14

G12

G13

G15

G14

D11

A12

C11

B11

A11

D10

A10

B10

N1

M4

N2

R1

N3

R2

P3

R3 U5800

BGASMC_H8S2116

OMIT

A2

D2

B4

A4

A13

B13

F13

F12

R4

P4

D1

F1

A1

J15

P1

P2

E3

F4

K1

E2

B2

L1

R12

P12

M15

M14

N15

N14

U5800

BGASMC_H8S2116

OMIT

L12

M13

M12

N7

M5

N4

L3

N8

M9

H4

K3

E4

B8

A3

C5

C10

C12

A14

F15

J14

K15

H3

G3

U5800

MF-LF5%

4021/16W10K

2

1R5809

MF-LF402

5%10K1/16W

2

1R5801

1/16W5%10KMF-LF4022

1R5802NOSTUFF

402MF-LF1/16W5%0

2

1R580310KMF-LF5%1/16W4022

1R5898

051-7032 A

58 97

SMC_TX_L

SMC_SYS_LEDSMC_SYS_KBDLED

SMB_B_S0_CLKSMB_B_S0_DATASMB_A_S3_CLKSMB_A_S3_DATASMB_BSA_CLKSMB_BSA_DATA

SMB_0_S0_CLK

SMC_RSTGATE_LPM_LAN_ENABLE

ALL_SYS_PWRGDRSMRST_PWRGDSMC_SB_NMIPM_RSMRST_LIMVP_VR_ONPM_PWRBTN_L

SMC_WAKE_SCI_L

SMB_BSB_CLK

SMC_ONOFF_L

SC_RX_LSC_TX_LPM_SUS_STAT_LPM_CLKRUN_LSMC_TPM_GPIO

INT_SERIRQPCI_CLK_SMCSMC_LRESET_LLPC_FRAME_LLPC_AD<3>LPC_AD<2>LPC_AD<1>LPC_AD<0>

SMC_P27

SMC_RCIN_LBOOT_LPC_SPI_L

SMC_TPM_RESET_LPM_EXTTS_LPM_THRM_LSYS_ONEWIREPM_BATLOW_L

SMC_FAN_0_TACHSMC_FAN_1_TACHSMC_FAN_2_TACH

SMC_FAN_3_CTL

SMC_TPM_PPSMB_BSB_DATA

SMC_XDP_TMS

SMC_XDP_TCK

SMC_RX_L

SMC_EXTSMI_L

ISENSE_CAL_EN

SMC_EXCARD_PWR_EN

SMC_FWIRE_ISENSESMC_BATT_ISENSESMC_PBUS_VSENSE

SMC_GPU_VSENSE

SMC_PROCHOT_3_3_LSPI_SO

SPI_SCLK

SMC_SUS_CLK

PM_SYSRST_L

SMC_XDP_TRST_L

SMC_THRMTRIP

ALS_GAIN

SMC_RST_LPM_SLP_S3_LPM_SLP_S4_LPM_SLP_S5_L

=PP3V3_S5_SMC

SMC_VCL

SMC_EXCARD_CP

SMC_DCIN_ISENSE

SMC_GPU_ISENSE

SMC_CPU_RESET_3_3_L

SMC_XDP_TCK_3_3SPI_CE_L

SMC_PF0

SMC_ADAPTER_EN

SMC_CPU_VSENSE

SMB_0_S0_DATA

SMC_RUNTIME_SCI_LSMC_ODD_DETECT SMC_BATT_VSET

SMC_SYS_ISET

SMC_TMSSMC_TDOSMC_TDISMC_TCKSMC_CASE_OPEN

SMC_P26SMC_BATT_CHG_EN

SMC_P20

SMC_BATT_TRICKLE_EN_L

SMC_P21

SMC_FAN_0_CTLSMC_FAN_1_CTL

SMC_FAN_3_TACH

SMS_Y_AXIS

ALS_RIGHT

SMC_FWE

SMC_BC_ACOK

SMC_P23

SMC_CPU_INIT_3_3_L

=PP3V3_S5_SMC

GND_SMC_AVSS

SMC_SYS_LED_16B

SMC_XDP_TDO_3_3

SPI_ARB

GND_SMC_AVSS

SMC_NMI

SMC_TRST_L

SMC_PROCHOT

PP3V3_AVREF_SMC

SMC_MD1

ALS_LEFT

KBC_MDE

=PP3V3_S5_SMC

PP3V3_AVCC_SMCMIN_LINE_WIDTH=0.25 MM


SMC_EXTALSMC_XTAL

SMC_P22

SMC_PM_G2_EN

SMC_EXCARD_OC_L

SMC_FAN_2_CTL

SPI_SI

SMC_CPU_ISENSE

SMS_INT_L

SMC_BS_ALRT_L

SMC_MEM_ISENSESMC_NB_ISENSESMC_ANALOG_IDSMS_Z_AXIS

SMS_X_AXIS

SMS_ONOFF_L

SMC_PF1SMC_LID

SMC_BATT_ISET

SMC_SYS_VSET

67 60

80

80

80

60

67

44

67

67

67

67

67

67

60

26

79

59

60

60

60

60

59

76

76

59

59

77

60

23

60

60

60

60

60

60

60

67

59

23

59

63

63

23

60 77

77

58

63

59

59

59

59

58

59

22

59

58

63

26

5

59

59

59

59

59

59

59

59

59

59

23

26

76

23

23

75

23

23

59

59

59

59

23

5

59

23

34

6

21

21

21

21

21

59

21

22

59

14

10

59

23

65

65

66

59

59

59

59

59

5

23

76

59

59

59

76

59

59

22

22

59

5

59

59

59

59 23

23

23

6

59

76

59

59

59

22

59

59

76

59

23

59 59

59

5

5

5

5

59

59

59

59

59

59

65

65

59

59

59

59

59

59

59

6

58

59

59

5

58

60

59

59

60

59

6

59

59

59

59

59

66

22

76

23

59

59

80

59

59

59

59

59

59

59

59

Preliminary

G

D

S

G

D

S

IO

IO

NCCD

GND

OUT

VDD

G

D

S

D

G

SLM393A

V+

GND

LM393A

V+

GND

GND

VIN VOUT

OUT

IO

IO

IO

IO

IO

IO

IN

IO

IO

IO

IO

OUT

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM



ONLY USING PADS FOR SWITCHPLACE R5908 CLOSE TO SW5901

AMBIENT LIGHT SENSOR CONNECTOR

SYS POWER BUTTON

PIN COMPATIBLE WITH TI REF3133 353S1278

SMC RESET BUTTON

POWER BUTTON HEADERALIAS SENSORS INTO SMC I2C BUSSES

SMC I2C BUS PULLUPS (INCLUDING UNUSED ONES)WHITE SYSLED

SMC ALIASES, PULLUPS, AND TESTPOINTS

SENSE GPU VCORE

GENERATE 0.48V MID-VREFNC OR PULLDOWN UNUSED ANALOG SENSE PINS

WIRE SMC TO SB PINS

WIRE-OR DIMM OVERTEMP TO SMC

TPM RESET PULLUP

SMC PULL-UPS

SMC 3.3V -> CPU 1.05V SHIFTER

3.3V RAIL AND AVCC RAIL IS UP.

NO-CONNECT UNUSED PINS

SPARE COMPARATER

PRECISION 3.3V AVREF FOR SMC

(REF DES PRESERVED FOR PLACEMENT PURPOSE)

DEBUG TESTPOINTS ON SELECTED INPUTS/OUTPUTS

CPU 1.05V -> SMC 3.3V SHIFTER

518S0328

LAYOUT NOTE: PLACE CAPACITORS BETWEEN CRYSTAL AND SMC/TPM

518S0327

TPM CRYSTAL

(REF DES PRESERVED FOR PLACEMENT PURPOSE)

I2C ADDR:72(1001000)

TURN ON 3.3V VREF ONLY AFTER SMC

PINS ON PORT 7.PULLDOWN UNUSED ANALOG SENSE

PULLUPS FOR SYSTEM STATE PINS

SMC CRYSTAL

PULLDOWNS FOR SYSTEM STATE PINS

PCB: RUN A TRACE FROM EACHANALOG OPAMP PSEUDO-DIFFERENTIALLY

TIE INTO DIGITAL GND VERY CLOSE TOSMC’S XW5800. PLACE XW5900 NEAR XW5800.

NEXT TO THIS GND TRACE AND

SELECT TPM GPIO

PCB: ENSURE FSB_CPURST_L FANS OUT FROM U1200AND MINIMIZE ROUTE LENGTH TO U5999.

TIE ANALOG SENSOR OPAMP GROUNDS TO SMC GROUND

CPU HIGH SIDE IN CURRENT

F-ST-SM

CRITICAL

53398-0476

4

3

2

1

6

5

J2901

10K 21 R5917

0SMC_TPM_GPIO121 R5920

1/16W

05%

MF-LF402

SMC_TPM_GPIO221 R5921

0DEVELOPMENT_SMC

21 R5922DEVELOPMENT_SMC

0

402MF-LF1/16W5%

21 R5923

SOT-3632N7002DW-X-F

1

2

6

Q5901

2N7002DW-X-FSOT-363

4

5

3

Q5901

10V402

0.1uF20%CERM2

1C5903

5%

402MF-LF1/16W

6.2K

2

1R5930

53398-0276M-ST-SM

2

1

4

3

J2903

1K5%

402MF-LF1/16W

2

1R5931

MF-LF1/16W

1K5%

4022

1R5933

3X2MM-SMWHITE-500MCD

2 1

LED2901

10K 21 R5916

1%

MF-LF402

1/16W

17_INCH_LCD

56.2

2

1R5901

FDV301NSOT23-LF

2

1

3

Q5900

10K21R583010K21R582910K

402

5%

MF-LF1/16W

21R5808

NOT_DEVELOPMENT_SMC

10K21R5832

10K21R5831

10K21R581710K21R5815

4.7K5%

402MF-LF

NOSTUFF

1/16W

2

1R5902

10KNOT_DEVELOPMENT_SMC

21R5833

10K21R581910K21R5821

100K21R5818

10K21R582210K21R582310K21R582410K21R582510K21R582610K21R5828

10K21R5827

MF-LF402

1/16W

SMC_TPM_PP

0

5%

21

R5995

CERM402

16V20%0.01uF

2

1 C5941

805-1

6.3V20%

10UF

CERM 2

1C5942

402

6.3V20%

CERM-X5R

0.47uF

2

1 C5940

20%

402

0.1uF

CERM

10V2

1 C5901

402

1K

MF-LF1/16W5%

2

1R5932

MF-LF1/16W5%

10K 21 R5924

OMIT

SM

21

XW5900

0

5%1/16WMF-LF402

NOSTUFF

21

R5940

RN5VD30A-FSOT23-5

CRITICAL2

1

4

3

5

U5900

10K

MF-LF402

5%1/16W

21

R5941

402

1UF10%6.3VCERM2

1 C5943

SOT23-LF2N7002

2

1

3

Q5911

SOT-23NTR4101P 2

1

3

Q591010K5%1/16WMF-LF4022

1R59421/16WMF-LF

5%

402

1K21

R5934

1/16WMF-LF

5%

402

1K21

R5935

SOI-1-LF

8

7

5

6

4

U5999

SPSTSM-LF

DEVELOPMENT

43

21

SW5901

SOI-1-LF

8

1

3

2

4

U5999

CRITICAL

SOT23-3ISL60002-33

21

3

U5940

NOSTUFF

100PF5%50VCERM402

2

1 C5904

1/16WMF-LF402

5%1K

NOSTUFF

2

1R5908

2.2K 21 R5903

2.2K 21 R5904

2.2K 21 R5905

2.2K 21 R5906

1/16W5%1K

MF-LF4022

1R5900

1K

1/16W

402

5%

MF-LF

21

R5907

SM-320.000M

OMIT

2

1 Y5800

22PF

40250V5%CERM

21

C5800

22PF

CERM50V

5%402

21

C5801SM-LF32.768K

CRITICAL

41 Y6700

15PF

5%

402CERM50V

21

C6704

15PF

402 CERM50V 5%

21

C6705

0.01UF10%

402CERM16V

2

1C5900

0.1uF

402

20% 10V

CERM2

1 C5902

10K 21 R5910

10K 21 R5911

DEVELOPMENT

SPSTSM-LF

43

21

SW5900

10K 21 R5913

10K 21 R5912

10K 21 R5914

10K 21 R5915

051-7032 A

59 97

SMC & TPM SUPPORT

Y5800XTAL,20.00,80PPM,HC49,SMD,LF1197S0165 CRITICAL

P0V48_SMC_LSREF

CPU_PROCHOT_L

SMC_SYS_KBDLED

TP_PM_G2_ENFUNC_TEST=TRUEMAKE_BASE=TRUE

=PP3V3_S5_SMC

SMB_0_S0_DATATP_SMB_0_S0_DATA FUNC_TEST=TRUE

MAKE_BASE=TRUE

SMB_BSA_CLKSMC_ANALOG_IDSMC_BATT_CHG_ENSMC_BATT_TRICKLE_EN_L

SMC_SYS_VSET

SMC_TPM_RESET_L

PM_EXTTS_L

SMC_BATT_ISET

SMC_P20

NC_SMC_SYS_VSETMAKE_BASE=TRUE

CPU_HISIDE_ISENSE

MAKE_BASE=TRUENC_SMS_X_AXIS

PP5V_S3

PP3V3_S5


SYS_LED_DRV_C

PP5V_S5

=PP3V3_S5_SMC

FUNC_TEST=TRUETP_SMC_PB7MAKE_BASE=TRUE

SMC_EXCARD_PWR_ENMAKE_BASE=TRUE

TP_SMC_EXCARD_PWR_EN FUNC_TEST=TRUE

I2C_ALS_SCL

=SMB_THRM_CLK

I2C_ALS_SDA

NC_SMC_BATT_VSETMAKE_BASE=TRUE

PP3V3_TPM_3VSB

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM

SMC_REF_GATE2

TPM_XTALI

SMC_TPM_PP

SMC_CASE_OPEN

=SMB_THRM_DATA

MAKE_BASE=TRUE

SMB_A_S3_CLK

MAKE_BASE=TRUE

SMB_A_S3_DATA

SMS_X_AXIS

I2C_ALS_SCL

MAKE_BASE=TRUESMC_GPU_ISENSE

MAKE_BASE=TRUESUS_CLK_SB

PP3V3_S0

SMB_BSB_CLK

SMB_BSB_DATA

MAKE_BASE=TRUENC_SMC_BATT_ISET

MAKE_BASE=TRUE

DIMM_OVERTEMP_L

SC_RX_L

SC_TX_L

SMC_REF_GATE1

UNUSED_SMC_SENSE

SMC_FWIRE_ISENSE

SMC_BATT_ISENSE

SMC_TPM_GPIO

SMC_ONOFF_L

SMC_P21

SMB_GPU_NB_THRM_DATASMB_GPU_NB_THRM_CLK

=I2C_HD_TEMP_SDA=I2C_HD_TEMP_SCL

TPM_PP

NC_SMC_MEM_ISENSEMAKE_BASE=TRUE

SMC_ADAPTER_EN

ALS_RIGHT

SMC_MANUAL_RST_L

SMB_0_S0_CLK

PP3V3_S3

SMB_B_S0_CLK

TPM_XTALO

SMC_XTAL

SMC_P27SMC_P26

ALS_LEFT

NC_SMC_ANALOG_IDMAKE_BASE=TRUE

SMC_PF1

MAKE_BASE=TRUENC_SMS_Z_AXIS

MAKE_BASE=TRUENC_SMS_Y_AXIS

MAKE_BASE=TRUEFWH_INIT_L

PM_THRMTRIP_L

CPU_PROCHOT_L

SMC_PROCHOT

SMC_THRMTRIP

SMC_EXTAL

GND_NEXT_TO_SMC

P0V48_SMC_LSREF

=PP3V3_S0_FAN

=PP3V3_S5_SMC

NC_SMC_P23MAKE_BASE=TRUE

SMC_P23

SMC_SYS_ISETMAKE_BASE=TRUE

NC_SMC_SYS_ISET

MAKE_BASE=TRUETP_SMC_PF0TP_SMC_SYS_KBDLED

MAKE_BASE=TRUE FUNC_TEST=TRUESMC_PF0SMC_PM_G2_EN

TP_ALS_LEFTMAKE_BASE=TRUE FUNC_TEST=TRUE

TP_SMC_PF1MAKE_BASE=TRUE

SYS_LED_DRV_K


SMC_XDP_TDO_3_3

=PP3V3_S5_SMC

ALS_GAIN

SMC_BATT_VSET

SMC_PB7

FUNC_TEST=TRUETP_SMC_FAN_3_TACHMAKE_BASE=TRUE

FUNC_TEST=TRUETP_SMC_FAN_3_CTLMAKE_BASE=TRUE

TPM_GPIO2

TPM_GPIO1

SMC_SYS_LED_16B

SMC_PROCHOT_3_3_L

MAKE_BASE=TRUENC_SMC_P27NC_SMC_P26

MAKE_BASE=TRUE

SMC_XDP_TCK TP_SMC_XDP_TCKMAKE_BASE=TRUE

TP_SMC_XDP_TMSMAKE_BASE=TRUE

SMC_XDP_TMS

SMC_P22 NC_SMC_P22MAKE_BASE=TRUE

NC_SMC_P21MAKE_BASE=TRUE

MAKE_BASE=TRUENC_SMC_P20

FUNC_TEST=TRUETP_SMC_PB7MAKE_BASE=TRUE

SMC_PB7

SMC_XDP_TRST_LMAKE_BASE=TRUE

TP_SMC_XDP_TRST_L

PP3V3_AVREF_SMC

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMSMC_REF_IN

MIN_NECK_WIDT=0.2 MMMIN_LINE_WIDTH=0.4 MM

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=0V

GND_SMC_AVSS

SMC_EXCARD_CP

SMC_ONOFF_L

SMC_TMS

SMS_ONOFF_L

SC_RX_L

SMC_ODD_DETECT

SMC_TX_L

SC_TX_L

SMC_FAN_3_CTLSMC_FAN_3_TACH

SMC_SYS_LED

SMC_RSTGATE_LMAKE_BASE=TRUE

TP_SMC_RSTGATE_LMAKE_BASE=TRUETP_SMC_SYS_LED

MAKE_BASE=TRUENC_SMC_BATT_TRICKLE_EN_LNC_SMC_BATT_CHG_EN

MAKE_BASE=TRUE

NC_ALS_GAINMAKE_BASE=TRUE

SMC_CPU_INIT_3_3_L

SMS_Y_AXISSMS_Z_AXIS

SMC_MEM_ISENSEUNUSED_SMC_SENSE

MAKE_BASE=TRUE

UNUSED_SMC_SENSEMAKE_BASE=TRUE

SMC_RX_L

SMC_TX_L

SMC_FWESMC_BC_ACOKSMC_TCKSMC_TDISMC_TDO

SMC_BS_ALRT_L

SMC_RX_LSYS_ONEWIRE

TP_ALS_RIGHTMAKE_BASE=TRUE

TP_SMC_ADAPTER_ENMAKE_BASE=TRUE FUNC_TEST=TRUE

SMB_B_S0_DATA

SMB_A_S3_CLK

SMB_A_S3_DATA

TP_SMB_0_S0_CLK FUNC_TEST=TRUEMAKE_BASE=TRUE

SMB_BSA_DATA

SMC_LID

=I2C_ODD_TEMP_SDA=I2C_ODD_TEMP_SCL

MAKE_BASE=TRUE

SMB_B_S0_DATASMB_B_S0_CLK

MAKE_BASE=TRUE

=PP3V3_S0_FAN

SMC_CPU_RESET_3_3_L

SMC_XDP_TCK_3_3

SMC_SUS_CLK

SMC_RST_L

CPU_HISIDE_VSENSE

=PP3V3_S5_SMC

SMC_GPU_VSENSE

SMC_EXCARD_OC_L

=PP3V3_S5_SMC

PP3V3_S3

I2C_ALS_SDA

POWER_BUTTON_L

83 80 79 78

94

77

83

76

83

76

66

82

61

65

80

41

83

66 60

60

60

60

66

83

59

26

79

59

59

59

26

59

21

65

59

59

80

60

59

59

59

60

60

60

59

59

65

59

59

59

59

58

67

58

83

6

6

58

59

10

59

10

58

58

10

29

59

59

61

61

66

66

53

59

60

14

59

59

58

58

76

59

58

59

58

59

58

58

58

58

58

58

59

59

59

66

66

58

59

59

60

58

58

53

59

7

58

6

58

58 58

58

58

58

58

14

58

58

76

6

5

5

6

58

67

67

58

58

58

59

58

23

6

58

58

28

58

58

59

58

58

58

58

67

58

58

5

58

6

58

67

58

58

58

58

58

21

7

7

58

58

58

76

59

6

6

58

58

58

58

58

6

58

58

59

67

67

58

58

58

58

58

59

58

58

58

58

58

5

58

58

58

5

58

58

58

58

58

58

58

58

58

59

59

5

5

58

58

5

5

5

58

5

58

58

58

58

58

58

58

6

58

58

58

58

76

6

58

58

6

6

59

5

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOSTUFF

F-ST-5047SM1

3029

2827

2625

2423

2221

2019

1817

1615

1413

1211

109

87

65

43

21

J6000

402

10%1UF6.3VCERM2

1 C6000

402CERM10V20%0.1UF

2

1 C6001

0.1UF20%10V

402CERM2

1 C600310%

402

6.3VCERM

1UF

2

1 C6002

LPC+ CONNSYNC_DATE=12/09/2005SYNC_MASTER=M38

051-7032 A

60 97

FWH_INIT_LPCI_CLK_PORT80

SMC_TCK

PM_SUS_STAT_L

LPC_AD<2>

LPC_FRAME_L

SMC_TRST_LSMC_TDO

PM_CLKRUN_L

DEBUG_RST_LSMC_TMS

BOOT_LPC_SPI_L

SMC_NMISMC_RST_L

SMC_TDI

INT_SERIRQ

LPC_AD<3>

SMC_RX_LSMC_MD1

LPC_AD<1>LPC_AD<0>

SV_SET_UPSMC_TX_L

=PP3V3_S5_DEBUG

=PP5V_S0_DEBUG

67 58

59

67

67

67

59

44

59 59

67

67

59

67

67

59

59

58

58

58

58

58

58

23

58

58

59

58

58

58

58

58

58

58

21

34

5

23

21

21

5

5

5

6

5

22

58

58

5

23

21

5 58

21

21

23

5

6

6

Preliminary

SMBDATA

SMBCLK

ALERT*

OT2*

DXP2

OT1*

DXN

DXP1

GND

VCC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

I2C ADDR:30(0011000)

5%1/16WMF-LF

47

402

DEVELOPMENT

21

R6100

0

5%1/16WMF-LF402

DEVELOPMENT

21

R6101

0.1UF10V20%

CERM402

DEVELOPMENT

2

1 C6100

UMAXMAX6695AUB

CRITICAL

DEVELOPMENT1

9

7

10

5

6

4

2

3

8

U6100

402CERM50V10%0.001UF

DEVELOPMENT

2

1 C6101SM-2MT-BLK-LF

CRITICAL

DEVELOPMENT

2

1

4

3

J3

NB THERMAL

051-7032 A

61 97

TSENSE_NB_DXP

PP3V3_S0

SMB_GPU_NB_THRM_CLK

SMB_GPU_NB_THRM_DATA

U6100_VCC

TSENSE_NB_GPU_DXN

NB_THRM_SPARE_DXP

94 83 76 59 41 26 10 6

59

59

Preliminary

SCK

SOWP*

SI

VDD

CE*

HOLD*VSS

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

R6309 NOT NEEDED SINCE SPI ROM

IS SHARED WITH SB AND SMC

R6306-07 SHOULD BE PLACED LESS THAN 2.54MM FROM U2100

R6303 SHOULD BE PLACED LESS THAN 2.54MM FROM U6301

402CERM10V

0.1UF20%

2

1 C6312

1/16W

402

5%3.3K

MF-LF2

1R6301

1/16W5%

3.3K

MF-LF4022

1R6302

50V5%

402CERM

33PF

2

1 C6301

1/16WMF-LF402

47

5%

21

R6307

33PF

402

50V5%

CERM2

1 C6308

402

5%

CERM

33PF50V

2

1 C63095%

402

47

MF-LF1/16W

21

R63035%

1/16WMF-LF402

4721

R6306

CERM

5%33PF50V

4022

1 C6311

OMIT

SOI16MBIT

SST25VF016B

3

4

8

2

56

7

1

U6301

402

10K1/16W

5%

MF-LF2

1R6399

10K1/16W

5%

MF-LF402

NOSTUFF

2

1R6309


97

A051-7032

SPI BOOTROM

63

SPI_SI

SPI_HOLD_L

SPI_SCLK_RSPI_SCLK

SPI_SO

=PP3V3_S5_ROM

SPI_SI_R

SPI_SO_RSPI_CE_L

SPI_WP_L

58 58

58 58

22 22

22

6

22

Preliminary

IN

OUT

OUT

IN

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: ADDED TO PROTECT SMC

518S0326

MOTOR CONTROL

FAN 1

MOTOR CONTROL

TACH

12V DC

FAN 0

GND

GND

12V DC

518S0193

TACH

HD FAN

ODD FAN

MF-LF402

1/16W

10K5%

2

1R6500

10K5%1/16WMF-LF4022

1R6501

20%

NOSTUFF

CERM25V

0.1UF

6032

1 C65001.5K5%1/4WMF-LF12062

1R6502

1206A-03-LFNTHS5443T1

5

4

876321

Q6500

1/8W5%

MF-LF805

1.5K

2

1R6503

SOT23

MMBD914XXG

3

1

D6500MF-LF1/8W5%

0

805

21

R650416V10%0.47UF

805X7R2

1 C6501

3.9K

5%1/8WMF-LF805

R6505

10K

402

5%

MF-LF1/16W

2

1R6506

NTHS5443T11206A-03-LF

5

4

876321

Q6503

20%

NOSTUFF

25V

603

0.1UF

CERM2

1 C6502

1/8W

1.5K5%

MF-LF8052

1R6507

805MF-LF1/8W

0

5%

21

R650816V10%

805

0.47UF

X7R2

1 C6503

3.9K

5%1/8W

805MF-LF

R6509

MMBD914XXGSOT23

3

1

D6501

MF-LF

5%

1206

1.5K1/4W

2

1R6510402

10K5%

MF-LF1/16W

2

1R6511

OMITCRITICAL

ELEC16V20%

6.3X11-TH-LF

120UF2

1C6504

OMIT

120UF

6.3X11-TH-LF

20%16VELEC

CRITICAL

2

1C6505

NOSTUFF

MF-LF1/8W5%1.0K

8052

1R6512

NOSTUFF

1.0K5%1/8WMF-LF8052

1R6513

1/8W5%

MF-LF

0

805

21

R6514

805

0

5%

MF-LF1/8W

21

R6515B130LBT01XF

NOSTUFF

SMB21

D6502

NOSTUFF

SMB

B130LBT01XF

21

D6503

CRITICAL

M-RT-SM53261-0498

4

3

2

1

6

5

J6500

CRITICAL

53261-0598M-RT-SM

5

4

3

2

1

7

6

J6501

47K

5%1/16WMF-LF402

21

R6599

402MF-LF1/16W5%

47K21

R6598

SOT23-LF2N7002

2

1

3

Q6502

SOT23-LF2N7002

2

1

3

Q6505

65 97

A051-7032

Fan 0, 1 & System Temp

FAN_0_PWRMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

SMC_FAN_0_CTL

=PP12V_S0_FAN


FAN_0_OUT

F0_GATESLOWDN

FAN_RPM1

FAN_TACH1

F1_VOLTAGE8R5

F0_VOLTAGE8R5

FAN_RPM0

SMC_FAN_1_TACH

SMC_FAN_0_TACH

=PP3V3_S0_FAN


F1_RCFEEDBK


F0_RCFEEDBKMIN_LINE_WIDTH=0.5MM

FAN_1_OUTMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

=PP3V3_S0_FAN

PP3V3_S5

FAN_1_PWRMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

=PP12V_S0_FAN

PP3V3_S5

F1_GATESLOWDN

FAN_TACH0

SMC_FAN_1_CTL

83

83

80

80

79

79

78

78

77

77

76

76

66

66

65

65

66

66

59

59

66

65

65

26

66

26

58

65

59

59

6

65

6

58

6

58

58

6

6

5

6

5

Preliminary

G

D

S

IN

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

I2C ADDR:0X90(1001000)

518S0193518S0193

MOTOR CONTROL

GND

TACH

12V DC

HD TEMP SENSOR

FAN 2

ODD TEMP SENSOR

518S0328

CPU FAN

I2C ADDR:0X92(1001001) 402CERM10V

0.1UF

HD_TEMP_SENSE

20%2

1C6654

402CERM10V

0.1UF20%

2

1C6655

2N7002SOT23-LF

2

1

3

Q6602

CRITICAL

ELEC16V20%

6.3X11-TH-LF

120UF

OMIT

2

1C6602

MF-LF402

10K1/16W5%

2

1R6600

53261-0498M-RT-SM

HD_TEMP_SENSE

CRITICAL

4

3

2

1

6

5

J6601

NTHS5443T11206A-03-LF

5

4

876321

Q6600

MMBD914XXGSOT23

3

1

D6600

NOSTUFF

CERM

0.1UF

603

25V20%

2

1 C66001.5K5%

1/8WMF-LF

8052

1R6601

0

1/8W

805MF-LF

5%

21

R66020.47UF10%

805X7R16V

2

1 C6601

3.9K

5%1/8WMF-LF805

R6603

1206

1.5K5%1/4WMF-LF

2

1R6604

MF-LF

10K

402

5%1/16W

2

1R6605

NOSTUFF

1/8W

1.0K

805

5%

MF-LF2

1R6606

805

0

5%1/8WMF-LF

21

R6607

NOSTUFF

SMB

B130LBT01XF

21

D6601

M-RT-SM53261-0498

CRITICAL

4

3

2

1

6

5

J6602

53398-0476F-ST-SM

CRITICAL

4

3

2

1

6

5

J6600

47K

5%1/16WMF-LF402

21

R6697

16V

HD_TEMP_SENSE

0.01UF

CERM402

20%

2 1

C6650

HD_TEMP_SENSE

0.01UF

16V 402CERM20%

2 1

C6651

402

17_INCH_LCD

CERM

0.01UF

16V20%

2 1

C6653

402

0.01UF

CERM

17_INCH_LCD

16V20%

2 1

C6652

051-7032 A

66 97

Fan 2 & HD Temp

CPU_HS_ZH608

=PP3V3_S0_HD_TSENS

=I2C_HD_TEMP_SCL

FAN_2_PWRMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

FAN_RPM2

PP3V3_S5

=PP3V3_S0_FAN

=I2C_ODD_TEMP_SCL

=I2C_ODD_TEMP_SDA=I2C_HD_TEMP_SDA

SMC_FAN_2_TACH

F2_RCFEEDBKMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM


FAN_2_OUTMIN_LINE_WIDTH=0.5MM

F2_GATESLOWDN

=PP12V_S0_FAN

FAN_TACH2

CPU_HS_ZH608



=PP3V3_S0_ODD_TSENS

F2_VOLTAGE8R5

SMC_FAN_2_CTL

83 80 79 78 77 76 65 59 26

65

66

6

59

65

66

66

66

58

9

6

59

5

6

59

59 59

58

6

9

6

6

6

Preliminary

IN

IO

IO

IO LAD1

LAD2

LCLK

LFRAME*

LRESET*

LPCPD*

SERRIRQ

LAD0

CLKRUN/GPIO*

PP/GPIO

GPIO_EXPRESS_00

GPIO/SM_DAT

GPIO/SM_CLK

XTALI/32K_IN

TESTBI/BADD/GPIO

TESTI

3V0

3V1

3V2

3VSB

VNC

VBAT

XTALO

GND2

GND3

GND0

GND1

LAD3

IO

IO

IN

IN

IO

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

BASE ADDR = 0X4E/4F

GPIO2TESTBI/BADD

1/8W (R6704/R6705) IS USED FOR NOW

SINCE CURRENT OF VSB IS NOT YET ON SPEC,

NOTE:

PLACE R6702-03 WHERE ACCESSIBLE

LAYOUT NOTE:

PLACE WHERE ACCESSIBLE

LAYOUT NOTE:

BASE ADDR = 0X2E/2F

NC

NC

NC

CLKRUN*

GPIO

PP

NC

VDD

VDD

VDD

VSB

NC

NC

GND

(INT PD)

402X5R16V10%0.1UF

2

1 C67000.1UF

402X5R16V10%

2

1 C67010.1UF10%16VX5R402

2

1 C6702

0.1UF10%16VX5R402

2

1 C6703NOSTUFF

05%1/16WMF-LF4022

1R6700

OMIT

TSSOPTPM

14

13

3

12

8

9

27

7

16

28

22

21

17

20

23

26

6

1

2

25

18

114

15

5

24

19

10U6700

MF-LF1/16W5%10K

4022

1 R6702

NOSTUFF

5%1/16WMF-LF

10K

4022

1 R6703

805MF-LF1/8W5%

021

R6704

NOSTUFF

805MF-LF1/8W5%0

2

1R6705

0

5%

MF-LF1/16W

402

21

R6798

MF-LF

5%

0

NOSTUFF

1/16W

402

21

R6799

TPMSYNC_DATE=01/05/2006SYNC_MASTER=M38

051-7032 A

67 97

SMC_TPM_RESET_L

TPM_LRESET_L

TPM_RST_L

TPM_BADD

LPC_AD<0>

LPC_AD<1>

LPC_AD<2>

PCI_CLK_TPM

LPC_FRAME_L

PM_SUS_STAT_L

INT_SERIRQ

=PP3V3_S0_TPM

TPM_XTALO

TPM_XTALI

PM_CLKRUN_L

=PP3V3_S3_TPM

=PP3V3_S0_TPM

LPC_AD<3>

TPM_GPIO2

TPM_GPIO1

TPM_PP


PP3V3_TPM_3VSB

60 58

60

60

60

60

60

60

44

60

59

58

58

58

58

58

58

67

23

67

58

58

6

21

21

21

34

21

23

23

6

59

59

5

6

6

21

59

59

59

59

Preliminary

IN

IN

IN

IN

OUT

NR/FBENIN OUT

GNDGNDTAB

GPIO1

GPIO0

GPIO2

SPDIF-OUT

AVDD1

AVDD2

DVDD_CORE3

DVDD_CORE1

BIT_CLK

SYNC

SDATA_OUT

SDATA_IN

PORT-C_R

PORT-D_L_HP

PORT-D_R_HP

CD-G

VOLUME_DOWN

VOLUME_UP

PC_BEEP

GPIO3/SPDIFIN

SENSE_A

SENSE_B

PORT-A_L_HP

PORT-A_R_HP

PORT-E_L

PORT-E_R

AVSS3

AVSS1

DVSS2

DVSS3

VREF_FILT

AFILT1

AFILT2

NC1

NC2

CAP2

VREFOUT-D

VREFOUT-A

VREFOUT-B

VREFOUT-C

PORT-B_L

PORT-B_R

PORT-F_R_HP

PORT-F_L_HPPORT-C_L

CD-R

CD-L

RESET*

MIC1

HP

LO

MIC2

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

NC

12

NCNC

NC

NC

NC

AUDIO CODECAPPLE P/N 353S1345

10

15

13

10

10

10

10

11

14

NC

MIC INPUT TO BOTH L&R

APN: 353S1233

NC

4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP

402

10%

X5R16V

0.1UF

2

1 C6821

AUD_REG

1UF10%6.3V

402CERM2

1 C6825

AUD_REG

1/16W

402

5%100K

MF-LF2

1R6803AUD_REG

402

10%

X5R

0.1UF16V

2

1C682310UF

AUD_REG

20%6.3VX5R603

2

1 C6822

1K

1%1/16WMF-LF402

AUD_REG

21

R6802

6.3V20%

SMA-LFTANT

10UF2

1C6810

MF-LF1/16W5%

402

3921

R6808

10%25VX7R

1000PF

4022

1 C68291000PF

X7R25V10%

4022

1 C6832

X7R25V

1000PF10%

4022

1 C68331000PF10%

402

25VX7R2

1 C6834

SMA-LFTANT

10UF20%

6.3V 2

1C6807

10%25VX7R

1000PF

4022

1 C68131000PF10%25V

402X7R2

1 C6812

6.3X5.5-SMELEC16V

100UF20%

2

1C6802

6.3X5.5-SMELEC16V

100UF20%

2

1C680310%25V

402

1000PF

X7R2

1 C6830

AUD_REG

402

1%

MF-LF1/16W

29.4K

2

1R6811

AUD_REG

402MF-LF

1%78.7K1/16W

2

1R6810

25V

402X7R

10%1000PF

2

1 C6835

X7R25V10%

402

1000PF

2

1 C6836

AUD_REG

TPS79501SOT223-6

4

5

2

63

1

VR6800

AUD_REG

20%

X5R6.3V

603

10UF

2

1 C6826

CERM402

6.3V10%1UF

2

1C68081UF6.3VCERM402

10%2

1C68091UF6.3V10%

402CERM 2

1C6811

180-OHM-1.5A

0603

AUD_REG

21

L6800

5%

402

0

MF-LF1/16W

21

R6812

0603

180-OHM-1.5A21

L6801

20%10UF6.3VTANT

SMA-LF

2

1C6804

STAC9220LQFP

32

29

28

37

27

2

3

10

48

34

13

5

8

11

17

16

15

1436

35

24

23

22

21

41

39

12

43

40

47

44

46

45

7 491

20

18

19

33

6

42

26

38

25

31

30

U6800

0603

180-OHM-1.5A

LEMENU

21

L6802

1000PF

CERM50V5%

8052

1C6805

5%

402

1/16W

0

MF-LF

21

R6814

39

402

5%1/16WMF-LF

21

R6807

5%50VCERM

1000PF

8052

1 C6806

X7R

10%

402

25V

1000PF

2

1 C6801

5%

402

1/16WMF-LF

100K

2

1R6800

10UF20%

6.3VCERM805-1

2

1C6800

805MF-LF

05%1/8W

2

1R6801

AUDIO: CODECSYNC_DATE=05/12/2006

A

SYNC_MASTER=AUDIO

97

051-7032

68

TP_AUD_BI_PORT_D_R

AUD_GPIO_0

ACZ_SYNC

BAL_IN_LBAL_IN_COM

NC_VOL_UP


VOLTAGE=0V

GND_AUDIO_CODEC

MIN_NECK_WIDTH=0.25MMVOLTAGE=4.5V


PP4V5_AUDIO_ANALOG

MIN_NECK_WIDTH=0.25MMVOLTAGE=5V


=PP4V5_S0_AUDIO_ANALOG

ACZ_SDATAIN<0>

NC_AUD_VREF_PORT_C

AUD_BI_PORT_C_R

TP_AUD_BI_PORT_D_L

NC_AUD2NC_AUD1

NC_VOL_DOWN

BAL_IN_R

AUD_BI_PORT_C_L

AUD_GPIO_2

AUD_GPIO_1_A AUD_GPIO_1

AUD_GPIO_0AUD_GPIO_0_A

GND_AUDIO_CODEC

=PP3V3_S0_AUDIO

=PP5V_S5_AUDIO

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMVOLTAGE=5V

BEEP

AUD_SPDIF_IN

VREG_FB

AUD_BI_PORT_B_L AUD_BI_PORT_B_R

AUD_SPDIF_OUT

GND_AUDIO_CODEC

VOLTAGE=3.3VMIN_NECK_WIDTH=0.20MM

PPV_3V3_AUDIO_CODEC

AUD_SPDIF_OUT_CHIP

AUD_BI_PORT_A_L

NC_AUD_VREF_PORT_A

VOLTAGE=4.5V PP4V5_AUDIO_ANALOGMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM

AUD_BI_PORT_F_RAUD_BI_PORT_F_L

AUD_SENSE_A

AUD_SENSE_B

AUD_BI_PORT_A_R

VOLTAGE=3.3V=PP3V3_S0_AUDIO

ACZ_BITCLK

AUD_GPIO_1

ACZ_RST_L

AUD_4V5_SHDN_L

VOLTAGE=5V

5V_REG_IN


NC_AUD_VREF_PORT_D

AUD_VREF_FILTAUD_ANALOG_FILT_1

ACZ_SDATAOUT

ACZ_SDATAIN_CHIP

TP_AUD_BI_PORT_E_L

AUD_ANALOG_FILT_2AUD_BYPASS

AUD_BI_PORT_B_RAUD_BI_PORT_B_L

AUD_VREF_PORT_B

TP_AUD_BI_PORT_E_R

74

74

74

74

73

74

73

73

73

72

73

72

72

74

74

72

68

74

72


74

68

74

68

21

74

74

68

68

6

21

72

74

72

74

73 68

68 72

68

6

6

73

68 68

73

68

74

68

74

74

74

74

74

6

21

68

21

21

68

68

74

Preliminary

PGND

VDD

G1

G2

CHOLD

AGND PADTHM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+

OUTL+

OUTL-

OUTL-

C1+

C1-

OUTR+

OUTR+

OUTR-

OUTR-

SS

G

D

S G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

GAIN AND SWITCHING FREQUENCY STUFF OPTIONSMODULATION SETTING: LOW EMI

GAIN SETTINGS: +19DB

APPLE P/N 353S0680

SPEAKER AMP

MF-LF1/16W

10K1%

4022

1R7214

MAX9714QFN-LF

22

21

43

33

12

11

14

24

2321

26

28

25

27

30

32

29

31

8

15

16

9

10

18

17

20

19

7

5

6

13

U7200

SM OMIT

21

XW7201

2N7002DW-X-FSOT-363

4

5

3

Q72002N7002DW-X-FSOT-363

1

2

6

Q7200

CERM402

50V5%100PF

2

1 C7220 100PF5%50VCERM402

2

1 C7221

47K

MF-LF402

5%1/16W

21

R7213

402MF-LF1/16W

10K

5%

21

R7215

402

1/16WMF-LF

5%

021

R72171/16W

402

5%0

MF-LF

NOSTUFF

2

1R7216

402MF-LF1/16W5%0

NOSTUFF

2

1R7218

NOSTUFF

5%

402MF-LF1/16W

021

R7219

0603

180-OHM-1.5A21

L7203

X7R

10%50V

0.1UF

603-12

1 C7208

0603

180-OHM-1.5A21

L7204

10%16V

805X7R

0.47UF

2

1 C7209

FERR-250-OHM

SM-1

21

L7200

10%16V

0.47UF

805X7R

21

C7204

805X7R16V10%

0.47UF21

C7205

180-OHM-1.5A

0603

21

L7202

603

25V10%

X5R

1UF

2

1 C7214

805

0.47UF

16VX7R

10%

21

C7207

16VX7R805

10%

0.47UF21

C7206

220UF

SM-CASE-C1ELEC16V20%

2

1C7200

180-OHM-1.5A

0603

21

L7201

402MF-LF1/16W5%0

2

1R7208

SM-CASE-C1

220UF20%16V

ELEC2

1C72171UF10%25VX5R603

2

1 C7202

5%47K1/16WSM-LF

5678

4321

RP7200

1%10K

MF-LF1/16W

4022

1R7212

50R28

1

XC7200

0603

1000-OHM-200MA21

L7205

50VCERM402

100PF5%

2

1 C7215

402CERM

100PF5%50V

2

1 C7216

1000-OHM-200MA

0603

21

L7206

1000-OHM-200MA

0603

21

L7207

0603

1000-OHM-200MA21

L7208

16V20%0.1UF

603CERM2

1 C721920%

CERM16V

603

0.1UF

2

1C7218

1210CERM16V10%10UF

2

1 C7203

1210CERM16V10%10UF

2

1 C722310%

1210CERM16V

10UF

2

1C7201

25V

1000PF10%

X7R402

2

1 C7210

25V10%

X7R402

1000PF

2

1 C72111000PF

402

10%25VX7R2

1 C72121000PF25V10%

X7R402

2

1 C7213

SYNC_DATE=05/12/2006

AUDIO: SPEAKER AMP

051-7032

97

A

SYNC_MASTER=AUDIO

72

PP12V_AUD_SPKRAMP_PLANE


VOLTAGE=12V

NET_SPACING_TYPE=AUDIO

AUD_SAMP_INL_P

GND_AUDIO_SPKRAMP_PLANE

MIN_NECK_WIDTH=0.3MMAUDSAMPOUTLN

MIN_LINE_WIDTH=0.5MMNET_SPACING_TYPE=AUDIO


AUD_SPKR_OUTR_N

NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MM


AUD_SPKR_OUTR_P


AUD_GPIO_0_A




=PP3V3_S0_AUDIO


AUD_SPKR_OUTL_P

MIN_LINE_WIDTH=0.5MMNET_SPACING_TYPE=AUDIO


AUD_SPKR_OUTL_N




AUDSAMPOUTLPMIN_NECK_WIDTH=0.3MM


AUD_MAX9714_VREGMIN_LINE_WIDTH=0.2MM


SPKRAMP_SS

AUD_SAMP_SHDN_L

AUD_SAMP_G2



AUDSAMPOUTRN

AUD_SAMP_INR_N


AUD_SAMP_G2AUD_SAMP_FS1AUD_SAMP_FS2

AUD_SAMP_INL_N

AUD_SAMP_INR_P

AUD_SAMP_G1


AUDSAMPOURTP




GND_AUDIO_SPKRAMP



AUDSAMPCPN

MIN_NECK_WIDTH=0.15MMAUDSAMPCPP


AUD_SAMP_FS1

AUDSAMPINLP

AUDSAMPINRP

AUDSAMPINLN

AUD_SAMP_FS2



AUD_MAX9714_CHOLD

AUD_SAMP_G1

AUD_BI_PORT_C_L

=PP3V3_S0_AUDIO


=PP12V_S0_AUDIO_SPKRAMP

VOLTAGE=12V


AUD_BI_PORT_C_R

GND_AUDIO_CODEC

GND_AUDIO_CODEC

AUDSAMPINRN

AUD_DEBOUNCE

SPKRAMP_MUTE

=PP3V3_S0_AUDIO


PP3V3_INTERCON

74

74

74

73

73

74

74

73

72

72

73

73

72

74

74

68

74

74

74

74

68

72

72

68

72

73

73

68

72

6

73

73

72

72

72

72

72

72

72

72

6

72

72

72

68

6

6

68

68

68

6

Preliminary

TYPE_DET

TIP

GND

VIN

VCC

LED

GND_2

GND_1

RING

TIP_DET

IN

IN

IN

IN

VCC

VOUT

GND

SHELL

LED

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TO POWER SUPPLY PAGE 6

TO FHB CONNECTOR PAGE 47

NC

LINE OUT JACK

LINE IN JACK

NC

APPLE P/N 518S0325

SPEAKER CABLE CONNECTORAPPLE P/N 514-0341 (M50)

APPLE P/N 514-0338

100PF50VCERM

5%

4022

1 C7303

402

50V5%

CERM

100PF

2

1C7302

0

402MF-LF

5%1/16W

2

1R7302

402

5%50VCERM

100PF

2

1 C73015%50V

CERM

100PF

4022

1C7300

100PF

CERM50V

402

5%2

1 C7324

100PF

CERM50V5%

4022

1 C7323

180-OHM-1.5A

0603

21

L7301

0603

180-OHM-1.5A21

L7302

180-OHM-1.5A

0603

21

L7303

0603

180-OHM-1.5A21

L7304

180-OHM-1.5A

0603

21

L7305

180-OHM-1.5A

0603

21

L7306

180-OHM-1.5A

0603

21

L7307

180-OHM-1.5A

0603

21

L7309

180-OHM-1.5A

0603

21

L7310

0603

180-OHM-1.5A21

L7312

180-OHM-1.5A

0603

21

L7313

180-OHM-1.5A

0603

21

L7314

0603

180-OHM-1.5A21

L7315

0603

180-OHM-1.5A21

L7316

0603

180-OHM-1.5A21

L7320

180-OHM-1.5A

0603

21

L7322

180-OHM-1.5A

0603

21

L7323

0603

180-OHM-1.5A21

L7324

0603

180-OHM-1.5A21

L7328

CRITICAL

M-RT-SM53261-0798

7

6

5

4

3

2

1

9

8

J7301

F-ANG-THOPTI-AUD-OUT-JCK-M50

CRITICAL

7

8

6

5

4

3

2

13

12

11

10

1

9

J7303

180-OHM-1.5A

0603

21

L7325

50VCERM

100PF5%

4022

1 C7314

0603

180-OHM-1.5A21

L7317

5%50VCERM402

100PF

2

1 C7312

0603

180-OHM-1.5A21

L7327

0603

180-OHM-1.5A21

L7319

0603

180-OHM-1.5A21

L7318

402CERM50V5%100PF

2

1 C7313

180-OHM-1.5A

0603

21

L7326

SM

OMIT

21

XW7300

04055.6V-15A

4 2

3 1

DZ730104055.6V-15A

42

31

DZ7302

5.6V-15A0405

NOSTUFF

42

31

DZ7304

5.6V-15A0405

42

31

DZ7300 5.6V-15A0405

42

31

DZ7303

4.7K

NOSTUFF

402MF-LF

5%1/16W

2

1R7304

47K1/16W

5%

MF-LF402

NOSTUFF

2

1R7303

10V20%0.1UF

CERM402

2

1 C7325

805-1CERM

20%10UF6.3V2

1 C7318

0603

180-OHM-1.5A21

L7329180-OHM-1.5A

0603

21

L7330

5%01/16W

402MF-LF

2

1R7305

402

100PF5%50VCERM2

1 C7328

5%

402

39

1/16WMF-LF

21

R7306

5%

402CERM50V

100PF

2

1 C7322

0.1UF20%

402

10VCERM2

1 C7317

CERM

5%

402

50V

100PF

2

1 C7321

5%

402

100K1/16WMF-LF

2

1R7308

F-5.5-DEG-THWO-RIB-M50

OPTI-AUD-JCK

CRITICAL

9

7

6

5

4

3

2

13

12

11

10

1

8

J73000603

180-OHM-1.5A21

L7300

SM OMIT21

XW7301

5%

CERM50V

402

100PF

2

1 C7315

CERM

5%50V

100PF

4022

1 C7311

73 97

A

SYNC_MASTER=AUDIO SYNC_DATE=05/12/2006

051-7032

AUDIO: CONNECTORS

126S0091 126S0092 FACTORY SHORTAGEC6802,C6803

126S0091 126S0092 FACTORY SHORTAGEC7403,C7404

MIN_LINE_WIDTH=0.5MMAUD_LO_GND_JACK


GND_CHASSIS_AUDIO_EXTERNAL_J

AUD_SPDIF_IN

GND_CHASSIS_AUDIO_INTERNAL


AUD_MIC_IN_P_EMI

AUD_PORT_F_RMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

GND_CHASSIS_AUDIO_EXTERNAL_JGND_CHASSIS_AUDIO_EXTERNAL GND_CHASSIS_AUDIO_EXTERNAL_J

AUD_LI_L_JACK


AUD_LI_DET_EMI


AUD_LI_R_EMI


AUD_LI_GND_EMI


MIN_LINE_WIDTH=0.4MMMIN_NECK_WIDTH=0.3MMAUD_LI_GND_JACK

AUD_LI_R_JACK


MIN_NECK_WIDTH=0.2MMAUD_LO_L_EMI


=PP3V3_S0_AUDIO

AUD_SPDIF_OUT_EMI

AUD_LO_DET2_EMI

AUD_LO_R_EMI


PP3V3_AUDIO_SPDIF_EMI


AUD_LO_DET1_EMI

AUD_LO_GND_EMI


AUD_SPDIF_IN_EMI


AUD_LI_L_EMI

AUD_LO_DET2

AUD_LI_DET_HMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

PP3V3_AUDIO_SPDIF_JACK


AUD_SPKR_OUTR_NNET_SPACING_TYPE=AUDIO

GND_AUDIO_CODEC


NET_SPACING_TYPE=AUDIOAUD_SPKR_OUTR_P


AUD_LO_DET1

MIN_NECK_WIDTH=0.25MMGND_AUDIO_CODEC


AUD_PORT_A_R



AUD_PORT_A_L


AUD_SPDIF_OUT

AUD_SPDIF_IN_1

AUD_PORT_F_LMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

AUD_SPDIFIN_GND

AUD_SPDIF_IN_JACK

AUD_LI_DET_JACKMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

AUD_SPKR_OUTL_PNET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.2MM

AUD_SPKR_OUTL_N


NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.2MM


GND_AUDIO_MIC_CONN


AUD_MIC_IN_N_EMI

AUD_MIC_IN_P



AUD_MIC_IN_N

=PP3V3_S0_AUDIO

AUD_GPIO_1_A

MIN_LINE_WIDTH=0.3MMAUD_LO_L_JACK

MIN_NECK_WIDTH=0.2MMAUD_LO_DET1_JACK

MIN_LINE_WIDTH=0.3MM AUD_LO_R_JACKMIN_NECK_WIDTH=0.2MM

AUD_LO_DET2_JACK


PP3V3_AUDIO_SPDIF_JACK

AUD_SPDIF_OUT_JACK


AUD_SPDIFOUT_GND

AUD_MIC_IN_P_CONN



AUD_MIC_IN_N_CONN

74

74

73

74

74

73

72

73

73

72

74

74 74

68

72

72

68

74

73

68

6

74

73 6 73

6

74

74

73

72

68

72

74

68

74

74

68

74

72

72

74

74

6

68

73

47

47

Preliminary

G

D

S

G

D

S

G

D

SG

D

S G

D

S

OUTR

CEXT

GND

INR

OUTL

SHDN*

INL

VCC

TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

UNUSED PORT TERMINATION

UNUSED PORTSPORT A HP/LI

PORT D

PORT F LI/LOPORT C BI SPEAKERS

PORT F LI/LO

USED PORTS

PLACE NEAR ENTRY TO SPEAKER

PLACE AT J7303

PORT A HP/LINC

PORT F (LI) PLUG DETECT

AMP GROUND PLANE

PLACE NEXT TO L6802

PLACE NEXT TO L6800AUDIO GROUND RETURNS

PORT B MIC IN

NC

PORT E

MICROPHONE IMPEDANCE MATCHING CIRCUIT

JACK SENSE PULL UPS(PLACE NEXT TO CODEC)

PLACE NEAR HEADPHONE PORT

NC

PORT A/H (LO/DIG_OUT) PLUG DETECT (E TELLS H TO COME ON)

PLACE ACROSS GROUND SPLIT

1/8W5%

0

805

NOSTUFF

MF-LF

21

R7412

MF-LF

1%1/16W

402

20.0K

2

1R7405

SOT23-LF2N7002

2

1

3

Q7401

20%

402

10V

0.1UF

CERM2

1 C74011/16WMF-LF

5%

402

47K21

R7404

270K5%

MF-LF402

1/16W

2

1R7409

10V20%0.1UF

CERM402

2

1 C7400

47K

MF-LF1/16W5%

402

21

R7400

0.1UF

402

10V20%

CERM2

1 C7402MF-LF

5%

47K

402

1/16W

21

R7408

5%

4.7

805

1/8WMF-LF

21

R7414

1/8W5%

MF-LF805

4.721

R7415

5%

805

4.7

1/8WMF-LF

21

R7416

805

1/8W5%

4.7

MF-LF

21

R7417

ELEC16V

100UF

20%

6.3X5.5-SM

21

C7403

6.3X5.5-SM

20%16VELEC

100UF21

C7404

MF-LF1/16W

100K5%

4022

1R7420

5%

MF-LF1/16W

402

470K

2

1R7413

22K

MF-LF402

5%1/16W

2

1R7418

402

1/16W5%22K

MF-LF2

1R7419

1%

402MF-LF

5.11K1/16W

2

1R7422

0.1UF16V

402X5R

10%2

1 C7408

1%1/16WMF-LF

5.11K

4022

1R7421

402X5R16V10%0.1UF

2

1 C7407

402X5R16V10%0.1UF

2

1 C7417

0.1UF10%

402

16VX5R2

1 C7416X5R

0.1UF16V

402

10%2

1 C741550V

0.1UF

10%

X7R603-1

21

C7419

OMIT

SM

21

XW6800

2.2K5%1/16W

402MF-LF

2

1R7427

402MF-LF1/16W

100K5%

2

1R74261/10W5%

MF-LF603

33021

R7425

CERM50V

820PF

805

10%2

1C7418

1/16W

22K

402MF-LF

5%

2

1R7423

1/16W5%22K

MF-LF4022

1R7424

OMIT

10%0.1UF

X5R402

16V 2

1C7421

2N7002DW-X-FSOT-363

1

2

6

Q7400

SOT-3632N7002DW-X-F

4

5

3

Q7400

1/16WMF-LF

5%

100K

402

21

R7407

2N7002DW-X-FSOT-363

4

5

3

Q7402SOT-3632N7002DW-X-F

1

2

6

Q7402

402

39.2K1/16W1%

MF-LF2

1R743139.2K

MF-LF402

1%1/16W

2

1R7430

0

805

5%

MF-LF1/8W

21

R7441

MF-LF1/8W5%

805

0

AUD_REG

21

R7440

UCSP-LF

MAX9890

C2

C1

A3

A1

B3

B1

A2

C3

U7400

CERM-X5R6.3V

0.22UF

402

10%2

1 C7424

NOSTUFF

MF-LF805

5%1/8W

021

R7442

805MF-LF

NOSTUFF

0

1/8W5%

21

R7443

10K1%

MF-LF1/16W

4022

1R7437

SM-CASE-C1

220UF20%16V

ELEC2

1C7435402

2.2K

5%

MF-LF1/16W

21

R7435

3.3UF

SMA-LF

16VTANT

10%

21

C7405

3.3UF

SMA-LF

10%

TANT16V

21

C7406

OMITSM

21

XW7400

5%1/8W

0

805

NOSTUFF

MF-LF

21

R7411

0

5%1/8W

NOSTUFF

MF-LF805

21

R7410

C7421 CRITICAL CAMERACAPACITOR, .1UF, 04021132S0099

SYNC_DATE=05/12/2006SYNC_MASTER=AUDIO

051-7032

97

A

74

AUDIO: POWER SUPPLIES

114S0315 1 C7421 CRITICAL NOCAMERARESISTOR, 10K OHM, 0402

GND_AUDIO_CODEC GND_CHASSIS_AUDIO_EXTERNAL_J


AUD_SENSE_B

GND_AUDIO_CODEC

GND_AUDIO_CODEC

AUD_MIC_INTERCON AUD_VREF_PORT_B

AUD_LO_DET1_INV

AUD_SENSE_B

GND_AUDIO_CODEC

AUD_PORT_A_L

AUD_PORT_F_DET_L

AUD_PORT_A_L1

GND_AUDIO_CODEC

GND_AUDIO_CODEC

AUD_LO_DET2_1

U7400_CEXT

AUD_PORT_A_R2

AUD_SENSE_A

AUD_PORT_E_DET_L

AUD_BI_PORT_F_R

AUD_TYPE_DET_EN

AUD_PORT_A_R1

AUD_PORT_A_L1

AUD_PORT_A_R1

AUD_PORT_A_L2

AUD_PORT_A_R2

GND_AUDIO_CODEC

GND_CHASSIS_AUDIO_EXTERNAL_J

GND_AUDIO_SPKRAMP

GND_AUDIO_CODEC


GND_AUDIO

VOLTAGE=0VMIN_NECK_WIDTH=0.25MM


=PP3V3_S0_AUDIO

AUDLINDETH

=PP3V3_S0_AUDIO

AUD_SENSE_B

AUD_PORT_A_L2

AUD_PORT_A_R1

AUD_BI_PORT_A_L

AUD_BI_PORT_A_R

PP4V5_AUDIO_ANALOG

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_LO_DET2

AUD_LO_DET1_1

AUD_PORT_A_DET_L

BAL_IN_L

AUD_PORT_A_L2

AUD_PORT_A_R

BAL_IN_COMBAL_IN_R

GND_AUDIO_CODEC

PP4V5_AUDIO_ANALOG

AUD_LI_DET_H

AUD_PORT_A_R2

AUD_PORT_A_L1

AUD_MIC_IN_N


AUD_MIC_IN_P


GND_AUDIO_CODEC

AUD_BI_PORT_B_L

AUD_LO_DET1_1

GND_AUDIO_CODEC

AUD_MIC_P1

AUD_LO_DET1

AUD_GPIO_1_A

AUD_SENSE_A

AUD_BI_PORT_F_L AUD_PORT_F_LAUD_PORT_F_L1

AUD_PORT_F_RAUD_PORT_F_R1

GND_AUDIO_CODEC

AUD_GPIO_2

74

74

74

74

74

74

74

74

74

74

74

73

73

73

74

74

74

74

74

73

73

73

73

73

73

73

73

72

72

72

73

73

73

73

73

72 74

74

72

72

74

72

72

72

74

72

74

72

72

68

68

74

74

68

72

72

74

72

72

73

74

72

68 73

72

68

68

68

68

68

68

73

74

68

68

74

68 68

74

74

74

74

74

68

73

6

68 6

6

6

68

74

74

68

68

68

6

68

73

74

68

74

73

68

68

68

68

73

74

74

73

73

68

68

74

68

73

68

68

68 73

73

68

68 Preliminary

TPADVSS

BOOT2

BOOT1

PHASE1

UGATE1

LGATE1

PGND1

ISEN1

UGATE2

PHASE2

LGATE2

PVCCVDDVIN

PGND2

VID6

VID5

VID4

VID2

VID3

VID1

VID0

ISEN2

VSUM

OCSET

VO

DROOP

DFB

VSEN

RTN

DPRSTP*

DPRSLPVR

PSI*

PGD_IN

3V3

CLK_EN*

PGOOD

VR_ON

NTC

VR_TT*

SOFT

RBIAS

VDIFF

FB2

FB

COMP

VW

NC

IN

IN

IN

IN

OUT

IN

OUT

S

G

D

S

G

D S

G

D

S

G

D

S

G

D

S

G

D

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

0

0

0

0

0

0

ROUTE AS 18MIL WIDE, 7MIL SPACECPU_VCCSENSE_P & N ARE DIFF PAIRS

1-Phase DCM

1-Phase DCM

(IMVP6_PHASE2)

IMVP6 CPU VCORE REGULATOR

(IMVP6_ISEN1)

(GND)

CLOSE TO CPUPLACE R7526

LAYOUT NOTE:

1

Operation Mode

1

Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.

(IMVP6_VO)

DPRSLPVR

NTC

*NEED TO CHANGE R7531 TO NTC ERT-J1VR103J PANASONIC

ERT-J1VR103J

FROM 1.5V AND 1.05V VREGS

(GND)

(IMVP6_VW)

(IMVP6_FB)

(IMVP6_COMP)

MIN_NECK_WIDTHMIN_LINE_WIDTHMIN_NECK_WIDTHMIN_LINE_WIDTH

(IMVP6_ISEN2)

(IMVP6_VSUM)

(IMVP6_VO)

MIN_LINE_WIDTHMIN_NECK_WIDTH

PSI*DPRSTP*

1

1

FROM SMC

2-Phase CCM(IMVP6_PHASE1)

1 1

1-Phase CCM

NO STUFF THIS

CAP IF USINGYONAH

44A MAX CURRENT

50V10%

CERM

0.0022UF

NO STUFF

4022

1 C7500

1206

1.05%1/4WMF-LF

2

1 R7503

10%

603

4700PF

50VCERM

2

1 C7512

402

10%

CERM50V

0.0022UF

NO STUFF

2

1 C7590MF-LF402

10K1%1/16W

21

R7500

6.3V

402CERM-X5R

10%0.22uF

21

C7503

SM

2

1

XW7503

SM

2

1

XW7504

ISL6262QFN

OMIT

9

19

21

14

5

44

18

20

43

42

41

40

39

38

37

13

22

27

35

49

7

15

4

31

2

28

34

129

33

3

8

6

25

30

32

23

24

12

11

16

46

45

17

10

47

26

36

48

U7500603X5R25V

0.22UF20%

2

1C7515

SM

2

1

XW7501 SM

2

1

XW7502

MF-LF

1%

402

10K1/16W

21

R7505

0.22uF40210% 6.3V

CERM-X5R

21

C7504CERM

10%50V

4700PF

603

2

1 C7511

1/4WMF-LF1206

1.05%

2

1 R7502

NO STUFF

10%

402CERM

0.0022UF

50V2

1 C7502

50V

NO STUFF

0.0022UF

CERM402

10%2

1 C7592

603X5R25V20%0.22UF

2

1C7527

101%1/16W

402MF-LF

21

R7520

101%1/16W

402MF-LF

21

R7512 1uF25V10%

603X5R2

1 C7526

402

0.1uF

X5R

10%16V

2

1 C7596

10 1%

MF-LF1/16W 402

21

R7521

402X5R16V10%0.1uF

2

1 C7530

499402MF-LF

1/16W 1%

21R7519

402CERM

47PF5%50V

2

1 C7507

1/16W1%

402MF-LF

4.42K

2

1 R7510

603

20%

CERM

4.7uF6.3V

2

1 C7535

B340LBXFSMB

2

1

D7500

B340LBXFSMB2

1

D7501

021

R7595

021

R7593

021

R7591

021

R7596

021

R7594

021

R7592

021

R7590

16V

1210X7R

20%22UF

2

1 C7508499

402 1%

1/16WMF-LF

21

R75A0

4.02K1%1/16W

MF-LF402

21

R7527

CERM

0.01uF10%16V

40221

C7510

147K402 1% MF-LF 1/16W

21

R7508

402

1%

NO STUFF

2.0K1/16WMF-LF

21

R7513CERM

470pF50V10%

4022

1 C7506

1/16W1%

402MF-LF

1.40K

2

1 R7511

1.82K

MF-LF402

1%1/16W

2

1 R7509

50V10%

402CERM

390pF

2

1 C7513CERM50V

470PF10%

4022

1 C7514

5%180K

MF-LF1/16W

4022

1 R7514

1

402

5%

MF-LF1/16W

2

1R7504

14025%

1/16WMF-LF

2

1R7507

402CERM50V10%

NO STUFF

0.001uF2

1

C7516

402

1%1/16WMF-LF

11.5K

2

1 R7516

5.76K1/16W1%

MF-LF402

21

R7517

402

180pF5%50VCERM

2

1 C7529

402

1%1K

MF-LF1/16W

2

1 R7518

2.61K1%1/16W

402MF-LF

2

1 R7530

MF-LF1/16W1%

402

11K

2

1 R7515

CERM-X5R6.3V

402

10%0.33uF

2

1 C7528

X5R16V10%

402

0.033UF

2

1 C7534

5%1/16WMF-LF402

0

2

1 R7522

402CERM16V10%0.01uF

21

C7531

0.01uF

NO STUFF

16V

402CERM

10%

21

C7532

402

5%

MF-LF1/16W

0

2

1R7523

0.01uF

CERM

10%

402

16V

21

C7533

0.22UF

X5R

20%6.3V

402

21

C7521

SM

2

1XW7500

3.65K

603

1/10W1%

MF-LF2

1R7501

MF-LF

3.65K1%1/10W

6032

1R7506

402 CERM16V 10%0.01uF

21

C7505

10KOHM-5%

0603-LFCRITICAL

21

R7531

0.36UH-30A-0.80MOHM

SM

CRITICAL

21

L7500

0.36UH-30A-0.80MOHM

SM

CRITICAL

21

L7501

22UF20%

X7R1210

16V2

1 C7501

TH-KZJ-LF

16VELEC

1000UF20%

CRITICAL

2

1 C751720%

TH-KZJ-LF

16VELEC

1000UF

CRITICAL

2

1 C7509

ELEC16V20%

TH-KZJ-LF

CRITICAL

1000UF2

1 C7550 22UF

X7R

20%16V

12102

1 C7551

CRITICAL

680UF2.5VPOLY

20%

TH

2

1 C7579

20%680UF2.5VPOLYTH

CRITICAL

2

1 C7578

20%2.5VPOLY

680UF

CRITICAL

TH

2

1 C7577

IRLR7821PBFTO-252AA

CRITICAL

3

1

4

Q7500

IRLR7843PBF

CRITICAL

TO-252AA

3

1

4

Q7501

IRLR7843PBFTO-252AA

CRITICAL

3

1

4

Q7504

CRITICAL

IRLR7821PBFTO-252AA

3

1

4

Q7502

IRLR7843PBFTO-252AACRITICAL

3

1

4

Q7503

IRLR7843PBFTO-252AA

CRITICAL

3

1

4Q7505

22UF16V20%

X7R1210

2

1 C755222UF16V20%

X7R1210

2

1 C755422UF

1210X7R

20%16V

2

1 C7553

10K

1%1/10WMF-LF603

21

R7540

10K1%1/10WMF-LF6032

1R7541

MEROMCRITICAL

TH

20%

POLY2.5V

680UF2

1 C7580

402MF-LF1/16W1%

470K21

R7526


IMVP6 CPU VCore Regulator

9775

A051-7032

PPVCORE_CPU

PP5V_S0

IMVP6_NTC

IMVP6_NTC_R

R7504_1

R7507_1

IMVP6_PHASE2

IMVP6_VSUM_R1

MIN_NECK_WIDTH=0.2 MMPP3V3_S0_IMVP6_3V3

MIN_LINE_WIDTH=0.25 MM

PP12V_S5_CPU_REG

IMVP6_BOOT2

IMVP6_FET_RC1

IMVP6_COMP_RC

IMVP6_VR_TT

IMVP_VID<1>

IMVP6_RTN 0.25 MM0.25 MM

IMVP6_VDIFF 0.25 MM 0.20 MM

IMVP6_RBIAS 0.25 MM 0.20 MM

IMVP6_SOFT 0.25 MM 0.20 MM

IMVP6_DROOP 0.25 MM 0.20 MM

IMVP6_VO 0.25 MM 0.20 MM

IMVP6_VSUM 0.25 MM 0.20 MM

IMVP6_OCSET 0.25 MM 0.20 MM

IMVP6_DFB

IMVP6_FET_RC1 0.25 MM 0.25 MM

IMVP6_VSUM_R1 0.25 MM 0.25 MM

R7504_1 0.25 MM 0.25 MM

IMVP6_LGATE1 1.5 MM 0.25 MM

IMVP6_ISEN1 0.25 MM 0.25 MM

IMVP6_UGATE1 1.5 MM 0.25 MM

IMVP6_BOOT1 0.25 MM 0.25 MM

IMVP6_PHASE1 1.5 MM 0.25 MM

IMVP6_UGATE2 0.25 MM 0.25 MM

IMVP6_RBIAS

CPU_VID<1>

CPU_VID<3>

CPU_VID<5>

CPU_VID<0>

CPU_VID<2>

CPU_VID<4>

CPU_VID<6>

VR_PWRGOOD_DELAY

IMVP_VR_ON

VR_PWRGD_CK410_L

IMVP_PGD_IN

CPU_PSI_L

CPU_DPRSTP_L

PP12V_S5_CPU_REG

IMVP6_VSEN 0.25 MM 0.25 MM

IMVP6_VW 0.25 MM 0.25 MM

IMVP6_COMP 0.25 MM 0.20 MM

IMVP6_FB 0.25 MM 0.20 MM

PM_DPRSLPVR

IMVP6_BOOT1

IMVP6_FET_RC2

IMVP_DPRSLPVR

IMVP6_DROOPGND_IMVP6_SGND

IMVP6_DFB 0.25 MM 0.20 MM

IMVP_VID<0>

IMVP_VID<3>

IMVP_VID<4>

IMVP6_SOFT

IMVP6_COMP

IMVP6_FB2 0.25 MM 0.20 MM

GND_IMVP6_SGND 0.50 MM 0.20 MM

IMVP6_UGATE2

IMVP6_OCSET

IMVP6_LGATE2

IMVP_VID<5>

IMVP6_FB2

IMVP6_LGATE2 0.25 MM 0.25 MM

IMVP_VID<2>

GND_IMVP6_SGND


VOLTAGE=5VMIN_NECK_WIDTH=0.2 MM

PP5V_S0_IMVP6_VDD

PPVIN_S5_IMVP6_VINMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MM

IMVP_VID<6>

IMVP6_UGATE1

IMVP6_VSUM_R2

IMVP6_VDIFF_RC

IMVP6_VDIFF

=PP3V3_S0_IMVP

R7507_1 0.25 MM 0.25 MM

IMVP6_VSUM_R2 0.60 MM 0.25 MM

IMVP6_FET_RC2 0.25 MM 0.25 MM

IMVP6_ISEN2 0.25 MM 0.25 MM

IMVP6_BOOT2 0.25 MM 0.25 MM

IMVP6_PHASE2 0.25 MM 0.25 MM

PP12V_S5_CPU_REG

IMVP6_ISEN1

IMVP6_FB

IMVP6_VW

GND_IMVP6_SGND

IMVP6_PHASE1

IMVP6_LGATE1

CPU_VCCSENSE_NCPU_VCCSENSE_P

IMVP6_VSEN

IMVP6_RTN

IMVP6_VO_R

IMVP6_ISEN2

IMVP6_VSUM

IMVP6_VO

76

26

6

83

76

76

76

14

21

76

23

76

76

76

5

6

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

8

8

8

8

8

8

8

5

58

26

77

7

7

75

75

75

75

75

14

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

75

6

75

75

75

75

75

75

75

75

75

75

75

75

75

8

8

75 75

75

75

75

Preliminary

ING

D

S

D

G

S

VIN IOUT

LOADNCGND

VIN IOUT

LOADNCGND

D

S

G

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE



TABLE_5_ITEM

0 TO 3.3VADC IS 10BIT 0 TO 1023

.010753 A/COUNT3.33333 A/V

PCB:KEEP SHORTS NEXT TO U7602

PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)

PCB: PLACE R7632, C7633 WITHIN 1" OF SMC (U5800)

(SCALING 12V INPUT VOLTAGE TO SMC)

PCB:KEEP SHORTS NEXT TO U7601

PCB:PLACE D7650,R7652,C7650 BY SMC

0 TO 3.3V

SCALE4 V/V

SCALE

ADC IS 10BIT 0 TO 10230 TO 3.3V

COUNT.0129 V/COUNT

COUNT


WORKS WELL.

TO SMC

PROCESSOR VCORE CURRENT SENSE

COUNTSCALE

ADC IS 10BIT 0 TO 10230 TO 3.3V

.0129 V/COUNTCOUNTSCALE

4 V/V

PROCESSOR VCORE SENSE


SMC PWRGD PULLUP


SO SMC ADC SAMPLING

1 MS TIME CONSTANT

SYSTEM VOLTAGE SENSE

(MEASURING DC/DC INDUCTOR DCR TO DERIVE CPU CURRENT)

TO SMC

SYSTEM CURRENT SENSE

PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)

0.0129 A/COUNT

PCB:PLACE D7699,R7697,C7699 BY SMC

1 MS TIME CONSTANT

SO SMC ADC SAMPLING

WORKS WELL.

(USING 12V INPUT CURRENT TO DERIVE CPU CURRENT)PROCESSOR VCORE CURRENT SENSE

ADC IS 10BIT 0 TO 1023

Switches in fixed load on power supplies to calibrate current sense circuits

Current Sense Calibration Circuit

2.73224 A/V

(SCALING 12V INPUT VOLTAGE TO SMC)PROCESSOR DCIN VOLTAGE SENSE

TO PULL LOW SMC INPUT PIN

WHEN DEVELOPMENT BOM IS NOT STUFFED

STUFF C7602 WITH 10K PULL DOWN

CRITICAL

1UH-20A-4.5MOHM

TH-VERT-LF

21

L7602

5%1/16WMF-LF

100K

402

DEVELOPMENT_ISENSE_CALIB

2

1R7640

402MF-LF1/16W

0

5%

DEVELOPMENT

21

R7607

0

5%

MF-LF402

1/16W

NOSTUFF

21

R7604

2N7002SOT23-LF


2

1

3

Q7639

SOT-23NTR4101P


2

1

3

Q7640402MF-LF1/16W5%10KDEVELOPMENT_ISENSE_CALIB

2

1R7639

1/16W5%10K

MF-LF402


2

1R7641

402

1/16W

DEVELOPMENT

0

5%

MF-LF

21

R7659

402MF-LF1/16W1%

40.2K

DEVELOPMENT

21

R7605

1/16W

402

DEVELOPMENT

MF-LF

1%

40.2K21

R7606

SOT23-5

DEVELOPMENT

LMV2011MF

CRITICAL

2

5

1

4

3

U7600

5%

0

402

1/16WMF-LF

DEVELOPMENT

21

R7669

1/16WMF-LF402

1%

4.53K21

R7652SM

OMIT

21

XW7650

CRITICAL

1%

MF1W

2010

0.00521

R7650

402

20%

X5R6.3V

0.22UF

2

1 C76501/16W1%

MF-LF

5.90K

4022

1R7651

MF-LF

1%

4.53K

1/16W

402

21

R7655

X5R

0.22UF

402

6.3V20%

2

1 C7651

6.04K

402MF-LF1/16W1%

2

1R7653

1/16WMF-LF402

2.0K1%

2

1R7654

CRITICAL

ZXCT1010SOT23-5

4

1 5

3

2

U7601

MF-LF1/16W1%

464

402

CPU_DCIN_SENSE_R21

R7691

402MF-LF1/16W

1M

1%

DEVELOPMENT

21

R7600

CRITICAL

ZXCT1010SOT23-5

4

1 5

3

2

U7602

1%1/16WMF-LF402

10021

R7656

BAS16-75V-0.25ASOT23-LF

NOSTUFF3

1

D7650

NOSTUFF

SOT23-LFBAS16-75V-0.25A

3

1

D7699


CRITICAL

MICROFET3X3FDM6296

321

4

5

Q7641

10%

470PF

402CERM50V

DEVELOPMENT

21

C7600

10%50VCERM402

470PF

DEVELOPMENT

2

1 C7603 1M1%

MF-LF1/16W

DEVELOPMENT

4022

1R7603

402

0.1UF

CERM

DEVELOPMENT

10V20%

21

C7601

1%

402MF-LF1/16W

4.53K21

R7697

0.22UF6.3VX5R402

20%2

1 C7699

SM

OMIT

21

XW7698

402

1%

MF-LF1/16W

DEVELOPMENT

4.53K21

R7602

20%

402

0.22UF

X5R6.3V

OMIT

2

1 C7602

1%

4.53K

1/16WMF-LF402

21

R7612

0.22UF

X5R402

6.3V20%

2

1 C7612

X5R402

6.3V20%0.22UF

2

1 C7633402

1/16W1%

MF-LF

4.53K21

R7632

1K1%1/16WMF-LF4022

1R7698

402MF-LF

6.04K1/16W1%

2

1R7630

2.0K1/16WMF-LF402

1%

2

1R7631

1/16W

10K

402MF-LF

1%

2

1R7623

1%

2512-1MF

0.025

CRITICAL

1W

21

R7699

402MF-LF

5%

0

1/16W

NOSTUFF

21

R7620


1.001%

1/4WMF-LF12062

1R7643


402MF-LF1/16W5%470K

2

1R7642

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

9776

A051-7032

CPU & SYSTEM SENSE CIRCUITRIES

1132S0080 CAP,0.22UF,6.3V,20%,0402 C7602 DEVELOPMENT

1116S0090 RES,10K,5%,0402 C7602 NOT_DEVELOPMENT

SMC_CPU_ISENSE

IMVP6_DROOP_R

GND_SMC_AVSS

CPU_ISENSE_R_NEG

CPU_ISENSE_OUT_R

CPU_ISENSE_R_POS

IMVP6_VO

=PPVCORE_S0_CPUISENSE_CAL_EN_LS12V

MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.50 mmCPUVCORE_ISENSE_CAL

PP12V_L7502VOLTAGE=12V


GND_SMC_AVSS

CPU_HISIDE_VSENSE

CPU_HISIDE_ISENSECPU_SENSE_I_R

PP12V_S5_CPU_REGVOLTAGE=12VMIN_LINE_WIDTH=0.60MMMIN_NECK_WIDTH=0.25MM

PP12V_S5

SYSTEM_DCIN_SENSE

PP3V3_S0

SMC_DCIN_ISENSE

PP3V3_S0

IMVP6_DROOP

SYSTEM_SENSE_I_R

IMVP6_VO_R_OA

=PP12V_S5_CPU

SYS_POWERFAIL_L RSMRST_PWRGD

PP3V3_S5

GND_NEXT_TO_SMC

PP3V3_S0

ISENSE_CAL_EN_L_R

ISENSE_CAL_EN_L

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.20 MM

ISENSE_CAL_EN

GND_SMC_AVSS

SMC_CPU_VSENSEPPVCORE_CPU

PP12V_S5_CPU_REG

SMC_PBUS_VSENSE_R

GND_SMC_AVSS

GND_SMC_AVSS

GND_SMC_AVSS

SMC_SYSTEM_VSENSE_R SMC_PBUS_VSENSE

PP12V_S5

CPU_DCIN_SENSE

PP12V_S5_AC_DCMIN_LINE_WIDTH=0.60MMMIN_NECK_WIDTH=0.25MMVOLTAGE=12V

PP12V_S0

GND_CPU_ISENSE_OPAMP


SYSTEM_DCIN_SENSE_R

83 80

83

94

94

79

94

83

82

83

83

78

83

82

80

76

76

77

76

80

79

61

61

66

61

79

78

59

59

65

59

78

80

80

77

41

41

59

41

80

80

80

80

77

76

9

76

76

26

26

82

26

26

76

75

76

76

76

76

59

8

59

76

6

10

10

78

6

10

59

6

76

59

59

59

6

83

58

58

75

6

58

59

59

75

5

6

58

6

75

6

6 58

5

59

6

58

58

58 5

75

58

58

58

58

5

6

6

Preliminary

ING

D

S

G

D

SIN

OUT

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

REGARDLESS OF INPUT POWERALL AND GATE INPUTS ARE 7V TOLERANT

AS MEASURED ON PROTO2 BOARDS

PWGOOD SIMPLIFIED BASED ONTIMING OF VARIOUS RAILS COMING UP

SILKSCREEN:SYS_PWRGD

2N7002DW-X-FSOT-363

1

2

6

Q7703

10K5%1/16WMF-LF4022

1R7793

10K

402

5%

NOSTUFF

1/16WMF-LF

2

1R7794

SOT-3632N7002DW-X-F

4

5

3

Q7703

10V

0.1UF21

C7710

10V

0.1UF21

C7712SOT23-5-LFMC74VHC1G085

4

1

2

3

U7710

SOT23-5-LFMC74VHC1G085

4

1

2

3

U7712

330

603MF-LF1/10W5%

DEVELOPMENT

2

1R7700


SYS_PWRGD_LED_R

DEVELOPMENT

2

1

LED7700

5%1/16WMF-LF402

10K

DEVELOPMENT2

1R7701

2N7002SOT23-LF

DEVELOPMENT

2

1

3

Q7700

10K

402MF-LF1/16W5%

2

1R7795

MF-LF1/16W5%

33

402

21

R7710

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

A051-7032

77 97

PWR GOOD

PM_SLP_S4_L

PP12V_S5

PP3V3_S5

ALL_SYS_PWRGD

SYS_PWRGD_LED

PM_SLP_S3_L

PP12V_S5

SYS_PWRUP_LMAKE_BASE=TRUE

PP3V3_S5

PM_SLP_S4

PP3V3_S5

ALL_SYS_PWRGD

PGOOD_PP1V5_S0

PGOOD_PP1V05_S0

PP3V3_S5

IMVP_PGD_INIMVP_PGD_IN_R

PGOOD_PP1V8_S3

83

83

83

83

80

80

80

80

79

79

79

79

83

78

83

78

78

78

82

77

82

77

77

77

80

76

80

76

76

76

79

66

79

66

66

66

78

65

78

65

65

65

77

59

80

77

59

59

59

76

26

77

79

76

26

26

77

26

58

6

6

58

58

6

6

83

6

58

6

23

5

5

26

23

5

83

5

79

5

26

80

80

5

75

79

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

M50 POWER BUDGET

MISC=1.500A

M50 POWER BUDGET

3.3V AND 2.5V S5 REGULATOR

TOTAL=0.426A

3.3V S5

TOTAL=4.000A

PANEL=1.000AAIRPORT=1.000A

VOUT=VREF*(1+R2/R1)

(R2)

(R1)

0.816V MAX

0.784V MINVREF = 0.800V TYP

2.5V S5

SB=0.500A

3.35V NOMINAL

2.50V NOMINAL

YUKON=0.426A

3.0UH

CRITICAL

TH1

21

L7803

CRITICAL

16V

1000UF20%

ELECTH-KZJ-LF

2

1 C7853

0.1UF

25V20%

CERM603

21

C7801

CERM

20%6.3V

10UF

805-12

1 C7813

CERM

20%6.3V

10UF

805-12

1 C78141800UF20%

ELECTH-KZJ-LF

CRITICAL

6.3V2

1 C7815

22

MF-LF

5%1/16W

4022

1R7899

0.01UF16VCERM

10%

4022

1 C78071.24K

402

1%1/16WMF-LF

2

1R7803

1%392

MF-LF1/16W

4022

1R7801

5.111%1/4WMF-LF12062

1R7802

1000PF5%50V

1206CERM2

1 C7809

402X7R

1000PF25V10%

2

1 C7802CERM402

0.047UF

10%16V

21

C7808

2.2

402MF-LF

5%1/16W

21

R7840

1UF

10%25VX5R603

21

C7892

6.3V

402CERM

1UF10%

2

1 C7800

1/16W

402MF-LF

101%

2

1R7805

1000PF25VX7R402

10%2

1 C7823

805

22UF20%6.3VX5R2

1 C7820

CERM50V10%

560PF

402

21

C7806MF-LF1/16W1%

8.06K

402

21

R7804

QFN

CRITICAL

ISL6549

9

87

14

17

10

13

12

114

3

16

2

6

1

15

5

U7800

SM

2

1

XW7800

603CERM6.3V20%

4.7UF

2

1C7803

NOSTUFF

402X7R25V10%1000PF

2

1 C78242.7K5%

MF-LF1/16W

4022

1R7821

1%1/16WMF-LF402

1K

2

1R7820

MF-LF

1%1/16W

402

470

2

1R7822

CERM6.3V20%10UF

805-12

1 C7826

100K5%1/16WMF-LF4022

1R7892

NOSTUFF

SOT23-LF2N7002

2

1

3

Q7802

6.3VCERM

10UF20%

805-12

1 C7821

CERM6.3V20%10UF

805-12

1 C7825

CERM6.3V20%10UF

805-12

1 C7822

NOSTUFF

TLM833

CTLSH3-30M833

5

4321

D7800

IRF1902PBFSO-8

CRITICAL

3 2 1

4

8 7 6 5

Q7803

IRLR7807Z

CRITICAL

TO-252AA

3

1

4

Q7800

CRITICAL

IRLR7807ZTO-252AA

3

1

4

Q7801

10%10UF16VCERM1210

2

1 C7811

PAGE_BORDER=TRUE

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

TRUE

051-7032 A

78 97

3V DC/DC 2.5V

3V3REG_VCC5MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

=PP3V3_S5_2V5_LDO

3V3REG_UGATEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM3V3REG_LDO_DR



3V3REG_FS_DIS

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM3V3REG_SNUB


3V3REG_PVCC5

SYS_POWERFAIL_L

MIN_LINE_WIDTH=0.6MM3V3REG_COMP_R



3V3REG_BOOT


3V3REG_BOOT_RMIN_LINE_WIDTH=0.6MM

PP2V5_S5

PP12V_S5

PP3V3_S5

MIN_LINE_WIDTH=0.6MM3V3REG_FB_R


3V3REG_COMPMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

VOLTAGE=0 VMIN_LINE_WIDTH=0.6MM

3V3REG_GND



2V5_LDODR_C

3V3REG_LDO_FBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM


3V3REG_SWITCHNODE


3V3REG_LGATE


3V3REG_FB

83 80 79

83

77

82

76

80

66

79

65

77

59

82

76

26

76

6

6

6

6

83

5

5

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

LM393A

V+

GND

LM393A

V+

GND

GND

V+

LM339A

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

1.8V AND 1.2V S3 REGULATOR

(R2)

VREF = 0.800V TYP

VOUT=VREF*(1+R2/R1)

1.84V NOMINAL

SPARE COMPARATOR

PP1V8_S3

1.591V

TOTAL=0.426A

1.2V S3

YUKON=0.426A

NEAR VREGPLACE LED

PP1V8_S3

(R1)

1.8V S3

DRAM=6.000ANB=4.000A

0.816V MAX

0.784V MIN

1.21V NOMINAL

TOTAL=10.000A

M50 POWER BUDGET

M50 POWER BUDGET

1%1/16WMF-LF402

5.11K

2

1R7912

5.49K

402MF-LF1/16W1%

2

1R7911 10K1%1/16WMF-LF4022

1R7910

MF-LF

5%1/16W

22

4022

1R7999

1.24K

MF-LF1/16W1%

4022

1R7903

CERM

0.01UF10%

402

16V2

1 C7907

MF-LF1/16W1%

402

953

2

1R7901

1206MF-LF

1%1/4W

5.11

2

1R7902

1000PF

1206CERM50V5%

2

1 C7909CERM

0.047UF

10%16V

402

21

C7908

MF-LF

2.2

1/16W5%

402

21

R7940

402CERM50V

560PF

10%

21

C7906

1UF6.3V10%

CERM402

2

1 C7900101/16WMF-LF402

1%

2

1R7905

402

8.06K

1%1/16WMF-LF

21

R7904

CRITICAL

ISL6549QFN

9

87

14

17

10

13

12

114

3

16

2

6

1

15

5

U7900

4.7UF20%

6.3VCERM603

2

1C7903

402MF-LF1/16W5%100K

2

1R7992

SOT23-LF2N7002

2

1

3

Q7902

10%

603X5R25V

1UF21

C7992

402X7R25V10%1000PF

2

1 C7902

THPOLY

680UF20%2.5V

CRITICAL

2

1 C7956680UF

CRITICAL

2.5VPOLYTH

20%2

1 C7957

CRITICAL

20%16VELECTH-MCZ

680UF2

1 C7954

TH-MCZELEC16V20%680UF

CRITICAL

2

1 C7953

1000PF

402X7R

10%25V

2

1 C7923

NOSTUFF

1000PF10%25VX7R402

2

1 C79242.7K5%1/16W

402MF-LF

2

1R7921

6.3VCERM

10UF20%

805-12

1 C7921MF-LF

1%1/16W

1K

4022

1R7920

1.96K

MF-LF402

1/16W1%

2

1R7922

22UF20%6.3VX5R805

2

1 C7920

603X5R

10%16V

2.2UF

2

1 C7912

CRITICAL1.5UH-19A

L810HW-LF

21

L7903

402CERM6.3V10%1UF

2

1 C7960

6.3V

1UF10%

CERM402

2

1 C7958 1UF10%6.3VCERM402

2

1 C7959

6.3VCERM

10UF20%

805-12

1 C7926

CERM6.3V20%10UF

805-12

1 C7922

CERM6.3V20%10UF

805-12

1 C7925 TLM833

CTLSH3-30M833

NOSTUFF

5

4321

D7900

TO-252AA

CRITICAL

IRLR7807Z

3

1

4

Q7900SO-8

IRF1902PBF

CRITICAL

3 2 1

4

8 7 6 5

Q7903

TO-252AA

CRITICAL

IRLR7807Z

3

1

4

Q7901

20%10VCERM402

0.1UF21

C7980

SOI-1-LF

8

1

3

2

4

U7910

SOI-1-LF

8

7

5

6

4

U7910

0.1UF

603CERM25V20%

21

C7901

10UF16V

1210

10%

CERM2

1 C7911

LED_PP1V8_S3_P

3305%1/16WMF-LF402

DEVELOPMENT

2

1R7906


DEVELOPMENT

LED_PP1V8_S3_N

2

1

LED7900

SOI-LF

DEVELOPMENT3

14

9

8

12

U7901

CERM

10UF6.3V20%

805-12

1 C7913

SM

2

1

XW7900


1.8V & 1.2V VREG

97

A051-7032

79

PP3V3_S5

MIN_LINE_WIDTH=0.6MM1V8REG_DDR_COMP


MIN_LINE_WIDTH=0.6MM1V8REG_DDR_LGATE



1V8REG_DDR_COMP_RMIN_LINE_WIDTH=0.6MM

1V8REG_DDR_FS_DISMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM


1V8REG_DDR_BOOT

1V8REG_DDR_PVCC5



1V8REG_DDR_UGATEMIN_LINE_WIDTH=0.6MM


1V8REG_DDR_BOOT_RMIN_LINE_WIDTH=0.6MM


1V8REG_DDR_SWITCHNODE

MIN_LINE_WIDTH=0.6MM1V8REG_DDR_SNUB


1V8REG_DDR_FB_RMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

PM_SLP_S4

PM_SLP_S3_L MEMVTT_EN

1V0_REF


1V8REG_DDR_VCC5=PP1V8_S3_1V2_LDO

PP1V2_S3

PP3V3_S5

PGOOD_PP1V8_S3

1V6_REF

PP5V_S5


1V8REG_DDR_LDO_DR

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM1V2_LDODR_C

1V8REG_DDR_LDO_FB



1V8REG_DDR_FB

1V8REG_DDR_GND

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0 V

PP1V8_S3

PP12V_S5

83

83

80

80

79

79

78

78

77

77

83

76

76

82

66

66

83

80

65

65

82

78

59

80

59

80

77

26

77

26

59

83

76

6

83

58

6

6

6

6

5

77

23 31

80

6

6

5

77

5

5

5

Preliminary

D

G

S

D

G

S

D

G

S

D

G

S

GND

V+

LM339A

VIN

PHASE2

SOFT2

DDR

OCSET2

PG2/REF

EN2

VSEN2

PGND2

LGATE2

ISEN2

UGATE2

BOOT2

EN1

PG1

OCSET1

PGND1

VSEN1

PHASE1

ISEN1

UGATE1

BOOT1

SOFT1

LGATE1

GND

VCC

GND

V+

LM339A

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE



TABLE_5_ITEM

KEEP C8080, R8080,

Placement Note:

R8084 AND R8087

close to inductor

NEAR VREGPLACE LED

0.867VNEAR VREGPLACE LED

PP1V5_S0

CPU=2.500A

1.05V S0

SB=0.874ANB=2.000A

TOTAL=5.374A

1.5V S0 AND 1.05V S0 RAILS

1.5V S0

CPU=0.120A

SB=2.000ANB=8.000A

TOTAL=10.120A

1.50V NOMINAL

M50 POWER BUDGET

M50 POWER BUDGET

1.064V NOMINAL

VOUT=VREF*(1+R2/R1)

VREF = 0.900V TYP

(R2)

(R1)

DEVELOPMENT

1%

1M

MF-LF402

1/16W

2 1

R8082CRITICAL

TO-252AAIRLR7807Z

3

1

4

Q8000

IRLR7807Z

CRITICAL

TO-252AA

3

1

4

Q8001

IRLR7807Z

CRITICAL

TO-252AA

3

1

4

Q8050

IRLR7807Z

CRITICAL

TO-252AA

3

1

4

Q8051

CERM

10UF6.3V20%

805-12

1 C807320%6.3V

10UF

CERM805-1

2

1 C8072CRITICAL

ELEC6.3V20%1500UF

TH-MCZ

2

1 C8071

MF-LF

05%1/16W

4022

1R8050

CRITICAL

ELEC6.3V20%1500UF

TH-MCZ

2

1 C8070

3.65K

603

1%1/10WMF-LF

2

1R8051

MF-LF1/10W

20.0K1%

6032

1R8052

X7R50V

0.018UF5%

6032

1 C8062

SOT23BAT54E3

3

1

D8050

10K1%1/16WMF-LF4022

1R8055

402MF-LF1/16W1%

2.43K21

R8053

50VX7R

10%

603-1

0.01UF

2

1 C80631/10W1%

MF-LF603

110K

2

1R8054

DEVELOPMENT

3305%1/16WMF-LF4022

1R8091

GREEN-3.6MCD

DEVELOPMENT

2.0X1.25MM-SM

LED_PP1V05_S0_P

2

1LED8091

DEVELOPMENT

0.1UF

402CERM10V20%

21

C8090

SOI-LF

DEVELOPMENT3

2

5

4

12

U7901DEVELOPMENT

402

8.45K1%1/16WMF-LF

2

1R8092

DEVELOPMENT

402MF-LF1/16W1%3.01K

2

1R8093

SOT23BAT54E3

3

1

D8000

CRITICAL

1000UF20%16VELECTH-KZJ-LF

2

1 C8005CRITICAL

1000UF20%16VELECTH-KZJ-LF

2

1 C8004

402

01/16W5%

MF-LF2

1R8000

10UF10%16VCERM1210

2

1 C800310UF10%16VCERM1210

2

1 C8002

CERM6.3V20%4.7UF

6032

1 C8010

10UF10%16VCERM1210

2

1 C8001

1.53UH

CRITICAL

TH-LF

21

L8050

10UF

CERM16V10%

12102

1 C8000

SSOP 1V05REG_SOFT

CRITICAL

ISL6539

1V05REG_ISEN

1910

14

28

245

1712

254

263

1615

1811

272

227

9

201

218

13

236

U8000

MF-LF1/10W1%110K

6032

1R8004

603-1

10%

X7R50V

0.01UF

2

1 C8013

402

1%

MF-LF1/16W

2.43K21

R8003603

20%

CERM25V

0.1UF

2

1 C8011

603

20%

CERM25V

0.1UF

2

1 C8061

TH-LF

CRITICAL

1.53UH21

L8000

X7R50V

0.018UF5%

6032

1 C80121%3.32K

MF-LF1/10W

6032

1R8001

CRITICAL

TH-MCZ

1500UF20%

ELEC6.3V2

1 C8023

MF-LF1/10W

4.99K1%

6032

1R8002

402MF-LF1/16W1%10K

2

1R8005

CRITICAL

TH-MCZ

1500UF20%

ELEC6.3V2

1 C8022

805-1

20%6.3VCERM

10UF

2

1 C8021

805-1CERM

10UF20%6.3V

2

1 C8020

402MF-LF1/16W5%330

DEVELOPMENT

2

1R8090


DEVELOPMENT

LED_PP1V5_S0_P

2

1LED8090

SOI-LF

DEVELOPMENT3

1

7

6

12

U7901

CTLSH3-30M833

TLM833

NOSTUFF

5

4321

D8001

1206MF-LF1/4W

5.111%

2

1R8006

402

1000PF25V10%

X7R2

1 C8024

TLM833

CTLSH3-30M833

NOSTUFF

5

4321

D8051

1206MF-LF1/4W

5.111%

2

1R8056

402

1000PF25V10%

X7R2

1 C8064

CRITICALDEVELOPMENT

0603-LF

10KOHM-5%

2

1

R8087

NO STUFF

MF-LF402

1K

1%1/16W

21

R8084

DEVELOPMENT

1K

MF-LF402

1%1/16W

2

1R8086

DEVELOPMENT

10%

CERM402

1uF

6.3V

2 1

C8080

DEVELOPMENT

1%1/16W

402MF-LF

649

2

1R8080

DEVELOPMENT

15.0K

1%

MF-LF402

1/16W

21

R8083

MF-LF1/16W

402

1%

15.0K

DEVELOPMENT

21

R8081

OMIT

X5R402

0.22UF6.3V20%

2

1C8086

DEVELOPMENT

402

1/16W1%

MF-LF

4.53K2 1

R8089

DEVELOPMENT

402

1uF

6.3V10%

CERM 2

1C8085

DEVELOPMENT

50V

470pF

402CERM

10%

21

C8088

DEVELOPMENT

50V

470pF

402CERM

10%

21

C8082

402MF-LF1/16W

1M

1%

DEVELOPMENT

2 1

R8088

DEVELOPMENT

LMV2011MF

CRITICAL

SOT23-5

2

5

1

4

3

U8085

1.5V_S0 & 1.05V_S0 VREGSYNC_MASTER=MASTER SYNC_DATE=MASTER

80

051-7032 A

97

C8086 DEVELOPMENTCAP,0.22UF,6.3V,20%,0402132S0080 1

C8086 NOT_DEVELOPMENTRES,10K,5%,0402116S0090 1

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM1V05_SWITCHNODE

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM1V5REG_VSEN

1V5REG_OCSET

1V5REG_SOFT

PM_SLP_S3_L

NBISENS_NEG

1V5REG_LGATE


PP5V_S5

NBISENS_RC

=PP5V_S0_NBISENSE

PP1V05_S0

NBISENS_NTC

GND_SMC_AVSS

1V5REG_BOOT_R

1V5REG_SNUBBER_R

1V5REG_ISENMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

1V05_OCSET 1V05REG_SNUBBER_R

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM1V05REG_BOOT_R


1V05_VSENMIN_LINE_WIDTH=0.6MM

PP1V05_S0

PGOOD_PP1V05_S0

PP5V_S5

PGOOD_PP1V5_S0

PP5V_S5

1V0_REF

PP1V5_S0

LED_PP1V5_S0_N

PP3V3_S5

LED_PP1V05_S0_N

1V0_REF

PP3V3_S5

PP3V3_S5

SMC_NB_ISENSE1V05REG_BOOT



1V5REG_BOOTMIN_LINE_WIDTH=0.6MM

NBISENS_POS


1V5REG_UGATE

PP1V5_S0

PGOOD_PP1V5_S0

MIN_LINE_WIDTH=0.6MM1V5REG_SWITCHNODE


PP12V_S5

1V05REG_UGATE


PGOOD_PP1V05_S0

PM_SLP_S3_L


1V05_LGATE

U8595_1

83

83

83

80

80

80

79

79

79

78

78

78

77

77

77

83

83

83 83

76

76

76

82

82

82 82

66

66

66

79

80

80

80 80

65

65

65

78

80

79

79

79 79

59

59

59

77

79

77

59

80

76

80

59 59

26

26

26

76

77

58

6

34

59

34

80

6

80

6

80

80

6

80

6

6

80

80

6

80

58

23

5

6

6

58

6

77

5

77

5

79

6

5

79

5

5

58

6

77

5

77

23

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

M50 POWER BUDGET

M50 POWER BUDGET

5V S5 AND 5V AUDIO S5 REGULATOR

POWER SUPPLY 3.3V/5V MAIN SWITCH

0.784V MIN

0.816V MAXVREF = 0.800V TYP

VOUT=VREF*(1+R2/R1)

(R2)

(R1)

MISC=1.500AUSB=1.500A

ODD=1.000A

5V S5

AUDIO O=1.000A

TOTAL=5.000A

5.10V NOMINAL

AUDIO=?A

TOTAL=?A

5V AUDIO S5

4.50V NOMINAL

10%10UF16VCERM1210

2

1 C8211

CRITICAL

TH-KZJ-LFELEC6.3V20%1800UF

2

1 C8215

225%1/16W

402MF-LF

2

1R8299

16V10%0.01UF

CERM402

2

1 C82071/16W

1.24K

402

1%

MF-LF2

1R8203

232

402

1%1/16WMF-LF

2

1R8201

5.111/4W1%

MF-LF12062

1R8202

1206CERM50V5%1000PF

2

1 C8209

1000PF10%25VX7R402

2

1 C8202402

16V10%

CERM

0.047UF21

C8208

2.2

402MF-LF

5%1/16W

21

R8240

1UF

10%25VX5R603

21

C8292

402CERM

1UF10%6.3V2

1 C82001%

402MF-LF1/16W

10

2

1R8205X5R805

6.3V20%22UF

2

1 C8220

TH1

3.0UH

CRITICAL

21

L8203

10%

402CERM50V

470PF21

C8206MF-LF1/16W1%

402

8.06K21

R8204

CRITICAL

QFN

ISL6549

9

87

14

17

10

13

12

114

3

16

2

6

1

15

5

U8200

SM

2

1

XW8200

603CERM6.3V20%

4.7UF

2

1C8203

1000PF

NOSTUFF

402X7R25V10%

2

1 C8224

16V

1000UF20%

ELECTH-KZJ-LF

CRITICAL

2

1 C8253

1000PF

X7R25V10%

4022

1 C8223

1/16W

402

2.7K5%

MF-LF2

1R8221

1%1/16WMF-LF402

1K

2

1R8220

402

221

MF-LF

1%1/16W

2

1R8222

805-1

6.3V20%10UF

CERM2

1 C8226

100K5%1/16WMF-LF4022

1R8292

NOSTUFF

2N7002SOT23-LF

2

1

3

Q8202

CERM805-1

20%6.3V

10UF

2

1 C822120%6.3V

805-1

10UF

CERM2

1 C822210UF

805-1

6.3V20%

CERM2

1 C8225

CTLSH3-30M833

TLM833

NOSTUFF

5

4321

D8200

SO-8IRF1902PBF

CRITICAL

3 2 1

4

8 7 6 5

Q8203

TO-252AA

CRITICAL

IRLR7807Z

3

1

4

Q8200

TO-252AAIRLR7807Z

CRITICAL

3

1

4

Q8201

20%25VCERM

0.1UF

603

21

C8201

805-1

10UF20%6.3VCERM2

1 C8213

805-1

10UF20%6.3VCERM2

1 C8214

051-7032 A

82 97


5V DC/DC


5VREG_LDO_FB


5VREG_FS_DIS

5VREG_SWITCHNODEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

5VREG_UGATE



5VREG_LGATE

PP12V_S5

=PP5V_S5_AUDIO_LDO

5VREG_SNUBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

VOLTAGE=0 VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

5VREG_GND

MIN_LINE_WIDTH=0.6MM5VREG_FB_R



5VREG_FB


5VREG_VCC5


5VREG_BOOT_R


5VREG_BOOT


5VREG_COMP

SYS_POWERFAIL_L


5VREG_PVCC5MIN_LINE_WIDTH=0.6MM

PP5V_S5


5VREG_COMP_R


5VREG_LDO_DR

5V_AUDIO_LDODR_CMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM


83 80 79

83

78

80

77

79

76

78

59

6

76

6

5

6

6

5

83

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

D

G

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

3.3V AND 5V S31.8V S0

5V S0

3.3V S0

12V S0

2.5V S0

4.5V S0 AUDIO

TSOP-LF

SI3446DV

CRITICAL

436521

Q8319

1/10W

603MF-LF

1%

100K21

R8318603-1X7R50V10%

NOSTUFF

0.01UF

2

1 C8318603-1

50VX7R

10%0.01UF

2

1 C8317

SOT23-LF2N7002

2

1

3

Q8320

SI3446DV

CRITICAL

TSOP-LF

436521

Q8323

0.01UF10%

X7R50V

603-12

1 C8323

1%

603

1/10W

100K

MF-LF

21

R831950VX7R603-1

0.01UF10%

NOSTUFF

2

1 C8324

SOT23-LF2N7002

2

1

3

Q8324

SOT563CMLDM7002A

5

4

3

Q8318 SOT563CMLDM7002A

2

1

6

Q8318

1%100K

603

1/10WMF-LF

2

1R8313

MF-LF1/10W1%10K

6032

1R8312

IRF7413PBFSO-8

CRITICAL

321

4

8765

Q8300

603

1/10WMF-LF

5%

47K21

R8315

B0530WXF

SOD-12321

D8310

SO-8IRF7410PBF

3

2

1

4

8

7

6

5

Q8313

603

0.1UF20%25VCERM

NOSTUFF

2

1 C8316

2N7002SOT23-LF

2

1

3

Q8303

2N7002SOT23-LF

2

1

3

Q8302

603

20%0.1UF

CERM25V

2

1 C8319

CERM16V

402

10%0.01UF

2

1 C8320

47K

402MF-LF1/16W5%

2

1R8300

603-1X7R50V10%

NOSTUFF

0.01UF

2

1 C8326

100K

1/10W

603

1%

MF-LF

21

R8325

TSOP-LF

SI3446DV

CRITICAL

436521

Q8317

SOT23-LF2N7002

2

1

3

Q8316

603-1

50VX7R

10%0.01UF

2

1 C8325

1/16W

3.6K5%

MF-LF4022

1R8301

IRF7413PBFSO-8

CRITICAL

321

4

8765

Q83013.6K5%

MF-LF1/16W

4022

1R8302

1/16W

47K5%

402MF-LF

2

1R8303

1UF10V

603

20%

CERM2

1 C8399

1UF10V

603

20%

CERM2

1 C8398

SI3446DV

TSOP-LF

CRITICAL

436521

Q8310

0.01UF50V10%

X7R603-1

2

1 C8310

0.01UF

603-1X7R50V10%

NOSTUFF

2

1 C8311

1/10W

100K

MF-LF

1%

603

21

R8310

2N7002SOT23-LF

2

1

3

Q8311

CRITICAL

TSOP-LF

SI3446DV

436521

Q8312

2N7002SOT23-LF

2

1

3

Q3815

NOSTUFF

X7R

10%

50V

0.01UF

603-1

21C8315

10%50VX7R603-1

0.01UF

2

1 C8321

603MF-LF1/10W1%

100K21

R8311

9783

A051-7032


S0 AND S3 FETS

MIN_LINE_WIDTH=0.60MMMIN_NECK_WIDTH=0.25MMVOLTAGE=2.5V


START_G_4V5_S0

PP2V5_S5MIN_LINE_WIDTH=0.60MMMIN_NECK_WIDTH=0.25MMVOLTAGE=2.5V

SYS_PWRUP_L

SYS_PWRUP_L

START_G_5V_S0


SYS_PWRUP_L

PP12V_S5

PP12V_S5

PP2V5_S0

START_G_2V5_S0

PP12V_S5

GATE_12V_S0START_G_12V_S0

PP12V_S0

TO_GATE_12V_S0_R

SYS_PWRUP_L

PP3V3_S5

PP1V8_S0

START_G_3V3_S0

SYS_PWRUP_L

PP1V8_S3

START_G_1V8_S0

SYS_PWRUP_L

PP12V_S5PP12V_S5

PP3V3_S0

PP5V_S0

PP5V_S5

PP12V_S5

PP12V_S5

PP12V_S5

PP3V3_S3

PP3V3_S5

PP5V_S3

PP5V_S5

GATE_5V_S3

PM_SLP_S4

GATE_3V3_S3

83

83

80

80

79

79

83

83

83

78

83 83

83

83

83

78

82

82

82

77

82 82

94

82

82

82

77

80

80

80

76

80 80

76

83

80

80

80

76

83

79

79

79

66

79 79

61

82

79

79

79

66

82

78

78

78

65

78 78

59

80

78

78

78

65

80

77

77

77

59

77 77

41

79

77

77

77

59

79

76

76

76

26 79

76 76

26

59

76

76

76

59

26

59

83

83

83

6

6

6 76

83

6

83

6

83

6 6

10

75

6

6

6

6

53

6

59

6

79

82

78

77

77

6

77

5

5

6

5 6

77

5

6

77

5

77

5 5

6

6

5

5

5

5

6

5

6

5

77

Preliminary

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LCD (LVDS) INTERFACE

INVERTER INTERFACE

GATE TO PREVENT LEAKAGE ONTO PWM

MIGHT BE ABLE TO BYPASS IF SMC DRIVES SIGNAL

518S0331

LVDS REFERENCE CURRENT, 1.5K OHM PULL DOWN RESISTOR NEEDED

RESISTOR TO SET DEFAULT VALUE OF PANEL ID

PANEL HAS 4.2K PULL-UPS10K PULL-UPS ON I2C LINESINTEL RECOMMENDS

100K5%

1/16WMF-LF

402 2

1R9410

402CERM50V10%

0.001UF

2

1C9410

5%

MF-LF1/16W

100K

4022

1R9411

402CERM50V10%

0.001UF

2

1C9401

FERR-250-OHM

SM

21

L9400603

0.1UF

16V20%

CERM

21

C9400

1/16W5%

MF-LF

47K

402

21

R9401

100K

1/16W5%

MF-LF402 2

1R9400

TSOP-LF

CRITICAL

SI3443DV

4

3 6

5

2

1

Q9400

2N7002SOT23-LF

2

1

3

Q9401

1206-1

16V

4.7UF20%

CERM 2

1C9450

1/16WMF-LF

5%

47

402

21

R9450

MF-LF402

1/16W

100K5%

2

1R9470

F-ST-SM53307-3072

CRITICAL

9

87

65

4

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J9402

STDOFF-3MMOD4.6MMH-1.35-TH1

SDF9400

STDOFF-3MMOD4.6MMH-1.35-TH1

SDF9401

10%10UF

16V

1210CERM 2

1C9420

CRITICAL

M-ST-SM87437-0443-BLK

4

3

2

1

J9401

MF-LF

47

5%1/16W

402

21

R9475

MF-LF1/16W

5%10K

4022

1R9474

402CERM

20%

NOSTUFF

10V

0.1UF2

1 C9470

SOT23-5-LFMC74VHC1G08

NOSTUFF5

4

1

2

3

U9470

0

MF-LF

5%1/16W

402

21

R94731/16W5%10K

MF-LF

NOSTUFF

4022

1R9472

I512

I513

I514

1/16W5%10K

MF-LF4022

1R94201/16W5%10K

MF-LF4022

1R9421

MF-LF1/16W1%

1.5K

402

21

R9422

MF-LF1/16W

10K5%

4022

1R9451

805MF-LF1/8W5%

0

NOSTUFF

21

R9402

0.1UF10V

NOSTUFF

20%

CERM402

2

1 C94510.1UF10V

NOSTUFF

20%

CERM402

2

1 C9452


Internal Display Conns

051-7032 A

9794

PP3V3_LCD_SW


MIN_NECK_WIDTH=0.25 mm

LVDS_DDC_DATA

PP3V3_LCD_CONNMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmVOLTAGE=3.3V

LVDS_VREFL

LCD_PWM_R

SB_GPIO_48 PANEL_ID

=PP3V3_S0_LCD

LVDS_DDC_CLK

=PP3V3_S0_LCD

LVDS_IBG

LVDS_VREFH

LVDS_CLKCTLB

LVDS_CLKCTLA

PP3V3_S0

=PP3V3_S0_LCD

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<0>

LVDS_B_DATA_P<2>

LVDS_A_DATA_N<0>

LVDS_DDC_CLK

LVDS_A_DATA_P<2>

LVDS_B_DATA_N<0>

LCD_PWREN_L

GPU_PWM_RST_L

=PP3V3_DDC_LCD

LVDS_B_CLK_N

LVDS_A_DATA_P<1>

LCD_PWM

LVDS_DDC_DATA

LVDS_B_DATA_N<2>

LVDS_B_DATA_N<1>

LVDS_B_CLK_P

LVDS_A_DATA_P<0>

LVDS_A_DATA_N<1>

LVDS_A_CLK_N

LVDS_A_DATA_N<2>

PP3V3_LCD_CONN

PP3V3_LCD_CONN

LVDS_BKLTCTL

LVDS_VDDEN

=PP3V3_DDC_LCD

LCD_PWREN_L_RC

PP3V3_LCD_CONN

=PP3V3_DDC_LCD

LVDS_A_CLK_P

=PP3V3_S0_LCD

=PP3V3_S5_LCD

=PP12V_INVERTER

PANEL_ID

LCD_PWM

83 76 61 59 41 26

94

94

94

94

94

10

94

94 94

94

94 94

94

13

6

13

22 94

6

13

6

13

13

13

13

6

6

13

13

13

13

13

13

13

6

94

13

13

94

13

13

13

13

13

13

13

13

6

6

13

13

94

6

94

13

6

6

6

94

94

Preliminary

IN

IN

IN

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

TX0_P

TX0_N

TX1_N

TX1_P

TX2_P

TX2_N

TXC_P

SCLDDC

SDADDC

SDG_P

TEST

EXT_SWING

TXC_N

SGND1

SGND0

PGND2

AGND0

AGND1

AGND2

GND1

SPGND

GND0

HTPLG

A1

SDSDA

SDSCL

RESET*

EXT_RES

SDI_P

SDI_N

SDC_P

SDC_N

SDB_P

SDB_N

SDR_N

SDR_P

SDG_N

VCC1

VCC0

VCC2

AVCC0

AVCC1

PVCC1

PVCC2

SVCC0

SVCC1

SPVCC

OVCC

CORESDVO RCVR

I2C MASTERINTER

TEXT MODECONFIG/PRGRM

DIFF SIGDATA OUT

OUT

OUT

IO

IO

OUT

OUT

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE NEAR U9500

NEAR CONNECTOR

PLACE THIS SET OF TERMINATION

ONE 0.1UF AND 0.001UF FOR EACH PIN

TMDS CHIP SDVO INPUT INTERRUPT SIGNAL TO MCH

PLACE IT CLOSE TO CONNECTOR


NC

IF HIGH, ADDRESS=0X72

ADDRESS=0X70

MCH SDVO CHANNEL R,G,B,CLK SIGNAL TO TMDS CHIP

PLACE THE CAP NEAR THE NB SIDE


THESE 2 CAPS FOR EMI

RIGHT ON TRACE WITHNO STUB.

10%16VX5R

0.1UF

4022

1 C95110.001UF

CERM402

10%50V2

1 C9510

X5R402

16V

0.1UF10%

2

1 C9509

50V

402

10%

CERM

0.001UF

2

1 C9508

X5R402

10%16V

0.1UF

2

1 C9507

40216V10%

X5R

0.1UF

21

C9520

0.1UF

402

10%

X5R16V2

1 C95480.1UF10%16V

402X5R2

1 C9547

402

10%0.1UF

16VX5R2

1 C95460.1UF10%

402

16VX5R2

1 C9545

10%

402

0.1UF

X5R16V2

1 C9544

402

10%16VX5R

0.1UF

2

1 C9543

402X5R

0.1UF10%16V2

1 C9542

16V10%

402

0.1UF

X5R2

1 C9541

402X5R

10%0.1UF16V

2

1 C9531

X5R

0.1UF

402

16V10%

2

1C9502

0.1UF10%

402X5R16V

2

1C9533

0.1UF10%16VX5R402

2

1C9535

6.3V20%

CERM

10UF

805-12

1 C9540

402X5R

10%0.1UF16V

2

1C9539

402X5R

0.1UF10%16V

2

1C953810%50V

0.001UF

CERM402

2

1 C9536

402

50V

0.001UF

CERM

10%2

1 C9537

402CERM

10%50V

0.001UF

2

1 C9532

0.001UF

CERM

10%50V

4022

1 C9534

402

50V10%

CERM

0.001UF

2

1 C9501

402

0.001UF50V10%

CERM2

1 C9500

402CERM

10%50V

0.001UF

2

1 C9530

LQFPSIL1362ACLU

34

28

10

14

13

23

22

20

19

17

16

30

42

36

48

3

45

39

4

5

37

38

32

33

40

41

46

47

43

44

9

8

2

26

11

27

1

29

317

25

35

21

15

24

18

12

6

U9500

402

0.1UF

X5R16V10%

21

C9522

MF-LF402

1/16W

140

1%

21

R9537

X5R

10%16V

0.1UF

402

21

C9523

MF-LF402

140

1/16W1%

21

R9538

10%16VX5R

0.1UF

402

21

C9524

MF-LF1/16W

402

140

1%

21

R9539

10%16VX5R

0.1UF

402

21

C9525

MF-LF1/16W

402

1%

PLACEHOLDER

10021

R9540

0402

FERR-120-OHM-1.5A21

L9504

FERR-120-OHM-1.5A

0402

21

L9503

0402

FERR-120-OHM-1.5A21

L9500

0402

FERR-120-OHM-1.5A21

L9505

402

10K5%1/16WMF-LF

2

1R9505

402

10K5%1/16WMF-LF

2

1R9506

0402

FERR-120-OHM-1.5A21

L9501

0402

FERR-120-OHM-1.5A21

L9506

MF-LF1/16W5%1K

4022

1R9503

BAV99DW-X-FSOT-363

6

2 1

D9500

5.6K5%1/16WMF-LF4022

1R9501

402

5%1/16WMF-LF

5.6K

2

1R9502

MF-LF1/16W5%

2.2K

402

21

R9500

1%

MF-LF1/16W

402

332

2

1R9504

402X5R16V10%0.1UF

2

1 C95520.001UF10%50V

402CERM2

1 C9551

402

0.001UF10%

CERM50V2

1 C9553

16VX5R402

10%0.1UF

2

1C9554

402

50V10%

CERM

0.001UF

2

1 C9555

16VX5R402

10%0.1UF

2

1C9556

805-1

6.3V20%10UF

CERM2

1 C9565

402

10PF5%50VCERM2

1 C9505

402

10PF5%50VCERM2

1 C9506

10UF

805-1CERM

20%6.3V2

1 C9513

CERM402

50V

0.001UF10%

2

1 C9512

10UF

CERM6.3V20%

805-12

1 C9504

X5R

0.1UF16V10%

4022

1C9503

16V

0.1UF

X5R402

10%2

1 C9521

16V402X5R

10%0.1UF

21

C9519

PEG_D2R_P<1>

EXTERNAL TMDS

051-7032 A

9795


TMDS_TX_P<0>

TMDS_TX_N<1>

TMDS_TX_P<1>

PP3V3_ANALOG_TMDS

TMDS_TX_CLK_P


PP3V3_ANALOG_TMDS

=PP3V3_S0_TMDSMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

VOLTAGE=3.3V

PP3V3_PVCC2_TMDS

=PP3V3_S0_TMDS

PEG_R2D_C_P<3>

TMDS_SDC_N

TMDS_INT_P

TMDS_INT_N

TMDS_RESET_L

PP5V_S0_TMDS_D

TMDS_TX_CLK_NTMDS_TX_CLK_PTMDS_TX_N<2>

TMDS_EXT_SWING

TMDS_TX_P<2>TMDS_TX_N<1>

PP1V8_ANALOG_SDVO

=PP1V8_S0_TMDS

PP3V3_ANALOG_SDVO

=PP3V3_S0_TMDS

SDVO_CTRLDATA

=PP2V5_S0_TMDS

=PP3V3_S0_TMDS

PEG_D2R_N<1>

PEG_R2D_C_P<2>

PEG_R2D_C_N<3>

PEG_R2D_C_N<2>

=PP3V3_S0_TMDS

PP3V3_ANALOG_TMDSPP1V8_TMDS

TMDS_SDR_P

TMDS_SDR_N

TMDS_SDG_P TMDS_TX_P<1>

TMDS_TX_P<0>

PP3V3_PVCC1_TMDS

TMDS_I2C_SDA

PEG_R2D_C_P<0>

=PP1V8_S0_TMDS

TMDS_EXT_RES

=PP3V3_S0_TMDS

TMDS_HTPLGTMDS_TX_HPD

TMDS_HTPLG_R

TMDS_SDC_P

TMDS_SDG_N

PP3V3_PVCC2_TMDS

PEG_R2D_C_N<1>

PEG_R2D_C_P<1>


PP1V8_ANALOG_SDVO

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

PP3V3_ANALOG_SDVO

MIN_NECK_WIDTH=0.2MMVOLTAGE=3.3V

MIN_LINE_WIDTH=0.6MMPP3V3_PVCC1_TMDS

TMDS_TX<0>

TMDS_TX<1>

TMDS_TX<2>

PP1V8_TMDSMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.8V

SDVO_CTRLCLK

PEG_R2D_C_N<0>

TMDS_TX_CLK

TMDS_TX_N<0>

TMDS_TX_P<2>

TMDS_TX_CLK_N

TMDS_TX_N<2>

TMDS_TX_N<0>

TMDS_I2C_SCL

TMDS_SDB_N

TMDS_SDB_P

97

97

97

97

97

97 96

96

96

96

96

96

97

97

97

97

95

95

97

97

97

97

97

95

95

95

95

97

97

95

95

97

97

97

97

97

13

95

95

95

95

95

95

6 95

6

13

6

97

95

95

95

95

95

95

6

95

6

14

6

6

13

13

13

13

6

95

95

95

95

95

13

6

6

97

95

13

13

95

95

95

95

14

13

95

95

95

95

95

Preliminary

125

125

GND

VCC

DA S1A

S2A

S1B

S2B

S1C

S2C

S1D

S2DIN

EN_L

DD

DC

DB

125 125

LCFILTER

LCFILTER

LCFILTER

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE BY CONNECTORANALOG FILTERING

PLACE U9620 NEAR GMCH

NC

NCNC

TV

OUT

CRT1

0

PLACE RESISTORS AT NORTHBRIDGE

VGA SYNC BUFFERS

SPARE BUFFERS, TYING OE* HIGH

VIDEO_MUX_SEL

TSSOP

74LC1253

14

17

2

U9670

74LC125

TSSOP

614

47

5

U9670

TS3V330

SOP

16

13

10

6

3

14

11

5

2

1

8

15

12

9

7

4U9620

0.1UF10%16VX5R402

2

1C9620

74LC125

TSSOP

814

107

9

U9670

TSSOP

74LC12511

14

137

12

U9670

805-1CERM

10UF20%6.3V2

1 C9621

SM-220MHZ-LF

43

21

FL9602

SM-220MHZ-LF

43

21

FL9601

SM-220MHZ-LF

43

21

FL9600

402CERM

1UF10%6.3V2

1 C9670

50V

NOSTUFF

CERM

5%22PF

4022

1 C9608

402

1/16W5%

39

MF-LF

21

R9671

402

5%50V

CERM

22PF

NOSTUFF

2

1C96071/16W5%

39

MF-LF402

21

R9672

MF-LF

1%1/16W

75

4022

1R9690

1/16WMF-LF

1%75

4022

1R9692

1/16WMF-LF

1%75

4022

1R9694

NOSTUFF

1501%

402MF-LF1/16W

2

1R9691

NOSTUFF

1501%

402MF-LF1/16W

2

1R9693

NOSTUFF

1/16W

1501%

402MF-LF

2

1R9695

2551%

402MF-LF1/16W

2

1R96A0

5%1/16WMF-LF

39

402

21

R9600

MF-LF

5%1/16W

402

3921

R9601

I942

I943

I944

1%1/16W

75

402MF-LF

2

1R9696

I961

1%1/16W

75

402MF-LF

2

1R9697

I963

1%1/16W

75

402MF-LF

2

1R9698

I967

402

4.99K1%1/16WMF-LF

2

1R9699

TMDS/Inverter/ExtVGA

9796

A051-7032


=PP3V3_S0_TMDS

TV_IRTNA

TV_DACB_OUT

TV_IRTNB

CRT_GREEN

TV_DACC_OUTCRT_BLUE

CRT_BLUE_L

VGA_BUF_VSYNCVGA_VSYNCCRT_VSYNC_R

TV_DACC_OUT

CRT_RED

TV_DACB_OUT

TV_DACA_OUT

SB_CRT_TVOUT_MUX

CRT_BLUE

CRT_GREEN

VGA_HSYNC VGA_BUF_HSYNC

VIDEO_MUX_GREEN

VIDEO_MUX_BLUE

VIDEO_MUX_RED

CRT_HSYNC_R

CRT_IREFTV_IREF

CRT_REDTV_DACA_OUT

CRT_HSYNC

CRT_VSYNC

=PP3V3_S0_TMDS

TV_IRTNC

CRT_RED_L

CRT_GREEN_L

=PP3V3_S0_TMDS

FILT_ANALOG_GRN

FILT_ANALOG_BLU

FILT_ANALOG_RED

VIDEO_MUX_BLUE

VIDEO_MUX_RED

VIDEO_MUX_GREEN

97

97

97

96

96

96

95

96 96

96 96

96

96

96

96

96

96

96 96

95

95

6

13

13

13

13

13 13

13

97 13

13

13

13

13

22

13

13

97

96

96

96

13

13 13

13 13

6

13

13

13

6

97

97

97

96

96

96

Preliminary

G

SD

G

SD

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

WHEN PART AVAILABILITY FINALIZES,

(55mA requirement per DVI spec)AS POSSIBLE

PLACE FILTER CLOSE

TO TMDS CONNECTOR

3V LEVEL SHIFTERS

PLACE LEFT SIDE

REMOVE TABLE AND OMIT ON PART

514S0128

AS CLOSE TO GPU (U8400)DVI DDC CURRENT LIMIT DVI INTERFACE

1/16WMF-LF402

10K5%

2

1R9721

MF-LF402

5%1/16W

10K

2

1R9720

2N7002DW-X-FSOT-363

1

2

6

Q9711

2N7002DW-X-FSOT-363

4

5

3

Q9711

100K

MF-LF402

5%1/16W

2

1R9722

100pF

CERM402

5%50V

2

1 C9713

MF-LF402

5%1/16W

4.7K

2

1R9712

4.7K

MF-LF402

5%1/16W

2

1R9710

100pF

CERM402

5%50V

2

1 C9711

50V

0.01UF10%

X7R603-1

2

1C9710

400-OHM-EMI

SM-1

21

L9710CRITICAL

0.5AMP-13.2V

SM-LF

21

F9710

100pF

CERM402

5%50V

2

1 C9714

1/16W5%

100

MF-LF402

21

R9711

100

MF-LF402

5%1/16W

21

R9713

1/16W

402MF-LF

20.0K

1%

21

R9714

2012H

90-OHM-300MA

CRITICAL

4

32

1L9700

2012H90-OHM-300MA

CRITICAL

4

3 2

1

L9701

2012H

90-OHM-300MA

CRITICAL

4

32

1L9702

OMIT

SM

165-OHMCRITICAL

4

32

1

L9703

F-ST-SM4

OMIT

MINI-DVI

31

27

19

34

33

24

17

29

22

30

28

16

15

14

13

12

11

32

10

9

25

18

26

1

2

3

4

5

6

7

8

20

J9710

MMSZ4681XXG

CASE425

12

D9700

0.1UF10%16VX5R402

2

1 C9720

402X5R16V10%0.1UF

2

1 C9721

402

10%0.1UF

X5R16V

2

1 C9722

402X5R16V10%0.1UF

2

1 C9723

B0530WXF

SOD-12321

D9710

CRITICALJ97101514S0128 MINI DVI CONNECTOR,32P,TH SHIELD, W/O RIBS


External Display Conns

051-7032 A

9797

PP5V_S0_TMDS_D

=PP5V_S0_TMDS


VOLTAGE=5VPP5V_S0_DDC_FUSE

VOLTAGE=5VMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm

PP5V_S0_DDC

DIFFERENTIAL_PAIR=TMDS_TX_0

TMDS_TX_P<0>

DIFFERENTIAL_PAIR=TMDS_TX_CLK

TMDS_TX_CLK_P


TMDS_TX_P<2>

TMDS_CONN_DP<2>DIFFERENTIAL_PAIR=TMDS_CONN_D2

TMDS_CONN_DP<1>

TMDS_CONN_DN<1>

TMDS_CONN_CLKN

TMDS_CONN_CLKP

DIFFERENTIAL_PAIR=TMDS_CONN_D2

TMDS_CONN_DN<2>


TMDS_CONN_DP<0>


TMDS_CONN_DN<0>


TMDS_TX_N<0>

FILT_ANALOG_BLU

VGA_BUF_VSYNC

GND_CHASSIS_VGA_C_A

TMDS_CONN_CLKP

TMDS_CONN_CLKN

FILT_ANALOG_RED

TMDS_CONN_DN<0>

TMDS_CONN_DP<0>

FILT_ANALOG_GRN

VGA_BUF_HSYNC

DVI_DDC_DATA_UF

PP5V_S0_DDC

DVI_HPD_UF

DVI_DDC_CLK_UF

DVI_DDC_DATA_UF

TMDS_TX_CLK_NDIFFERENTIAL_PAIR=TMDS_TX_CLK

TMDS_TX_N<2>DIFFERENTIAL_PAIR=TMDS_TX_2

TMDS_TX_N<1>DIFFERENTIAL_PAIR=TMDS_TX_1


TMDS_TX_P<1>

DVI_HPD_UF TMDS_CONN_DP<2>

TMDS_CONN_DN<2>

TMDS_CONN_DN<1>

TMDS_CONN_DP<1>

DVI_DDC_CLK_UF

CRT_DDC_CLKDVI_DDC_CLK

TMDS_TX_HPD

DVI_DDC_DATA CRT_DDC_DATA

=PP3V3_S0_TMDS

GND_CHASSIS_VGA

GND_CHASSIS_VGA_C_B

96 95

95

6

97

95

95

95

97

97

97

97

97

97

97

97

95

96

96 97

97

96

97

97

96

96

97

97

97

97

97

95

95

95

95

97 97

97

97

97

97

13

95

13

6

6

Preliminary

Apple M50 PVT.

Documents

Transcript of Apple M50 PVT.