AM 5-406 DIGITAL ELECTRONICS INTERFACE AND CONTROL CIRCUITSw3jjj.com/downloads/AM 5-406 Digital...

AM 5-406

DIGITAL ELECTRONICS

INTERFACE

AND

CONTROL CIRCUITS

NOVEMBER 2013

DISTRIBUTION RESTRICTION: Approved for public release. Distribution is unlimited.

DEPARTMENT OF THE ARMY MILITARY AUXILIARY RADIO SYSTEM

FORT HUACHUCA ARIZONA 85613-7070

AM 5 – 406 Digital Electronics – Interface and Control Circuits

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AM 5-406 Digital Electronics, Interface and Control Circuits

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CONTENTS

1 INTRODUCTION .................................................................................... 1-1

2 LINE DRIVERS AND RECEIVERS .................................................................... 2-1

2.1 GENERAL GUIDELINES FOR USING LINE DRIVERS AND RECEIVERS ................................. 2-1 2.2 RS-232C LINE DIVER / RECEIVER: ......................................................................... 2-4 2.3 RS-422 LINE DRIVER / RECEIVER: ........................................................................ 2-6

3 SIGNAL CONVERTERS .............................................................................. 3-1

3.1 DIGITAL TO ANALOG (D/A) CONVERTER ................................................................. 3-1 3.1.1 Important terms .................................................................................. 3-1 3.1.2 Error Estimation: .................................................................................. 3-3

3.2 DIGITAL-TO-ANALOG (D/A OR DAC) CONVERTERS: ................................................. 3-4 3.2.1 Basic Concepts and Transfer Function: ........................................................ 3-4 3.2.2 Plotting The DAC OUTPUT: ...................................................................... 3-6 3.2.3 D/A Converter Circuits ........................................................................... 3-6

4 VOLTAGE COMPARATORS .......................................................................... 4-1

4.1 INTRODUCTION: ........................................................................................... 4-1 4.2 LEVEL DETECTOR: ......................................................................................... 4-1

4.2.1 Window Detector ................................................................................. 4-4 4.2.2 Peak Detector: .................................................................................... 4-5

5 SPECIAL CONTROL / INDICATOR DRIVERS ....................................................... 5-1

5.1 RELAY DRIVER: ............................................................................................ 5-1 5.2 INDICATOR LAMP DRIVER: .................................................................................. 5-2


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PREFACE Improvements Suggested corrections, or changes to this document, should be submitted through your State Director to the Regional Director. Any Changes will be made by the National documentation team.

Distribution Distribution is unlimited.

Versions The Versions are designated in the footer of each page if no version number is designated the version is considered to be 1.0 or the original issue. Documents may have pages with different versions designated; if so verify the versions on the “Change Page” at the beginning of each document.

REFERENCES

DOD Instructions

1. DOD Instruction 4650.2.

US Army Documents US Army Regulations

1. AR 25-6 - Military Auxiliary Radio System (MARS) and Amateur Radio Program

US Army FM/TM Manuals

US Army MARS

1. AM 5-202 Basic Electronics, AC Circuit Analysis 2. AM 5-203 Basic Electronics, Grounding and Bonding 3. AM 5-204 Basic Electronics, Basic Transistor Theory 4. AM 5-212 Basic Electronics, Operational Amplifier Design 5. AM 5-401 Digital Electronics, Introduction 6. AM 5-402 Digital Electronics, Gate Fundamentals 7. AM 5-403 Digital Electronics, Waveshaping and Control Circuits 8. AM 5-265 System Fundamentals – Test Equipment 9. AM 5-266 System Fundamentals – Circuit testing Methods 10. AM 5-299 Charts Equations and Data Tables

Commercial References 1. Basic Electronics, Components, Devices and Circuits; ISBN 0-02-81860-X, By William P Hand and Gerald Williams

Contributors This document has been produced by the Army MARS Technical Writing Team under the authority of Army MARS HQ, Ft Huachuca, AZ. The following individuals are subject matter experts who made significant contributions to this document.

William P Hand – AAA9TE / AAR4DX


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1 INTRODUCTION The types of circuits we will deal with in this manual are many so we can only cover the most common of them:

1. Line Drivers 2. Line Receivers 3. Math Functions 4. A/D and D/A Converters 5. Voltage Comparators 6. Special Circuits

Linear IC devices, such as operational amplifiers, are normally designed to operate in a linear mode with the output a close representation of the input waveform. Interface devices, on the other hand, are not concerned with repeating the input waveform accurately. Interface devices are generally used as information translators-bridging the gap between analog and digital worlds, or level shifters-providing larger voltage swings, or current drive capabilities, than a normal driving circuit is capable of providing. Drivers or interface circuits do not have to be IC type circuits; they can be constructed from discrete components. A discrete component is often used when power or high voltage is to be exposed to the circuit. When high power (high current) there will likely be multiple stages to the circuit in order to obtain a circuit to deal with the current (or voltage) required.


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NOTES:


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2 LINE DRIVERS AND RECEIVERS This section will present a quick review, of some of the more common line driver and receiver circuits in common use. The rapid growth of digital communication systems has increased the need for transmitting digital data over distances varying from only a few feet to several thousand feet. These lines are frequently located in noisy environments that can generate false information if steps are not taken to overcome the effects of the noise on the system. The noise margins of most logic circuits are adequate for the transmission of digital data over distances of a few inches; however, the transmission of error-free data over longer lines in noisy environments requires the use of special line drivers and line receivers. These devices are used to interface between the transmission line and logic circuitry. To increase intersystem compatibility a number of organizations have defined standard interfaces. One such organization is the Electronic Industries Association (ElA). The EIA has formulated a set of specifications for line interface circuits used for transmission of serial binary signals between data terminal equipment (DTE) and data communications equipment (DCE). EIA standards, RS-232-C, RS-422, and RS-423 specify the characteristics for both balanced and unbalanced circuits. Interface circuits for data transmissions fall into two major categories:

1. balanced 2. unbalanced

The mode used depends upon the modulation rate, the distance between the driver and receiver (line length), noise and grounding conditions, and error rates that can be tolerated.

2.1 GENERAL GUIDELINES FOR USING LINE DRIVERS AND RECEIVERS

When using line drivers and receivers, consideration should be given to problems that may arise because of effects in the interconnecting cable, cable termination etc..

1 The maximum line length for a line driver and receiver can operate is governed by the data baud rate. The baud rate is defined as the reciprocal of the minimum data unit interval. Characteristics that influence the maximum modulation rate and line length are related to signal quality and include:

a) Maximum acceptable signal distortion b) Amount of noise induced in the line c) Ground potential differences between the driver and receiver d) Imbalances between signal conductors and ground return lines

As length increases, these characteristics effect on signal quality increasing, causing signal deterioration.

2 RS-422 and RS-423 do not specify maximum cable lengths; however, they do provide

guidelines for maximum cable lengths versus data rates based on signal rise and fall times, equal to, or less than, one-half unit interval at the applicable modulation rate. This ensures reliable transmission of data where any error rate is minimized. A maximum voltage loss between driver and receiver of 6 dB will be realized.


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3 The curves of Figure 2-1 and 2-2 were constructed using empirical data measurements on 24 A WG twisted-pair line. When using wire other than 24 A WG twisted-pair, the following rule of thumb may be used: the unit interval should be greater than twice of 10 to 90% of the rise and fall times of the line. Adherence to this rule will keep the peak-to-peak jitter to less than 5% of the unit interval.

4 Line termination is optional with RS-422 and RS-423, but is recommended to

minimize noise and reflections that may appear at the driver and receiver. line termination will match the characteristic impedance of the line. At lower modulation rates, where threshold crossing ambiguity and signal rise time are not critical. Generally the line does not need be terminated.

Figure 2-1 Cable Length as a Function of Data Signaling Rate for an

Unbalanced Circuit Using 24 AWG Twisted-Pair Cable


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Figure 2-2


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2.2 RS-232C LINE DIVER / RECEIVER:

The most widely used standards for interfacing between data terminals and data communications equipment is the EIA RS-232-C, which defines a single ended, bipolar, unterminated circuit. It is intended for serial data transmission over 150 feet, or less. At less than 150 feet speeds of up to 20 kilobauds can be obtained. (One baud, Bd, is equal to one transition per second.) This single-ended circuit uses one conductor to carry the signal with the voltage referenced to a single return conductor (Figure 2-1).

Figure 2-1

Typical RS-232-C Interface This conductor may also be the common return for other signal conductors. This is the simplest way to send data, since it requires only one signal wire per circuit. This simplicity, however, is often offset by an inability to discriminate between a valid signal produced by the driver and the sum of the driver signal and externally induced noise signals (crosstalk). In addition in multiwire systems it tends to produce radiated emissions that will couple to neighboring circuits. Both noise and crosstalk are directly proportional to transmission line length and bandwidth, the RS-232-C standard restricts both. To control radiated emission, the slew rate of drivers are limited to 30 V/μsec. The length limitation (50 feet) is required to limit reflections on unterminated lines. Table 2-1 shows the Key parameters of EIA specifications.


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Table 2-1 Key parameters of EIA Specifications

Characteristics EIA RS-232C EIA RS-423 EIA RS-422

Form of operation single-ended single-ended differential

Max Length 50 ft 2,000 ft 4,000 ft

Max Data Rate 50 kilobauds 300 kilobauds 10 megabauds

Driver Max V Out Open Ckt ±25 V ±6 V 6 V between outputs

Driver Min V Out Loaded Output ± 5 to ±15 V ±3.6 V 2 volts between outputs

Driver Min Out Resistance, Power-off

Ro = 300Ω 100 μA between -6 to +6 V 100 μA between +6 to -0.25 V

Driver Max Out, Short Circuit Current ISC

± 500 mA ± 150 mA ± 150 mA

Driver output Slew Rate 30 V/μsec max Control Slew rate based on cable length and modulation rate

No control required

Receiver input resistance RIN 3 to 7 kΩ ≥4 kΩ ≥4 kΩ

Receiver Max input thresholds -3 to +3 V -0.2 to 0.2 V -0.2 to +0.2 V

Receiver Max input -25 to +25 V -12 to +12 V -12 to +12 V


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2.3 RS-422 LINE DRIVER / RECEIVER:

To allow higher data rates and longer distances that the RS-232 interface can provide the EIA issued the specifications for the RS-422 and RS-423 interfaces. The RS-422 standard defines a single-ended, bipolar voltage, unterminated circuit design standard. This standard extends the distance and data rates to 4,000 feet and 3kBd. The standard provides for higher data rates of up to 300 kBd at 40 feet. RS-422 defines a balanced-voltage differential operation capable of significantly higher capability than single ended circuits. It can accommodate data rates of up to 100kBd out to 4,000 feet, or up the 10 megabauds (MBd) over short distances. This improvement in operational capability is based on the balanced design configuration. Figures 2-2 provides example circuit and Figure 2-4 shows the typical (input/Output caricaturists..

Figure 2-2

RS-422 System Utilizing Dual Receivers


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Figure 2-3

Typical I/O Characteristics for an RS-422 Design


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NOTES:


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3 SIGNAL CONVERTERS

3.1 DIGITAL TO ANALOG (D/A) CONVERTER

Commercial D/A converters, or DAC, are available in modules, hybrid, and monolithic versions. Modules and hybrid types, using several components in a single package, are able to combine the best features of various technologies for optimum performance. The monolithic version, with all circuitry on one chip, is small in size and low in cost. The ideal transfer function for a D/A converter is shown in Figure 3.1. However, the actual performance of a DAC deviates from the ideal transfer function, owing to changes in various characteristics and parameters.

3.1.1 IMPORTANT TERMS

Special used terms to characterize a DAC are:

Resolution: The smallest incremental change in output voltage of a D/A converter. An n-bit binary converter should be able to provide two distinct analog output values corresponding to combinations of binary input. Resolution is defined as 1/2" where n is the number of input bits. The resolution can also be

Settling Time: Setting Time is the time required, after a code transition, for a DAC output to

reach final value within specified limits (usually ±3/2 LSB). The settling time of a voltage output DAC is longer than that of a current output type owing to the slow response of the output op amp.

Absolute Accuracy: Absolute Accuracy How well a data converter follows the theoretical

ideal transfer function taking into account all errors. Errors include zero offset, gain, and linearity.

Zero Offset or Offset Error: The error when the digital input code calls for zero output

(Figure 3-1a). This error may be adjustable by setting the output to zero when the input bits are zero.

Gain Error: The difference in slope between the actual transfer function and the ideal

transfer function (Figure 3-1b). The gain error may be adjustable by setting the output to full scale less 1 LSB when all input bits are Is.

Linearity Error or Relative Accuracy: The deviation from the ideal transfer function after

adjusting zero offset and gain error (Figure 4-1c).

Monotonicity: The requirement that a converter analog output increase with increasing input (Figure 4-1d).

Differential Linearity Error: This measures the difference between any two adjacent steps

(Figure 4-2). If the differential linearity error is greater than 1 LSB, it leads to non-monotonieity.

Zero Temperature Coefficient (TC): The zero shift occurs over a specified temperature

range. It is expressed as µ V/ºC or ppm/ºC (parts per million per degree Centigrade) of full scale.


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Figure 3-1

D/A Conversion Errors (a) Offset, (b) Gain (c) Linearity (bit 2 is ½: LSB high),

(d) Nomnomonotonicity (bit 3 is 1 LSB high, bit 1 is 1 LSB low)

Gain TC: change of gain with temperature, causing slope to change; it is expressed in ppm/ºC.

LSB: Least significant bit

MSB: Most significant bit

Linearity TC: Change in linearity due to temperature. It is expressed as ppm; ºC of full

scale.

Differential Linearity TC: Relative change in bit weights with temperature and is a measure of when a converter can be expected to go nonmonotonic. It is expressed as ppm/ºC of full scale.


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Power Supply Sensitivity: Change in output stemming from variations in power supply

voltages. It is normally expressed as output voltage change in percent (of full scale) or fraction of an LSB, for a 1 % dc change in the power supply voltage.

Figure 3-2

Nomnomonotonicity Error (Missing Codes)

3.1.2 ERROR ESTIMATION:

A major concern in selecting a D/A converter is accuracy of analog output relative to input over the required operating temperature range. Monotonicity is essential for many control applications. Therefore, it is necessary to determine these errors and verify that the total error does not exceed 1 LSB.


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3.2 DIGITAL-TO-ANALOG (D/A OR DAC) CONVERTERS:

Digital-to-analog converters transform a given digital signal into its equivalent analog signal. D/A converters can be broadly classified in three categories:

Current output Voltage output Multiplying types

3.2.1 BASIC CONCEPTS AND TRANSFER FUNCTION:

Conceptually, the D/A conversion process can be viewed as finding the equivalent weight of an object (less than one unit) with weights in geometrically proportional units, such as ½, ¼ and 1/8 using these weights in various combinations; eight different measurements ranging from 0 unit to ~ unit can be obtained. A 3-bit, D/A converter (Figure 3-3a) has 3 digital inputs and one analog output. By various combinations of these three digital inputs, 23, or eight equivalent analog output levels can be obtained. Assuming the straight binary code is used for the input signal, the equivalent output analog signal can be calculated for each digital combination at the input. The D2 input is called the most significant bit (MSB) and the D0 bit is called the least significant bit (LSB). These digital inputs can be either 1 or 0 (on or off). The fractional binary weighting can be represented as 2-1 (½),2-2 (¼), and 2-3 (1/8) for D2, D1 and D0, respectively. Thus, the input signal 001 is equal to 1/8 and 100 is equal to ½ of the full-scale analog signal. Normalized Analog Output (V) analog output for 10 V full Digital input as a fraction scale (V)

Table 3-1 3-bit digital input and analog output

Digital Input Analog out as a fraction

Analog out for 10V full

scale

000 0 0

001 1

1.25 8

010 1

2.50 4

011 3

3.75 8

100 1

5.00 2

101 5

6.25 8

110 3

7.50 4

111 7

8.75 8


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Figure 3-2b shows the 3-bit DAC transfer function as a graphical representation of the binary input and resulting analog output for 1 V full scale. It is displayed as a bar graph because no other binary values exist for a 3-bit DAC.

Figure 3-3

A 3 bit D/A Converter (a) Block Diagram (b) Ideal Transfer Function)


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3.2.2 PLOTTING THE DAC OUTPUT:

By examining the graph, the following points should be noted:

1. The 3-bit D/A converter has eight (28) possible input combinations (n is number of input bits), ranging from 0002 to 1112,

2. If the full-scale analog voltage is 1 V, the smallest unit or LSB (001) is equivalent to 1/8 V.

(No voltage or a step smaller than 1/8 V can be identified by a 3bit converter.)

3. The MSB (100) has the equivalent value equal to ½8 V, 50% of the full scale.

4. For the maximum input signal (111), the analog output is ~ V, which is ~ V less than the

full-scale value. This can be stated as:

Vo(max) = (full-scale value) - (1 LSB)

where Vo(max) is the maximum analog output voltage

3.2.3 D/A CONVERTER CIRCUITS

The D/A conversion process with straight binary code, described by the transfer function of Figure 3-3b involve associating input signals with appropriate weights. The familiar circuit that performs this function is a summing operational amplifier. These circuits may use binary weighted resistors, or an R/2R ladder network.

3.2.3.1 Binary Weighted Resistors:

This is the simplest type D/ A converter, and uses the principle of the summing operational amplifier. Figure 3-4 shows a 3-input inverting op amp with input resistors R1, Rz, and R3 in binary weighted proportion. Each has double the value of the previous resistor. All three inputs Dz, D1, and Do, are 1 V. The total current, IT, is:

IT = I! + I2 + I3

=- Vin

+ Vin

+ Vin

R1 R3 R3

=- 1

+ 1

+ 1

2 4 8 = 0.5 + 0.25 + 0.125 = 0.875 mA


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The current contribution by each input is in binary proportion; therefore, voltage output Vo is also in the binary proportion:

VO = -RFIT

= - (1 kΩ) x(0.875 mA)

= -0.875

=- 7

V 8

The circuit of Figure3-4 simulates the binary digital input and the analog output. Assume the three inputs are connected to switches and can be turned on and off. If all switches are "off," the input represents the binary word 000 and if all switches are "on" the input represents the binary word 111 (D2 is the MSB and Do is the LSB). By using various combinations of switches, the input can assume any of eight binary (23) combinations, and the output will be the corresponding analog voltage. A major drawback in designing the binary weighted DAC is the requirement for various precision resistors of increasing values. The R/2R ladder approach described in the next section uses only two values of resistors for any number of bits. This eliminates the impartibility of having many values of precision resistors.

Figure 3-4

Resistive summing Amplifier

3.2.3.2 R/2R Ladder D/A Converter:

The basic principle of an R/2R ladder DAC is similar to the binary weighted DAC except that individual input resistors are replaced with a "ladder" network of resistors of only two values. The resistors are connected in such a way that for any input, the effect becomes equivalent to that of the binary weighted resistor. Figure 3-5 shows a 3-bit input R/2R ladder DAC. The inputs D0, D1 and D2 can either be grounded or connected to a 1 V supply through switches.


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Assume D2 = 0, D1 = 0, and Do = 1 (001 binary input). The circuit is simplified by drawing its Thevinin equivalent. The Thevinin voltage becomes 0.5 V with R and R’0 replaced with their Thevinin equivalent resistance, RTo = Ro//R~ R’0 (Figure 3-5a). The circuit is further simplified by similarly Thevinizing two more times as shown in Figures 4-5b and 4-5c.

Figure 3-5

Summing Amplifier Connected to an R/2R Ladder Input Network

In the final Thevenized circuit, the voltage source is 0.125 V with R12 as a driving resistance. If R12 is assumed to be 1 kΩ, the current I0 = 0.125/1 = 0.125 mA and the output voltage = 0.125 V. This corresponds to the input OO1. In this circuit, the currents from various inputs are added in binary proportion at the summing point, and this current is the analog equivalent of the input signals. This current can be used as the output to drive a load, as in a current output DAC, or can be converted into an equivalent voltage, as in a voltage output DAC. In a voltage output DAC, an op amp with a feedback resistor is used, as shown in Figure 3-3. Bipolar operation is obtained by adding bias current at the op amp summing point, or the output can be made equivalent to the product of the input signal and the reference voltage; this forms a multiplying type DAC.

Notes

1. The basic circuit blocks included in D/A converters are a resistor network to provide appropriate weighting of the input signal, switches, and a reference voltage.

2. The output can be a current, or converted into a voltage by using an op amp.

3. The accuracy of an analog output signal is primarily dependent on the accuracy

of the resistors.

4. Time required for conversion is dependent on the response time of the switches and the output op amp (for a voltage output DAC).


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4 VOLTAGE COMPARATORS

4.1 INTRODUCTION:

The dc voltage comparator outwardly appears to be very similar to the operational amplifier AM 5-212. Both have differential inputs, high gain, and many input and output parameters in common. In fact, the comparator appears to be an operational amplifier functioning in an open loop mode; however, there are fundamental differences. Voltage comparators are specifically designed around properties of speed and accuracy for differential comparison purposes. There is no intention of reproducing any part of the original input signal waveform. Therefore, most voltage comparators are essentially uncompensated, high-gain differential amplifiers driving an output stage, which is normally saturated high or low. Operational amplifiers, on the other hand, are internally or externally compensated, designed to provide a linear relationship between input and output, and generally have response times too slow for most comparator applications. General-purpose op amps, however, may be used in non-critical applications. Voltage comparators appear almost universally in digital systems, which require that a logic output be made available when an analog voltage or current within the system is greater than, less than, or between some critical threshold(s). This section deals with some of the many applications in which comparators are used.

4.2 LEVEL DETECTOR:

One of the primary applications of voltage comparators is level detection of an input signal relative to a known reference level. When the input signal, Vin, exceeds the established reference limit, Vref, the comparator output changes state. Figure 4-1 is an example of a simple level detector.

Figure 4-1

Simple Level Detector

EXAMPLE 4-1 Design a level detector to act as a zero-crossing detector. In a zero-crossing detector, Vref = 0 and the output changes state whenever the input, Vin, is equal to zero. The input signal range is ± 12 V. The circuit should be able to be gated by a TTL signal and be capable of driving TTL' gates.


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PROCEDURE

1. The design is given in Figure 4-1. A level detector circuit employing the μA311 Op Amp was selected because of its wide common mode, input voltage range, offset nulling capability, strobe capability, and ability to drive TTL.

2. Operating the μA311 from a ±15 V supply ensures a common mode range of ±14 V, which exceeds the ±12 V required.

3. Selecting a 2N2222 transistor with a 1 kΩ emitter resistor allows the strobe input to be driven by TTL.

4. The 3 kΩ pot and 3 kΩ series resistor allow adequate nulling of the comparator's offset voltage and provides current limiting at the null inputs.

5 A 2 kΩ resistor to + 5 V acts as a pull-up for the output of the comparator and allows it to drive TIL.

Figure 4-2

A Zero-Crossing Detector with Strobe Control and Offset Null Adjustment In level detector circuits, especially when processing slowly varying signals, noise levels riding on these signals can be particularly troublesome at the decision point where the comparator operates in a linear mode. Noise signals are amplified and can cause the comparator output to change state at random. To avoid this difficulty, positive feedback is employed to alter the comparator's transfer characteristic. Figure 4-3 is an example of a level detector employing feedback, which gives rise to hysteresis, (Figure 4-4). The modified transfer characteristic has two threshold levels: V2 and VI (upper and lower threshold levels). The Difference between the two voltages is called the hysteresis voltage, VTH. With the hysteresis voltage included, the comparator is less sensitive to noise and responds only to changes in the input signal


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Figure 4-3 A level Detector with Positive Feedback


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4.2.1 WINDOW DETECTOR

Voltage comparators are frequently employed in the design of test equipment to detect either the presence of a signal within a specified voltage range, or to indicate when a signal has stepped outside the specified range. A circuit that performs this function is called a min-max limit, or window detector. An example is shown in Figure 4-4.

Figure 4-4

Example Window Detector


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4.2.2 PEAK DETECTOR:

Peak detection of a signal can be easily accomplished by using the circuit of Figure 4-5. When a signal is applied to the non-inverting input, the output of the comparator switches to a high state. The capacitor at the inverting input is then charged to the peak value of the input signal through the diode. The stored charge on the capacitor is then used to provide the input bias current to the comparator and leakage currents through the diode and capacitor, thereby reducing the voltage on the inverting input to slightly below the peak signal. At the peak of the following cycle, when the input signal exceeds the threshold level, an output pulse is generated and additional charge is supplied to the capacitor. The comparator output goes to a low state, ending the pulse. This process causes a train of pulses where each pulse begins at the peak of the input waveform and has a duration that is determined by the turn-on time of the diode and the RC time constant (Figure 5-5b).

Figure 4-5

Positive Peak Detector


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NOTES:


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5 SPECIAL CONTROL / INDICATOR DRIVERS In this section we will cover circuits used for control or circuit indicators such as: to drive lamps, operate relays or electronic switches etc. Often these include signal delay circuits so the operation is preformed a certain length of time after the signal occurs. An example of this would be in a high voltage power supply for a power amplifier. This prevents the High Voltage from being applied for a certain time after turn on so that the amplifier power output tube filaments have time to warm up and thus stabilize the tube before high voltage is applied.

5.1 RELAY DRIVER:

A relay driver is a simple current switch that controls the operation of a relay. A typical relay driver circuit is shown in Figure 5-1.

Figure 5-1 Typical Relay Driver


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5.2 INDICATOR LAMP DRIVER:

It is often simpler to use a discrete transistor as a lamp driver unless there is an extra driver available in a chip that as partially utilized.

Figure 5-2

Typical simple Lamp Driver

Figure 5-3

Darlington Lamp Driver


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NOTES

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