Acer Aspire 5220, 5520, 7220, 7520 - AMD (Compal LA-3581) Schematics
42
A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date ICW50 / ICY70 LA-3581P Cover Sheet Custom 1 42 Friday, April 20, 2007 2006/08/18 2007/8/18 1.0 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date ICW50 / ICY70 LA-3581P Cover Sheet Custom 1 42 Friday, April 20, 2007 2006/08/18 2007/8/18 1.0 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date ICW50 / ICY70 LA-3581P Cover Sheet Custom 1 42 Friday, April 20, 2007 2006/08/18 2007/8/18 1.0 Compal Electronics, Inc. ICW50 Schematics Document AMD Turion/Sempron + Nvidia MCP67-MV Rev:1.0 Compal Confidential 2007 / 04 / 20 FOR Pre-MP
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Transcript of Acer Aspire 5220, 5520, 7220, 7520 - AMD (Compal LA-3581) Schematics
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P
Cover Sheet
Custom
1 42Friday, April 20, 2007
2006/08/18 2007/8/18
1.0
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P
Cover Sheet
Custom
1 42Friday, April 20, 2007
2006/08/18 2007/8/18
1.0
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P
Cover Sheet
Custom
1 42Friday, April 20, 2007
2006/08/18 2007/8/18
1.0
Compal Electronics, Inc.
ICW50 Schematics DocumentAMD Turion/Sempron + Nvidia MCP67-MV
Rev:1.0
Compal Confidential
2007 / 04 / 20 FOR Pre-MP
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55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
BLOCK DIAGRAM
Custom
2 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
BLOCK DIAGRAM
Custom
2 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
BLOCK DIAGRAM
Custom
2 42Friday, April 20, 2007
2006/08/18 2007/8/18
Power On/Off CKT / LID switch / Power OK CKT
Project Code: ICW50Compal confidential
836 BGA
DC/DC Interface CKT.
Power Circuit DC/DC
AMD Turion/Sempron CPU
page 30
page 33
Nvidia
page 4,5,6,7
RTC CKT.page 16
page 35~41
File Name : LA-3581P
page 6
Thermal SensorADM1032ARM
DDRII DDRII-SO-DIMM X2
Dual Channel
page 08,09Socket S1 638P
CIR/LEDpage 29
page 10,11,12,13,14,15,16,17
533/667/800
HT LINK200-800MHz
CRT & TV-outpage 19
PCI-Express
page 20page 20DVI-D Conn. LCD Conn.
MXM II VGA/B
LVDSLVDSDVI
MCP67-MV
page 18
page 22RJ45
PHY(GbE)RTL8211B
page 22
New CardSocket
MINI Card x2WLAN, TV-Tuner
Card Reader
IDSEL:AD20(PIRQE#,GNT#0,REQ#0)
RICOH R5C833page 23
PCI BUS3.3V 33 MHz
page 23
1394Conn.
6 in 1socketpage 24
IDE BUS
page 29 page 31
3.3V 24.576MHz/48Mhz
MDC 1.5Conn
page 32
USB conn x4
ALC268CDROM Conn.
3.3V ATA-100
HDA Codec
HD Audio
page 21
Audio AMP
port 1
Phone Jack x3
S-ATA HDDConn.
CMOSCamera
page 21
BluetoothConn
page 32
PCI-Express
Touch Pad
LPC BUS
Int.KBD
page 29
page 27,28
EC I/O Buffer BIOS
page 29
ENE KB926
page 30CIR
SATA BUS
USB 2.0 BUS
page 20page 29page 25,26
page 29
page 29
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55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
TABLE OF CONTENTS
Custom
3 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
TABLE OF CONTENTS
Custom
3 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
TABLE OF CONTENTS
Custom
3 42Friday, April 20, 2007
2006/08/18 2007/8/18
1394 AD20 0 PIRQE
+0.9V 0.9V switched power rail for DDR terminator+1.5VS
+1.8VS 1.8V switched power rail+1.8V 1.8V power rail for DDR
BOARD ID Table
EC SM Bus1 addressDevice
ONOFF
OFF
DDR DIMM0 1001 000XbDDR DIMM2 1001 001Xb
1.5V switched power rail
+CPU_CORE
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S5# +VALW +V +VS Clock
Vcc 3.3V +/- 5%100K +/- 5%Ra/Rc/Re
Board ID Rb / Rd / Rf V min0123
08.2K +/- 5%
0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V
0.503 V0.819 V
0.538 V0.875 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%
3.300 V
0 V 0 V
4567 NC
1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V
2.200 V3.300 V
2.341 V
1.185 V 1.264 V
Board ID01234567
PCB Revision
Board ID / SKU ID Table for AD channel
MCP67 SM Bus addressDevice Address
Address Address
Voltage Rails
VINB+
+1.2VS ON OFF OFF
Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU
1.2V switched power rail
External PCI DevicesDevice IDSEL# REQ#/GNT# Interrupts
ADM1032
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW
LOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH
HIGHHIGH
HIGH
HIGH
ON OFFOFF
S1 S3 S5
ON OFFON ON
N/A N/A N/AN/AN/AN/A
Power Plane Description
EC SM Bus2 addressDevice
Smart Battery
OFFOFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON OFFON
1001 100X b0001 011X b
SKU ID Table SKU ID
01234567
SKU
OFF
ON
+3VALW/+3V/+3VAUX2.5V switched power rail
+5VALW+3VS
+5VS
+2.5VS3.3V always on power rail
ON
OFF
ONON*ONVSB always on power rail+VSB
5V switched power rail
3.3V switched power rail5V always on power rail
ON*
ONON
ON
ON OFF
ON
OFF
ON
ON+RTCVCC
OFFON*
OFF
ONRTC power
+1.2VALW ON ON ON*
UMA (0V)DISCRETE (3.3V)
C - PHASEB - PHASE
+1.2V_HT
1.2V always on power rail
1.2V switched power rail ON OFF OFF
NEW CARD EXPRESS@
1394
BLUETOOTH BT@
BTO Option Table
TV-OUT TV@
CARD READER 5IN1@1394@
BTO Item BOM Structure45@DIP CAP & RTC
UMA UMA@VGA VGA@
UMA & TV-OUT UMA&TV@2 SATA HDD SATA2@CAMERA CMOS@
MINI CARD 1(TV) MINI1@MINI CARD 2(WLAN) MINI2@
DVI DVI@
HT Debug Port HT@
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55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CADON5H_CADOP5
H_CADON1H_CADOP1
H_CADON15H_CADIN15
H_CADIN11
H_CLKIP0
H_CADIP11
H_CADIN4H_CADIP4
H_CADIN0H_CADIP0
H_CADON12H_CADOP12
H_CADON8H_CADOP8
H_CADON4H_CADOP4
H_CADON0H_CADOP0
H_CTLOP0
H_CADIN14
H_CTLON0
H_CADIP14
H_CADIN10
H_CLKOP0
H_CADIN7H_CADIP7
H_CADIN3
H_CTLIN0
H_CADIP3
H_CTLIP0
H_CTLIP1
H_CADON11H_CADOP11
H_CADON7H_CADOP7
H_CLKIN1
H_CLKIN0
H_CLKIP1
H_CADON3H_CADOP3
H_CLKON0
H_CLKOP1H_CLKON1
H_CADIP15
H_CADIN13H_CADIP13
H_CADIN9H_CADIP9
H_CADIN6H_CADIP6
H_CADIN2H_CADIP2
H_CTLIN1
H_CADON14H_CADOP14
H_CADON10H_CADOP10
H_CADON6H_CADOP6
H_CADON2H_CADOP2
H_CADOP15
H_CADIN12H_CADIP12
H_CADIN8H_CADIP8
H_CADIN5H_CADIP5
H_CADIN1H_CADIP1
H_CADON13H_CADOP13
H_CADON9H_CADOP9
H_CADIP10
EN_DFAN1
FAN1
H_CTLIP0(10)H_CTLIN0(10)
H_CLKIN0(10)H_CLKIP0(10)H_CLKIN1(10)H_CLKIP1(10)
H_CADIN0(10)
H_CADIN1(10)
H_CADIN2(10)
H_CADIN3(10)
H_CADIN4(10)
H_CADIN5(10)
H_CADIN6(10)
H_CADIN7(10)
H_CADIN8(10)
H_CADIN9(10)
H_CADIN10(10)
H_CADIN11(10)
H_CADIN12(10)
H_CADIN13(10)
H_CADIN14(10)
H_CADIN15(10)
H_CADIP0(10)
H_CADIP1(10)
H_CADIP2(10)
H_CADIP3(10)
H_CADIP4(10)
H_CADIP5(10)
H_CADIP6(10)
H_CADIP7(10)
H_CADIP8(10)
H_CADIP9(10)
H_CADIP10(10)
H_CADIP11(10)
H_CADIP12(10)
H_CADIP13(10)
H_CADIP14(10)
H_CADIP15(10) H_CADOP15 (10)
H_CADOP14 (10)
H_CADOP13 (10)
H_CADOP12 (10)
H_CADOP11 (10)
H_CADOP10 (10)
H_CADOP9 (10)
H_CADOP8 (10)
H_CADOP7 (10)
H_CADOP6 (10)
H_CADOP5 (10)
H_CADOP4 (10)
H_CADOP3 (10)
H_CADOP2 (10)
H_CADOP1 (10)
H_CADOP0 (10)H_CADON0 (10)
H_CADON1 (10)
H_CADON2 (10)
H_CADON3 (10)
H_CADON4 (10)
H_CADON5 (10)
H_CADON6 (10)
H_CADON7 (10)
H_CADON8 (10)
H_CADON9 (10)
H_CADON10 (10)
H_CADON11 (10)
H_CADON12 (10)
H_CADON13 (10)
H_CADON14 (10)
H_CADON15 (10)
H_CLKON0 (10)
H_CLKON1 (10)H_CLKOP0 (10)
H_CLKOP1 (10)
H_CTLON0 (10)H_CTLOP0 (10)
EN_DFAN1(27,28)
FAN_SPEED1(27,28)
+1.2V_HT
+1.2V_HT
+1.2V_HT
+5VS
+3VS
+VCC_FAN1
+5VS+VCC_FAN1
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU HT I/F
Custom
4 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU HT I/F
Custom
4 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU HT I/F
Custom
4 42Friday, April 20, 2007
2006/08/18 2007/8/18
PROCESSOR HYPERTRANSPORT INTERFACE
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
Athlon 64 S1Processor Socket
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWERSUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
PLACE CLOSE TO VLDT0 POWER PINSTO OTHER HT POWER PINS
LAYOUT: Place bypass cap on topside of boardNEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLYTO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
FAN Conn
W=40mils
FAN1 Conn
Update Footprint
R142 51_0402_1%
R142 51_0402_1%
1 2
C539180P_0402_50V8J
C539180P_0402_50V8J
1
2
U11
G993P1UF_SOP8
U11
G993P1UF_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
C5414.7U_0805_10V4Z
C5414.7U_0805_10V4Z
1
2
C5360.22U_0402_10V4Z
C5360.22U_0402_10V4Z
1
2
R143 51_0402_1%
R143 51_0402_1%
1 2
C5400.22U_0402_10V4Z
C5400.22U_0402_10V4Z
1
2
D21BAS16_SOT23-3D21BAS16_SOT23-3
1
2
H
T
T
I
n
t
e
r
f
a
c
e
FOX_PZ63823-284S-41F
JP22A
H
T
T
I
n
t
e
r
f
a
c
e
FOX_PZ63823-284S-41F
JP22A
VLDT_A3D4VLDT_A2D3VLDT_A1D2VLDT_A0D1
VLDT_B3 AE5VLDT_B2 AE4VLDT_B1 AE3VLDT_B0 AE2
L0_CADIN_H15N5L0_CADIN_L15P5L0_CADIN_H14M3L0_CADIN_L14M4L0_CADIN_H13L5L0_CADIN_L13M5L0_CADIN_H12K3L0_CADIN_L12K4L0_CADIN_H11H3L0_CADIN_L11H4L0_CADIN_H10G5L0_CADIN_L10H5L0_CADIN_H9F3L0_CADIN_L9F4L0_CADIN_H8E5L0_CADIN_L8F5L0_CADIN_H7N3L0_CADIN_L7N2L0_CADIN_H6L1L0_CADIN_L6M1L0_CADIN_H5L3L0_CADIN_L5L2L0_CADIN_H4J1L0_CADIN_L4K1L0_CADIN_H3G1L0_CADIN_L3H1L0_CADIN_H2G3L0_CADIN_L2G2L0_CADIN_H1E1L0_CADIN_L1F1L0_CADIN_H0E3L0_CADIN_L0E2
L0_CADOUT_H15 T4L0_CADOUT_L15 T3L0_CADOUT_H14 V5L0_CADOUT_L14 U5L0_CADOUT_H13 V4L0_CADOUT_L13 V3L0_CADOUT_H12 Y5L0_CADOUT_L12 W5L0_CADOUT_H11 AB5L0_CADOUT_L11 AA5L0_CADOUT_H10 AB4L0_CADOUT_L10 AB3L0_CADOUT_H9 AD5L0_CADOUT_L9 AC5L0_CADOUT_H8 AD4L0_CADOUT_L8 AD3L0_CADOUT_H7 T1L0_CADOUT_L7 R1L0_CADOUT_H6 U2L0_CADOUT_L6 U3L0_CADOUT_H5 V1L0_CADOUT_L5 U1L0_CADOUT_H4 W2L0_CADOUT_L4 W3L0_CADOUT_H3 AA2L0_CADOUT_L3 AA3L0_CADOUT_H2 AB1L0_CADOUT_L2 AA1L0_CADOUT_H1 AC2L0_CADOUT_L1 AC3L0_CADOUT_H0 AD1L0_CADOUT_L0 AC1
L0_CLKIN_H1J5L0_CLKIN_L1K5L0_CLKIN_H0J3L0_CLKIN_L0J2
L0_CTLIN_H0N1L0_CTLIN_L0P1
L0_CTLOUT_H0 R2L0_CTLOUT_L0 R3
L0_CLKOUT_H0 Y1L0_CLKOUT_L0 W1
L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3
L0_CTLIN_H1P3L0_CTLIN_L1P4
L0_CTLOUT_H1 T5L0_CTLOUT_L1 R5
C510 10U_0805_10V4Z
C510 10U_0805_10V4Z
1 2
R8810K_0402_5%R8810K_0402_5%
1
2
C31010U_0805_10V4Z
C31010U_0805_10V4Z
1
2
C5334.7U_0805_10V4Z
C5334.7U_0805_10V4Z
1 2
JP16
ACES_85205-03001
JP16
ACES_85205-03001
123
D201SS355_SOD323-2D201SS355_SOD323-2
1
2
C509 1000P_0402_50V7K
C509 1000P_0402_50V7K
1 2
C5424.7U_0805_10V4Z
C5424.7U_0805_10V4Z
1
2C538180P_0402_50V8J
C538180P_0402_50V8J
1
2
C521000P_0402_50V7K
C521000P_0402_50V7K
1
2
-
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
DDR_B_CLK#1
DDR_CS2_DIMMA#
DDR_CS1_DIMMB#
DDR_A_MA9
DDR_CS0_DIMMA#
DDR_A_MA14
DDR_CS3_DIMMB#DDR_CS2_DIMMB#
DDR_A_MA8
DDR_CS3_DIMMA#
DDR_A_MA13
DDR_CKE0_DIMMBDDR_CKE1_DIMMA
DDR_A_MA12
DDR_A_MA7
DDR_CKE1_DIMMB
DDR_CKE0_DIMMA
DDR_A_MA10DDR_A_MA11
DDR_A_MA6
DDR_CS0_DIMMB#
DDR_CS1_DIMMA#
DDR_A_BS#0
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_A_BS#1DDR_A_BS#2
DDR_A_MA15
DDR_B_BS#2DDR_B_BS#1DDR_B_BS#0
DDR_B_CAS#DDR_B_WE#
DDR_B_D40
DDR_B_D6
DDR_B_D38
DDR_B_D50
DDR_B_D35
DDR_B_D47
DDR_B_D41
DDR_B_D44
DDR_B_D54
DDR_B_D13
DDR_B_D28
DDR_B_D17
DDR_B_D58
DDR_B_D26
DDR_B_D37
DDR_B_D60
DDR_B_D55
DDR_B_D34
DDR_B_D49
DDR_B_D56
DDR_B_D4
DDR_B_D12
DDR_B_D53
DDR_B_D46
DDR_B_D19
DDR_B_D22
DDR_B_D25
DDR_B_D16
DDR_B_D0
DDR_B_D31
DDR_B_D43
DDR_B_D11
DDR_B_D33
DDR_B_D10
DDR_B_D23
DDR_B_D36
DDR_B_D18
DDR_B_D8DDR_B_D7
DDR_B_D52
DDR_B_D15
DDR_B_D63
DDR_B_D24
DDR_B_D62
DDR_B_D21
DDR_B_D27
DDR_B_D1
DDR_B_D61
DDR_B_D5
DDR_B_D30
DDR_B_D32
DDR_B_D42
DDR_B_D9
DDR_B_D39
DDR_B_D48
DDR_B_D3
DDR_B_D51
DDR_B_D14
DDR_B_D20
DDR_B_D45
DDR_B_D2
DDR_B_D29
DDR_B_D59
VTT_SENSE
M_ZPM_ZN
DDR_B_DM1
DDR_B_DM3
DDR_B_DM5
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM6
DDR_B_DM0
DDR_B_DQS6DDR_B_DQS#6
DDR_B_DQS2DDR_B_DQS#2
DDR_B_DQS5DDR_B_DQS#5
DDR_B_DQS1DDR_B_DQS#1
DDR_B_DQS4DDR_B_DQS#4
DDR_B_DQS0DDR_B_DQS#0
DDR_B_DQS7DDR_B_DQS#7
DDR_B_DQS3DDR_B_DQS#3
DDR_A_DM1DDR_A_DM2DDR_A_DM3DDR_A_DM4DDR_A_DM5DDR_A_DM6DDR_A_DM7
DDR_A_DM0
DDR_A_DQS0DDR_A_DQS#0
DDR_A_DQS7DDR_A_DQS#7
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS6DDR_A_DQS#6
DDR_A_DQS2DDR_A_DQS#2
DDR_A_DQS5DDR_A_DQS#5
DDR_A_DQS1DDR_A_DQS#1
DDR_A_DQS4DDR_A_DQS#4
DDR_A_D4
DDR_A_D23
DDR_A_D60
DDR_A_D34
DDR_A_D50
DDR_A_D3
DDR_A_D7
DDR_A_D27
DDR_A_D44
DDR_A_D35
DDR_A_D40
DDR_A_D43
DDR_A_D29
DDR_A_D59
DDR_A_D48
DDR_A_D2
DDR_A_D63
DDR_A_D10
DDR_A_D30
DDR_A_D16
DDR_A_D20
DDR_A_D39
DDR_A_D41
DDR_A_D12
DDR_A_D24
DDR_A_D17
DDR_A_D54
DDR_A_D58
DDR_A_D56
DDR_A_D32
DDR_A_D57
DDR_A_D55
DDR_A_D9
DDR_A_D37
DDR_A_D42
DDR_A_D6
DDR_A_D51
DDR_A_D13
DDR_A_D38
DDR_A_D0
DDR_A_D19
DDR_A_D21
DDR_A_D1
DDR_A_D15
DDR_A_D62DDR_A_D61
DDR_A_D5
DDR_A_D31
DDR_A_D46
DDR_A_D53
DDR_A_D36
DDR_A_D52
DDR_A_D8
DDR_A_D25
DDR_A_D11
DDR_A_D14
DDR_A_D22
DDR_A_D49
DDR_A_D45
DDR_A_D47
DDR_A_D33
DDR_A_D28
DDR_A_D26
CPU_VREF_REF
DDR_A_MA0
DDR_A_MA3
DDR_A_MA1DDR_A_MA2
DDR_A_MA4DDR_A_MA5
DDR_B_MA1
DDR_B_MA5
DDR_B_CLK#2
DDR_A_CLK#2
DDR_B_MA8
DDR_B_ODT1
DDR_B_CLK2
DDR_B_MA14
DDR_B_MA3
DDR_B_CLK1
DDR_A_CLK2
DDR_B_MA9
DDR_B_MA4
DDR_B_MA15
DDR_A_ODT0
DDR_B_MA6
DDR_B_ODT0
DDR_B_MA0
DDR_B_MA12
DDR_A_ODT1
DDR_B_MA10
DDR_A_CLK1
DDR_B_MA7
DDR_B_MA2
DDR_B_MA13
DDR_B_MA11
DDR_B_D57
DDR_A_D18
DDR_A_CLK#1
DDR_A_CLK2
DDR_A_CLK1
DDR_A_CLK#1
DDR_A_CLK#2
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_RAS#
DDR_A_CLK2 (8)DDR_A_CLK#2 (8)DDR_A_CLK1 (8)DDR_A_CLK#1 (8)
DDR_B_CLK2 (9)DDR_B_CLK#2 (9)DDR_B_CLK1 (9)DDR_B_CLK#1 (9)
DDR_B_ODT1 (9)DDR_B_ODT0 (9)DDR_A_ODT1 (8)DDR_A_ODT0 (8)
DDR_B_MA[15..0] (9)
DDR_B_BS#2 (9)DDR_B_BS#1 (9)DDR_B_BS#0 (9)
DDR_B_RAS# (9)DDR_B_CAS# (9)DDR_B_WE# (9)
DDR_A_BS#2(8)DDR_A_BS#1(8)DDR_A_BS#0(8)
DDR_A_RAS#(8)DDR_A_CAS#(8)DDR_A_WE#(8)
DDR_CS3_DIMMA#(8)DDR_CS2_DIMMA#(8)DDR_CS1_DIMMA#(8)DDR_CS0_DIMMA#(8)
DDR_CS3_DIMMB#(9)DDR_CS2_DIMMB#(9)DDR_CS1_DIMMB#(9)DDR_CS0_DIMMB#(9)
DDR_CKE1_DIMMB(9)DDR_CKE0_DIMMB(9)DDR_CKE1_DIMMA(8)DDR_CKE0_DIMMA(8)
DDR_A_MA[15..0](8)
DDR_B_D[63..0](9)
DDR_B_DQS7(9)DDR_B_DQS#7(9)DDR_B_DQS6(9)
DDR_B_DQS5(9)
DDR_B_DQS4(9)
DDR_B_DQS3(9)
DDR_B_DQS2(9)
DDR_B_DQS1(9)
DDR_B_DQS0(9)
DDR_B_DQS#6(9)
DDR_B_DQS#5(9)
DDR_B_DQS#4(9)
DDR_B_DQS#3(9)
DDR_B_DQS#2(9)
DDR_B_DQS#1(9)
DDR_B_DQS#0(9)
DDR_B_DM[7..0](9) DDR_A_DM[7..0] (8)
DDR_A_DQS7 (8)
DDR_A_DQS6 (8)
DDR_A_DQS5 (8)
DDR_A_DQS4 (8)
DDR_A_DQS3 (8)
DDR_A_DQS2 (8)
DDR_A_DQS1 (8)
DDR_A_DQS0 (8)
DDR_A_DQS#7 (8)
DDR_A_DQS#6 (8)
DDR_A_DQS#5 (8)
DDR_A_DQS#4 (8)
DDR_A_DQS#3 (8)
DDR_A_DQS#2 (8)
DDR_A_DQS#1 (8)
DDR_A_DQS#0 (8)
DDR_A_D[63..0] (8)
+0.9VREF_CPU
+1.8V
+1.8V+0.9VREF_CPU
+0.9V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU DDRII MEMORY I/F
Custom
5 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU DDRII MEMORY I/F
Custom
5 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU DDRII MEMORY I/F
Custom
5 42Friday, April 20, 2007
2006/08/18 2007/8/18
VDD_VREF_SUS_CPU
T
o
n
o
r
m
a
l
S
O
D
I
M
M
s
o
c
k
e
t
T
o
r
e
v
e
r
s
e
S
O
D
I
M
M
s
o
c
k
e
t
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWERSUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
Athlon 64 S1ProcessorSocket
A1
AF1
Athlon 64 S1g1
A26
uPGA638Top View
Athlon 64 S1Processor Socket
LAYOUT:PLACE CLOSE TO CPU
PLACE THEM CLOSE TO CPU WITHIN 1"
Processor DDR2 Memory Interface
PLACE CLOSE TO PROCESSOR WITHIN 1.2 INCH
PLACE CLOSE TO PROCESSOR WITHIN 1.2 INCH
10:8:10:8:10
C358
1000P_0402_50V7K
C358
1000P_0402_50V7K
1
2
C363
1000P_0402_50V7K
C363
1000P_0402_50V7K
1
2
C3491.5P_0402_50V8CC3491.5P_0402_50V8C
1
2
R222
1K_0402_1%
R222
1K_0402_1%
1
2
TP2PAD TP2PAD
R228
1K_0402_1%
R228
1K_0402_1%
1
2
C345
0.1U_0402_16V4Z
C345
0.1U_0402_16V4Z
1
2
R38639.2_0402_1%~D
R38639.2_0402_1%~D
1
2
R38839.2_0402_1%~D
R38839.2_0402_1%~D
1
2
C3441.5P_0402_50V8CC3441.5P_0402_50V8C
1
2
C3361.5P_0402_50V8CC3361.5P_0402_50V8C
1
2
C3481.5P_0402_50V8CC3481.5P_0402_50V8C
1
2
D
D
R
I
I
C
m
d
/
C
t
r
l
/
/
C
l
k
FOX_PZ63823-284S-41F
JP22B
D
D
R
I
I
C
m
d
/
C
t
r
l
/
/
C
l
k
FOX_PZ63823-284S-41F
JP22B
VTT1 D10VTT2 C10VTT3 B10VTT4 AD10
VTT6 AC10VTT7 AB10VTT8 AA10VTT9 A10
M_VREFW17
VTT_SENSEY10
M_ZNAE10M_ZPAF10
MA0_CS_L3V19MA0_CS_L2J22MA0_CS_L1V22MA0_CS_L0T19
MB_CKE1H26MB_CKE0J23MA_CKE1J20MA_CKE0J21
MA_ADD13V24MA_ADD12K24MA_ADD11L20MA_ADD10R19MA_ADD9L19MA_ADD8L22MA_ADD7L21MA_ADD6M19MA_ADD5M20MA_ADD4M24MA_ADD3M22MA_ADD2N22MA_ADD1N21MA_ADD0R21
MA_BANK1R20MA_BANK0T22
MA_RAS_LT20MA_CAS_LU20MA_WE_LU21
MB_RAS_L U24MB_CAS_L V26MB_WE_L U22
MB_BANK1 T26MB_BANK0 U26
MB_ADD13 W25MB_ADD12 L23MB_ADD11 L25MB_ADD10 U25
MB_ADD9 L24MB_ADD8 M26MB_ADD7 L26MB_ADD6 N23MB_ADD5 N24MB_ADD4 N25MB_ADD3 N26MB_ADD2 P24MB_ADD1 P26MB_ADD0 T24
MA0_CLK_H2 Y16MA0_CLK_L2 AA16MA0_CLK_H1 E16MA0_CLK_L1 F16
MB0_CLK_H2 AF18MB0_CLK_L2 AF17MB0_CLK_H1 A17MB0_CLK_L1 A18
MB0_CS_L3Y26MB0_CS_L2J24MB0_CS_L1W24MB0_CS_L0U23
MA0_ODT0 U19MA0_ODT1 V20
MA_BANK2K22
MA_ADD15K19MA_ADD14K20
MB0_ODT0 W26MB0_ODT1 W23
MB_BANK2 K26
MB_ADD14 J26MB_ADD15 J25
VTT5 W10
D
D
R
I
I
D
a
t
a
FOX_PZ63823-284S-41F
JP22C
D
D
R
I
I
D
a
t
a
FOX_PZ63823-284S-41F
JP22C
MB_DM7AD12MB_DM6AC16MB_DM5AE22MB_DM4AB26MB_DM3E25MB_DM2A22MB_DM1B16MB_DM0A12
MA_DM7 Y13MA_DM6 AB16MA_DM5 Y19MA_DM4 AC24MA_DM3 F24MA_DM2 E19MA_DM1 C15MA_DM0 E12
MA_DATA0 G12MA_DATA1 F12MA_DATA2 H14MA_DATA3 G14MA_DATA4 H11MA_DATA5 H12MA_DATA6 C13MA_DATA7 E13MA_DATA8 H15MA_DATA9 E15
MA_DATA10 E17MA_DATA11 H17MA_DATA12 E14MA_DATA13 F14MA_DATA14 C17MA_DATA15 G17MA_DATA16 G18MA_DATA17 C19MA_DATA18 D22MA_DATA19 E20MA_DATA20 E18MA_DATA21 F18MA_DATA22 B22MA_DATA23 C23MA_DATA24 F20MA_DATA25 F22MA_DATA26 H24MA_DATA27 J19MA_DATA28 E21MA_DATA29 E22MA_DATA30 H20MA_DATA31 H22MA_DATA32 Y24MA_DATA33 AB24MA_DATA34 AB22MA_DATA35 AA21MA_DATA36 W22MA_DATA37 W21MA_DATA38 Y22MA_DATA39 AA22MA_DATA40 Y20MA_DATA41 AA20MA_DATA42 AA18MA_DATA43 AB18MA_DATA44 AB21MA_DATA45 AD21MA_DATA46 AD19MA_DATA47 Y18MA_DATA48 AD17MA_DATA49 W16MA_DATA50 W14MA_DATA51 Y14MA_DATA52 Y17MA_DATA53 AB17MA_DATA54 AB15MA_DATA55 AD15MA_DATA56 AB13MA_DATA57 AD13MA_DATA58 Y12MA_DATA59 W11MA_DATA60 AB14MA_DATA61 AA14MA_DATA62 AB12MA_DATA63 AA12
MA_DQS_L0 H13
MA_DQS_L1 G15
MA_DQS_L2 C21
MA_DQS_L3 G21
MA_DQS_L4 AC23
MA_DQS_L5 AB20
MA_DQS_L6 W15
MA_DQS_L7 W13
MA_DQS_H0 G13
MA_DQS_H1 G16
MA_DQS_H2 C22
MA_DQS_H3 G22
MA_DQS_H4 AD23
MA_DQS_H5 AB19
MA_DQS_H6 Y15
MA_DQS_H7 W12
MB_DATA0C11MB_DATA1A11MB_DATA2A14MB_DATA3B14MB_DATA4G11MB_DATA5E11MB_DATA6D12MB_DATA7A13MB_DATA8A15MB_DATA9A16MB_DATA10A19MB_DATA11A20MB_DATA12C14MB_DATA13D14MB_DATA14C18MB_DATA15D18MB_DATA16D20MB_DATA17A21MB_DATA18D24MB_DATA19C25MB_DATA20B20MB_DATA21C20MB_DATA22B24MB_DATA23C24MB_DATA24E23MB_DATA25E24MB_DATA26G25MB_DATA27G26MB_DATA28C26MB_DATA29D26MB_DATA30G23MB_DATA31G24MB_DATA32AA24MB_DATA33AA23MB_DATA34AD24MB_DATA35AE24MB_DATA36AA26MB_DATA37AA25MB_DATA38AD26MB_DATA39AE25MB_DATA40AC22MB_DATA41AD22MB_DATA42AE20MB_DATA43AF20MB_DATA44AF24MB_DATA45AF23MB_DATA46AC20MB_DATA47AD20MB_DATA48AD18MB_DATA49AE18MB_DATA50AC14MB_DATA51AD14MB_DATA52AF19MB_DATA53AC18MB_DATA54AF16MB_DATA55AF15MB_DATA56AF13MB_DATA57AC12MB_DATA58AB11MB_DATA59Y11MB_DATA60AE14MB_DATA61AF14MB_DATA62AF11MB_DATA63AD11
MB_DQS_L0B12
MB_DQS_L1C16
MB_DQS_L2A23
MB_DQS_L3E26
MB_DQS_L4AC26
MB_DQS_L5AF22
MB_DQS_L6AD16
MB_DQS_L7AE12
MB_DQS_H0C12
MB_DQS_H1D16
MB_DQS_H2A24
MB_DQS_H3F26
MB_DQS_H4AC25
MB_DQS_H5AF21
MB_DQS_H6AE16
MB_DQS_H7AF12
C350
1U_0402_6.3V4Z
C350
1U_0402_6.3V4Z
1
2
C357
1000P_0402_50V7K
C357
1000P_0402_50V7K
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_LDTSTOP#CPU_ALL_PWROKCPU_HT_RESET#
CPU_CLKIN_SC_P
C
P
U
_
P
H
_
G
+2.5VS_VDDA
CPU_CLKIN_SC_N
CPU_VCC_SENSECPU_VSS_SENSE
CPU_TEST29_H_FBCLKOUT_P
CPU_HTREF1CPU_HTREF0 VID0
VID5
CPU_PROCHOT#_1.8
CPU_PRESENT#
CPU_DBRDY
CPU_TMSCPU_TCKCPU_TRST#CPU_TDI
CPU_TDO
PSI#
VID2
VID4VID3
CPU_PROCHOT#_1.8
CPU_TEST25_H_BYPASSCLK_HCPU_TEST25_L_BYPASSCLK_L
CPU_THERMDC
CPU_TEST21_SCANEN
CPU_TEST26_BURNIN#
CPU_TEST29_L_FBCLKOUT_NCPU_TEST19_PLLTEST0CPU_TEST18_PLLTEST1
CPU_DBREQ#
CPU_TEST21_SCANENCPU_TEST25_L_BYPASSCLK_LCPU_TEST19_PLLTEST0
CPU_TEST26_BURNIN#
CPU_TEST25_H_BYPASSCLK_HCPU_PRESENT#
CPU_THERMDA
H_THERMTRIP_S#
VID1
CPU_THERMDA
CPU_THERMDC
EC_SMB_DA2
EC_SMB_CK2
CPU_TEST18_PLLTEST1
H_THERMTRIP_S# H_THERMTRIP#CPU_TMSCPU_TDI
CPU_DBRDYCPU_DBREQ#
CPU_TCK
CPU_TDOCPU_TRST#
3V_LDT_RST#
CPU_SID_RCPU_SIC_R
CPU_ALL_PWROK
MCP_PWRGD_R
CPU_LDTSTOP#
CPU_HT_RESET#
CPU_HT_RESET#
EC_SMB_CK2(27,28)
EC_SMB_DA2(27,28)
MAINPWON (35,36,37)
H_THERMTRIP# (10)
CPU_VCC_SENSE(41)CPU_VSS_SENSE(41)
VID0 (41)VID1 (41)VID2 (41)VID3 (41)VID4 (41)VID5 (41)
PSI# (41)
CPUCLK(10)
CPUCLK#(10)
EC_THERM# (15,27,28)
MCP_PWRGD(15,18,27,28)
HTCPU_PWRGD(10)
HTCPU_STOP#(10)
HTCPU_RST#(10)
PROCHOT#(10)
+3VS
+1.8V +1.8V +3V +3V
+1.8V
+1.8V +3VS
+1.8V
+1.2V_HT
+2.5VS
+1.8V
+1.8V
+3VS
+1.8V
+1.8V+3VS
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+3V
CPU_SIC(15)CPU_SID(15)
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU CTRL & DEBUG
C
6 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU CTRL & DEBUG
C
6 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU CTRL & DEBUG
C
6 42Friday, April 20, 2007
2006/08/18 2007/8/18
LAYOUT: ROUTE VDDA TRACE APPROX.50 mils WIDE (USE 2x25 mil TRACES TOEXIT BALL FIELD) AND 500 mils LONG.
AMD NPT S1 SOCKETProcessor Socket
ATHLON Control and Debug
place them to CPU within 1"
PLACE IT CLOSE TO CPU WITHIN 1"ROUTE AS 80 Ohm DIFFERENTIAL PAIR
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
U2 CLOSE CPU,CPU_THERMDA&CPU_THERMDC PLACECLOSE TO PROCESSOR WITHIN 1" INCH
W=50mils
5:10
5:5:5
10:10
Connect to MCP67
PVT Modify 2007/03/22
R114300_0402_5% R114300_0402_5%
1
2
EB
C
Q19
MMBT3904_SOT23
EB
C
Q19
MMBT3904_SOT23
2
3 1
C275
2200P_0402_50V7K
C275
2200P_0402_50V7K
1
2
C266
22U_0805_6.3V6M
C266
22U_0805_6.3V6M
1
2
R1304.7K_0402_5%
R1304.7K_0402_5%
1
2
R385 300_0402_5%R385 300_0402_5%1 2
R378 44.2_0603_1%R378 44.2_0603_1%1 2
R197 300_0402_5%R197 300_0402_5%1 2
R113220_0402_5%HT@
R113220_0402_5%HT@
1
2
TP3PAD TP3PAD
R1171K_0402_5%@
R1171K_0402_5%@
1
2
R371 300_0402_5%R371 300_0402_5%1 2
R189 0_0402_5%@
R189 0_0402_5%@
1 2
R188 510_0402_5%
R188 510_0402_5%
1 2
G
D S
Q142N7002_SOT23HT@
G
D S
Q142N7002_SOT23HT@
2
1 3
C276
4.7U_0805_10V4Z
C276
4.7U_0805_10V4Z
1
2
R1271K_0402_5%R1271K_0402_5%
1
2
R141 0_0402_5%@
R141 0_0402_5%@
1 2
R380 0_0402_5%
R380 0_0402_5%
1 2
R3814.7K_0402_5%@
R3814.7K_0402_5%@
1
2
R382169_0402_1%
R382169_0402_1%
1
2
L28
FCM2012C-800_0805
L28
FCM2012C-800_0805
1 2
U26
NC7SZ08P5X_NL_SC70-5@
U26
NC7SZ08P5X_NL_SC70-5@
B2
A1Y 4
P
5
G
3
R
1
6
0
2
2
0
_
0
4
0
2
_
5
%
H
T
@
R
1
6
0
2
2
0
_
0
4
0
2
_
5
%
H
T
@
1
2
R383 0_0402_5%@
R383 0_0402_5%@
1 2
R369 0_0402_5%R369 0_0402_5%1 2
C543 0.1U_0402_16V4Z
C543 0.1U_0402_16V4Z
1 2R
1
6
2
2
2
0
_
0
4
0
2
_
5
%
H
T
@
R
1
6
2
2
2
0
_
0
4
0
2
_
5
%
H
T
@
1
2
R387 510_0402_5%R387 510_0402_5%1 2
U9
NC7SZ08P5X_NL_SC70-5@
U9
NC7SZ08P5X_NL_SC70-5@
B2
A1Y 4
P
5
G
3
R156300_0402_5% R156300_0402_5%
1
2
Q16
MMBT3904_SOT23
Q16
MMBT3904_SOT23
2
3 1
R155300_0402_5% R155300_0402_5%
1
2
R377 0_0402_5%@
R377 0_0402_5%@
1 2
U25
NC7SZ08P5X_NL_SC70-5@
U25
NC7SZ08P5X_NL_SC70-5@
B2
A1Y 4
P
5
G
3
R13310K_0402_5%
R13310K_0402_5%
1
2
R368 0_0402_5%R368 0_0402_5%1 2
R184300_0402_5%
R184300_0402_5%
1
2
R18610K_0402_5%@
R18610K_0402_5%@
1
2
R
1
6
3
2
2
0
_
0
4
0
2
_
5
%
H
T
@
R
1
6
3
2
2
0
_
0
4
0
2
_
5
%
H
T
@
1
2
U4
ADM1032ARM_RM8
U4
ADM1032ARM_RM8
VDD1 1
ALERT# 6
THERM# 4
GND 5
D+2
D-3
SCLK8
SDATA7
C269
0.1U_0402_16V4Z
C269
0.1U_0402_16V4Z
1
2
C271
0.22U_0603_16V7K
C271
0.22U_0603_16V7K
1
2
R384
80.6_0402_1%
R384
80.6_0402_1%
1 2
R535 0_0402_5%@
R535 0_0402_5%@
1 2
R373300_0402_5%
R373300_0402_5%
1
2
R3750_0402_5% @R3750_0402_5% @
1 2
C544
3900P_0402_50V7K
C544
3900P_0402_50V7K
1 2
R215 300_0402_5%R215 300_0402_5%1 2
R198 1K_0402_5%
R198 1K_0402_5%
1 2
R11610K_0402_5%R11610K_0402_5%
1
2
R115 0_0402_5%@
R115 0_0402_5%@
1 2
R
1
5
9
2
2
0
_
0
4
0
2
_
5
%
H
T
@
R
1
5
9
2
2
0
_
0
4
0
2
_
5
%
H
T
@
1
2
R370 300_0402_5%R370 300_0402_5%1 2
R374 0_0402_5%
R374 0_0402_5%
1 2
R376 44.2_0603_1%R376 44.2_0603_1%1 2
C2773300P_0402_50V7K
C2773300P_0402_50V7K
1
2
SAMTEC_ASP-68200-07
JP7
@SAMTEC_ASP-68200-07
JP7
@
2468
101214161820222423
21191715131197531
26
C545
3900P_0402_50V7K
C545
3900P_0402_50V7K
1 2
R379300_0402_5%
R379300_0402_5%
1
2
TP1PAD TP1PAD
Q15MMBT3904_SOT23@
Q15MMBT3904_SOT23@
2
3 1
R183 0_0402_5%
R183 0_0402_5%
1 2
R
1
6
1
2
2
0
_
0
4
0
2
_
5
%
H
T
@
R
1
6
1
2
2
0
_
0
4
0
2
_
5
%
H
T
@
1
2
M
I
S
C
FOX_PZ63823-284S-41F
JP22D
M
I
S
C
FOX_PZ63823-284S-41F
JP22D
VDDA2F8VDDA1F9
RESET_LB7PWROKA7LDTSTOP_LF10
HTREF1P6HTREF0R6
VDDIO_FB_HW9VDDIO_FB_LY9
CLKIN_HA9CLKIN_LA8
DBRDYG10
TMSAA9TCKAC9TRST_LAD9TDIAF9
TDO AE9
DBREQ_L E10
VID4 C6VID3 A6VID2 A4VID1 C5VID0 B5
THERMTRIP_L AF6
CPU_PRESENT_L AC6
SICAF4SIDAF5
VDD_FB_HF6VDD_FB_LE6
VID5 A5
PROCHOT_L AC7
PSI_L A3
TEST2AB6TEST3Y6THERMDAW8THERMDCW7TEST6AA6TEST7C3
TEST8 C4TEST10 K8TEST26 AE6TEST27 AF8
TEST28_L H8TEST28_H J7
TEST20 AF7TEST21 AB8TEST22 AE8TEST23 AD7TEST24 AE7
TEST12AC8TEST14C7TEST15F7TEST16E7TEST17D7TEST9C2TEST13AA7TEST18H10TEST19G9TEST25_LE8TEST25_HE9 TEST29_H C9
TEST29_L C8
RSVD0P20RSVD1P19RSVD2N20RSVD3N19
RSVD4R26RSVD5R25RSVD6P22RSVD7R22
RSVD8 H16RSVD9 B18
RSVD10 B3RSVD11 C1
RSVD12 H6RSVD13 G6RSVD14 D5
RSVD15 R24RSVD16 W18RSVD17 R23RSVD18 AA8RSVD19 H18RSVD20 H19
R199 300_0402_5%R199 300_0402_5%1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CPU_CORE
+CPU_CORE+CPU_CORE
+1.8V
+CPU_CORE
+CPU_CORE +1.8V
+1.8V
+0.9V
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU PWR & GND
C
7 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU PWR & GND
C
7 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
AMD CPU PWR & GND
C
7 42Friday, April 20, 2007
2006/08/18 2007/8/18
uPGA638Top View
CPU SOCKET S1 DECOUPLING
A1
AF1
A26
Athlon 64 S1g1
PROCESSOR POWER AND GROUND
Athlon 64 S1Processor Socket
Athlon 64 S1Processor Socket
DECOUPLING BETWEEN PROCESSOR AND DIMMsPLACE CLOSE TO PROCESSOR AS POSSIBLE
10/2 Modify
C385
0.01U_0402_16V7K
C385
0.01U_0402_16V7K
1
2
C300
1000P_0402_50V7K
C300
1000P_0402_50V7K
1
2
C319
180P_0402_50V8J
C319
180P_0402_50V8J
1
2
C333
22U_0805_6.3V6M
C333
22U_0805_6.3V6M
1
2
C353
10U_0805_10V6M
C353
10U_0805_10V6M
1
2
C332
10U_0805_10V6M
C332
10U_0805_10V6M
1
2
+ C548
470U_D2E_2VM_R9
+ C548
470U_D2E_2VM_R9
1
2
C334
22U_0805_6.3V6M
C334
22U_0805_6.3V6M
1
2
C342
4.7U_0805_10V4Z
C342
4.7U_0805_10V4Z
1
2
C299
1000P_0402_50V7K
C299
1000P_0402_50V7K
1
2
C28110U_0805_10V6M
C28110U_0805_10V6M
1
2
C296
180P_0402_50V8J
C296
180P_0402_50V8J
1
2
C298
0.22U_0402_10V4Z
C298
0.22U_0402_10V4Z
1
2
C328
10U_0805_10V6M
C328
10U_0805_10V6M
1
2
C307
1000P_0402_50V7K
C307
1000P_0402_50V7K
1
2
C295
180P_0402_50V8J
C295
180P_0402_50V8J
1
2
+ C547
330U_D2E_2.5VM_R9
+ C547
330U_D2E_2.5VM_R9
1
2
C308
0.22U_0402_10V4Z
C308
0.22U_0402_10V4Z
1
2
C351
4.7U_0805_10V4Z
C351
4.7U_0805_10V4Z
1
2
C28210U_0805_10V6M
C28210U_0805_10V6M
1
2
C313
0.22U_0402_10V4Z
C313
0.22U_0402_10V4Z
1
2
C312
0.22U_0402_10V4Z
C312
0.22U_0402_10V4Z
1
2
C343
10U_0805_10V6M
C343
10U_0805_10V6M
1
2
C320
4.7U_0805_10V4Z
C320
4.7U_0805_10V4Z
1
2
C27910U_0805_10V6M
C27910U_0805_10V6M
1
2
C324
10U_0805_10V6M
C324
10U_0805_10V6M
1
2
C362
0.22U_0402_10V4Z
C362
0.22U_0402_10V4Z
1
2
C388
4.7U_0805_10V4Z
C388
4.7U_0805_10V4Z
1
2
C352
4.7U_0805_10V4Z
C352
4.7U_0805_10V4Z
1
2
+ C551820U_E9_2.5V_M_R745@
+ C551820U_E9_2.5V_M_R745@
1
2
C340
180P_0402_50V8J
C340
180P_0402_50V8J
1
2
C356
0.22U_0402_10V4Z
C356
0.22U_0402_10V4Z
1
2
P
o
w
e
r
FOX_PZ63823-284S-41F
JP22E
P
o
w
e
r
FOX_PZ63823-284S-41F
JP22E
VDD1AC4VDD2AD2VDD3G4VDD4H2VDD5J9VDD6J11VDD7J13VDD8K6VDD9K10VDD10K12VDD11K14VDD12L4VDD13L7VDD14L9VDD15L11VDD16L13VDD17M2VDD18M6VDD19M8VDD20M10VDD21N7VDD22N9VDD23N11VDD24P8VDD25P10VDD26R4VDD27R7VDD28R9VDD29R11VDD30T2VDD31T6VDD32T8VDD33T10VDD34T12VDD35T14VDD36U7VDD37U9VDD38U11VDD39U13VDD40V6VDD41V8VDD42V10
VDD43 V12VDD44 V14VDD45 W4VDD46 Y2VDD47 J15VDD48 K16VDD49 L15VDD50 M16VDD51 P16VDD52 T16VDD53 U15VDD54 V16
VDDIO1 H25VDDIO2 J17VDDIO3 K18VDDIO4 K21VDDIO5 K23VDDIO6 K25VDDIO7 L17VDDIO8 M18VDDIO9 M21
VDDIO10 M23VDDIO11 M25VDDIO12 N17VDDIO13 P18VDDIO14 P21VDDIO15 P23VDDIO16 P25VDDIO17 R17VDDIO18 T18VDDIO19 T21VDDIO20 T23VDDIO21 T25VDDIO22 U17VDDIO23 V18VDDIO24 V21VDDIO25 V23VDDIO26 V25VDDIO27 Y25
C309
0.01U_0402_16V7K
C309
0.01U_0402_16V7K
1
2
C28010U_0805_10V6M
C28010U_0805_10V6M
1
2
C28710U_0805_10V6M
C28710U_0805_10V6M
1
2
C383
0.22U_0402_10V4Z
C383
0.22U_0402_10V4Z
1
2
C304
4.7U_0805_10V4Z
C304
4.7U_0805_10V4Z
1
2
+ C550
470U_D2E_2VM_R9
+ C550
470U_D2E_2VM_R9
1
2
C381
0.22U_0402_10V4Z
C381
0.22U_0402_10V4Z
1
2
C305
180P_0402_50V8J
C305
180P_0402_50V8J
1
2
+ C546
470U_D2E_2VM_R9
+ C546
470U_D2E_2VM_R9
1
2
G
r
o
u
n
d
FOX_PZ63823-284S-41F
JP22F
G
r
o
u
n
d
FOX_PZ63823-284S-41F
JP22F
VSS1AA4VSS2AA11VSS3AA13VSS4AA15VSS5AA17VSS6AA19VSS7AB2VSS8AB7VSS9AB9VSS10AB23VSS11AB25VSS12AC11VSS13AC13VSS14AC15VSS15AC17VSS16AC19VSS17AC21VSS18AD6VSS19AD8VSS20AD25VSS21AE11VSS22AE13VSS23AE15VSS24AE17VSS25AE19VSS26AE21VSS27AE23VSS28B4VSS29B6VSS30B8VSS31B9VSS32B11VSS33B13VSS34B15VSS35B17VSS36B19VSS37B21VSS38B23VSS39B25VSS40D6VSS41D8VSS42D9VSS43D11VSS44D13VSS45D15VSS46D17VSS47D19VSS48D21VSS49D23VSS50D25VSS51E4VSS52F2VSS53F11VSS54F13VSS55F15VSS56F17VSS57F19VSS58F21VSS59F23VSS60F25VSS61H7VSS62H9VSS63H21VSS64H23VSS65J4
VSS66 J6VSS67 J8VSS68 J10VSS69 J12VSS70 J14VSS71 J16VSS72 J18VSS73 K2VSS74 K7VSS75 K9VSS76 K11VSS77 K13VSS78 K15VSS79 K17VSS80 L6VSS81 L8VSS82 L10VSS83 L12VSS84 L14VSS85 L16VSS86 L18VSS87 M7VSS88 M9VSS89 M11VSS90 M17VSS91 N4VSS92 N8VSS93 N10VSS94 N16VSS95 N18VSS96 P2VSS97 P7VSS98 P9VSS99 P11
VSS101 R8VSS102 R10VSS103 R16VSS104 R18VSS105 T7VSS106 T9VSS107 T11VSS108 T13
VSS123 V13VSS124 V15VSS125 V17VSS126 W6VSS127 Y21VSS128 Y23VSS129 N6
VSS109 T15VSS110 T17VSS111 U4VSS112 U6VSS113 U8VSS114 U10VSS115 U12VSS116 U14VSS117 U16VSS118 U18VSS119 V2VSS120 V7VSS121 V9VSS122 V11
VSS100 P17
C28810U_0805_10V6M
C28810U_0805_10V6M
1
2
C302
4.7U_0805_10V4Z
C302
4.7U_0805_10V4Z
1
2
C382
0.01U_0402_16V7K
C382
0.01U_0402_16V7K
1
2
C361
0.22U_0402_10V4Z
C361
0.22U_0402_10V4Z
1
2
C28910U_0805_10V6M
C28910U_0805_10V6M
1
2
C297
180P_0402_50V8J
C297
180P_0402_50V8J
1
2
C315
22U_0805_6.3V6M
C315
22U_0805_6.3V6M
1
2
C360
180P_0402_50V8J
C360
180P_0402_50V8J
1
2
C326
22U_0805_6.3V6M
C326
22U_0805_6.3V6M
1
2
C327
10U_0805_10V6M
C327
10U_0805_10V6M
1
2
C318
0.22U_0402_10V4Z
C318
0.22U_0402_10V4Z
1
2
C306
1000P_0402_50V7K
C306
1000P_0402_50V7K
1
2
C316
10U_0805_10V6M
C316
10U_0805_10V6M
1
2
C303
4.7U_0805_10V4Z
C303
4.7U_0805_10V4Z
1
2
C314
0.22U_0402_10V4Z
C314
0.22U_0402_10V4Z
1
2
C386
0.22U_0402_10V4Z
C386
0.22U_0402_10V4Z
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_BS#0
DDR_A_D26
DDR_A_D29
DDR_A_D27DDR_A_D30
DDR_A_D33
DDR_A_D31
DDR_A_D32
DDR_A_D28
DDR_A_D34DDR_A_D35
DDR_A_D38
DDR_A_D36
DDR_A_D39
DDR_A_D37
DDR_A_D41
DDR_A_D42
DDR_A_D44DDR_A_D40
DDR_A_D43 DDR_A_D47
DDR_A_D48
DDR_A_D45
DDR_A_D46
DDR_A_D49 DDR_A_D53
DDR_A_D51 DDR_A_D55DDR_A_D50
DDR_A_D52
DDR_A_D56
DDR_A_D54
DDR_A_D59
DDR_A_D57
DDR_A_D58
DDR_A_D61
DDR_A_D63
DDR_A_D60
DDR_A_D3
DDR_A_D8
DDR_A_D6DDR_A_D7
DDR_A_D5
DDR_A_D14
DDR_A_D9
DDR_A_D11DDR_A_D10
DDR_A_D13
DDR_A_D16
DDR_A_D15
DDR_A_D12
DDR_A_D17DDR_A_D20
DDR_A_D18 DDR_A_D22DDR_A_D19
DDR_A_D24
DDR_A_D21
DDR_A_D23
DDR_A_BS#2
DDR_A_BS#1
DDR_A_D25
DDR_A_D62
DDR_A_DM7
DDR_A_DM2
DDR_A_DM4
DDR_A_DM3
DDR_A_DM1
DDR_A_DM0
DDR_A_DM6
DDR_A_DM5
DDR_A_MA4
DDR_A_D0
DDR_A_D2
DDR_A_D1
DDR_A_D4
DDR_A_MA11
DDR_A_MA10
DDR_A_MA12DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA5
DDR_A_MA7
DDR_A_MA3DDR_A_MA0
DDR_A_MA13
DDR_A_MA15
DDR_A_MA2DDR_A_MA1
DDR_A_MA14
DDR_A_DQS2
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS#1
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS3
DDR_A_DQS6
DDR_A_DQS#7
DDR_A_DQS#4
DDR_A_DQS#2
DDR_A_DQS#6
DDR_A_DQS#3
DDR_A_DQS1
DDR_A_DQS#5
DDR_A_ODT1
DDR_CKE0_DIMMA
DDR_CS1_DIMMA#
DDR_A_RAS#DDR_A_WE#
DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_CS0_DIMMA#
DDR_A_CLK#2
DDR_A_ODT0
DDR_A_CLK#1DDR_A_CLK1
DDR_A_CLK2
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
MEM_SMBDATAMEM_SMBCLK
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA6
DDR_A_MA2DDR_A_MA4
DDR_A_MA0DDR_A_BS#1
DDR_A_RAS#DDR_CS0_DIMMA#
DDR_A_ODT0DDR_A_MA13DDR_A_ODT1
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#DDR_CKE0_DIMMA
DDR_A_BS#2DDR_A_MA12
DDR_A_MA9DDR_A_MA8
DDR_A_MA5DDR_A_MA3
DDR_A_BS#0DDR_A_WE#
DDR_A_CAS#DDR_CS1_DIMMA#
DDR_A_MA10DDR_A_MA1
DDR_A_MA11
DDR_A_MA7
DDR_A_MA15DDR_A_MA14
DDR_CKE1_DIMMA
DDR_A_MA[0..15](5)
DDR_A_D[0..63](5)
DDR_A_DQS[0..7](5)
DDR_A_DM[0..7](5)
DDR_A_DQS#[0..7](5)
DDR_A_CLK1 (5)DDR_A_CLK#1 (5)
DDR_CKE0_DIMMA(5)
DDR_CS2_DIMMA#(5)DDR_A_BS#2(5)
DDR_A_BS#0(5)DDR_A_WE#(5)
DDR_A_CAS#(5)DDR_CS1_DIMMA#(5)
DDR_A_ODT1(5)
DDR_A_CLK2 (5)DDR_A_CLK#2 (5)
DDR_CS3_DIMMA# (5)
DDR_CS0_DIMMA# (5)
DDR_A_ODT0 (5)
DDR_A_RAS# (5)DDR_A_BS#1 (5)
DDR_CKE1_DIMMA (5)
MEM_SMBCLK(9,15)MEM_SMBDATA(9,15)
+0.9V
+0.9V
+1.8V
+1.8V+DIMM_VREF+1.8V+1.8V
+0.9V
+1.8V
+1.8V
+3VSTitle
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
DDR2 SO-DIMM I
Custom
8 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
DDR2 SO-DIMM I
Custom
8 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
DDR2 SO-DIMM I
Custom
8 42Friday, April 20, 2007
2006/08/18 2007/8/18
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one 0.1uF cap close to every 2 pullup resistors terminated to +0.9V
DIMM1 REV H:5.2mm (BOT)
C5730.22U_0603_16V7K
C5730.22U_0603_16V7K
1
2
RP17 47_0404_4P2R_5%RP17 47_0404_4P2R_5%
1 42 3
C412
4.7U_0805_10V4Z
C412
4.7U_0805_10V4Z
1
2
C408
4.7U_0805_10V4Z
C408
4.7U_0805_10V4Z
1
2
C407
4.7U_0805_10V4Z
C407
4.7U_0805_10V4Z
1
2
RP21 47_0404_4P2R_5%RP21 47_0404_4P2R_5%
1 42 3
RP13 47_0404_4P2R_5%RP13 47_0404_4P2R_5%
1 42 3
C432
0.1U_0402_16V4Z C
432
0.1U_0402_16V4Z
1
2
C411
4.7U_0805_10V4Z
C411
4.7U_0805_10V4Z
1
2
C418
4.7U_0805_10V4Z
C418
4.7U_0805_10V4Z
1
2
RP11 47_0404_4P2R_5%RP11 47_0404_4P2R_5%
1 42 3
C453
0.1U_0402_16V4Z C
453
0.1U_0402_16V4Z
1
2
RP9 47_0404_4P2R_5%RP9 47_0404_4P2R_5%
1 42 3
RP15 47_0404_4P2R_5%RP15 47_0404_4P2R_5%
1 42 3
C435
0.1U_0402_16V4Z C
435
0.1U_0402_16V4Z
1
2
RP10 47_0404_4P2R_5%RP10 47_0404_4P2R_5%
1 42 3
C4270.01U_0402_16V7KC4270.01U_0402_16V7K1
2C5760.22U_0603_16V7K
C5760.22U_0603_16V7K
1
2
C448
0.1U_0402_16V4Z C
448
0.1U_0402_16V4Z
1
2
RP16 47_0404_4P2R_5%RP16 47_0404_4P2R_5%
1 42 3
C439
0.1U_0402_16V4Z
C439
0.1U_0402_16V4Z
1
2
R280 47_0402_1%R280 47_0402_1%1 2
R275
1K_0402_1%
R275
1K_0402_1%
1
2
C5750.22U_0603_16V7K
C5750.22U_0603_16V7K
1
2C4134.7U_0805_6.3V6KC4134.7U_0805_6.3V6K
1
2C3984.7U_0805_6.3V6KC3984.7U_0805_6.3V6K
1
2
+ C628220U_D2_4VM_R15
+ C628220U_D2_4VM_R15
1
2
C449
0.1U_0402_16V4Z C
449
0.1U_0402_16V4Z
1
2
C441
0.1U_0402_16V4Z C
441
0.1U_0402_16V4Z
1
2 C442
0.1U_0402_16V4Z C
442
0.1U_0402_16V4Z
1
2C438
0.1U_0402_16V4Z
C438
0.1U_0402_16V4Z
1
2
RP19 47_0404_4P2R_5%RP19 47_0404_4P2R_5%
1 42 3
C3994.7U_0805_6.3V6KC3994.7U_0805_6.3V6K1
2
C417
4.7U_0805_10V4Z
C417
4.7U_0805_10V4Z
1
2
C416
4.7U_0805_10V4Z
C416
4.7U_0805_10V4Z
1
2
C5770.22U_0603_16V7K
C5770.22U_0603_16V7K
1
2
R281 10K_0402_5%R281 10K_0402_5%1 2
+C422
150U_D2_6.3VM
+C422
150U_D2_6.3VM
1
2
C5780.22U_0603_16V7K
C5780.22U_0603_16V7K
1
2C
447
0.1U_0402_16V4Z C
447
0.1U_0402_16V4Z
1
2
C415
4.7U_0805_10V4Z
C
415
4.7U_0805_10V4Z
1
2
RP8 47_0404_4P2R_5%RP8 47_0404_4P2R_5%
1 42 3
RP12 47_0404_4P2R_5%RP12 47_0404_4P2R_5%
1 42 3
C451
0.1U_0402_16V4Z C
451
0.1U_0402_16V4Z
1
2
R274
1K_0402_1%
R274
1K_0402_1%
1
2
C579
4.7U_0805_10V4Z
C579
4.7U_0805_10V4Z
1
2
C433
0.1U_0402_16V4Z C
433
0.1U_0402_16V4Z
1
2
C440
0.1U_0402_16V4Z C
440
0.1U_0402_16V4Z
1
2C446
0.1U_0402_16V4Z C
446
0.1U_0402_16V4Z
1
2
C429
0.1U_0402_16V4Z
C429
0.1U_0402_16V4Z
1
2
RP18 47_0404_4P2R_5%RP18 47_0404_4P2R_5%
1 42 3
C410
4.7U_0805_10V4Z
C410
4.7U_0805_10V4Z
1
2C
452
0.1U_0402_16V4Z C
452
0.1U_0402_16V4Z
1
2
R277 47_0402_1%R277 47_0402_1%1 2
C436
0.1U_0402_16V4Z C
436
0.1U_0402_16V4Z
1
2
C445
0.1U_0402_16V4Z C
445
0.1U_0402_16V4Z
1
2
C437
0.1U_0402_16V4Z C
437
0.1U_0402_16V4Z
1
2
RP14 47_0404_4P2R_5%RP14 47_0404_4P2R_5%
1 42 3
JP28
FOX_AS0A426-M2RN-7F
JP28
FOX_AS0A426-M2RN-7F
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
C431
0.1U_0402_16V4Z C
431
0.1U_0402_16V4Z
1
2
C428
0.1U_0402_16V4Z
C428
0.1U_0402_16V4Z
1
2 C42610P_0402_50V8KC42610P_0402_50V8K
1
2
C450
0.1U_0402_16V4Z C
450
0.1U_0402_16V4Z
1
2
C444
0.1U_0402_16V4Z C
444
0.1U_0402_16V4Z
1
2
RP20 47_0404_4P2R_5%RP20 47_0404_4P2R_5%
1 42 3
C409
4.7U_0805_10V4Z
C409
4.7U_0805_10V4Z
1
2
C4240.01U_0402_16V7KC4240.01U_0402_16V7K
1
2
C443
0.1U_0402_16V4Z C
443
0.1U_0402_16V4Z
1
2
C42510P_0402_50V8KC42510P_0402_50V8K1
2
C434
0.1U_0402_16V4Z C
434
0.1U_0402_16V4Z
1
2
C4144.7U_0805_6.3V6KC4144.7U_0805_6.3V6K1
2C5740.22U_0603_16V7K
C5740.22U_0603_16V7K
1
2
R282 10K_0402_5%R282 10K_0402_5%1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_BS#0
DDR_B_D26
DDR_B_D29
DDR_B_D27DDR_B_D30
DDR_B_D33
DDR_B_D31
DDR_B_D32
DDR_B_D28
DDR_B_D34DDR_B_D35
DDR_B_D38
DDR_B_D36
DDR_B_D39
DDR_B_D37
DDR_B_D41
DDR_B_D42
DDR_B_D44DDR_B_D40
DDR_B_D43 DDR_B_D47
DDR_B_D48
DDR_B_D45
DDR_B_D46
DDR_B_D49 DDR_B_D53
DDR_B_D51 DDR_B_D55DDR_B_D50
DDR_B_D52
DDR_B_D56
DDR_B_D54
DDR_B_D59
DDR_B_D57
DDR_B_D58
DDR_B_D61
DDR_B_D63
DDR_B_D60
DDR_B_D3
DDR_B_D8
DDR_B_D6DDR_B_D7
DDR_B_D5
DDR_B_D14
DDR_B_D9
DDR_B_D11DDR_B_D10
DDR_B_D13
DDR_B_D16
DDR_B_D15
DDR_B_D12
DDR_B_D17DDR_B_D20
DDR_B_D18 DDR_B_D22DDR_B_D19
DDR_B_D24
DDR_B_D21
DDR_B_D23
DDR_B_BS#2
DDR_B_BS#1
DDR_B_D25
DDR_B_D62
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM3
DDR_B_DM1
DDR_B_DM0
DDR_B_DM6
DDR_B_DM5
DDR_B_MA4
DDR_B_D0
DDR_B_D2
DDR_B_D1
DDR_B_D4
DDR_B_MA11
DDR_B_MA10
DDR_B_MA12DDR_B_MA9
DDR_B_MA6DDR_B_MA8
DDR_B_MA5
DDR_B_MA7
DDR_B_MA3DDR_B_MA0
DDR_B_MA13
DDR_B_MA15
DDR_B_MA2DDR_B_MA1
DDR_B_MA14
DDR_B_DQS2
DDR_B_DQS#0
DDR_B_DQS4
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS5
DDR_B_DQS7
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS#2
DDR_B_DQS#6
DDR_B_DQS#3
DDR_B_DQS1
DDR_B_DQS#5
DDR_B_ODT1
DDR_CKE0_DIMMB
DDR_CS1_DIMMB#
DDR_B_RAS#DDR_B_WE#
DDR_CKE1_DIMMB
DDR_B_CAS#
DDR_CS0_DIMMB#
DDR_B_CLK#2
DDR_B_ODT0
DDR_B_CLK#1DDR_B_CLK1
DDR_B_CLK2
DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_B_D[0..63]
DDR_B_MA[0..15]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_MA12DDR_B_BS#2
DDR_B_MA8
DDR_CS2_DIMMB#DDR_CKE0_DIMMB
DDR_B_MA9
DDR_B_MA5DDR_B_MA3
DDR_B_BS#0DDR_B_WE#
DDR_B_ODT1DDR_CS3_DIMMB#
DDR_CKE1_DIMMBDDR_B_MA15
DDR_B_MA14DDR_B_MA11
DDR_B_MA7DDR_B_MA6
DDR_B_MA4DDR_B_MA2
DDR_B_MA0DDR_B_BS#1
DDR_B_ODT0DDR_B_MA13
DDR_B_RAS#DDR_CS0_DIMMB#
DDR_CS1_DIMMB#DDR_B_CAS#
DDR_B_MA1DDR_B_MA10
MEM_SMBDATAMEM_SMBCLK
DDR_B_MA[0..15](5)
DDR_B_D[0..63](5)
DDR_B_DQS[0..7](5)
DDR_B_DM[0..7](5)
DDR_B_DQS#[0..7](5)
DDR_B_CLK1 (5)DDR_B_CLK#1 (5)
DDR_CKE0_DIMMB(5)
DDR_CS2_DIMMB#(5)DDR_B_BS#2(5)
DDR_B_BS#0(5)DDR_B_WE#(5)
DDR_B_CAS#(5)DDR_CS1_DIMMB#(5)
DDR_B_ODT1(5)
DDR_B_CLK2 (5)DDR_B_CLK#2 (5)
DDR_CS3_DIMMB# (5)
DDR_CS0_DIMMB# (5)
DDR_B_ODT0 (5)
DDR_B_RAS# (5)DDR_B_BS#1 (5)
DDR_CKE1_DIMMB (5)
MEM_SMBDATA(8,15)MEM_SMBCLK(8,15)
+0.9V
+1.8V
+DIMM_VREF+1.8V+1.8V
+0.9V
+3VS
+0.9V
+1.8V
+3VS
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
DDR2 SO-DIMM II
Custom
9 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
DDR2 SO-DIMM II
Custom
9 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
DDR2 SO-DIMM II
Custom
9 42Friday, April 20, 2007
2006/08/18 2007/8/18
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one 0.1uF cap close to every 2 pullup resistors terminated to +0.9V
Change PCB Footprint
DIMM0 REV H:9.2mm (BOT)
C479
0.1U_0402_16V4Z C
479
0.1U_0402_16V4Z
1
2
R286 47_0402_1%R286 47_0402_1%1 2
RP32 47_0404_4P2R_5%RP32 47_0404_4P2R_5%
1 42 3
C630
4.7U_0805_10V4Z
C
630
4.7U_0805_10V4Z
1
2
C471
0.1U_0402_16V4Z
C471
0.1U_0402_16V4Z
1
2
C459
0.1U_0402_16V4Z
C459
0.1U_0402_16V4Z
1
2
C484
0.1U_0402_16V4Z C
484
0.1U_0402_16V4Z
1
2C472
0.1U_0402_16V4Z
C472
0.1U_0402_16V4Z
1
2 C485
0.1U_0402_16V4Z
C485
0.1U_0402_16V4Z
1
2
RP27 47_0404_4P2R_5%RP27 47_0404_4P2R_5%
1 42 3
C632
4.7U_0805_10V4Z
C632
4.7U_0805_10V4Z
1
2
C461
0.1U_0402_16V4Z C
461
0.1U_0402_16V4Z
1
2
RP23 47_0404_4P2R_5%RP23 47_0404_4P2R_5%
1 42 3
C6551000P_0402_50V7K
C6551000P_0402_50V7K
1
2
C624
4.7U_0805_10V4Z
C624
4.7U_0805_10V4Z
1
2
+ C629220U_D2_4VM_R15
+ C629220U_D2_4VM_R15
1
2
C464
0.1U_0402_16V4Z C
464
0.1U_0402_16V4Z
1
2
C458
0.1U_0402_16V4Z C
458
0.1U_0402_16V4Z
1
2
C463
0.1U_0402_16V4Z C
463
0.1U_0402_16V4Z
1
2
C623
4.7U_0805_10V4Z
C623
4.7U_0805_10V4Z
1
2
C481
0.1U_0402_16V4Z C
481
0.1U_0402_16V4Z
1
2
R288 10K_0402_5%R288 10K_0402_5%1 2
RP25 47_0404_4P2R_5%RP25 47_0404_4P2R_5%
1 42 3
C622
4.7U_0805_10V4Z
C622
4.7U_0805_10V4Z
1
2
C6561000P_0402_50V7K
C6561000P_0402_50V7K
1
2
C6541000P_0402_50V7K
C6541000P_0402_50V7K
1
2
C626
4.7U_0805_10V4Z
C626
4.7U_0805_10V4Z
1
2
RP34 47_0404_4P2R_5%RP34 47_0404_4P2R_5%
1 42 3
RP24 47_0404_4P2R_5%RP24 47_0404_4P2R_5%
1 42 3
C465
0.1U_0402_16V4Z C
465
0.1U_0402_16V4Z
1
2
RP22 47_0404_4P2R_5%RP22 47_0404_4P2R_5%
1 42 3
RP26 47_0404_4P2R_5%RP26 47_0404_4P2R_5%
1 42 3
RP30 47_0404_4P2R_5%RP30 47_0404_4P2R_5%
1 42 3
C476
0.1U_0402_16V4Z C
476
0.1U_0402_16V4Z
1
2 C486
0.1U_0402_16V4Z C
486
0.1U_0402_16V4Z
1
2
R287 47_0402_1%R287 47_0402_1%1 2
JP29
FOX_AS0A426-MARG-7F
JP29
FOX_AS0A426-MARG-7F
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
C480
0.1U_0402_16V4Z C
480
0.1U_0402_16V4Z
1
2
RP28 47_0404_4P2R_5%RP28 47_0404_4P2R_5%
1 42 3
RP29 47_0404_4P2R_5%RP29 47_0404_4P2R_5%
1 42 3
C478
0.1U_0402_16V4Z C
478
0.1U_0402_16V4Z
1
2
C457
0.1U_0402_16V4Z C
457
0.1U_0402_16V4Z
1
2
C456
0.1U_0402_16V4Z
C456
0.1U_0402_16V4Z
1
2
C483
0.1U_0402_16V4Z C
483
0.1U_0402_16V4Z
1
2 C482
0.1U_0402_16V4Z C
482
0.1U_0402_16V4Z
1
2 C462
0.1U_0402_16V4Z C
462
0.1U_0402_16V4Z
1
2
C627
4.7U_0805_10V4Z
C627
4.7U_0805_10V4Z
1
2
C633
4.7U_0805_10V4Z
C633
4.7U_0805_10V4Z
1
2
R289 10K_0402_5%R289 10K_0402_5%1 2
C6531000P_0402_50V7K
C6531000P_0402_50V7K
1
2
C469
0.1U_0402_16V4Z C
469
0.1U_0402_16V4Z
1
2
RP31 47_0404_4P2R_5%RP31 47_0404_4P2R_5%
1 42 3
C631
4.7U_0805_10V4Z
C631
4.7U_0805_10V4Z
1
2
C477
0.1U_0402_16V4Z C
477
0.1U_0402_16V4Z
1
2
RP33 47_0404_4P2R_5%RP33 47_0404_4P2R_5%
1 42 3
C455
4.7U_0805_10V4Z
C455
4.7U_0805_10V4Z
1
2
RP35 47_0404_4P2R_5%RP35 47_0404_4P2R_5%
1 42 3
C470
0.1U_0402_16V4Z C
470
0.1U_0402_16V4Z
1
2
C625
4.7U_0805_10V4Z
C625
4.7U_0805_10V4Z
1
2
C466
0.1U_0402_16V4Z C
466
0.1U_0402_16V4Z
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CADIP15H_CADIN15
H_CADIN14H_CADIP14
H_CADIP13H_CADIN13
H_CADIN12H_CADIP12
H_CADIP11H_CADIN11
H_CADIP10H_CADIN10
H_CADIN9H_CADIP9H_CADIN8H_CADIP8
H_CADIP7H_CADIN7
H_CADIP6H_CADIN6
H_CADIN5H_CADIP5
H_CADIP4H_CADIN4
H_CADIP3H_CADIN3
H_CADIN2H_CADIP2H_CADIN1H_CADIP1
H_CADIP0H_CADIN0
H_CLKOP1H_CLKON1
H_CLKON0H_CLKOP0
H_CTLON0H_CTLOP0
H_CADOP15H_CADON15
H_CADOP14H_CADON14
H_CADOP13H_CADON13
H_CADON12H_CADOP12
H_CADOP11H_CADON11
H_CADOP10H_CADON10
H_CADOP9H_CADON9
H_CADOP8H_CADON8
H_CADON7H_CADOP7
H_CADOP6H_CADON6
H_CADOP5H_CADON5
H_CADOP4H_CADON4
H_CADOP3H_CADON3
H_CADOP2H_CADON2
H_CADOP1H_CADON1
H_CADOP0H_CADON0
H_CTLIN0H_CTLIP0
H_CLKIN1H_CLKIP1
H_CLKIP0H_CLKIN0
HTCPU_REQ#HTCPU_STOP#HTCPU_RST#HTCPU_PWRGD
+3.3V_PLL_CPU
+1.2V_PLL_CPU_HT
H_CADIP15 (4)H_CADIN15 (4)
H_CADIN14 (4)H_CADIP14 (4)H_CADIN13 (4)H_CADIP13 (4)H_CADIN12 (4)H_CADIP12 (4)H_CADIN11 (4)H_CADIP11 (4)H_CADIN10 (4)H_CADIP10 (4)H_CADIN9 (4)H_CADIP9 (4)H_CADIN8 (4)H_CADIP8 (4)
H_CADIN7 (4)H_CADIP7 (4)H_CADIN6 (4)H_CADIP6 (4)H_CADIN5 (4)H_CADIP5 (4)H_CADIN4 (4)H_CADIP4 (4)H_CADIN3 (4)H_CADIP3 (4)H_CADIN2 (4)H_CADIP2 (4)H_CADIN1 (4)H_CADIP1 (4)H_CADIN0 (4)H_CADIP0 (4)
H_CLKON1(4)H_CLKOP1(4)H_CLKON0(4)H_CLKOP0(4)
H_CTLON0(4)H_CTLOP0(4)
H_CADOP15(4)H_CADON15(4)
H_CADOP14(4)H_CADON14(4)
H_CADOP13(4)H_CADON13(4)
H_CADOP12(4)H_CADON12(4)
H_CADOP11(4)H_CADON11(4)
H_CADOP10(4)H_CADON10(4)
H_CADOP9(4)H_CADON9(4)
H_CADOP8(4)H_CADON8(4)
H_CADON7(4)H_CADOP7(4)H_CADON6(4)H_CADOP6(4)H_CADON5(4)H_CADOP5(4)H_CADON4(4)H_CADOP4(4)H_CADON3(4)H_CADOP3(4)H_CADON2(4)H_CADOP2(4)H_CADON1(4)H_CADOP1(4)H_CADON0(4)H_CADOP0(4)
H_CTLIP0 (4)H_CTLIN0 (4)
H_CLKIN1 (4)H_CLKIP1 (4)H_CLKIN0 (4)H_CLKIP0 (4)
HTCPU_STOP# (6)HTCPU_RST# (6)HTCPU_PWRGD (6)
CPUCLK (6)CPUCLK# (6)
H_THERMTRIP#(6)PROCHOT#(6)
+3VS
+1.2V_HT
+1.2V_HT
+1.2V_HT
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
MCP67 HT LINK
Custom
10 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
MCP67 HT LINK
Custom
10 42Friday, April 20, 2007
2006/08/18 2007/8/18 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
ICW50 / ICY70 LA-3581P 1.0
MCP67 HT LINK
Custom
10 42Friday, April 20, 2007
2006/08/18 2007/8/18
9/25 Modify TO +3VS
L13MBK1608121YZF_0603 L13MBK1608121YZF_0603
1 2C1010.1U_0402_16V4ZC1010.1U_0402_16V4Z1
2
R1232.37K_0402_1%
R1232.37K_0402_1%
1
2
TP4 PADTP4 PAD
C464.7U_0805_10V4Z
C464.7U_0805_10V4Z
1
2
R364 150_0402_1%
R364 150_0402_1%
1 2
C14110U_0805_10V4ZC14110U_0805_10V4Z
1
2
R16422K_0402_5%
R16422K_0402_5%
1
2
L7MBK1608121YZF_0603 L7MBK1608121YZF_0603
1 2
PART 1 OF 8
HT
MCP67U23A
MCP67-MV_PBGA836
PART 1 OF 8
HT
MCP67U23A
MCP67-MV_PBGA836
HT_MCP_RXD0_PAF16HT_MCP_RXD0_NAG16HT_MCP_RXD1_PAH16HT_MCP_RXD1_NAJ16HT_MCP_RXD2_PAJ15HT_MCP_RXD2_NAK15HT_MCP_RXD3_PAK16HT_MCP_RXD3_NAL16HT_MCP_RXD4_PAG17HT_MCP_RXD4_NAF17HT_MCP_RXD5_PAL17HT_MCP_RXD5_NAK17HT_MCP_RXD6_PAL18HT_MCP_RXD6_NAK18HT_MCP_RXD7_PAJ19HT_MCP_RXD7_NAK19
HT_MCP_RXD8_PAD14HT_MCP_RXD8_NAE14HT_MCP_RXD9_PAF14HT_MCP_RXD9_NAG14HT_MCP_RXD10_PAH14HT_MCP_RXD10_NAJ14HT_MCP_RXD11_PAL13HT_MCP_RXD11_NAK13HT_MCP_RXD12_PAC15HT_MCP_RXD12_NAD15HT_MCP_RXD13_PAD16HT_MCP_RXD13_NAE16HT_MCP_RXD14_PAE17HT_MCP_RXD14_NAD17HT_MCP_RXD15_PAB17HT_MCP_RXD15_NAC17
HT_MCP_RX_CLK0_PAJ17HT_MCP_RX_CLK0_NAH17HT_MCP_RX_CLK1_PAL14HT_MCP_RX_CLK1_NAK14
HT_MCP_RXCTL0_PAH19HT_MCP_RXCTL0_NAG19HT_MCP_RXCTL1_P/RESERVEDAC18HT_MCP_RXCTL1_N/RESERVEDAD18
THERMTRIP#/GPIO_58AC13PROCHOT#/GPIO_20AB13
+3.3V_PLL_CPUAB16
+1.2V_PLL_CPU_HTAB15
HT_MCP_COMP_VDDAM12
HT_MCP_COMP_GNDAL12
HT_MCP_TXD0_P AK27HT_MCP_TXD0_N AJ27HT_MCP_TXD1_P AK26HT_MCP_TXD1_N AL26HT_MCP_TXD2_P AK25HT_MCP_TXD2_N AL25HT_MCP_TXD3_P AL24HT_MCP_TXD3_N AK24HT_MCP_TXD4_P AK22HT_MCP_TXD4_N AL22HT_MCP_TXD5_P AK21HT_MCP_TXD5_N AL21HT_MCP_TXD6_P AH21HT_MCP_TXD6_N AJ21HT_MCP_TXD7_P AL20HT_MCP_TXD7_N AM20
HT_MCP_TXD8_P AG27HT_MCP_TXD8_N AH27HT_MCP_TXD9_P AF25HT_MCP_TXD9_N AG25
HT_MCP_TXD10_P AH25HT_MCP_TXD10_N AJ25HT_MCP_TXD11_P AE23HT_MCP_TXD11_N AF23HT_MCP_TXD12_P AD21HT_MCP_TXD12_N AE21HT_MCP_TXD13_P AF21HT_MCP_TXD13_N AG21HT_MCP_TXD14_P AC20HT_MCP_TXD14_N AD20HT_MCP_TXD15_P AE19HT_MCP_TXD15_N AF19
HT_MCP_TX_CLK0_P AK23HT_MCP_TX_CLK0_N AJ23HT_MCP_TX_CLK1_P AG23HT_MCP_TX_CLK1_N AH23
HT_MCP_TXCTL0_P AK20HT_MCP_TXCTL0_N AJ20
RESERVED/HT_MCP_TXCTL1_P AD19RESERVED/HT_MCP_TXCTL1_N AC19
HT_MCP_REQ# AD23HT_MCP_STOP# AB20
HT_MCP_RST# AC21HT_MCP_PWRGD AD22
CLKOUT_200MHZ_P AL28CLKOUT_200MHZ_N AM28
CLKOUT_25MHZ AK28
CPU_SBVREF AG28
CLK200_TERM_GND AJ28R366 150_0402_1%
R366 150_0402_1%
1 2
C1360.1U_0402_16V4ZC1360.1U_0402_16V4Z
1
2
C430.1U_0402_16V4ZC430.1U_0402_16V4Z
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_GTX_C_MRX_N14PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P0PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P9PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P1PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P10PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P2PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P11PCIE_GTX_C_MRX_N11PCIE_GTX_C_MRX_P12PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P3PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N8PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P13PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P7PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P5PCIE_GTX_C_MRX_N5PCIE_GTX_C_MRX_P6PCIE_GTX_C_MRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N1PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P10PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P5
PCIE_MTX_C_GRX_P7PCIE_MTX_C_GRX_N7PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N8PCIE_MTX_C_GRX_P9PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N11PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N0PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_N1PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6
PCIE_MTX_GRX_P8
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MRX_PTX_P1_RPCIE_MRX_PTX_N1_R
PCIE_MRX_PTX_P3_RPCIE_MRX_PTX_N3_R
PCIE_MTX_PRX_P1PCIE_MTX_PRX_N1
PCIE_MTX_C_PRX_P1PCIE_MTX_C_PRX_N1
PCIE_MTX_C_PRX_N3PCIE_MTX_C_PRX_P3PCIE_MTX_PRX_P3
PCIE_MTX_PRX_N3
CLK_PCIE_CARD#CLK_PCIE_CARD
CLK_PCIE_VGA#CLK_PCIE_VGA
CLK_PCIE_MINI1#CLK_PCIE_MINI1
PE_RST0#
MCP_PCIE_WAKE#
PCIE_RST1#
+1.2V_PLL_PE1
+1.2V_PLL_PE_SS1PCIE_RST#
HT_VLD
PE_RST0#
PCIE_RST1# PCIE_RST#
+3.3V_PLL_PE_SS1
PCIE_MRX_PTX_P2_RPCIE_MRX_PTX_N2_R PCIE_MTX_C_PRX_N2
PCIE_MTX_C_PRX_P2PCIE_MTX_PRX_P2PCIE_MTX_PRX_N2
CLK_PCIE_MINI2#CLK_PCIE_MINI2
PEA_PRSNT#
PEB_PRSNT#
PEC_PRSNT#
PEA_PRSNT#
PEC_PRSNT#
PEB_PRSNT#
PEA_PRSNT#
PEB_PRSNT#
PEC_PRSNT#
EXP_CLKREQ#
MINI2_CLKREQ#
MINI1_CLKREQ#PEA_PRSNT#
PCIE_GTX_C_MRX_N[0..15](18)
PCIE_GTX_C_MRX_P[0..15](18) PCIE_MTX_C_GRX_P[0..15](18)
PCIE_MTX_C_GRX_N[0..15](18)
PCIE_MRX_PTX_P1(26)PCIE_MRX_PTX_N1(26)
PCIE_MRX_PTX_P3(25)PCIE_MRX_PTX_N3(25)
PCIE_MTX_C_PRX_P1 (26)PCIE_MTX_C_PRX_N1 (26)
PCIE_MTX_C_PRX_P3 (25)PCIE_MTX_C_PRX_N3 (25)
CLK_PCIE_CARD (26)CLK_PCIE_CARD# (26)
EXP_CLKREQ#(26)
MINI1_CLKREQ#(25)
CLK_PCIE_VGA# (18)CLK_PCIE_VGA (18)
CLK_PCIE_MINI1 (25)CLK_PCIE_MINI1# (25)
PE_PRSNTX16#(18)
MCP_PCIE_WAKE#(25,26,27)
PCIE_RST# (18,26)
HT_VLD(15,31)
PCIE_RST1# (25)
PCIE_MRX_PTX_P2(25)PCIE_MRX_PTX_N2(25)
MINI2_CLKREQ#(25)
PCIE_MTX_C_PRX_P2 (25)PCIE_MTX_C_PRX_N2 (25)CLK_PCIE_MINI2 (25)CLK_PCIE_MINI2# (25)
CP_PE#(14,26)
+3VS
+1.2VS
+1.2VS
+3V
+3V
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST
