#7 - Microprogrammed Control

8/12/2019 #7 - Microprogrammed Control

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MICROPROGRAMMEDCONTROL


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Overview

The control unit initiates the sequences of microoperations. Every system has a finite number of microinstruction types. Complexity of the digital system is derived from the no. of

sequences of microoperations that are performed. The control function which specifies a microoperation is a

binary variable. n a bus organised system! the control signals that specify

microoperations are groups of bits that select the paths inmultiplexers! decoders and "#$ c%ts.


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Overview

The control variables at any given time can be represented by

a string of &s and 's called a control word . Control words can be programmed to perform various

operations on system components. " control unit whose binary control variables are stored in

memory is called a Microprogrammed Control (nit .


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Terminology

Microprogram Program stored in memory that generates all the control signals

required to execute the instruction set correctly

Consists of microinstructions Microinstruction

Contains a control word and a sequencing word Control Word - All the control information required for one clock cycle

Sequencing Word - Information needed to decide the next microinstructionaddress

Vocabulary to write a micro rogram


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Terminology

Control Memory (CM) Storage in the microprogrammed control unit to store the

microprogram ROM

Writeable Control Memory CM whose contents can be modified Allows the microprogram can be changed

Instruction set can be changed or modified

ynamic Microprogramming Computer system whose control unit is implemented with a

microprogram in Writable CM

Microprogram can be changed by a systems programmer or a user


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Microprogrammed ControlOrganisation

!e"tAddress

#enerator (Se$uencer)

Control

AddressRegister

Control

Memory(ROM)

Control

ataRegister

!xternalIn ut

ControlWord

"ext Address Information


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Microprogram e!"encer

The )ext "ddress *enerator is also called the Microprogramsequencer.

+etermines the address sequence to be read from controlmemory

Many ways of specifying addresses depending on sequencerinputs.

,unctions of sequencer include ncrementing control register by one $oad an address from control memory into C"- Transfer an external address $oad an initial address to start the control operations.


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Control Address Register pecifies the address of microinstructions "fter execution of the operations specified in the microinstruction!

the control must determine the next microinstruction/s address. The address of next microinstruction is a function of some bits of

current instruction and external 0p.

1hile the current microinstruction is being executed! the nextaddress is generated in )"* and is transferred to C"- to read thenext microinstructions.

Thus a microinstruction contains bits for initiating microoperations in the data processor part and bits that determine the address sequence for the control memory.


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Control Memory The control memory holds a fixed microprogram. The microprogram consists of microinstructions that specify

various control signals for execution of registermicrooperations.

Each machine instruction in main memory initiates a series ofmicroinstructions in control memory.

These microinstructions generate the microoperations to ,etch the instruction from main memory Evaluate the effective address Execute the operation specified by the instruction -eturn control to fetch phase to repeat the cycle for next

instruction.


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Control Data Register

2olds the present microinstruction while the next address iscomputed and read from memory.

"lso called 3ipeline -egister .

"llows execution of microinstruction simultaneously withgeneration of next instruction. This necessitates a two4phase cloc%! one cloc% applied to the

address register and the other to the data register each.


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P C i n

P C o u t

M A R i

n

R e a d

M D R o

u t

I R i n

Y i n

S e l e c t

A d d Z i n Z o

u t

R 1 o u

t

R 1 i n

R 3 o u

t

W M F C

E n d

0

1

0

0

0

0

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1

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Micro -instruction

1

2

3

4

5

6

7

An example Microinstruction

Assuming Select-Y to be represented bySelect=0 and Select-4 by Select=1


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"$ro"tines Microinstructions are stored in control memory in groups! each

group specifying a routine . ubroutines are 3rograms used by other routines to accomplish

a particular tas%. " subroutine can be called from any point within the main body

of the microprogram. ame subroutine can be called from many microprograms. 2elps in reducing si6e of microprograms. )eed to store the return address during the subroutine call. ncremented o0p from C"- goes to a ubroutine -egister 7-

and execution branches to beginning of subroutine. 7- becomes source of return address.


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Address e!"encing When computer is switched on !A" is loaded

with an initial address pointing to #irstmicroinstruction that acti$ates the #etchroutine%

&etch routine is se'uenced by incrementing the

!A" through the rest o# microinstructions% At end o# #etch routine the instruction is in ("% )he address o# operand needs to be calculated% *its in machine instruction speci#y $arious

addressing modes% Mode bits decide the the conditions which

chose the branch microinstruction which isused to calculate e##ecti$e address%


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Address e!"encing At end o# address calculation routine the

address o# operand is in MA"% Microinstructions to execute the instruction

#etched #rom memory need to be generated% Microoperation steps generated in process

registers depend on opcode% +ach instruction has its own microprogram

routine stored in a gi$en location o# control

memory% )rans#ormation #rom the instruction code bits to an

address in control memory where the routine islocated is called mapping process%


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Address e!"encing A mapping procedure is a rule that trans#orms

the instruction code into a control memoryaddress%

,nce the re'uired routine is reached themicroinstruction that execute the instructionmay be se'uenced by incrementing the !A"%

Microprograms that use subroutines re'uire anexternal register #or storing the return address%

At end o# instruction execution control returnsto #etch routine by executing an unconditionalbranch microinstruction to #irst address o##etch routine%


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Address e!"encing Address se'uencing capabilities re'uired in

control memory are Incrementing of the control address register #CA$% &nconditional and conditional branches A ma ing rocess from the bits of the machine instr to an

address for C' A facility for subroutine call and return


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Selection of Address for Control Memory


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&RANC'ING (PECIAL &IT The status conditions are special bits in the system that

provide parameter information such as the carry4out of anadder! the sign bit of a number! the mode bits of aninstruction! and input or output status conditions.

nformation in these bits can be tested and actions initiatedbased on their condition? whether their value is & or '.

The status bits! together with the field in the microinstructionthat specifies a branch address! control the conditional branchdecisions generated in the branch logic.


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&RANC'ING LOGIC The simplest way is to test the specified condition and branch to

the indicated address if the condition is met@ otherwise! theaddress register is incremented. This can be implemented with amultiplexer. uppose that there are eight status bit conditions in the system.

Three bits in the microinstruction are used to specify any one ofeight status bit conditions. These three bits provide the selectionvariables for the multiplexer.

f the selected status bit is in the & state! the output of themultiplexer is &@ otherwise! it is '. " & output in the multiplexer

generates a control signal to transfer the branch address from themicroinstruction into the control address register. " ' output in themultiplexer causes the address register to be incremented.


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)NCONDITIONAL &RANC'ING "n unconditional branch microinstruction can be implemented

by loading the branch address from control memory into thecontrol address register.

This can be accomplished by fixing the value of one status bit

at the input of the multiplexer! so it is always equal to &. " reference to this bit by the status bit select lines fromcontrol memory causes the branch address to be loaded intothe control address register unconditionally.


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MAPPING " special type of branch exists when a microinstruction

specifies a branch to the first word in control memory where amicroprogram routine for an instruction is located.

The status bits for this type of branch are the bits in the

operation code part of the instruction.


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Mapping o# Instr"ctions to Microro"tines

4 bits that can specify upto16 distinct instructions

7 bits that can specify upto128 distinct words in the

control memory


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)&RO)TINE " subroutine can be called from any point within the main body of the

microprogram. Microprograms that use subroutines must have a provision for storing

the return address during a subroutine call and restoring the addressduring a subroutine return. This may be accomplished by placing the

incremented output from the control address register into a subroutineregister and branching to the beginning of the subroutine.

The subroutine register can then become the source for transferringthe address for the return to the main routine.

The best way to structure a register file that stores addresses for

subroutines is to organi6e the registers in a last4in! first4out ;$ ,5=stac%.

T M i


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Two Memories Main memory Control Memory

4 registers associated to processor

unit PC ! "! ccumulator C

2 registers associated to C# C ! $ubroutine !egister $%!

Transfer of info in registers in

processor done through mu& '$# performs microop with data

from C and "! and places resultin C

Memory recei(es address from !and "ata written to or read from

memory goes to "!

M%&

' AR

Address Memory*+ " ',

' -C

M%&

'. , , R

S/R CAR

Control memory' + " Arithmetic

logic andshift unit

Control unit

'.AC

omp"ter '*on#ig"ration


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5pcode "ddress

Instr"ction %ormat 15 14 11 10 0

ymbol 5pcode +escription

"++ '''' "C "C 8 M 9 E" :

7-")C2 '''& f ;"CC2")*E ''&& "C M 9 E" :! M 9 E" : "C

EA is the effective Address


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Microinstr"ction

A A A B B

MICROINSTRUCTION ORMAT

,& ,B ,A C+ 7- "+

1! "! # $ Microo%er&tion field ' s%ecify microo%er&tionsC( $ Condition for )r&nchin* ' select st&t+s )it conditions

,R $ ,r&nch field ' s%ecify the ty%e of )r&nch to )e +sedA( $ Address field ' cont&in & )r&nch &ddress


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Microoperations %ield + , + - . $its +ivided into A fields of A bits each. A bits in each field specify distinct microoperations. TotalDB& 5ne microinstruction can chose maximum A microoperations. " field uses code ''' to show no4operation. ,or example +- M9"-:! 3C 3C8& pecified as ''' &'' &'& B or more conflicting microops cannot be specified simultaneously

eg. '&' ''& '''

0' Microoperation Symbol 0 Microoperation Symbol 01 Microoperation Symbol !one !O- !one !O- !one !O-

' AC 2 AC 3 R A ' AC 2 AC 4 R S%/ ' AC 2 AC R &OR

' AC 2 C5RAC ' AC 2 AC R OR ' AC 2 AC6 COM'' AC 2 AC 3 ' I!CAC '' AC 2 AC R A! '' AC 2 shl AC S75

' AC 2 R R8AC ' R 2 M9AR: R;A ' AC 2 shr AC S7R

' ' AR 2 R( 4' ) R8AR ' ' R 2 AC AC8 R ' ' -C 2 -C 3 ' I!C-C

'' AR 2 -C -C8AR '' R 2 R 3 ' I!C R '' -C 2 AR AR8-C''' Reser


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Condition %ield / &its C+ D '' always finds condition as T-(E. 1hen used in

conjunction with 7-;7ranch= field it provides an unconditionalbranch operation.

ndirect bit is available from bit & of +- after an instructionis read from memory.

ign bit of "C provides next status bit. Fero value F is a binary variable whose value is equal to & if all

bits in "C are aero

C Condition Symbol Comments

Always = ' % %nconditional branch

' R('.) I Indirect address bit

' AC('.) S Sign bit of AC

'' AC = > >ero


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&ranc0 %ield / &its sed in con.unction with address #ield A/ to chose the address o# next

microinstruction% M and !A22 are similar except that a !A22 microinstruction stores thereturn address in S*"%

)he .ump and call operations depend on $alue o# !/ #ield% (# status bitcondition speci#ied in !/ is 1 the next address in A/ is trans#erred to !A"otherwise !A" is incremented by 1%

3alue o# 10 in *" causes a return #rom subroutine% )his causes the trans#ero# return address #rom S*" to !A"% *"=11 causes mapping #rom operation code #ield o# the instruction to an

address #or !A"%

/R Symbol 0unction ?M- CAR 2 A if condition = '

CAR 2 CAR 3 ' if condition = ' CA55 CAR 2 A @ S/R 2 CAR 3 ' if condition = '

CAR 2 CAR 3 ' if condition = ' R;8 CAR 2 S/R (Return from subroutine)'' MA- CAR( 4.) 2 R(''4'*)@ CAR( @'@,) 2


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Selection of Address for Control Memory


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Microprogram

e!"encer%or aControlMemory


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Microprogram e!"encer 7asic components of microprogrammed control unit

Control memory C%t that selects the next address G microprogram

sequencer

M presents an address to the control memory sothat a microinstruction may be read and executed.

" typical sequencer has a subroutine register stac%

about H4I levels deep so that a no. of subroutines canbe active simultaneously.


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Ne,t Address Logic

The next address logic of the sequencer determinesthe specific address source to be loaded into theC"-.

The choice of the address source is guided by thenext address information bits that the sequencerreceives from the current microinstruction.


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Ne,t Microinstr"ction Address Logic


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Condition 1 &ranc0 Logic

"etermines the type of operations a(ailable in the se)uencer unit*

$+ and $1 select one of the src addresses for C ! ' enables the load ,-p in $%!


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#7 - Microprogrammed Control

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