CHAPTER 16 MICROPROGRAMMED CONTROL

CHAPTER 16MICROPROGRAMMED CONTROL

F O R :

D R . H . W A T S O N

FLORIDA INTERNATIONAL UNIVERSITY – ENGINEERING CENTERSUMMER 2011

B Y :

F R A N C I S C O V A S Q U E ZS H I N A A H M A D

C A R L O S F E R N A N D E ZN I N G Y U A N W A N GM I G U E L R O N D O N

C A R L O S L A G U E R R EM I C H A E L B O Z A

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Chapter # 16: Microprogrammed Control

Basic Concepts Microinstructions Microprogrammed Control Unit Wilkes Control Advantages and Disadvantage

Microinstruction Sequencing Design Considerations Sequencing Techniques Address Generation LSI–11 Microinstruction Sequencing

Microinstruction Execution A Taxonomy of Microinstructions Microinstruction Encoding LSI–11 Microinstruction Execution IBM 3033 Microinstruction Execution

TI 8800 Microinstruction Format Microsequencer Registered ALU

Topics:

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Registers diagram:

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ALU Registers Internal data paths External data paths Control Unit

Basic Elements of a Processor:

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Sequencing Causes the CPU to step through a series of micro-

operations Execution

The Control Unit causes each micro-operation to be performed (Using control signals)

Functions of Control Unit:

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Data Paths and Control Signals:

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Transfer data between registers Transfer data from register to external (Memory,

I/O) Transfer data from external to register Perform arithmetic or logical operations

Types of Micro-operations:

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A microprogram has a sequence of instructions in a microprogramminglanguage. This are very simple instructions that specify

micro-operations.

Microprogrammed Control:

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As in a hardwired control unit, the control signal generated by a microinstruction are used to cause register transfers and ALU operations .

Use sequences of instructions to control complex operations.

Called micro-programming or Firmware.


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All the control unit does is generate a set of control signals.

Each control signal is on or off. Represent each control signal by a bit. Have a control word for each micro-operation. Have a sequence of control words for each

machine code instruction. Add an address to specify the next micro-

instruction, depending on conditions.


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Typical Microinstruction Formats:

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Organization of Control Memory:

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Control Unit:

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Functioning of Microprogrammed Control Unit:

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Processor block diagram example:

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Wilkes Control - Diode Matrix:

A diode memory is just a collection of diodes connected in a matrix.

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Wilkes’s Microprogrammed Control Unit:

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Developed by Maurice Wilkes in the early 1950s Matrix partially filled with diodes During cycle, one row is activated

Generates signals where diode present First part of row generates control Second part generates address for next cycle

Wilkes Control – key points:

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Hardwired: It is difficult to design and test such piece of hardware. The design is relatively inflexible. For example to add a

new instruction. It is relatively faster.

Microprogrammed: Simplifies design of Control Unit Cheaper Less error-prone Slower

Advantages and disadvantages:

MICROINSTRUCTION SEQUENCING

1- Design Considerations2- Sequencing Techniques3- Address Generation4- LSI-11 Microinstruction Sequencing

Design Considerations

• Determined by Instruction Register• Next sequential address• Branch.

Sequencing Techniques

• Two address fields• Single address field• Variable format

Two Address FieldsControl address

register

Address Decoder

Control memory

Control Address1

Address2

Branchlogic

Multiplexer

Instruction Register

Flags

Address Selection

Single Address Field

Variable FormatAddress Decoder

Control Memory

Gate and

function logic

+1Control address register

Branchlogic

Multiplexer

Instruction Register

Flags

Control Buffer Register

Entire FieldBranch control field Address field

Address Selection

Description and Advantages

• Introduced by M. V. Wilkes in 1951• Storage of Micro-Instruction• Sequences• Hardwire Vs Micro-Instruction• Advantages & Disadvantages

Hardwire Control

Microinstruction Address Generation Techniques

Explicit Implicit

Two-Field Mapping

Unconditional branch Addition

Conditional branch Residual control

Explicit Memory Address Generation

• Address Location• Two Field Approach• Conditional Branch Instruction

Implicit Memory Address Generation

• Control Memory• Mapping Approach• Adding Approach

Microinstruction Execution

A Taxonomy of Microinstruction &

Microinstruction Encoding

Ninyuan Wang

Microinstruction Cycle

The basic event on a microprogrammed processor.

Two parts: fetch and execute. Fetch: determined by the generation

of a microinstruction address.

Execute› The effect of the execution of a

microinstruction is to generate control signals.

› Some of these signals control points internal to the processor.

› The remaining signals go to the external control bus or other external interface.

› As an incidental function, the address of the next microinstruction is determined.

A Taxonomy of Microinstructions

Microinstructions can be classified in a variety of ways. Distinctions that are commonly made in the literature include the following: Vertical/horizontal Packed/unpacked Hard/soft microprogramming Direct/indirect encoding

How to Encoding

K different internal and external control signals to be driven by the control units.

In Wilkes’s scheme:› K bits of the microinstruction would be

dedicated to this purpose.› possible combinations of control signals to

be generated during any instruction cycle.

Not all be used – can do better› Two sources cannot be gated to same

destination.› A register cannot be both source and

destination.› Only one pattern of control signals can

be presented to ALU at a time.› Only one pattern of control signals can

be presented to external control bus at a time.

Require which can be encoded with bits.

In practice, this form of encoding is not used, for two reasons:› It is as difficult to program as pure

decoded (Wilkes) scheme.› It is requires complex and therefore slow

control logic module. Instead, some compromises are made.

These are of two kinds:› More bits than necessary used to encode

the possible combination.› Some combinations that are physically

allowable are not possible to encode.

Microinstruction Encoding

In practice, microprogrammed control units are not designed using a pure unencoded or horizontal microinstruction format.

The basic technique for encoding is illustrated in Figure 16.11a.

The microinstruction is organized as a set of fields.

Each field contains a code, which, upon decoding, activates one or more control signals.

The design of an encoded microinstruction format can now be stated in simple terms:

Organize the format into independent fields.› Each field depicts set of actions (pattern of

control signals) › Actions from different fields can occur

simultaneously Alternative actions that can be

specified by a field are mutually exclusive› Only one action specified for field could

occur at a time

Machine Structure

Machine Structure cont.

Processor Detail

LSI-11First member of the PDP-11 family.

Offered as a single board processor.

Board consists of 3 LSI chips, internal bus, and interfacing logic.

Q-Bus board LSI 11/2 CPU

Q busThe Q-bus was one of several bus

technologies used with PDP computer systems.

Over time, the physical address range of the Q-bus was expanded from 16 to 18 and then 22 bits. Block transfer modes were also added to the Q-bus.

LSI-11 cont.The three LSI are

the data, control, and control store chips.

Data ChipData chip contains an 8 bit ALU, twenty six 8

bit registers, and CCR storage.Registers include PSW, MAR and MBR.Sixteen of the twenty six 8 bit registers are

used to implement the eight 16 bit PDP-11 general purpose registers.

ALU needs 2 passes to implement the 16 bit arithmetic.

Control store chip22 bit wide control memory.More than one control store chip could be

used.Logic for sequencing and executing

instructions are stored in this chip.Registers include CAR, CDR, and a copy of

the IR.

Men In Black?MIBTies all components together.During fetch:Control chip generates 11 bit address.Control store chip uses this to produce a 22

bit microinstruction.Low order 16 bits go to data chip, low order

18 bits to the control chip and high order 4 bits to bus control and processor board logic.

LSI-11 MicroinstructionVertical, 22 bit wide microinstruction format.High order 4 bits control special functions on

processor board.Translate bit enables the translation array to

check for interrupts.Load return register bit enables the next

microinstruction address to be loaded from the return register.

The remaining 16 bits are used for encoded micro operations.

IBM 3033Memory consists of 4k words.Addresses 0000-07FF contain 108 bit

microinstructions.Addresses 0800-0FFF contain 126 bit

microinstructions.Horizontal format.

IBM 3033 contALU inputs are four dedicated registers. A, B,

C, and D.These registers are non-user-visible.Microinstruction format contains fields to

load these registers from user visible registers.

The ALU results are stored in user visible registers.

IBM 3033 MI Format

TI 8800 SDB

The TI 8800 is a 32 bit programmable microprocessor chip equipped with: Writeable control

store Implemented in

RAM rather than ROM

Usage consist of:Educational

implementationsUseful in creating

multifunctional prototypes

Etc….

OBJECTIVE

creating logic controls through basic interconnections are diffi cult to:

Analyze DesignModify

Solution:Develop microinstructions to attain the control settings

WHY MICROPROGRAMMING

Def.An instruction that controls data flow and instruction-execution sequencing in a processor

Not visible or changeable by a programmer

Only run on its designated processorMicrocode differs from one machine to the next

MICROINSTRUCTION

The format for the 8800 comprise of 128 bits decoded into 30 functional fields.The field are categorized in 5 groups:Control of board 8847 floating-point and integer

processor chip8832 registered ALU8818 microsequencerWCS data field

8800 MICROINSTRUCTION FORMAT

Main components consist of:Microcode

memoryMicrosequencer 32-bit ALUFloating-point

and integer processor

Local data memory

TI 8800 SDB STRUCTURE

The 8818 Microsequencer fetch next microinstruction address then send it to the microcode memory from 5 different locations.

MICROSEQUENCER

Controlled by a 12-bit microinstruction

OSEL (1bit) SELDR (1bit) ZEROIN (1bit) RC2-RC0 (3bits) S2-S0 (3bits) MUX2-MUX0 (varies)

Example:Instruction is INC88181 = 000000111110

Decoded into OSEL = 0 SELDR = 0 ZEROIN = 0 R = 000 S = 111 MUX = 11

CONTROLLING THE MICROSEQUENCER

8818 MICROSEQUENCER INSTRUCTIONS

SN74ACT8847 FLOATING-POINT AND INTEGER PROCESSOR

FLOATING POINT AND INTEGER PROCESSOR

• INCLUDED ARE FIELDS 7-16

• THERE IS A TOTAL OF 32-BITS INVOLVED

SN74ACT8832 32-BIT REGISTERED ALU

32-BIT REGISTERED ALU

• INCLUDED ARE FIELDS 17-27

• CAN BE CONFIGURE TO WORK AS 4-8BIT ALU, 2-16BIT ALU, OR 1-32BIT ALU

• THERE IS A TOTAL OF 32-BITS INVOLVED BUT WITH INPUTS AND SETTINGS OF THE ALU THERE ARE 39 BITS

• FIELD 27 PROVIDES OPCODE OF OPERATION TO BE PERFORMED BY ALU

WE WANT TO ADD CONTENTS OF REGISTER 1 TO CONTENTS OF REGISTER 2 AND PUT THE RESULT ON REGISTER 3

CONT11 [17], WELH, SELRYFYMX, [24], R3, R2, R1, PASS+ ADD

CONT11 [17], WELH, SELRYFYMX, [24], R3, R2, R1, PASS+ ADD

•CONT11 [17] Basic NOP instruction

•WELH Field 17 changed to WELH (Write Enable Lo and Hi)

•SELRYFYMX Field 18 changed to SELRYFYMX (select feedback from ALU Y MUX output)

•R3 Field 24 changed to designate R3 as destination register

•R2 Field 25 changed to designate R2 as a source register

•R1 Field 26 changed to designate R1 as a source register

•PASS+ ADD Field 27 changed to specify ALU to ADD. PASS to denote ALU not to shift.

• GROUP 1 MUST BE USED ALONGSIDE WITH GROUP; AT NO TIME SHOULD GROUP BE USED WITH GROUPS 3-5

• NOT NECESSARY TO DENOTE FIELDS WHEN CONSECUTIVE FIELDS ARE USED

• GROUP 1 AND 2 ARE FOR ARITHMETIC FUNCTIONS• GROUP 3-5 ARE FOR LOGICAL FUNCTIONS

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WSC DATA FIELD

QUESTIONS

NAME AN INPUT TO THE CONTROL UNIT

WHAT PICKS UP THE NEXT INSTRUCTION FROM THE CONTROL STORE AND SENDS IT TO MICROMEMORY

QUESTIONS


CLOCK, ALU FLAGS, IR, CAR


QUESTIONS


CLOCK, ALU FLAGS, IR, CAR


MICROSEQUENCER 8818

MORE QUESTIONS

HOW MANY BITS IS THE MICROINSTRUCTIONFORMAT FOR THE TI8800 PROCESSOR

WHAT ARE THE TWO MAIN FUNCTIONS OF THE CONTROL UNIT

WHAT IS THE FORMAT OF THE LSI-11 MICROINSTRUCTION

CHAPTER 16 MICROPROGRAMMED CONTROL

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