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Semtech Patrick Diamond PhD Director Systems Engineering
Network Synchronization
Tel Aviv IsraelJune 14, 2007
Patrick Diamond PhD
Director Systems Engineering
Advanced Communications and Sensing
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Semtech Patrick Diamond PhD - Director Systems Engineering
A synchronous network is one that provides a common clock.
- Voice and Video are isosynchronous types of information
- Data is asynchronous
- The circuit that carries these info types is synchronous and
provides the ingress and egress clocks.
Network Service providers implement BITS and SSU machines in their
central and serving offices to deliver the network clock to the network
equipment.
A network is synchronized if all elements operate on the same Epoch.
A network is syntonized if all elements operate at the same frequency.
What makes a Network Synchronous?
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Basic System Reference Clock Architectures
Autonomous - No system reference clock or clock distribution system. Line
cards generate local clocks. Depends upon logic buffers and inter-card
memory stores for data stability. No protection switching or frequency/phase
transient control. Not capable of performing SSM or clock transit node
functions.
Centralized - Centralized reference clock generation and distribution.
Protection switching capability typically limited to frequency matching. Not
capable of input to output phase build-out control. Cannot correct for phasedisturbances. Line cards have same limitations.
Distributed - Reference clock generation and distribution with phase build-out
and frequency control on clock card and selected line cards.
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Why is Synchronization so Important to Services Delivery?
Transport Networks of the last 20 years have always been built using
the circuit technology E-1, T1, SDH and Sonet.
These transport techniques have a fundamental need for physical
layer clock synchronization.
The BIT rate and the Line utilization are always the same value, ie an E1
has 2048 bit periods as well as 2048 clock cycles.
The Network Clock provides the perpetual heartbeat for the
services using the network. The source of the Network Clock is a caesium beam oscillator located
in a GPS satellite, a BITS or SASE. This is called the G.811 Clock in ITU
standards parlance.
Circuits use a frequency synchronous clock to control the ingressand egress of the information streams to be transported.
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Why has Syncronization been so Important to Transport?
The Synchronization standards guarantee the performance of today's
transport networks.
The Currency of Synchronization is TDEV and MTIE.
Time Deviation is measured for 10000 seconds and compares areference clock, G.811 quality to a derived clock. The amount of time
drift allowed from the derived clock is tightly regulated. The
measurement is presented in the form of a graphic mask target and the
actual measured.
Maximum Time Interval Error is measured for 100000 seconds and
accumulates the time error between the above clocks. This
measurement is also presented in graphic form with a target mask and
actual measured plot. Synchronization standards define the limits of reference and nodal
system clock wander, phase gain, phase jump and jitter.
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Why has Syncronization been so Important to Transport?
The ITU and ANSI standards organizations have defined the rulesfor Synchronization.
These rules are expressed as a numerical standard. The ITU
standards typically start with a G. and the ANSI standards start with a
GR-.
There are hundreds of standards issued by each organization.
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ITU Synchronization Standards
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ANSI Synchronization Standards
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Synchronization Clock Quality Distribution Rules
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Synchronization Distribution Hierarchy
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Synchronization Currency in Todays Circuit Transport Networks
10ns
100ns
1us
10us
100us
100ms1s
10s100s
1,000s10,000s
100,000s
Obs. Interval(sec)
PRC (Cs)G.811
SSU (Rb)
G.812
SSU (Rb)
G.812
}SECs (Quartz)
G.813
SECs (Quartz)G.813}
CDR
PLL
Framer
SDHG.823
(Traffic)
G.823(Sync)
BTS/NodeB(50ppb)
BTS/NodeB(50ppb)
2.5us phase tolerance (TDD)Requires GPS to achievePhase alignment
PRCSEC SSU
G.823 Sync
G.823 TrafficE1
E3
E1
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SETS - Functionality as Defined by ITU Standards
SelectASelectC
Squelch T4
T0
n x T1p x T21 x T3
OSC
SETGSelectB Squelch
T1 - Clocks recovered from SONET/SDH line
T2 - Clocks supplied from PDH tributary inputT3 - Clock supplied from HSCT0 - Clocks supplied to SONET/SDH equipmentT
4
- BITS clocks supplied back to HSC source
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Synchronization Solution - Upstream / Downstream
Network Input SEC References
Line Card 622M
LineOutputFrequencyMultiplier
Line Card DS1
LineOutput
Frequency
Translation
Line Card 2.5G
LineOutput
Frequency
Multiplier
SSM InputReference
SourceSelection
Priorities
Backplane SECs
Line InputFramed
Data Mb/s
Line Interface1
Line InputFramed
Data Mb/s
Line Interface2
Line InputFramed
Data Mb/s
Line InterfaceN
SETS ClockGenerator
Slave
BITS SEC
ClockPDH SECClock
SECMFrSync
SETS ClockGenerator
Master
SECMFrSync
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Traditional Home Grown SETS Implementation
High component count means: high component cost board space consumption layout problems
PhaseDetector
LowPassFilter
Digital Filter,TemperatureCompensation,Control
DAC LowPassFilter
MUX
ADC
Temp.Sensor
ADC
TCVCXO
PDH
BITS
Ref Clk
MC68xx16
uP
Restricted choice givesinadequate flexibilityand back-up
Sensitive analog circuitryneeds special care inlayoutDSP uP runs
complex, proprietary
algorithm
Temp. compensationmust be calibrated- ignores differentialaging coefficients
Extremely difficult to get manufacturing
repeatability and achieve standardcompliant performance.
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Oscillator Performance Requirements
0.01
0.001
4.6 + 4.6
4
0.012
0.01
0.001
0.001
4.6
4.6
Stratum 3E
GR1244-III
G.812
0.010.01UIJitter (generation) RMS
1-101-10 (3)HzFilter bandwidth
4.6 + 4.64.6 + 4.6ppmPull-in/Hold-in range
24ppmAging (20 years)
2.06
2.0
0.01
0.05
0.37
0.28
0.04
0.05
ppmHoldover stability (total)
Temp
Drift (24 Hrs)
Initial Offset
4.64.6ppmFreq offset (total)
4.64.6ppmFree run accuracy
ETSI
300-462-5
Stratum3
GR1244-II
G.813
UnitParameter
The difference between initial offset and drift is that drift directly relates to the performanceof the external XO. The initial offset is directly tied to the performance of thetiming control when switching from a locked state to holdover.
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ACS8520/22/30- Two independent PLL paths for ITU Compliance
Two PLLs, known as the T4 & T0 path are completely independent
They are different for good reasons
The T4 path is to select a clock to output to a local BITS or SSU
It is not filtered, no phase buildout
BITS/SSU will filter it to a much higher degree than our SETS (T0) function
The T0 path is used to generate the clock for the egress ports
PRC
SSU
SECs
Syn
cTrail T0 Path
Syn
cTrail
T0 Path
T0 Path
T4 Path
T0 Path
SSU may wellprovide time from
GPS or othersource. But can
simply clean upthe linerecovered clock
SSU
SECs-
line timed
SEC & co-
located SSU
ITU Sync
Trail
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ACS8530 Block Diagram
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amondPhD
-DirectorSystems
Engineering
E
xistingSyncCardFamily
1041
010Number of Outputs
1441
414
Number of Inputs
Revertive/Non-revertive mode
OutputConfigurations
PBO on currently locked reference
Stratum 3E compliance
N x 8 kHz (N = 1 to 12499)
6.48, 19.44, 25.52, 38.88, 51.84, 77.76 MHz
N x E1 or N x DS1, N = 1 to 16
2, 4, 8 kHz
155.52 MHz
Programmable pulse width and polarity
2 kHz and 8 kHz Frame Sync Pulses
1.544 MHz or 2.048 MHz (E1 or DS1)
19.44 MHz
44.736 MHz or 34.368 MHz (E3 or DS3)
6.48, 25.52 MHz
38.88 MHz, 51.84 MHz, 77.76 MHz
311.04 MHz
1.544 MHz or 2.048 MHz (E1 or DS1)
Holdover (with appropriate TCXO, OCXO)
Activity Monitoring
Los of Lock Indication
Output Phase Adjustment
Phase Measurement
InputConfigurations
General
Features
Features
155.52 MHz
Frequency Monitoring
8 bit micro-processor modes
Hit-less Source Switching
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High Rate LineCard WithHoldover
Recovered Clock
Clock A
Sync A (Optional)
Framer
XO
Clock B
Sync B (Optional)
Data SERDES
ACS85xxLC/P
ACS89xx
ClockDistribution
High-Rate (dddd16161616TDM Line card,
oldoveroldoveroldoveroldover
ACS8525/26/27 for stability and Holdover
Supports SEC frequencies from 2kHz to 155MHz
ACS894x for OC-12 & to STM-16 outputs
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To/FromNetwork
High Rate Line Card (
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To/FromNetwork
Low Rate Line Card(
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Existing Line Card Part Family- Feature Chart
2 & 83155MHz2kHz23ACS8525
622MHz19MHz11ACS8944
FE
C
Rates
Sh
ortT
ermH
old
ov
er
(ms)
LongT
ermH
old
ov
er
(indef)
2
2
2
3
Num
ber
ofin
puts
Features
Ph
aseB
uild
out
Avail
ability
Performance
Level
2 or 8*1622MHz19MHz4ACS8946
Part No.
STM-64
2
2
6
Number
of
outputs
LOS2 & 8155MHz8kHzACS8527
2 & 8
2 & 8
S
yncoutputs(kHz
)
155MHz
155MHz
Maxim
umo
utput
Fre
quen
cy
2kHz
2kHz
Min
imumin
putfre
quen
cy
LOS
Aut
omaticR
ef
Switchin
g
STM-4
STM-1
6
ACS8526
3ACS8595
STM-1
Mic
ropro
cessorIn
terfa
ce
Nu
mber
of
Syn
cin
puts
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PICMG AMC.0
Advanced Mezzanine Card
AMC defines
A modular add-on or child card
Extends the functionality
Allows multiple line cards off a single
carrier blade
Mix and match line cards e.g. DS1/E1/J1
DS3/E3
OC-3/12/48
GbE WAN Cards
10 GbE Optical WAN Card.
Unique ACS8595 drop-in solution
ATCA AMCCarrier blade-
Vendor 'A'
Clock A
Sync A (Optional)
XO
Clock B
Sync B (Optional) ACS8595LC/P
RecoveredClocks
RecoveredClock
Selection
AMC Slot 1
AMC Slot 4
AMC Slot 3
AMC Slot 2
Vendor 'B' AMC Card
AMC Slot 2
Vendor 'C' AMC CardEach Clock to AMC Module:
8kHz, E1, DS1 or 19.44MHz
Vendor 'A' AMC Card
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Synchronization Status Message Processing per G.781
The process of selecting a synchronization source from the set of physical ports is performed inthree steps:
Figure 6/G.781 - Visualization of the synchronization source selection process(es)
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Synchronization Status Message Carriage SDH
Do Not use for synchronization111115
Reserved111014
Reserved110113
Reserved110012
Synchn Eqpt Time Src. SETS101111
Reserved101010
Reserved10019
Rec. G.812 Local10008
Reserved01117
Reserved01106
Reserved01015
Rec. G.812 Transit01004
Reserved00113
ITU Rec G.81100102
Reserved00011
Quality Level Unknown00000
SDH DescriptionS1 bits
b5 b8
Qual Lev
SSM Allocation Definitions for SDHFrom G.707 (03/96) Table 5
RSOH
MSOH
Pointer
POH Payload
1 32 4 5 76 8
Synchronization Byte
A1
D2E1
D3F1
A2 J0A2A2A1A1
D1B1
D8
K1B2B2B2
D5
E2
D12
D9
D6
K2
D4
D7
D10
M1
D11
S1
Admin Unit Pointers
STM-1 Section Overhead
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Synchronization Status Message Carriage SONET
Do Not Use for Synchronization11117
Reserved for Network Synchronization
Use
1110Use Assignable
Reserved1101-
SONET Minimum Clock Traceable11005
Reserved1011-
Stratum 3 Traceable ST310104
Reserved1001-
Reserved1000-
Stratum 2 Traceable ST201113
Reserved0110-
Reserved0101-
Reserved0100-
Reserved0011-
Reserved0010-
Stratum 1 Traceable ST100011
Synch Tracability Unknown - STU00002
SONET DescriptionS1 bits
b5 b8
Qual Lev
SSM Allocation Definitions for SONETFrom Bellcore GR253 CORE(12/97), Sect 5.4.2
SectionOH
LOH
Pointer
POH Payload
1 32 4 5 76 8
Synchronization Byte
STS-N Transport Overhead
A11
D2E1
D3F1
J0
D1B1
D8
K1
D5
E2
D12
D9
D6
K2
D4
D7
D10
M1
D11
S1
SPE Pointers
A1N
B21 B2N
A21 A2N
Z1 Z1 Z2 Z2
Z0 Z0
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Synchronization Status Message Carriage E1
TS0 TS1 TS16 TS31
Frame Payload
E1 Frame - Time Slots 0 to 31 - 256 bits - 125 us One Time slot = 8 bits
E1 Time Slot 0 (TS0) Multi-Frame (MF)(SMF = Sub Multi-Frame ) - From G.704 10/98 Table 5D
Sa84
Sa83
Sa82
Sa81
Sa84
Sa83
Sa82
Sa81
Sa74Sa64Sa54Sa44A1E15
1101100C414
Sa73Sa63Sa53Sa43A1E13
1101100C312
Sa72Sa62Sa52Sa42A1011
1101100C210
Sa71Sa61Sa51Sa41A109
1101100C18
II
Sa74Sa64Sa54Sa44A107
1101100C46
Sa73Sa63Sa53Sa43A105
1101100C34
Sa72Sa62Sa52Sa42A103
1101100C22
Sa71Sa61Sa51Sa41A101
1101100C10
I
87654321
Bit Number 1 to 8Frame
Num
S
MF
MF
Do Not use for synchronisation111115
Reserved111014
Reserved110113
Reserved110012
SETS101111
Reserved101010
Reserved10019
SSU-B (Was G.812 Local )10008
Reserved01117
Reserved01106
Reserved01015
SSU-A (Was G.812 Transit )01004
Reserved00113
ITU Rec G.81100102
Reserved00011
Quality Level Unknown00000
DescriptionSan1, San2,San3, San4,
- Note 1
Qual Lev
SSM Allocation Definitions for E1From G.704 10/98 Table 5C
Note 1: n = 4,5,6,7 or 8 ( ie one Sa bit only ) depending onoperator selection
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Synchronization Status Message Carriage DS1
Bit 3Bit1Bit 2 Bit 192 Bit 193--------------------------------------------------------
F-Bit Frame Payload
DS1 Frame - 193 byte 125 us
Assigned SSM in DataLink acc G.704 10/98 Table 2,ANSI T1.403 Table 4, Bellcore GR-253 CORE (12/97),
Sect 5.4.2.
Note:All messages have the form11111111 0 P1 P2 P3 P4 P5 P6 0
So each is one code of a basic 6 bit message
11111111 00100000
11111111 00110000
11111111 00111110
11111111 00001000
11111111 00010100
11111111 01000100
11111111 0001111011111111 00010000
11111111 00001100
11111111 00000010
G.811
G.812 Type II
G.812 Type III
G.812 Type IV
Stratum 4 (Note)
G.813 Option 3
G.812 Type VSynchronization Traceability
Unknown
Do not use for Synchronization
Provisionable
ESF FrameESF Frame
NumberNumber
11
22
33
44
5566
77
88
99
1010
1111
1212
13131414
1515
1616
1717
1818
1919
2020
2121
22222323
2424
Each F-Bit occurs in Bit 1 of each
frameFPS = Framing Pattern Sequence
(001011)CRC6 = CRC6 word C1 to C6FDL = Facility Data Link, m = FDL
bit
FPSFPS
--
--
--
00
----
--
00
--
--
--
11
----
--
00
--
--
--
11
--
----
11
CRC6CRC6
--
C1C1
--
--
--C2C2
--
--
--
C3C3
--
--
--C4C4
--
--
--
C5C5
--
--
--
C6C6--
--
FDLFDL
mm
--
mm
--
mm--
mm
--
mm
--
mm
--
mm--
mm
--
mm
--
mm
--
mm
--mm
--
FF--BitsBits
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SSM-Based Network Resynchronization Flow
NE NE NEPRC - ST1
G.811
SSM carriage. Value = G.811/ Stratum 1
NENE
BITS ST2G.812
NE NE
SSM carriage. Value = G.812 /
Stratum 2
NE NE
PRC FAIL
Timing direction
NEPRC - ST1G.811
BITS ST2
G.812
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SSM - Network Synchronization Reconfiguration
NE 3
NE 4 NE 5
PRCG.811
NE 2 NE 1
All info before failure. THEN X happens
ST1
ST1 ST1
ST1
ST1
ST1
DUS
DUS
DUS
DUS
NE 3
NE 4
NE 5
PRCG.811
NE 2 NE 1
LOS
DUS DUS
ST1
ST1
ST1
DUS
DUS
ST1ST1
Secondary
Primary
NE 4 NE 5
LOS
ST1 SMC
ST1 DUS
DUS
NE 4
LOS
DUSSMC
ST1 ST1
DUS
1. NE 1, 2, 3 cfgd so if P&S = same, use Secondary fortiming.
2. NE 4,5 cfgd so if P&S = same, use Primary for timing.
SSM Definitions :DUS: Do not Use for SynchronizationST1: Stratum 1SMC: SONET Minimum Clock
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Mobile Wireless Synchronization Requirements
Overview of sync requirements for cellular/mobile access networks: Clock rate synchronisation: Deviation of base station clock rate (= clock
frequency) needs to be within certain limits from reference clock present incentral radio control.
Time or phase synchronization: Offset of base station clock phase (or time
offset) needs to be within certain limits from reference clock phase (or time)present in central radio control.
Sync required to ensure seamless connection hand-over of handsets movingbetween coverage areas of different base stations
TDD (time division multiplex) requires both clock rate and phase/timesynchronization to reference clock. Spectrally efficient.
FDD (frequency division multiplex) requires only clock rate synchronization toreference clock. Spectrally inefficient.
Classification of international mobile radio systems:
CDMA2000 (3GPP2, US ,Asia): TDD system with a 50ppb frequency sync
and time/phase within +/- 1.25us WCDMA (3GPP, Europe ME, Asia) and GSM: FDD system with a 50ppb
frequency and no particular time/phase requirement & TDD system with a50ppb frequency sync and time/phase within +/- 1.25us
Pico RBS (WCDMA and GSM): FDD 100ppb frequency and no particular
time/phase requirement
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Break time
Coffee Break, standup and walk around, make your calls and eat lunch
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Next Generation Networks are Packet Networks
Does synchronization change in PacketNetworks?
Firstly the definition of and performance requirements for
synchronization will not change. In Packet networks synchronization will become an access or last mile
service aide to delivery of traditional services. In this model the service
being delivered will determine the quality of synchronization required.
The financial drive to switch to a sharedtransport versus dedicated transport is
overwhelming.
The ratio in cost per megabit for native ethernet backhaul
service versus traditional private line service is 1 to 6 or greater.
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A Financial Example
Traditional Leased Line Access pricing model;Assumed 100Mbps of an STM1 is used at RNC and 3xE1 at each Node B (giving 17 Node Bs in RNS).
Assumed distance between RNC and provider network POP to be 5 miles, and average distancebetween provider network POP and Node Bs to be 5 miles.
Then, yearly rental costs:RNC: 100,295 + 18,000 = 118,295
Node Bs: 100M/E1 x (4098 + 1000 + 1192) = 314,500
Total annual cost: = 432,795
Simple Ethernet Backhaul pricing model;Assumed 100Mbps Ethernet at RNC: = 14,000
Assumed 6Mbps Ethernet at each of 17 Node Bs: 17 x 2600 = 44,200
Total annual costs: = 58,200
Potential ANNUAL SAVING : 432,795 - 58,200 = 374,595. ($700k, E560k)
NOTE - While this is an example and cannot be promised by Semtech, it provides a glimpse into thenew paradigm of cost structure for mobile wireless network backhaul services.
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Synchronization Currency in Packet Networks
10ns
100ns
1us
10us
100us
100ms1s
10s100s
1,000s10,000s
100,000s
Obs. Interval
(sec)
PRC (Cs)G.811
SSU (Rb)
G.812
SSU (Rb)
G.812
}SECs (Quartz)
G.813
SECs (Quartz)G.813}
CDR
PLL
Framer
SDHG.823
(Traffic)
G.823(Sync)
BTS/NodeB(50ppb)
BTS/NodeB(50ppb)
50ppb freq alignmentMinimum Node B FDDperformance
PRCSEC SSU
G.823 Sync
G.823 Traffic
Minimum node BTDD
+/-1.25uS adjacentnode phasealignment
E1
E3
E1
Packet Network
2.5us phase tolerance (TDD)
Requires GPS to achieve
Phase alignment
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Can circuit emulation services solve the
Packet Backhaul synchronization problem?
What are circuit emulation services anyway?
Alternatives for Synchronization Delivery over Packet Networks
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Circuit emulation is the process of packetizing bit streamservices like a T-1, E-1 for transmission over a packet network.
The network can be native Ethernet or Ethernet trunksbetween MPLS nodes. There are several standards for CES.
The IETF has one called PWE3. The Metro ethernet forum has onecalled CESoE. The ITU has the SAToIP or USAToIP.
They all take in a bit stream and create a packet stream and theyare point to point.
What is Circuit Emulation in Generally understood Terms
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Timing in Circuit Emulation Services
IWF Processor
~SDiwf
To & From Metro
Ethernet Network
CESIWF
TDMline EXT
FREthline
Tx
Rx
Data
Clock
Data
Clock
External Timing
Reference
MEF 3 Figure 13 : CES IWF Sync. Ref. Model
TDM Line: line-timing, from CE
EXT: From BITS/SSU
1588
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Timing in Circuit Emulation Services Adaptive Clocking
~
TDMservice
~
Pktr DPktr
Mpll
Fr Clk.
Rec. ~
FsFs
Data DataTDM
service
Inter-workingFunction
Inter-workingFunction
CustomerPremises
Equipment
CustomerPremises
Equipment
Clk.Rec.
Adaptive-clocking can provide line-timing.
Goal is to match the ingress service clock Fs, to the egress Fs while
maintaining G.823 MTIE
Adaptive-clocking has problems when :- packet-loss rate significant
- packet delay variation significant
- path delay changes due to network reconfiguration or restoration
Clk.Rec. ~
Fr
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Semtech Patrick Diamond PhD - Director Systems Engineering
Timing in Circuit Emulation Services Network Clocking
Network clocking uses a common network clock at each end of circuit:
Network-clocking has been providing line-timing (or external timing!) to
NEs since the dawn of digital networks. Can still be used at end-points of
Packet Networks.Noise is kept to G.823 limits by existing Network Clock distribution
But network operators want to replace the TDM links with packet links:
~
~
TDMservice
~
Pktr DPktr
Mpll
Fr Clk.Rec. ~
FsFs
Network Clock
DataData
TDMservice
Inter-working
Function
Inter-working
Function
Customer
PremisesEquipment
Customer
PremisesEquipment
Will j t Ci it E l ti f G 823 T ffi d th j b?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Will just Circuit Emulation of G.823 Traffic do the job?
Data
RNC
PSN
CES
IWF
CES
IWF
CES
IWF
G.823 Traffic ports:
CES is point to point so an ethernet path for each link is necessary
G.823 service is frequency only so can only be used in FDD service
To keep frequency transient below 50ppb needs a 20,000-second time
constant for each millisecond of delay change (needs expensive, ultra-stable OCXO)
G.8261 says CES impractical as a timing-transport mechanism using G.823 Traffic ports
2.5us allowance
+/-50 ppb freq.
Eth t T ti S h N t k S i ?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Ethernet Transporting Synchronous Network Services?
RNCNode B
Real Time Service such
as node B backhaultraffic
Real Time service suchas node B traffic
Metro Ethernet Packet Network
Voice & Data
Video
Voice & Data
VideoNative Ethernet is an Asynchronous Service!
U GPS i t d t S h i th N t k?
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Semtech Patrick Diamond PhD - Director Systems Engineering
GPS ReceiversGPS Receivers
Use a GPS receiver at every node to Synchronize the Network?
GPSReceiver
GPSReceiver
Node B RNC
Metro Ethernet Packet Network
Voice & Data
Video
Voice & Data
Video
This is a very expensive to install and operate. Typical GPS receiver withHigh precision holdover oscillator is $500.00 USD +. Antenna installation is
typically $$thousands$$ of USD and requires annual calibration.
Use a free run oscillator at every node to Synchronize the
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Semtech Patrick Diamond PhD - Director Systems Engineering
y yNetwork?
Free runoscillator
Free runoscillator
Node B RNC
Metro Ethernet Packet Network
Voice & Data
Video
Voice & Data
Video
This will not work unless the oscillators are caesium beam type whichTypically cost $50,000.00 each.
Precision free run
oscillators
Impairments Packet Networks Present to Synchronization?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Impairments Packet Networks Present to Synchronization?
Most importantly traditional clock path continuity, the circuit, isbroken due to Ethernets asynchronous timing. Line recovered timing with
PRC traceability does not exist!
In layer 3 IP networks the bi-path symmetry at any point in time is
unknown and can change via route flap or RIP, BGP, or IS-IS mandatedchanges? The ITU in G.8261 has stated layer 3 networks are un-fit for
circuit emulation services or cell site backhaul.
Every packet is delayed by a differing amount of time as it passes
through packet network switch queues. The result is a self-similar orfractional Brownian distribution model of PDV or Packet Delay Variation.
There are 2 factors at play, switch queue depth and serialization delay.
Techniques for Synchronization over Packet Networks
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Semtech Patrick Diamond PhD - Director Systems Engineering
Techniques for Synchronization over Packet Networks
The IETF has an RFC named Pseudo-wire emulation end to end, orPWE3. This RFC deals with encapsulation and transport of any circuit
based service over an MPLS network. Everything from the basic T/E1
circuit emulation to ATM vc/vp emulation and VLAN emulation is
included in this, except sync! The ITU-T standard G.8261 deals with delivering pseudo-wires over
packet networks targeting the MTIE traffic mask for G.823. This standard
does not cover delivering the MTIE sync mask for G.823 required for
node B and BTS operation. A standard for Synchronous Ethernet does NOT exist as yet. This
will eventually lead to pre-standard products in 2009 and the earliest.
Standards Bodies Activities
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Semtech Patrick Diamond PhD - Director Systems Engineering
Standards Bodies Activities
ITU meeting this week in Geneva is modifying G.8261 for the third
time to include IEEE 1588.
The draft standard for Synchronous Ethernet is to be completed at
this meeting. Will take years for deployment.
There are 2 elements to this modification.
First is the replacement of the 100ppm crystal on the PHY.
Second is the slow protocol to carry the SSM like information for clock quality definition.
Semtech is contributing the concept of network profiles as a means of
determining traditionally synchronous services delivery over packet
networks.
Measuring each path is useless as networks changes continuously.
IEEE-1588 A Standard for Delivering Sync
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Semtech Patrick Diamond PhD - Director Systems Engineering
g y
What is IEEE 1588?
Originally developed by Agilent Technologies for the Test
and Measurement community.
V1 Approved by the IEEE-SA Review Committee on
September 12, 2002
Published as IEEE 1588-2002 on November 8, 2002
Approved as IEC standard IEC 61588 on May 21, 2004
1588 V2 is Telecom friendly and WG draft standard spec is
out to ballot on June 7th.
IEEE-1588 A Standard for Delivering Sync
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g y
What does IEEE 1588 do?
Official Title is Precision
Time Protocol
IEEE 1588 is a protocoloriginally designed to
synchronize real-time
clocks in the nodes of a
distributed system that
communicate using a
network.
IEEE 1588 calls for the use
of the physical layer for
timestamp inclusion.
NETWORK
Implementing IEEE 1588 Synchronization for UTRAN over PacketN t k ?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Networks?
IEEE 1588Sync
Master
IEEE 1588Sync
Slave #1
IEEE 1588Sync
Slave #2
Node B RNC
Packet Network
IEEE 1588 delivers a precise copy of the Network Clock toeach end point to enable Real time service & VoATMpackets via some Circuit Emulation Services Technique
Voice & Data
Video
Voice & Data
Video
Interworkingfunction
Interworkingfunction
Network Timing Distribution using IEEE1588
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Semtech Patrick Diamond PhD - Director Systems Engineering
g g
IEEE 1588 V2 (IEC61588) Precision Time Protocol
Distributes time and frequency via WAN ethernet with expected endpoint time alignment precision measured in nanoseconds.
Gets UTC to the network elements and node b without GPS
Distributes the network clock to ingress and egress points ofinterworking function with frequency precision of
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Semtech Patrick Diamond PhD - Director Systems Engineering
How does IEEE 1588 work?
IEEE 1588 distributes a time base around a network using a two-
way time transfer technique. Precise Frequency, Time and
Phase can be generated.
V2standard has Master, Boundary, Transparent and Slave
clocks
IEEE 1588 uses a Master Slave Hierarchy to distribute thetime base.
Slave Clocks are simple if Boundary Clocks and transparent are
used, but there are no Boundary Clocks in a Telecom Network,
This means the Slave Clocks become complex.
IEEE-1588-V2 A Standard for Delivering Sync
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Semtech Patrick Diamond PhD - Director Systems Engineering
IEEE-1588 Code
Network protocol
stack & OS
Physical layer
Sync detector& timestamp
generator
Master clock sends:
1. Announce message
IEEE 1588 V2 A Standard for Delivering Sync
Timestamp
Point
Time at which a Sync message
passed the Timestamp Point
IEEE-1588-V2 A Standard for Delivering Sync
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Semtech Patrick Diamond PhD - Director Systems Engineering
IEEE-1588 Code
Network protocol
stack & OS
Physical layer
Sync detector& timestamp
generator
Slave clock receives:
1. Announce message
g y
Timestamp Point
Time at which a Sync message
passed the Timestamp Point
IEEE-1588-V2 A Standard for Delivering Sync
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Semtech Patrick Diamond PhD - Director Systems Engineering
IEEE-1588 Code
Network protocol
stack & OS
Physical layer
Sync detector& timestamp
generator
Slave clock sends:
Delay_Req message
g y
Timestamp Point
Time at which a Delay_Req
message passed the Timestamp
Point
IEEE-1588 A Standard for Delivering Sync
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Semtech Patrick Diamond PhD - Director Systems Engineering
IEEE-1588 Code
Network protocol
stack & OS
Physical layer
Sync detector& timestamp
generator
Master clock receives:
Delay_Req message
Master clock sends:
Delay_Resp message
g y
Timestamp Point
Time at which a Delay_Req
message passed the Timestamp
Point
IEEE-1588 Standard for Delivering Sync
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Semtech Patrick Diamond PhD - Director Systems Engineering
Synchronization computation in the Slave clock
Offset = receipt time precise sending time one way delay (for
a Sync message)
One way delay = {master to slave delay + slave to masterdelay}/2 (assumes symmetric delay)
Master to slave delay = receipt time precise sending time (for a
Sync message)
Slave to master delay = Delay Request receipt time -precise
sending time (of a Delay Request message)
From this offset the slave corrects its local clock!
BUT: The standard says nothing about how to do this!
Real-World Experience:
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Semtech Patrick Diamond PhD - Director Systems Engineering
Since April 2005, Semtech and Agilent and recently Symmetricom have been
running a field trial on a live Public Metro Ethernet Network owned and operated
by a major carrier.
Agilent and Symmetricom provided the reference and measurement equipment.
TIE data is gathered for every 24 hour period and analysed to get MTIE, TDEV
and Frequency Offset.
Semtech provided two ToPSync Evaluation boards to act as IEEE 1588
Master and Slave
The Master and Slave are test-beds for 1588v2 concepts.
The Master sends 1 Announce message every 2 seconds.
The Slave sends 24 Delay-Request messages every second.
The cost of sync in this test is 20kbps.
Arrangement of Field Trial
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Semtech Patrick Diamond PhD - Director Systems Engineering
Public MPLS Packet Network
VLAN #2
VLAN #1
Atomic Clock
Agilent OmniBer 718
10MHz 10MHz
DS1
To SemtechTo Agilent
Master
ToPSync Slave #145 km from master
ToPSync Slave #220 km from master
Packet delays seen on the Metro Ethernet Network
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Semtech Patrick Diamond PhD - Director Systems Engineering
Single trip delays
Round trip delay
MTIE compared to ITU G.823 PDH Sync Interface allowance
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Semtech Patrick Diamond PhD - Director Systems Engineering
TDEV compared to ITU G.823 PDH Sync Interface allowance
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Semtech Patrick Diamond PhD - Director Systems Engineering
MTIE compared to ITU G.811 PRC allowance
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Semtech Patrick Diamond PhD - Director Systems Engineering
TDEV compared to ITU G.811 PRC allowance
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Semtech Patrick Diamond PhD - Director Systems Engineering
TCXO Slave MTIE compared to ITU G.823 PDH Sync allowance
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Semtech Patrick Diamond PhD - Director Systems Engineering
TCXO OCXO
Sprint Network Slave to Slave 1PPS Alignment
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Semtech Patrick Diamond PhD - Director Systems Engineering
Nortel lab tests of Disciplined IEEE1588PBT with high priority CES traffic load
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Semtech Patrick Diamond PhD - Director Systems Engineering
23%
57%
68%
80%
91%
97%
80% 63%
23%
0%
0%
Medium step load
1h40mins 90ns/1000s (205ns ref. T1 g.823 sync) back-to-back
11ppb > back-to-back
Nortel lab tests of Disciplined IEEE1588PBT with high priority CES traffic load
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Semtech Patrick Diamond PhD - Director Systems Engineering
600ns/1000s (1s ref. T1 g.823 sync) back-to-back
11ppb > back-to-back
57%
68%
80%
91%
97%
0%
Large step loadHeld 9 hours Still under G.8261 mask
Semtech ToPSync Slave Output Frequency Accuracy over ADSL
ADSL1 Alcatel UD with ADLT N Linecard
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Semtech Patrick Diamond PhD - Director Systems Engineering
Fractional Frequency Offset - Norway Test 4, TCXO
-2.00E-07
-1.50E-07
-1.00E-07
-5.00E-08
0.00E+00
5.00E-08
1.00E-07
1.50E-07
2.00E-07
0.00E+00 2.00E+03 4.00E+03 6.00E+03 8.00E+03 1.00E+04 1.20E+04 1.40E+04
Time(s)
Frac
tionalFrequencyO
ffset
ADSL1 Alcatel UD with ADLT-N Linecard.
Simulated Line length = 2500 metres.
Bandwidth = 0.224 Mb/s upstream, 3.552 Mb/s downstream.
Interleaved path
ACS9590T locked the frequency accuracy achieved never exceeds 60ppb.
Semtech ToPSync Slave Output Frequency Accuracy over ADSL
ADSL2+ Alcatel UD with ABLT F Linecard
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Semtech Patrick Diamond PhD - Director Systems Engineering
Fractional Frequency Offset - Norway Test 4, TCXO
-2.00E-07
-1.50E-07
-1.00E-07
-5.00E-08
0.00E+00
5.00E-08
1.00E-07
1.50E-07
2.00E-07
0.00E+00 2.00E+03 4.00E+03 6.00E+03 8.00E+03 1.00E+04 1.20E+04 1.40E+04
Time(s)
Frac
tionalFrequencyO
ffset
ADSL2+ Alcatel UD with ABLT-F Linecard.
Simulated line length = 2500 metres.
Bandwidth = 0.182 Mb/s upstream, 4.578 Mb/s downstream
Interleaving enabled, which gives a maximum interleaving delay 16 msec.
ACS9590T locked frequency accuracy achieved never exceeds 50ppb
Packet Timing Application Areas
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Semtech Patrick Diamond PhD - Director Systems Engineering
Mobile Wireless
Backhaul
Wireline Access
Aggregation
Femto Cell
WiMAX
Backhaul/Access
Residential
Ethernet
(802.1AVB)
Consumer
TopSync Value
Proposition
Network
Typical Node B System Design Architecture for IEEE 1588 Timing
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Semtech Patrick Diamond PhD - Director Systems Engineering
Network Processor
NetworkProcessor
GbE/FEInterfaces
GbE/FEInterfaces
Processorrunning
ProprietaryAlgorithms
DDSProcess
Stratum 3G.812, G.813,
GR-1244Line Clocks
~TCXO (S3)OCXO (S3E)
MII ports
ToPSyncTM
SPI
Reference
ClocksTimebase
GeneratingEngine
SRAM
1588 PTP Packets
What is the Future of Network Synchronization?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Networks of tomorrow will use the most cost effective, manageable
and reliable technique fitting the service model.
Trunk networks will use traditional BITS based systems.
Metro networks will use a combination of traditional systems and
synchronous Gigabit ethernet.
Access networks endpoints and wireless service delivery points will
use IEEE 1558 V2 or some other packet based synchronization.
How can Synch Influence OPEX?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Enable UTRAN nodes to use lower cost backhaul technologies such
as ADSL and ethernet versus PDH or SDH/SONET.
Eliminate the need for expensive GPS holdover oscillators and
antenna installations for low cost WiMAX in-building and outdoorbasestations as well as for picoCDMA basestations.
Intelligent layer 2 sync end point systems can have SNMP capability
to allow the viewing of sync performance in real time remotely, no
wasted truck roles for sync problems!
Layer 2 synchronization techniques such as IEEE 1588 V2 use the
existing infrastructure and are only required at the ends.
The Future for Sync?
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Semtech Patrick Diamond PhD - Director Systems Engineering
Several possibilities exist for changing the way todays synchronizationclocks and time bases are transmitted from source to sink via packetnetworks without damage to the integrity of the synchronizationinformation itself.
IEEE 1588 permits easy timing distribution of the network clock over a packetinfrastructure with a very low cost per sync stream.
Standard NTP is not accurate enough for real-time applications and was notdeveloped for this purpose.
IEEE 1588 enables native ethernet backhaul for synchronous and time-basedservices.
IEEE 1588 and circuit emulation services are NOT opposing or competingtechnologies.
Summary
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Semtech Patrick Diamond PhD - Director Systems Engineering
We are migrating from a TDM network to packet network, but still needto support TDM services.
Interworking Functions have been defined and offer many clocking
schemes. The only clocking scheme which allows the Public
Switched Network to extend to the Customer Premise and meets thetiming requirements, is IEEE 1588.
Experience with a long-term IEEE 1588 field trial shows that excellent
long term viability, accuracy and stability is consistently available on
an evolving Metro ethernet.
Future services could be based on time rather than frequency. IEEE
1588 delivers time as well as frequency.