Figure 6--16 Logic diagram for equality comparison of two 2-bit numbers
17
Figure 6--17 : Example 6-5
18
Figure 6--18 Logic symbol for a 4-bit comparator with inequality indication.
19
Figure 6—19 : Example 6-6
20
Figure 6--20 Pin diagram and logic symbol for the 74HC85 4-bit magnitude comparator (pin numbers are in parentheses).
21
Figure 6--21 An 8-bit magnitude comparator using two 74HC85s.
22
Figure 6--22 Decoding logic for the binary code 1001 with an active-HIGH output.
Decoders
23
Figure 6--23 Decoding logic for producing a HIGH output when 1011 is on the inputs.
24Figure 6--24 Logic symbol for a 4-line-to-16-line (1-of-16) decoder.
25
26
Figure 6--28 The 74HC42 BCD-to-decimal decoder.
BCD-to-Decimal Decoder
27
28Figure 6--29
29
Figure 6--30 Logic symbol for a BCD-to-7-segment decoder/driver with active-LOW outputs.
BCD-to-7-Segment Decoder
30
Figure 6--31 Pin diagram and logic symbol for the 74LS47 BCD-to-7-segment decoder/driver.
31Figure 6--32 Examples of zero suppression using the 74LS47 BCD to 7-segment decoder/driver.
32
Figure 6--33 Logic symbol for a decimal-to-BCD encoder.
Encoders
33
Figure 6--34 Basic logic diagram of a decimal-to-BCD encoder. A 0-digit input is not needed because the BCD outputs are all LOW when there are no HIGH inputs.
34
Figure 6--35 Pin diagram and logic symbol for the 74HC147 decimal-to-BCD priority encoder (HPRI means highest value input has priority).
35
Figure 6--36 Logic symbol for the 74F148 8-line-to-3-line encoder.
36
Figure 6--37 A 16-line-to-4 line encoder using 74F148s and external logic.