Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 1

Memory Organization

Computer Organization and Assembly Language

Computer Science Department

National University of Computer and Emerging Sciences Islamabad

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 2

Memory HierarchyMain Memory

Only programs and data currently needed by the processor

Auxiliary MemoryDevices that provide backup storageSystem programs, large data files etcE.g. magnetic disks and tapes

Cache Increases the speed of processingRapid rate and small sizeCompensates speed difference between main memory and processorSegments of programs and data currently in use

2

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 3

Memory Hierarchy

Total memory capacity can be visualized as hierarchy of componentsSlow to fastHigh capacity to smaller capacity

3

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 4

Memory Hierarchy 

Magnetic tapes

Magnetic disks

I/O processor

Main Memory

Cache Memory

CPU

4

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 5

Hierarchy List

RegistersL1 CacheL2 CacheMain memoryDisk cacheDiskOpticalTape

5

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 6

Main MemoryCentral storage unitLarge and fast memory to store programs and data during the computer operationRAM

Random access memoryVolatileStores programs and data that are subject to changeRead/write memory

ROMRead only memoryNon-volatileStores tables of constant data that do not change

6

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 7

Main Memory

Bootstrap loaderStartup programStored in ROMIts function is to load the operating system

ROM and RAM chips are available in variety of sizese.g. 128x8

7

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 8

RAM chip

7 bit address bus8 bit data busTwo chip selects Read control signalWrite control signal 128x8 RAM

8-bit data bus

Chip Select 1

Chip Select 2

Read

Write

7-bit Address

8

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 9

Memory Connection to CPU

Memory Capacity : 512 bytes of RAM and 512 bytes of ROMChips Available : 128x8 RAM

512x8 ROM4 RAMS and 1 ROMEach RAM receives 7 lower bits Particular RAM chip selected is determined by lines 8 and 9 Selection between ROM and Ram is done by line 10

9

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 10

Memory Connection to CPU

CPU

Decoder3 2 1 0

128x8RAM 1

128x8RAM 2

128x8RAM 3

128x8RAM 4

512x8ROM

10

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 11

Auxiliary Memory

Characteristics Access modeAccess timeTransfer rateCapacityCost

11

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 12

Access Mode

SequentialStart at the beginning and read through in orderAccess time depends on location of data and previous locatione.g. tape

DirectIndividual blocks have unique addressAccess is by jumping to vicinity plus sequential searchAccess time depends on location and previous locatione.g. disk

12

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 13

Access Mode

RandomIndividual addresses identify locations exactlyAccess time is independent of location or previous accesse.g. RAM

AssociativeData is located by a comparison with contents of a portion of the storeAccess time is independent of location or previous accesse.g. cache

13

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 14

Access Time

The average time to reach a storage location in memory and obtain its contentAccess Time = seek time + transfer timeSeek Time

Time required to position the read/write head to a location

Transfer TimeTime required to transfer data to or from the device

14

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 15

Transfer Rate

Word or bytes transferred at one timeFor internal memory it is usually governed by data bus width

15

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 16

Locality of Reference

The references to memory at any given interval of time tend to be confined with in a few localized areas in memoryIf the active portions of the program and data are placed in a fast small memory, the efficiency can be increasedSuch small fast memory is referred to as cache memory

16

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 17

Cache

Small amount of fast memorySits between normal main memory and CPUMay be located on CPU chip or moduleFaster than main memory by a factor of 5 to 10

17

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 18

Cache operation ‐ overview

CPU requests contents of memory locationCheck cache for this dataIf present, get from cache (fast)If not present, read required block from main memory to cacheThen deliver from cache to CPUCache includes tags to identify which block of main memory is in each cache slot

18

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 19

Cache Performance

Hit ratioWhen CPU refers to memory and finds the word in cache, it is said to produce a hitIf not found, it is called a missHit Ratio = Number of hits / Total CPU references to memory

19

Memory Organization Computer Organization and Assembly Language – NUCES Hina Anwar – slide 20

References

Computer System Architecture by Morris Mano – Chapter 12Computer Organization and Architectureby William Stallings – Chapter 3

20