01EMBSYST2008 Ed F.Deprettere1 Embedded Systems and Software Ed F. Deprettere, Todor Stefanov,...

01EMBSYST2008 Ed F.Deprettere

1

Embedded Systems and Software

Ed F. Deprettere, Todor Stefanov, Hristo Nikolov

{edd, stefanov, nikolov}@liacs.nlLeiden Embedded Research Center

Spring 2008; Friday 1:30 p.m. – 4:00 p.m.http://www.liacs.nl/~cserc/EMBSYST/

EMBSYST2008/


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The Course

• Introduction to course (today)• Models of Computation (MoC), - dataflow graphs, dataflow process networks, analysis, - scheduling, memory management,• Kahn Process Networks (also introduction to hands-on), - Another MoC, - Conversion of sequential imperative nested-loop programs to input-output equivalent process networks,• Mapping of process networks to multi-core architectures, - Workload modeling, performance analysis, exploration, - Homogeneous and heterogeneous target platforms,


3

Introduction to course

• Systems and Embedded Systems,• History of Embedded Systems and Software,• Examples,• Complexity issue,• Trends and challenges,• Design space exploration,• Programming and translating,• Conclusions.


4

Examination

No formal written exam

Final grade (10) consists of average of three sub-grades

1. active course participation (10) 2. power-point presentation (10) 3. hands-on (10)


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The books1. Computers as Component, Principles of Embedded Computer Systems Design. Wayne Wolf . (Morgan Kaufman Publishers) http://www.ee.edu/~wolf/embedded-book/about.html

2. Embedded System Design. Peter Marwedel. (Kluwer) http://ls12-www.cs.uni-dortmund.de/~marwedel/kluwer-es-book

3. Embedded System Design, A Unified Hardware/Software Introduction. Frank Vahid/Tony Givargis (Wiley) http://www.ics.uci.edu/~sumitg/CadPages.html

4. Fundamentals of Embedded Software. Daniel W. Lewis (Prentice Hall) http://www.prenhall.com/divisions/esm/app/lewis/materials.html5. Embedded Multiprocessors: Scheduling and Synchronization. Sundararjan Sriram and Shuvra S. Bhattacharyya (Marcel Dekker)


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Systems

A system is a composition of functionalities thatjointly implement an input-output behavior in a dependable and secure manner.

Dependable system: can deliver services that arejustifiable trusted (have accepted dependences)

Secure: composite of attributes of • confidentiality (degree of confidence)• integrity (absence of improper system alteration)• availability (readiness for correct service)

Secure system behaves as intended.


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Embedded SystemsAn Embedded System is an information processing system that is:• application domain specific (not general purpose) • tightly coupled to its environment

Examples of application domains are: automotive, multimedia.

Environment: type and properties of input/output information.

Tightly coupled: environment dictates what the system’s response behavior must be.

Current Embedded Systems are becoming multi-core multi-platform (sub-)systems, executing multiple independent applications, mostly in real time, and at low power consumption.


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Embedded Systems (2)Do Embedded Systems belong to the field of Computer Science,or to the field of Computer or even Electrical Engineering?

An embedded system performs computation that is subject tophysical constraints: interaction with a physical environment,and execution on a physical (implementation) platform.

• interaction: deadlines, throughput, jitter• execution: available resources, power, failure rates

Embedded systems design is not a straightforward extensionof either hardware (computer/electrical engineering) or software(computer science) design. They have functional requirements (expected services), and they have extra-functional requirements (performance/cost, robustness).


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Embedded Systems (3)Specific:Computer Science provides (software) functionality forInstruction Set Architectures (ISA) which are characterized byan instruction set and an organization (program counter, registerfile), independent of any logical implementation and physicalrealization.

Computer/Electrical Engineering deals with logical implementationand physical realization.An Embedded Systems design discipline needs to combine thesetwo approaches, because extra-functional behavior (such as timing)is a crucial issue, especially when there are real-time constraints imposed by the environment, and when to predict extra-functionalbehavior using abstract models that cannot be well specified if the relation between functional behavior and extra-functional behavior is obscure.


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HistoryIn the past, embedded systems were called (embedded)controllers (micro-controllers). They appear typicallyin control dominated applications.

Examples: traffic lights, elevators, washers, dryers, vendor machines ATM machines

These are relatively simple finite state machines implemented using either micro-controllers or sequential circuits (programmablelogic arrays – PLA)

PLA

registers

inputs outputs

current state next state


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Product: Hunter Programmable Digital Thermostat.

Microprocessor: 4-bit

Some small examples


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Product: Miele dishwashers.

Microprocessor: 8-bit Motorola 68HC05.


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Product: NASA's Mars Sojourner Rover.

Microprocessor: 8-bit Intel 80C85.


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Product: Sony Aibo ERS-110 Robotic Dog.

Microprocessor: 64-bit MIPS RISC.

What they have in common: They sense the environment(input signals), decide on (compute) their actions (responses)in real time.


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History (cont’d)

With growing complexity of applications some processing of signals was added to pure finite state machine behavior : FSMs became EFSMs(extended finite state machines).

With still more growing complexity concurrency andparallelism become important. E.g., communicating (E)FSMs. Here is what is happening.


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Complexity Issue

Systems can be (extremely) complex:

• wafer steppers• imaging (medical, biology, astronomy)• wafer stepper• imaging (medical, radar, telescope)• digital copiers/printers

Embedding systems – hence embedded systems – maybe (extremely) complex.

On-chip transistor density

Expected

Actual

time

app

licatio

n comp

lexity/p

erfo

rman

ce

Shared memory architecture


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Complexity Issue (cont’d)

• wafer stepper• imaging (medical, radar, telescope)• digital copiers/printers

Embedding systems – hence embedded systems – maybe (extremely) complex.

On-chip transistor density (Moore’s Law)

Expected

Actual

time

app

licatio

n comp

lexity/p

erfo

rman

ce

Shared memory architecture

Application complexity (Shannon Law)


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μP will do for small systems

For many consumer products, a single μProcessor will do.

For other systems – such as a car – a network ofμProcessors is needed.

For even larger systems – heterogeneous multi-processorEmbedded Systems are needed


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Heterogeneous Architectures

Heterogeneous architectures consist of programmable and dedicated components

TM

Mem

CP1 CP2

MIPS

Programmable core + SW

Dedicated coprocessor


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Trend in Multi-processor

• current state of art: co-processor P FPGA

• next: multi-processor

• then: heterogeneous multi-processor

P

P

P

P

Communication StructureCommunication Structure

MemMem

PE

PE ...

...

PE

PE PE

PE PE

PE

MemMemMemMem MemMem

• later: networks on chips

Identical tiles(scalable)


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Small Systems: CoMPSoCA relatively small Embedded System is

• a multi-processor (MP) service providing resource infrastructure organized as a system-on-chip (SoC), • in which processors are heterogeneous (programmable, configurable, dedicated)• having a communication, synchronization, and storage infrastructure that is built on top of a Network-on-Chip (NoC)• being capable of executing a composition (Co) of multiple (independent) applications simultaneously.

Processors run autonomously and concurrently, and arenot abundant as in (homogeneous) cluster or grid computers.


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A less simple Embedded System

station density high in core

central core contains supercomputer

350 km

text

Central core(2km)

Remotestationation

station contains• 100 LF antennas• 100 HF compound antennas

• LOFAR• SKA

Distributed hierarchicalradio telescopes


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Embedded Systems (5)

In this course we envision an embedded system (model)to be the triple < application (model), architecture (model), association of the two together>

The application (model) is a pure functional model: it has no timing properties. The architecture (model) is a pure extra-functional model: it has no functional behavior. The association together (mapping) relates application(model) and architecture (model).


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Application Model

Application: processes and inter-process communication channels

communicationchannel D

data-stream

process

B

data-stream

A CD

while(1){ read (A); read (B); execute(); write (C); }

service functionality

co-ordination (synchronization) is well defined


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Architecture Model

Architecture : composition of (library) components

private memory

processor types

network

shared memory

buffers

service timing, cost


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Mapping

A CD

B

{D, A}Mapping: relation


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Design Space Exploration

Application Architecture

Mapping

Analysis

(Semi-) AutomatedDesign SpaceExploration


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Challenges

Given that an embedded system architecture consists of anumber of heterogeneous computational units (programmable,configurable, and dedicated), and a communication, synchronization and storage infrastructure:

• How to map sequential C or C++ programs to such parallel architectures?

• How to map several applications simultaneously to such architectures, guaranteeing a prescribed quality of service for each application.

Neither of the two is trivial.


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Process-to-FPGA CoMPSoCparallel

specificationMatlab/C/C++/Java

conversion

FPGA

for j = 1:1:N, [x(j)] = S1( ); endfor i = 1:1:K, [y(i)] = S2( ); endfor j = 1:1:N, for i = 1:1:K, [y(i), x(j)] = func(y(i), x(j) ); endendfor i = 1:1:K, [Out(i)] = Sink( y( I ) ); end

F1 F2

S2 F3 F4

Sink

S1

Parameterized Nested Loop Programs

mapping


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Why FPGA ?A Field Programmable Gate Array (FPGA) is a billiontransistor hardware programmable, i.e., (re-)configurable,single-chip fabric consisting of a huge amount of look-up tables, memory cells, and mesh interconnect channels. Current FPGAs include high-level functionalblocks, even ISA components.

An FPGA CoMPSoC is (much) more flexible, and (much)cheaper than a custom designed CoMPSoC.

An FPGA CoMPSoC comprising many software andhardware processing components in a run-timere-configurable network is feasible. Limitations are onlycoming from restricted on-chip memory resources.


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Part II: applying it all

The Big Picture

FPGA

Applications

–

/ /

platform

parallel specification

sequentialprocess

platform

Communication StructureCommunication Structure

MemMem

PE

PE ...

...

PE

PE PE

PE PE

PE

MemMemMemMem MemMem

Component

Sequential program →

again CoMPSoC


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The Bigger Picture

ESPAM (LERC)

Library ofIP cores

Platform Spec in XML

Mapping Specification

Kahn Process Network in XML

Application

Compaan(LERC)

High-levelModels

SESAME (UvA)

Mapping Specin XML

Explore, modify, select instances

Design of Flexible Interconnection(FLUX) Network Components (TUD)

Multiprocessor System on Chip – Synthesizable VHDL and C/C++ code for processors

RTL-levelModels

Common XMLInterface

Library ofIP cores


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The ESPAM Design Flow

Library ofIP cores

Platform Spec in XML

C/C++ code for

processors

IP cores in VHDL

KPN In XML

Platform topology

description

VirtexII-ProFPGA

Auxiliary files

Program code Processor 1



System-LevelSpecification

RTL-LevelSpecification

Gate-LevelSpecification

ESPAM

Mapping Specin XML

Xilinx Platform Studio (XPS) Tool


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Other platforms

FPGAs are currently powerful enough to prototypeCoMPSoC embedded systems, or even to serve asactual product platforms that are application domainspecific. System implementation in FPGAs can bedone without programmers having to deal with it.

However, other – given platforms – can be targetplatforms as well. Examples are Intel multi-coreplatforms, the IBM Cell processor platform, andGPU platforms.

Lerc’s approach is independent of specific target platforms,but can deal with various platforms.


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Example:Motion JPEG encoder

dimH

dimV

Sequence of

T frames

JPEG encoding

M-JPEG encodedvideo stream

Video stream(4:2:2 YUV format)


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M-JPEG Specification (Matlab)

[ QTables, HuffTables, TablesInfo ] = P1_l_DefaultTables( );for k = 1:1:NumFrames, [ HeaderInfo ] = P1_l_VideoInInit( ); for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j ,i ) ] = P1_l_VideoInMain( ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] = DCT( Block( j , i ) ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] = Q( Block( j , i ), QTables ); [ Packets ] = VLE( Block( j , i ), HuffTables ); [ ] = P1_l_VideoOut( HeaderInfo, TablesInfo, Packets ); end end end

%parameter NumFrames 1 1000;%parameter VNumBlocks 16 256;%parameter HNumBlocks 8 256;

Block( j , i )

Parameterized


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Deriving the M-JPEG Model

ApplicationIn Matlab

Compaan Compiler

QDCT

P1

VLE

Block

Block Block

Packets

QT

able

s

HuffTab

les struct Block {

int Y1[64]; /* block 8x8 pixels */ int Y2[64]; /* block 8x8 pixels */ int U[64]; /* block 8x8 pixels */ int V[64]; /* block 8x8 pixels */};


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PPC1

PPC2

B1

B2

VB1

VB2

VB3

VB4

QDCT

P1

VLE

Block

Block Block

Packets

QT

able

s

HuffTab

les

Mapping

PPC1

PPC2

B1

B2FIFO0

FIFO0

FIFO0

FIFO0

FIFO1

FIFO2

QDCT

P1

VLE

Block

Block Block

Packets

QT

able

s

HuffTab

les


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Conclusion

Embedded system architectures and the applications mappedon them are so complex, that modeling them needs to be doneat abstract levels and separately.

Acc

ura

cy

an

d c

ost

high

lowabstraction pyramid

design space

idea (requirements)

back of the envelope

abstract approximate models

cycle-accurate modelssynthesizable models

Ab

stra

cti

on

an

d o

pp

ort

un

itie

s high

low

app arch

map

Performance numbers


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Conclusion (2)In this course I will be dealing with abstract models,mainly for streaming applications. These are dataflowmodels that are graphs or networks of functional actors or processes, respectively, that transform input streams of tokens to

output streams of tokens.

Actor:

[c] = f(a,b)

A

BC

If arguments a and b are available in inputFIFO buffers A and B, and room for c isavailable in FIFO buffer C, thenf() can fire (execute). f() isa mathematical function.for i= 1 :1 : N, [a] = Read(A); [x] = f(a); [b] = Read(B); [c] = g(x, b); Write(c, C); end

A

BC

{f, g}

Process:


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Conclusion (3)

t N

ab

p

c

d

t = (N; a={a(i) | i = 1:1:N}), a blockof data with header N, a parameter.

while(1){[N, a] = f1(t);for i = 1 : 1 : N, [p(i), b(i)] = f2(a(i)); if p(i) = T, [c] = f3(b(i)); end if p(i) = F, [d] = f3(b(i)); end end}

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