Harvard vs Von Neumann Architecture

Program Counter• The PC holds the address of the instruction being executed.• The address of the next instruction to be executed. • After fetching an instruction, the PC is incremented automatically so that the

instructions are normally retrieved sequentially from the Program Memory.

ALU

Two Operand Operation

Single Operand Instruction

Data Movement

• You will notice that the program counter has a stack with it. This is a hardware stack and on the x14 Architecture it is 8 levels deep. Note that this is not a stack used to pass parameters. This stack can only be used to store the program counter when you jump to a sub-routine or when an interrupt occurs.

• When either of these events takes place, the current program counter plus 1 is pushed into the stack. This allows the program counter itself to be reloaded with the address of the new instruction that is to be executed.

• In the case of a jump to subroutine instruction, this address is embedded in the CALL instruction. For the case of the interrupt, the program counter is set to 0x04 which is the interrupt vector address.

• We will now follow the instruction MOVF PORTB, W through the architecture. This instruction will take the contents of PORTB and copy them into W register. You will see the opcode underneath the instruction and the most significant 6 bits of opcode defines MOVF instruction. The next bit is the destination bit, which in this case is a 0 and means we will store the results in W. The least significant 7-bits define the location of the register that we are going to get the data from that we move to W. In this case, the value is address 0x06 which is PORTB on the device we are using.

• The destination bit defines where the results of the instruction will go. Since there is only one bit, there are only two options for the destination address, either into the W register or back into the register defined in the instruction itself, in this case the File register PORTB.

• The 14 bit opcode is contained in the instruction that the program counter was pointing to, and is the information that comes out of the program bus to the instruction register.

Interrupt

• The main program is running, performing some function in a circuit, but when an interrupt occurs the main program halts while another routine is carried out. When this routine finishes, the processor goes back to the main routine again.

Byte Oriented OperationsByte instructions work on all 8 bits in the file. So a byte instruction would be followed by the appropriate file number.

NOP•Uses one instruction cycle.•Used for short time delays.

MOVWF f

• Moves contents of W register to another file register location.

• Status affected: None• Example MOVWF Temp

MOVF f,d

• f d • Moves contents of one file register to another.• Can be used to set the Zero Status bit.• Status Affected: ZExample

MOVF Temp, f

CLRF f• The contents of register ‘f’ are cleared and the Z bit

is set.• File (f) = 00000000• Status affected: Z• The CLRF f instruction clears the file that you

identify in the 7-bit file register address.

CLRW

• W register is cleared. Zero bit (Z) is set.• W = 00000000• Status affected: Z• The CLRW instruction clears the contents of the W register

to all zeros.

INCF f,df + 1 dStatus affected: ZThe Increment instruction simply increments the file by one. It is important to note that if a register with all ones in it is incremented, it will roll over to all zeros and the zero status bit will be set.

DECF• f - 1 d• Status affected: Z

The Decrement File Instruction operates the same as the Increment File Instruction except that it decrements the register by one instead of incrementing. If a register containing all zeros is decremented, it will rollover to all ones.

ADDWF f, d• W + f d• Adds the contents of W to a

File Register• Status Affected: Z

ANDWF f,d

• W AND f d• Status Affected: Z• Performs Logical AND with W and f• Can be used to mask out specific bits

The And W File (ANDWF) instruction will execute a logical AND with the contents of the W register and the file register. This command is often used when it is necessary to clear or ‘mask out’ certain bits in a register. This is done by ANDing the register with a value that has zero in the bit positions that need to be cleared

and ones in the bit positions that need to be maintained.

IORWF f, d

• W OR f d• Status Affected: Z• Executes Inclusive-OR with W and a File Register• The Inclusive OR W File instruction will perform a bit-by-bit inclusive OR function

with the W register and the F register.

XORWF f,d

• W XOR f d• Status Affected: Z• Executes Exclusive-OR with W and a File Register• Likewise, the Exclusive OR W File Instruction operates in a similar

fashion except that the function is the Exclusive OR instead of the Inclusive OR.

COMF f,d• f d• Executes a one’s compliment on a file register.• The compliment file instruction simply executes a one’s compliment

on the contents of the file register.

RRF f, d

RLF f,d

SUBWF f,d• f - W d• Subtracts the contents of W from a File Register• Two’s compliment• Status affected: C, DC, Z

DECFSZ f,d & INCFSZ f,d

The INCFSZ instruction works the same way except that the skip will not occur until the count variable goes all the way up to 255 and then rolls over to zero.

SWAPF f,d

Bit Oriented Operations• The bit instructions act on a particular bit in a file, so the instruction would

be followed by the data which specifies the file register and bit number.1. BCF2. BSF3. BTFSC4. BTFSS

BCF f,b • Clear the bit in a file F.• Status Affected: None• Operands: 0 ≤ f ≤ 127

0 ≤ b ≤ 7

BCF PORTB, 4; bit 4 is cleared in the PORTB PORTB bit 4 is cleared; bit 4 = 0

BSF f,b• Set bit in file F.• Status Affected: None• Operands: 0 ≤ f ≤ 127

0 ≤ b ≤ 7BSF PORTB, 4; bit 4 is set in the PORTB

PORTB bit 4 is set; bit 4 = 1

BTFSC f,b• Test bit in file skip if clear.• Operation: skip if (f<b>) 0• Status Affected: None• Operands: 0 ≤ f ≤ 127

0 ≤ b ≤ 7BTFSC STATUS, 2This test bit 2 in STATUS Register if it is clear then the next instruction is missed. Bit 2 is the zero bit so the program jumps if the result of an instruction was zero.

BTFSS f,b• Test bit in file skip if set.• Operation: skip if (f<b>) = 1• Status Affected: None• Operands: 0 ≤ f ≤ 127

0 ≤ b ≤ 7BTFSS STATUS, 2This tests bit 2 in the STATUS Register is set then the next instruction is

skipped.

Literal and Control Operations

• It modify files with variables or control the movement of data from one file to another.

ADDLW k• Add a numbe(literal) to W.• Operation: (W) + k (W)• Operands: 0 ≤ k ≤ 255

ADDLW 7Will add 7 to W, the result is placed in W.

ANDLW k• The contents of W are ANDed with an 8 bit number(literal). The result

is placed in W.

• ANDLW 12H• ANDLW b’00010010’• ANDLW .18

CALL k• Call Subroutine• CALL WAIT1MIN- This will call a routine (you have written) to wait for 1

min.

GOTO k• This is an unconditional jump to a specified location in the program.• GOTO SIREN

IORLW k• The contents of the W register are Ored with the file F.• The result is placed in the W register.• Status Affected: Z• IORLW 7

MOVLW k• The 8 bit literal is moved directly into W.• MOVLW .127• MOVLW b’11101100’• MOVLW 15h

RETFIE• Return from Interrupt• This instruction is used to return from an interrupt.

RETLW k• This instruction is used at the end

of a subroutine to return to the program following a CALL instruction. The literal value is placed in the W register. This instruction can also be used with a look up table.

• RETLW 0

RETURN

•This instruction is used to return from a subroutine.

SUBLW kThe contents of the W register are subtracted from a number.Operation: k – (W) (W)

XORLW k• The contents of the W register are Exclusive Ored with the literal. • If a number of the input port, indicating temperature, is the same as

the literal then the result is zero and the zero bit is set.• XORLW 67

CLRWDTThe watchdog timer is cleared. The watchdog is a safety device in the microcontroller if the program crashes the watchdog timer times out then restarts the program.Status affected: TO, PD

SLEEP• When executing this instruction the chip is put into sleep mode. The

power-down status bit (PD) is cleared, the time-out status bit is set, the watchdog timer and its prescaler is cleared and the oscillator driver is turned off. The watchdog timer still keeps running form its own internal clock.

• Status affected TO, PD