ECE-305: Fall 2017

MOS Capacitors and Transistors

Professor Peter BermelElectrical and Computer Engineering

Purdue University, West Lafayette, IN USApbermel@purdue.edu

Pierret, Semiconductor Device Fundamentals (SDF)Chapters 15+16 (pp. 525-530, 563-599)

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MOS capacitor

2

VG

p-Si

‘metal’/heavily doped

polysilicon

SiO2

tox » 1- 2 nm

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1) Gate voltage2) Example problem3) MOS capacitors4) MOS field-effect transistors

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gate voltage and surface potential

33

EC

EV

Ei

EF

Si

metal

DVS

DVOX

EFM

¢VG = DVOX +fS

0 < fS < 2fF

¢VG = ?

Gate voltage is surface potential + oxide voltage drop

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DVox = xoE ox

band banding in p-type MOS

4Fig. 16.6, Semiconductor Device Fundamentals, R.F. Pierret

Flat band Accumulation Depletion Inversion

¢VG = 0 ¢VG < 0 0 < ¢VG <VT ¢VG > ¢VT

fS = 0 fS < 0 0 <fS < 2fF fS > 2fF

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5

E x( )

x

P

E S =qNA

k Se0

W

1

2E SW = fS

E S

W

W =2k Se0fS

qNA

cm

E S =2qNAfS

k se0

V/cm

QB = - 2qk se0NAfS C/cm2

QB = -qNAW fS( )C/cm2

0 <fS < 2fF

¢VG = -QB fS( )Cox

+fS

MOS electrostatics: depletion(results from last time)

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MOS electrostatics: inversion

6

EC

EV

Ei

EF

Si

f x( ) f 0( )

x

fF

fS » 2fF fF

WT

WT =2KSe0

qNA

2fF

é

ëê

ù

ûú

1/2 Maximum depletion region depth

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delta-depletion approximation

7

r

x

metal

-xo

WT

r = -qNA

QB = -qNAWT

Qn

WT =2k Se0 2fF

qNA

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delta-depletion approximation

8

E x( )

x

P

W

E S

E 0+( ) = - QB

KSe0

E 0( ) = -QS

KSe0

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MOS electrostatics: inversion

9

EC

EV

Ei

EF

Si

f x( ) f 0( )

x

fF

fS » 2fF

fF

WT

WT =2KSe0

qNA

2fF

é

ëê

ù

ûú

1/2

¢VG = -QB 2fF( ) +Qn

Cox

+ 2fF

¢VT = -QB 2fF( )

Cox

+ 2fF

Qn = -Cox ¢VG - ¢VT( )

¢VG = -QS

Cox

+ 2fF

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MOS capacitor

10

VG

p-Si

‘metal’/heavily doped

polysilicon

SiO2

tox » 1- 2 nm

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1) Gate voltage2) Example problem3) MOS capacitors4) MOS field-effect transistors

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11

example

source drain

SiO

2

silicon

S G D

Assume n+ poly Si gate1018 channel dopingtox = 1.5 nm

What is VT?e-field in oxide at VG = 1V?

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12

example (cont.)

¢VG = -QS fS( )Cox

+fS

¢VT = -QB 2fF( )

Cox

+ 2fF

VT = fms -QB 2fF( )

Cox

+ 2fF

fF =kBT

qln

NA

ni

æ

èçö

ø÷

Cox = KOe0 xo

QB = - 2qk se0NA 2fF

QB = -qNAW 2fF( )

fms = -kBT

qln

NAND

ni2

æ

èçö

ø÷

fF = 0.48 V

Cox = 2.36 ´10-6 F/cm2

QB = -5.71´10-7 C/cm2

fms = -1.06 VVT = 0.14 V

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13

example (cont)

Qn = -Cox VG -VT( )

E OX = -QS

k oxe0

= -Qn +QB 2fB( )

k oxe0

Qn = -2.06 ´10-6 C/cm2

E OX = 7.3´106 V/cm

Qn

q= -1.3´1013 C/cm2

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MOS capacitor

14

VG

p-Si

‘metal’/heavily doped

polysilicon

SiO2

tox » 1- 2 nm

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1) Gate voltage2) Example problem3) MOS capacitors4) MOS field-effect transistors

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MOS capacitor

15

p-Si

vS sinwt

+VG

+

-

-

VG + vS sinwt

~

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MOS capacitor in depletion

16

VG

p-Si

W fS( ) W VG( )

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17

MOS capacitor in depletion

xo

W fS( )

KO

KS

C = ?

Gate

Undepleted P-type semiconductor

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a simpler problem

xo

W fS( )

KO

KSCS =

KSe0

W fS( )

Cox =KOe0

xo

1

C=

1

Cox

+1

CS

C =CSCox

CS + Cox

C =Cox

1+ Cox CS

C =Cox

1+KOW fS( )

KSxo

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result

xo

W fS( )

k ox

k Si

C =Cox

1+KOW fS( )

KSxo

VG

Cox

CS

fS

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20

s.s. gate capacitance vs. d.c. gate bias

C

VG¢

C =Cox

1+KOW fS( )

KSxo

accumulationdepletion

inversion

VT¢

flat band

Cox

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21

s.s. gate capacitance vs. d.c. gate bias

C

VG¢

C =Cox

1+KOW fS( )

KSxo

accumulation

depletion

inversion

VT¢

flat band

Cox

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22

capacitance vs. gate voltage

C

VG¢

accumulationdepletion

inversion

VT¢

flat band

Cox

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C =Cox

1+KOW fS( )

KSxo

23

high frequency vs. low frequency

C

VG¢

accumulationdepletion

inversion

VT¢

flat band

Cox

high frequency

low frequency

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C =Cox

1+KOW fS( )

KSxo

24

high frequency vs. low frequency

C

VG¢VT

¢

Cox

high frequency

low frequency

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25

high frequency vs. low frequency

p-Si

n+-Si n+-Si

MOS capacitor

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MOS capacitor

26

VG

p-Si

‘metal’/heavily doped

polysilicon

SiO2

tox » 1- 2 nm

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1) Gate voltage2) Example problem3) MOS capacitors4) MOS field-effect transistors

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side and top views of a MOSFET

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p-type silicon

S Dn-Si

VGVS = 0 VD

n-Si

SiO2

side view

L

top view

LW

source draingate

Metal Oxide Semiconductor Field Effect Transistor

27

transistors

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transistor as a “black box”

control

terminal 1

terminal 2

I1

There are many kinds of transistors:

MOSFETSOI MOSFETSB FETFinFETMODFET (HEMT)bipolar transistorJFETheterojunction bipolar transistorBTBT FETSpinFET…

black box

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terminal 4

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the bulk MOSFET

source drain

SiO

2

silicon

S G D

(Texas Instruments, ~ 2000)

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B

Source Drain

Gate

ID

Body

circuit symbol

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the MOSFET as a 2-port device

Source

Drain

Gate

current vs. voltage (IV)characteristics

MOSFET circuit symbol

ID VG ,VS ,VD( )

ID

S

D

G

ID

VGS

VDS

common source

input

output

ID VGS( ) at a fixed VDS

ID VDS( ) at a fixed VGS

transfer

output 31

IV characteristics: resistor

R

I

V

I I = V R

more resistance

less resistance

V

+

-

Ohm’s LawI = V R

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IV characteristics: ideal current source

VI0

V

I

I = I0+

-

I

I = I0

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IV characteristics: transistors

VDS

S

D

G

ID

n-channel enhancement mode MOSFET

ID

VGS1

gate voltage controlled resistor“linear region”

gate voltage controlled current source

“saturation region”34

IV characteristics: real current sources

V

I

I0

VI0

+

-

R0

I

I = I0 +V R0

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IV characteristics: transistors

VDS

S

D

G

ID

n-channel enhancement mode MOSFET

ID

VGS1

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MIOSFET IV: output characteristics

VDS

S

D

G

ID

n-channel enhancement mode MOSFET

ID

“saturation region”“linear region”

VGS

“subthreshold region”

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output vs. transfer characteristics

VDS

ID

S

D

G

output characteristics

VGS

ID

VDS2 >VDS1

VDS1

VT

“threshold voltage”

Ilow VDS

high VDS

transfer characteristics

“saturation voltage”

VDSAT

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applications of MOSFETs

symbol

D

SG

switch amplifier

input signal

output signal

S

D

G

S

D

G

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n-channel vs. p-channel MOSFET

VD > 0VS = 0

p-type silicon

S Dn-Si n-Si“channel”

side view

L

VG >VT

n-MOSFET

IDID

VG <VT

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VD < 0VS = 0

n-type silicon

S Dp-Si p-Si

side view

L

p-MOSFET

“channel”

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MOSFET device metrics

VDS

­

ID

mA mm( )

VDD

on-current (mA/μm)

ID VGS = VDS = VDD( )

transconductance

gm ºDID

DVGS VDS

mS mm( )

on-resistance

RON W- mm( )output resistance:

rd W- mm( )

VGS

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MOSFET device metrics (ii)

VGS

­

ID

mA mm( )

VDD

transfer characteristics:

VDS = 0.05 V

VDS = VDD

VTSAT VTLIN

threshold voltage

off-current

ION

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MOSFET device metrics (iii)

VGS

­

log10 ID

mA mm( )

VDD

transfer characteristics:

ION

VDS = 0.05 V

VDS = VDD

subthreshold swing:

mV decade( )

DIBL (drain-induced barrier lowering)

mV V( )off-current

VT

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summary

Given the measured characteristics of a MOSFET, you should be able to determine:

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1. on-current: ION

2. off-current: IOFF

3. subthreshold swing, S4. drain induced barrier lowering: DIBL5. threshold voltage: VT (lin) and VT (sat)6. on resistance: RON

7. drain saturation voltage: VDSAT

8. output resistance: ro

9. transconductance: gm

Our goal is to understand these device metrics.

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Example: 32 nm N-MOS technology

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conclusions

Can calculate the charge distribution, surface potentials, and gate voltage ranges for each MOS regime

Can then calculate capacitance as a function of frequency and gate voltage

The MOS capacitor is the foundation for MOS field effect transistors, characterized by many device metrics

Next time, we will use band structures to estimate the device metrics for MOSFETs

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