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MOS Field-EffectTransistors (MOSFETs)

Introduction 235

4.1 Device Structure and PhysicalOperation 236

4.2 Current-VoltageCharacteristics 248

4.3 MOSFET Circuits at DC 262

4.4 The MOSFET as an Amplifierand as a Switch 270

4.5 Biasing in MOS AmplifierCircuits 280

4.6 Small-Signal Operation andModels 287

4.7 Single-Stage MOSAmplifiers 299

4.8 The MOSFET InternalCapacitances and High-Frequency Model 320

4_9 Frequency Response ofthe CS Amplifier 326

4.10 The CMOS Digital LogicInverter 336

4.11 The Depletion-TypeMOSFET 346

4_12 The SPICE MOSFET Modeland Simulation Example 351

Summary 359

Problems 360

INTRODUCTION

Having studied the junction diode. which is the most basic two-terminal semiconductordevice, we now turn our attention to three-terminal semiconductor devices. Three-terminaldevices are far more useful than two-terminal ones because they can be used in a multitudeof applications, ranging from signal amplification to digital logic and memory. The basicprinciple involved is the use of the voltage between two terminals to control the currentflowing in the third terminal. In this way a three-terminal device can be used to realize acontrolled source, which as we have learned in Chapter I is the basis for amplifier design.Also, in the extreme. the control signal can be used to cause the current in the third terminalto change from zero to a large value. thus allowing the device to act as a switch. As we also

235

236 CHAPTER 4 MOS FIELD-EFFECT TRANSISTORS (MOSFETs)

learned in Chapter I, the switch is the basis for the realization of the logic inverter, the basicelement of digital circuits.

There are two major types of three-terminal semiconductor device: the metal-ox ide-semiconductor field-effect transistor (MOSFET), which is studied in this chapter, and thebipolar junction transistor (8JT), which we shall study in Chapter 5. Although each of the twotransistor types offers unique features and areas of application, the MOSFET has become byfar the most widely used electronic device, especially in the design of integrated circuits (lCs),which are circuits fabricated on a single silicon chip.

Compared to B1Ts, MOSFETs can be made quite small (i.e., requiring a small area onthe silicon IC chip), and their manufacturing process is relatively simple (see Appendix A).Also, their operation requires comparatively little power. Furthermore, circuit designers havefound ingenious ways to implement digital and analog functions utilizing MOSFETs almostexclusively (i.e., with very few or no resistors). All of these properties have made it possibleto pack large numbers of MOSFETs (>200 million!) on a single IC chip to implement verysophisticated, very-large-scale-integrated (VLSI) circuits such as those for memory and micro-processors. Analog circuits such as amplifiers and filters are also implemented in MOStechnology, albeit in smaller less-dense chips. Also, both analog and digital functions areincreasingly being implemented on the same IC chip, in what is known as mixed-signal design.

The objective of this chapter is to develop in the reader a high degree of familiarity withthe MOSFET: its physical structure and operation, terminal characteristics, circuit models,and basic circuit applications, both as an amplifier and a digital logic inverter. Although dis-crete MOS transistors exist, and the material studied in this chapter will enable the reader todesign discrete MOS circuits, our study of the MOSFET is strongly influenced by the factthat most of its applications are in integrated-circuit design. The design of Ie analog anddigital MOS circuits occupies a large proportion of the remainder of this book.

4.1 DEVICE STRUCTURE AND PHYSICAL OPERATION

The enhancement-type MOSFET is the most widely used field-effect transistor. In this sec-tion, we shall study its structure and physical operation. This will lead to the current-voltagecharacteristics of the device, studied in the next section.

4.1.1 Device StructureFigure 4.1, shows the physical structure of the n-channel enhancement-type MOSFET. Themeaning of the names "enhancement" and "u-channel" will become apparent shortly. Thetransistor is fabricated on a p-type substrate, which is a single-crystal silicon wafer that pro-vides physical support for the device (and for the entire circuit in the case of an integratedcircuit). Two heavily doped Ii-type regions, indicated in the figure as the n+ source I and the11+ drain regions, are created in the substrate. A thin layer of silicon dioxide (Si02) of thick-ness lox (typically 2-50 run),2 which is an excellent electrical insulator, is grown on the sur-face of the substrate, covering the area between the source and drain regions. Metal isdeposited on top of the ox ide layer to form the gate electrode of the device. Metal contactsare also made to the source region, the drain region, and [he substrate, also known as the

I The notation ,,+ indicates heavily doped e-type silicon. Conversely, ,,- is used to denote lightly dopedn-type silicon. Similar notation applies for rz-type silicon.

2 A nanometer (nm) is 10-9 m or O.OOl,um. A micrometer (pm), or micron, is 10--6m. Sometimes theoxide thickness is expressed in angstroms. An angstrom (A) is 10-1 nm, or 10-10 m.

4.1 DEVICE STRUCTURE AND PHYSICAL OPERATION 237

s

Sourceregion

Channelregion

p·type substrate(Body)

BDrain region

(a)

Source (S) Gale (G) Drain (0)

Oxide (Si02) Metal(th~ckness = lox) ;/

l II' l Channeln+ jregion

IE L , Ip-type substrate

(Body)

Body(B)

(b)

FIGURE 4.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) cross-section. Typically L::: 0.1 to 3 tun, W = 0.2 to 100 um, and the thickness of the oxide layer (lQ.•) is in therange of 2 to 50 nrn.

body.' Thus four terminals are brought out: the gate terminal (G), the source terminal (S),the drain terminal (D), and the substrate or body terminal (B).

At this point it should be clear that the name of the device (metal-oxide-semiconductor FET)is derived from its physical strucrure. The name, however, has become a general one and is

3 In Fig. 4.1, the contact to the body is shown on the bottom of the device. This will prove helpfullaterin explaining a phenomenon known as the "body effect." It is important to note, however, that in actualICs, contact to the body is made at a location on the top of the device.


used also for FETs that do not use metal for the gate electrode. In fact, most modem MOSFETsare fabricated using a process known as silicon-gate technology, in which a certain type ofsilicon, called polysilicon, is used to form the gate electrode (see Appendix A). Our descriptionof MOSFET operation and characteristics applies irrespective of the type of gate electrode.

Another name for the MOSFET is the insulated-gate FET or IGFET. This name alsoarises from the physical structure of the device, emphasizing the fact that the gate electrodeis electrically insulated from the device body (by the oxide layer). It is this insulation thatcauses the current in the gate terminal to be extremely small (of the order of 1O~15A).

Observe that the substrate forms pn junctions with the source and drain regions. In nor-mal operation these pn junctions are kept reverse-biased at all times. Since the drain will beat a positive voltage relative to the source, the two pn junctions can be effectively cut off bysimply connecting the substrate terminal to the source terminal. We shall assume this tobe the case in the following description of MOSFET operation. Thus, here, the substrate willbe considered as having no effect on device operation, and the MOSFET will be treated as athree-terminal device, with the terminals heing the gate (G), the source (S), and the drain (D).It will be shown that a voltage applied to the gate controls current flow between source anddrain. This current will flow in the longitudinal direction from drain to source in the regionlabeled "channel region." Note that this region has a length L and a width W, two importantparameters of the MOSFET. Typically, L is in the range of 0.1 11m to 311m, and W is in therange of 0.2 11m to 100 .urn. Finally, note that the MOSFET is a symmetrical device; thus itssource and drain can be interchanged with no change in device characteristics.

4.1.2 Operation with No Gate VoltageWith no bias voltage applied to the gate, two back-to-back diodes exist in series betweendrain and source. One diode is formed by the pn junction between the 11+ drain region andthe p-type substrate, and the other diode is formed by the pll junction between the p-typesubstrate and the ,,+ source region. These back-to-back diodes prevent current conductionfrom drain to source when a voltage l)DS is applied. In fact, the path between drain andsource has a very high resistance (of the order of 1012 Q).

4.1.3 Creating a Channel for Current FlowConsider next the situation depicted in Fig. 4.2. Here we have grounded the source and thedrain and applied a positive voltage to the gate. Since the source is grounded. the gate voltageappears in effect between gate and source and thus is denoted res. The positive voltage on thegate causes, in the first instance, the free holes (which are positively charged) to be repelledfrom the region of the substrate under the gate (the channel region). These holes are pusheddownward into the substrate, leaving behind a carrier-depletion region. The depletion region ispopulated by the bound negative cbarge associated with the acceptor atoms. These charges are"uncovered" because the neutralizing holes have been pushed downward into the substrate.

As well, the positive gate voltage attracts electrons from the n" source and drain regions(where they are in abundance) into the channel region. When a sufficient number of elec-trons accumulate near the surface of the substrate under the gate, an It region is in effect cre-ated. connecting the source and drain regions. as indicated in Fig. 4.2. ow if a voltage isapplied between drain and source, current flows through this induced II region, carried bythe mobile electrons. The induced II region thus forms a channel for current flow from drainto source and is aptly called so. Correspondingly, the MOSFET of Fig. 4.2 is called anII-channel MOSFET or, alternatively, an NMOS transistor, Note that an It-channelMOSFET is formed in a p-type substrate: The channel is created by inverting the substratesurface from p type to 11 type. Hence the induced channel is also called an inversion layer.


+ Gate electrode

- Vcs .I. -Induced

5 G 'Hype DOxide (SiO,) channel

I\\

<,

n L I~------ J

/ " /-~~ '-~----

Depletion region

p-type substrate

B

FIGURE 4.2 The enhancement-type NMOS transistor with a positive voltage applied to [he gale. An11 channel is induced at the top or the substrate beneath the gate.

The value of Vcs at which a sufficient number of mobile electrons accumulate in thechannel region to form a conducting channel is called the threshold voltage and is denotedV,.4 Obviously, V, for an n-channel FET is positive. The value of VI is controlled duringdevice fabrication and typically lies in the range of 0.5 V to 1.0 V.

The gate and the channel region of the MOSFET form a parallel-plate capacitor, with theoxide layer acting as the capacitor dielectric. The positive gate voltage causes positivecharge to accumulate on the top plate of the capacitor (the gate electrode). The correspond-ing negative charge on the bottom plate is formed by the electrons in the induced channel.An electric field thus develops in the vertical direction. It is this field that controls theamount of charge in the channel, and thus it determines the channel conductivity and, inturn, the current that will flow through the channel when a voltage VDS is applied.

4.1.4 Applying a Small VDS

Having induced a channel, we now apply a positive voltage VDS between drain and source, asshown in Fig. 4.3. We first consider the case where VDS is small (i.e., 50 mY or so). The voltageuos causes a current if) to flow through the induced n channeL Current is carried by free elec-trons traveling from source to drain (hence the names source and drain). By convention, thedirection of current flow is opposite to that of the flow of negative charge. Thus the currentin the channel, iD, will be from drain to source, as indicated in Fig. 4.3. The magnitude of iD

depends on the density of electrons in the channel, which in turn depends on the magnitudeof vcs- Specifically, for vcs= VI the channel is just induced and the current conducted is stillnegligibly small. As vcs exceeds V" more electrons are attracted into the channel. We mayvisualize the increase in charge carriers in the channel as an increase in the channel depth.The result is a channel of increased conductance or, equivalently, reduced resistance. In fact,the conductance of the channel is proportional to the excess gate voltage (vcs - V,), also

4 Some texts use VT to denote the threshold voltage. We use VI to avoid confusion with the thermalvoltage Vr.

240 CHAPTER 4 MOS FIELD~EFFECT TRANSISTORS (MOSFETs)

+

sG

.I.D'=

+VDS (small)

tis = iD

11

lnduced n-channel

c-rype substrate

8

FIGURE 4.3 An NMOS transistor with vas> V, and with a small VDS applied. The device acts as a resis-tance whose value is determined by VGS- Specifically, the channel conductance is proportional to VGS - VI' andthus io is proportional to (vGS - V,)vns. Note that the depletion region is not shown (for simplicity).

known as the effective voltage or the overdrive voltage. It follows that the current iD willbe proportional to Ves - VI and, of course, to the voltage VDS that causes io to flow.

Figure 4.4 shows a sketch of iD versus VDS for various values of VGS- We observe that theMOSFET is operating as a linear resistance whose value is controlled by vas- The resistanceis infinite for VGS~ VI' and its value decreases as vcs exceeds VI.

io (mA)

vcs=VI+2V

0.1

1JGS = VI + 1.5 V

VGs=V,+lV

ucs = VI + 0.5 V

VCS -s VI

vos (m V)

FIGURE 4.4 The io-vos characteristics of the MOSFET in Fig. 4.3 when the voltage applied betweendrain and source, vos- is kept small. The device operates as a linear resistor whose value is controlled by vas.


The description above indicates that for the MOSFET to conduct, a channel has to beinduced. Then, increasing vcs above the threshold voltage Vt enhances the channel, hencethe names enhancement-mode operation and enhancement-type MOSFET, Finally,we note that the current that leaves the source terminal (is) is equal to the current that entersthe drain terminal (iv), and the gate current to= O.

EXERCISE

4.1 From (he description above of the operation of the MOSFET for small VDS, we note that iD is proportionalto (ves - Vr)vos· Find (he constant of proportionality for the particular device whose characteristics aredepicted in Fig. 4.4. Also, give the range of drain-to-source resistances corresponding to an overdrivevoltage, VGS - V" of 0.5 V to 2 V.Ans. J mA/Y'; 2 ill to 0.5 kO

4.1.5 Operation as VDs Is IncreasedWe next consider the situation as VDS is increased. For this purpose let vcs be held constantat a value greater than Vt• Refer to Fig. 4.5, and note that VDS appears as a voltage dropacross the length of the channel. That is, as we travel along the channel from source todrain, the voltage (measured relative to the source) increases from 0 to VDS. Thus the volt-age between the gate and points along the channel decreases from vas at the source end to"cs- VDS at the drain end. Since the channel depth depends on this voltage, we find that thechannel is no longer of uniform depth; rather, the channel will take the tapered form shownin Fig. 4.5, being deepest at the source end and shallowest at the drain end. As VDS isincreased, the channel becomes more tapered and its resistance increases correspondingly.Thus the iD-VDS curve does not continue as a straight line but bends as shown in Fig. 4.6.Eventually, when VOS is increased to the value that reduces the voltage between gate and

+

G

+

s

VDS

t is = iDD-=

e-channel

p-type substrate

B

FIGURE 4.5 Operation of the enhancement NMOS transistor as Vos is increased. The induced channelacquires a tapered shape, and its resistance increases as vos is increased. Here, VGS is kept constant at avalue> VI.

•242 CHAPTER4 MOS FIELD·EFFECT TRANSISTORS (MOSFETs)

~ Triode ~:~.!----Saturation ----..,.~vos < lIGS - VI uos ~ VGS - V(

'-- Current saturates because thechannel is pinched off at thedrain end, and VDS no longeraffects the channel.

Curve bends becausethe channel resistanceincreases with VDS

Almost a straight linewith slope proportionalto (llGS - VI)

o liDS

FIGURE 4.6 The drain current iD versus the drain-to-source voltage VDS for an enhancement-type MOStransistor operated with lies> V,.

channel at the drain end lO V,-that is, vco = VI or uos - VDS = VI or VDS;' Ves - VI-the chan-nel depth at the drain end decreases to almost zero, and the channel is said to be pinchedoff, Increasing vDsbeyond this value has little effect (theoretically, no effect) on the channelshape, and the current through the channel remains constant at the value reached for vos ;;;;vcs - VI' The drain current thus saturates at this value, and the MOSFET is said to haveentered the saturation region of operation. The voltage lIJ)S at which saturation occurs isdenoted lIDS)31'

(4.1 )

Obviously, for every value of ves;;::: VI' there is a corresponding value of lIDSsat. The device oper-ates in the saturation region if VDS ;;::: VOSs:w The region of the i,ruos characteristic obtainedfor lIOS < VDSsoI is called the triode region, a carryover from the days of vacuum-tube deviceswhose operation a FET resembles.

To help further in visualizing the effect of 1)DS. we show in Fig. 4.7 sketches of the chan-nel as VDS is increased while Ves is kept constant. Theoretically. any increase in lJDS above

UDS ~ VGS - VI

Channel DrainSource

t VDS = 0

FIGURE 4.7 Increasing VDS causes the channel to acquire a tapered shape. Eventually, as uos reachesVes ~ V" the channel is pinched off at the drain end. Increasing Pm above Ves ~ V, has little effect (theoretically.no effect) on the channel's shape.

•4.1 DEVICE STRUCTURE AND PHYSICAL OPERATION 243

VOSS3t (which is equal to vcs - VI) has no effect on the channel shape and simply appearsacross the depletion region surrounding the channel and the 11+ drain region.

4.1.6 Derivation of the iD-VDS RelationshipThe description of physical operation presented above can be used to derive an expressionfor the iD-vDS relationship depicted in Fig. 4.6. Toward that end, assume that a voltage Ves isapplied between gate and source with ves> Vt to induce a channel. Also, assume that a volt-age vDS is applied between drain and source. First, we shall consider operation in the trioderegion, for which the channel must be continuous and thus VCD must be greater than VI or,equivalently. Vos < VGS - V" In this case the channel will have the tapered shape shown inFig. 4.8.

The reader will recall that in the MOSFET. the gate and the channel region form a parallel-plate capacitor for which the oxide layer serves as a dielectric. If the capacitance per unitgate area is denoted C,n and the thickness of the oxide layer is lox. then

c = co.ro.t tox

(4.2)

where cox is the permittivity ofthe silicon oxide,

em ~ 3.geo ~ 3.9 X 8.854 X 1O-12 ~ 3.45 X 10-" F/m

The oxide thickness tox is determined by the process technolo~y used to fabricate theMOSFET. As an example. for lox ~ 10 nm. Cox ~ 3.45 X 10-3 Fzrn", or 3.45 fF/J.lm2 as it isusually expressed.

Now refer to Fig. 4.8 and consider the infinitesimal strip of the gate at distance x fromthe source. The capacitance of this strip is C,).(W dx. To find the charge stored on this infini-tesimal strip of the gate capacitance. we multiply the capacitance by the effective voltage

Gate

Oxide

-- - - +----=--:--b-:f------t'::Source Channel

~~:""----,e~"-Capacitor of valueCoxW d.x

I I I Charge dqI •I E ~ _ dv(x)

dxI I I I____ .J1 ".-fI.,.,..I..J...-9=="'v.,,(x,,) .L ...•._ Voltage

? i~(x) visI I I I Io L •.r

FIGURE 4.8 Derivation of the iO-TJDS characteristic of the 'MOS transistor.


between the gale and the channel at point x, where the effective voltage is me voltage that isresponsible for inducing the channel at point x and is thus [VCS- VeX) - V,] where <-(x) is thevoltage in the channel at point x. It follows that the electron charge dq in the infinitesimalportion of the channel at point x is

dq = -C,,(Wdx)[vcs-v(x)-V,] (4.3)

where the leading negative sign accounts for the fact that dq is a negative charge.The voltage uos produces an electric field along the channel in the negative x direction.

At point x this field can be expressed as

E(x) = _ dv(x)dx

The electric field E(x) causes the electron charge dq to drift toward the drain with a velocitydxldt,

dx _ E() _ dv(x)- - -11 x - 11 --dt n II dx(4.4)

where 11" is the mobility of electrons in the channel (called surface mobility). It is a physicalparameter whose value depends on the fabrication process technology. The resulting driftcurrent i can be obtained as follows:

i = <!!J.dt

= <!!J. dxdx dt

Substituting for the charge-per-unit-length dql dx from Eq. (4.3), and for the electron driftvelocity dxl dt from Eq. (4.4), results in

Although evaluated at a particular point in the channel, the current i must be constant at allpoints along the channeL Thus i must be equal to the source-to-drain current. Since we areinterested in the drain-to-source current iD, we can find it as

which can be rearranged in the form

iDdx = I1"CuxW[vGS-V,-v(x)]dv(x)

Integrating both sides of this equation from x;;;; 0 to x;;;; L and, correspondingly, for t(0) ;;;;0to veL) = VDS,

gives

(4.5)


This is the expression for the tD-vos characteristic in the triode region. The value of the CUf-

rent at the edge of the triode region or. equivalently, at the beginning of the saturation regioncan be obtained by substituting vos= Ves - VI' resulting in

(4.6)

This is the expression for the iD-vos characteristic in the saturation region; it simply givesthe saturation value of iD corresponding to the given vcs. (Recall that in saturation in remainsconstant for a given Ves as VDS is varied.)

Tn the expressions in Eqs. (4.5) and (4.6), IlIlCox is a constant determined by the processtechnology used to fabricate the Il-channel MOSFET. It is known as the process transcon-ductance parameter, for as we shall see shortly, it determines the value of the MOSFETtransconductance. is denoted k;'. and has the dimensions of AN2:

(4.7)

Of course, the il)-VDS expressions in Eqs. (4.5) and (4.6) can be written in terms of k;' asfollows:

(Triode region) (4.5a)

. I k' W( V)'lD=2: -: VCS- I

(Saturation region) (4.6a)

In this book we will use the forms with (11I1Co.~) and with k~ interchangeably.From Eqs. (4.5) and (4.6) we see that the drain current is proportional to the ratio of the

channel width W to the channel length L. known as the aspect ratio of the MOSFET. Thevalues of Wand L can be selected by the circuit designer to obtain the desired i-u character-istics. For a given fabrication process. however, there is a minimum channel length. Lmm' Infact, the minimum channel length that is possible with a given fabrication process is used tocharacterize the process and is being continually reduced as technology advances. Forinstance, at the time of this writing (2003) the state-of-the-art in MOS technology is a O.13-,umprocess, meaning that for this process the minimum channel length possible is 0.13 tlln.There also is a minimum value for the channel width W. For instance, for the 0.13-11m pro-cess just mentioned. Wmin is 0.16 pm. Finally. we should note that the oxide thickness fO.f

scales down with Lmin. Thus, for a 1.5-pm technology. tax is 25 nm. but the modern O.13-pmtechnology mentioned above has to.( = 211m.

Consider a process technology for which L.nin =0.4 urn. taf = Bnm. u, = 450 cm2N s, and V, = 0.7 V.

(a) Find c; and r;(b) For a MOSFET with W/ L = & ,urn/O.& um. calculate the values of VGS and VOSmin neededto operate the transistor in the saturation region with a de current If) = 100 pA.

(c) For the device in (b), find the value of VGS required to cause the device to operate as a 1000-0:resistor for very small uos.

246 CHAPTER 4 MOS FIELD,EFFECT TRANSISTORS (MOSFETs)

Solutionfox 3.45 X 10-11

C =_=:::...:.::c:..:....:~£1.1 lox 8 X 10-9

,= 4.32 fF//lm'

, 'k;' = /loCo, = 450 (em /V·s) x 4.32 (fF//lm')

8 2 -15"= 450 x 10 (/lm /V·s) X 4.32 x 10 (F//lm')

(a) 4.32 X 10-3 F/m'

194x 10-6 (F/v·s)

194 /lA/v'

(b) For operation in (he saturation region,

. Ik' W( V)'ID=2" RZ VGS- 1

Thus,

I 8 2100 = -x 194x-(Vcs-0.7)2 0.8

which results in

VGS - 0.7 = 0.32 V

or

V GS = 1.02 V

andV DSmin = V GS - V t = 0.32 V

(c) For the MOSFET in the triode region with VDS very small,

iD= k~~(VGS- V,)uos

from which the drain-to-source resistance ros can be found as

"os =: V.Dsl1D small v/)::;

Thus

1000 = -{,

194xlO XIO(VCs-0.7)

which yields

V CS - 0.7 = 0.52 V

Thus,

V GS = 1.22 V


EXERCISES

4.2 For a O.8-,Um process technology for which lox z; 15 nm and ,un:::;:550 cm2/V. s, find Cox. k~, and the over-drive voltage Vov == V GS- v, required to operate a transistor having W/ L = 20 in saturation with 10 =0.2 mA. What is the minimum value of VDS needed?Ans. 2.3 fFIllm2; 127 IlAIV'; 0.40 V; 0.40 V

4.3 Use the expression for operation in the triode region to show that an n-channel MOSFET operated withan overdrive voltage Vov == Vcs - v, and having a small VDS across it behaves approximately as a linearresistance rDS,

rDS = 1/[k;~VovJCalculate the value of rDS obtained for a device having k~ ::;100 .uA/V1 and W / L = 10 when operatedwith an overdrive voltage of 0.5 V.

Ans. 2 kQ

4.1.7 The p-Channel MOSFETA p-channel enhancement-type MOSFET (PMOS transistor), fabricated on an n-type substratewith p+ regions for the drain and source. has holes as charge carriers. The device operatesin the same manner as the u-channel device except that vGS and VDS are negative and thethreshold voltage VI is negative. Also, the current iJ) enters the source terminal and leavesthrough the drain terminal.

PMOS technology originally dominated MOS manufacturing. However. because NMOSdevices can be made smaller and thus operate faster, and because NMOS historically requiredlower supply voltages than PMOS. MOS technology has virtually replaced PMOS. 'ever-theless, it is important to be familiar with the PMOS transistor for two reasons: PMOS devicesare still available for discrete-circuit design, and more importantly, both PMOS and NMOStransistors are utilized in complementary MOS or CMOS circuits. which is currently thedominant MOS technology.

4.1.8 Complementary MOS or CMOSAs the name implies, complementary MOS technology employs MOS transistors of bothpolarities. Although CMOS circuits are somewhat more difficult to fabricate than NMOS,the availability of complementary devices makes possible many powerful circuit-design possi-bilities. Indeed. at the present time CMOS is the most widely used of all the Ie technologies.This statement applies to both analog and digital circuits. CMOS technology has virtuallyreplaced designs based on NMOS transistors alone. Furthermore. at the time of this writing(2003), CMOS technology has taken over many applications that just a few years ago werepossible only with bipolar devices. Throughout this book. we will study many CMOS circuittechniques.

Figure 4.9 shows a cross-section of a CMOS chip illustrating how the PMOS and NMOStransistors are fabricated. Observe that while the NMOS transistor is implemented directly inthe p-type substrate. the PMOS transistor is fabricated in a specially created 11 region, knownas an II well. The two devices are isolated from each other by a thick region of oxide that func-tions as an insulator. Not shown on the diagram are the connections made to the p-type bodyand to the 11 well. The latter connection serves as the body terminal for the PMOS transistor.

•248 CHAPTER 4 MOS FIELD-EFFECT TRANSISTORS (MOSFETs)

NMOS PMOS

S G o o G sPolysilicont Thick Sial (isolation)

~~~~ ~~~~

p-Iype body

FIGURE 4.9 Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in aseparatea-type region,knownas an /I well.Anotherarrangementis also possiblein whichan u-typebody isused and the" device is fanned in a p well. Not shown are the connections made to the p-type body and tothe" well: the latter functions as the body terminal for the p-channel device.

4.1.9 Operating the MOS Transistor in the Subthreshold RegionThe above description of the II-channel MOSFET operation implies that for vcs < V,. no cur-rent flows and the device is cut off. This is not entirely true. for it has been found that forvalues of 1Jes smaller than but close to VI' a small drain current flows. In this subthresholdregion of operation the drain current is exponentially related to Vcs, much like the ie-VsErelationship of a BJT, as will be shown in the next chapter.

Although in most applications the MOS transistor is operated with vcs > V,. there arespecial, but a growing number of. applications that make use of subthreshold operation. Inthis book, we will not consider subthreshold operation any further and refer the reader to thereferences listed in Appendix F.

4.2 CURRENT-VOLTAGE CHARACTERISTICS

Building on the physical foundation established in the previous section for the operation ofthe enhancement MOS transistor, we present in this section its complete current-voltagecharacteristics. These characteristics can be measured at de or at low frequencies and thusare called static characteristics. The dynamic effects that limit the operation of the MOSFETat high frequencies and high switching speeds will be discussed in Section 4.8.

4.2.1 Circuit SymbolFigure 4.10(a) shows the circuit symbol for the l1-channel enhancement-type MOSFET.Observe that the spacing between the two vertical lines that represent the gate and the chan-nel indicates the fact that the gate electrode is insulated from the body of the device. Thepolarity of the /Hype substrate (body) and the II channel is indicated by the arrowhead onthe line representing the body (8). This arrowhead also indicates the polarity of the transistor.namely, that it is an n-charmel device.

Although the MOSFET is a symmetrical device, it is often useful in circuit design to desig-nate one terminal as the source and the other as the drain (without having to write Sand Dbeside the terminals). This objective is achieved in the modified circuit symbol shown inFig. 4.10(b). Here an arrowhead is placed on the source terminal, thus distinguishing it from

4.2 CURRENT-VOLTAGE CHARACTERISTICS 249

D D D

G o----1/-----o B

s s s(a) (b) (c)

FIGURE 4.10 (a) Circuit symbol for the n-channel enhancement-typeMOSFET. (b) Modified circuitsymbol with an arrowhead on the source terminal 10 distinguish it from the drain and to indicate devicepolarity (i.e.. 11 channel). (e) Simplified circuit symbol to be used when the source is connected to the bodyor when the effect of the body on device operation is unimportant.

the drain terminal. The arrowhead points in the normal direction of current flow and thusindicates the polarity of the device {i.e., n channel). Observe that in the modified symbol,there is no need to show the arrowhead on the body line. Although the circuit symbol ofFig. 4.1 O(b) clearly distinguishes the source from (he drain, in practice it is the polarity ofthe voltage impressed across the device that determines source and drain; (he drain is alwayspositive relative to (he source in all n-channel FET.

In applications where the source is connected to the body of the device, a further simpli-fication of the circuit symbol is possible, as indicated in Fig. 4.1 O(c). This symbol is alsoused in applications when the effect of the body on circuit operation is not important, as willbe seen later.

4.2.2 The iD-VDS CharacteristicsFigure 4.11 (a) shows an n-channel enhancement-type MOSFET with voltages vas and Vf)S

applied and with the normal directions of current flow indicated. This conceptual circuit canbe used to measure the ;f)-VOS characteristics. which are a family of curves, each measuredat a constant vcs- From the study of physical operation in the previous section, we expecteach of the if)-vDS curves to have the shape shown in Fig. 4.6. This indeed is the case, as isevident from Fig. 4.l1(b), which shows a typical set of lo=vos characteristics. A thoroughunderstanding of the MOSFET terminal characteristics is essential for the reader whointends to design MOS circuits.

The characteristic curves in Fig. 4.1 1(b) indicate that there are three distinct regions ofoperation: (he cutofT region, the triode region, and the saturation region. The saturationregion is used if the FET is to operate as an amplifier. For operation as a switch, the cutoffand triode regions are utilized. The device is cut off when vGS < V,. To operate the MOSFETin the triode region we must first induce a channel,

"cs <: V, (Induced channel) (4.8)

and then keep VDSsmall enough so that the channel remains continuous. This is achieved byensuring that the gate-to-drain voltage is

UGO > VI (Continuous channel) (4.9)

This condition can be stated explicitly in terms of vos by writing VCI) = VGS + VS!) = VGS - vos.thus,

vas - Vf)S > VI


io (mA) 1....,.,..............,-

1.0

, • Vas :s *i7G't'='" ~ J" . Tnod I vDS "2: vas - V/

~ n e:~,~.<- __ Saturation region .••~region I

1.5

./'/-f------- Vas = V, + 2.0

I~tIDS = Vcs - V,/

1,...~--------- Vos = V, + 1.5

iD Iic = 0 'f

+~Vas t is = ;D

VOS 1",,:.,..'-------------- vGS = V, + 0.5

2 3 4 '" vDS(V)vos :s: Vt (cutoff)

+0.5 • J'r------------ Vas = V/ + 1.0

o

(a) (b)

FIGURE 4.11 (a) An ll-channel enhancement-type MOSFET with Vas and uos applied and with the normaldirections of current flow indicated. (b) The iO-VDS characteristics for a device with k~ (W / L) = 1.0 mA/Y-.

which can be rearranged to yield

VDS < vas - VI (Continuous channel) (4.10)

Either Eq. (4.9) or Eq. (4.10) can be used to ascertain triode-region operation. In words, 'hen-channel enhancement-type /vfOSFET operates in the triode region when vas is greater ThallVt and the drain voltage is lower than the gate voltage by at least Vt volts.

In the triode region. the iD-vos characteristics can be described by the relationship ofEq. (4.5), which we repeat here,

iD = k;'~[ (vas - V,)vDS- ~v~sJ (4, II)

where k,: :; f.lllCOX is the process transconductance parameter; its value is determined bythe fabrication technology. If VDSis sufficiently small so that we can neglect the v~s term inEq. (4.11), we obtain for the iD-VDS characteristics near the origin the relationship

io = k;'~(vGS- V,)vos (4.12)

This linear relationship represents the operation of the MOS transistor as a linear resistanceros whose value is controlled by Vcs. Specifically. for uos set to a value VGS. rDS is given by

1'05= ~D5Iv",'m"1I = [k;' ~(VGS- V,)f (4,[3)D vcs=VGS

We discussed this region of operation in the previous section (refer to Fig. 4.4). It is alsouseful to express rDS in terms of the gate-to-source overdrive voltage,


as

(4.15)

Finally. we urge the readerto show that the approximation involved in writing Eq. (4.12)is based on the assumption that VDS 4: 2 Vov-

To operate the MOSFET in the saturation region. a channel must be induced,

"as "V, (Induced channel) (4.16)

and pinched off at the drain end by raising vos to a value that results in the gate-to-drainvoltage falling below V"

VGD ,; V, (Pinched-off channel) (4.17)

This condition can be expressed explicitly in terms of VJ)S as

VDS " vas - V, (Pinched-off channel) (4.18)

In words, the n-channel enhancement-type MOSFET operates in the saturation region whenVGS is greater than V, and the drain voltage does not fall below the gate voltage by morethan V, volts.

The boundary between the triode region and the saturation region is characterized by

"os = "cs - V, (Boundary) (4.19)

Substituting this value of VDS into Eq. (4.11) gives the saturation value of the current il) as

(4.20)

Thus in saturation the MOSFET provides a drain current whose value is independent of thedrain voltage VDS and is determined by the gate voltage VGS according to the square-law rela-tionship in Eq. (4.20). a sketch of which is shown in Fig. 4.12. Since the drain currentis independent of the drain voltage. the saturated MOSFET behaves as an ideal currentsource whose value is controlled by vcs according to the nonlinear relationship in Eq. (4.20).Figure 4.13 shows a circuit representation of this view of MOSFET operation in the satura-tion region. Note that this is a large-signal equivalent-circuit model.

Referring back to the io=vos characteristics in Fig. 4.11 (b). we note that the boundarybetween the triode and the saturation regions is shown as a broken-line curve. Since thiscurve is characterized by VDS = VGS - Vr• its equation can be found by substituting for VGS - v,by Vf)S in either the triode-region equation (Bq. 4.11) or the saturation-region equation(Eq. 4.20). The result is

. 1 eW 2If) = 2: "T.VDS (4.21)

It should be noted that the characteristics depicted in Figs. 4.4. 4.11, and 4.12 are for aMOSFET with k;( IVI L) ~ 1.0 mAN' and V, = I V.

Finally, the chart in Fig. 4.14 shows the relative levels of the terminal voltages of theenhancement-type NMOS transistor for operation in the triode region and in the saturationregion.


1.0

in (mA)

2.0

1.5

0.5

o 0.5 1.t-V,

UGS (V)

FIGURE 4.12 The i[)-uGS characteristic for an enhancement-type NMOS transistor in saturation (V,= I V.t<. IVIL = 1.0 mAN 'J.

ic = 0-G 0----0

+UGS

+VDS

I1c;s ~ V/vDS ~ uos - V,

FIGURE 4.13 Large-signal equivalent-circuit model of an e-channel MOSFET operating in the saturationregion.

Voltage

Overdrivevoltage

IIII

IISaturation

t~V,

1 l\ DTriode

\iFIGURE 4.14 The relative levels of theterminal voltages of the enhancement NMOStransistor for operation in the triode region andin the saturation region.


EXERCISES,

4.4 An enhancement-type NMOS transistor with VI:::: 0.7 V has its source terminal grounded and a 1.5·V dcapplied to the gate. In what region does the device operate for (a) VD = +0.5 Y? (b) Vo = 0.9 Y?(c) VD=3 Y?Ans.(a) Triode; (b) Saturation; (c) Saturation

4.5 If the NMOS device in Exercise 4.4 has )l"C,x= 100 )lNy2, W = 10 tun, and L = I usn, find the value ofdrain current that results in each of the three cases (a), (b), and (c) specified in Exercise 4.4.Ans.(a) 275 )lA; (b) 320 )lA; (c) 320)lA

4.6 An enhancement-type NMOS transistor with VI:::: 0.7 V conducts a current iv::;; 100/1A when Vcs = uos::::1.2 V. Find the value of iD for VGS:::: 1.5 V and VDS:::: 3 V. Also, calculate the value of the drain-to-source resistance 'DS for small VDS and ucs= 3.2 V.Ans.256 )lA; 500 Q

4,2.3 Finite Output Resistance in SaturationEquation (4.12) and the corresponding large-signal equivalent circuit in Fig. 4.13 indicatethat in saturation, in is independent of VDS' Thus a change flvos in the drain-to-source volt-age causes a zero change in lo- which implies that the incremental resistance looking intothe drain of a saturated MOSFET is infinite. This, however, is an idealization based on thepremise that once the channel is pinched off at the drain end, further increases in V[)S have noeffect on the channel's shape. But, in practice, increasing Vos beyond VDSsal does affect the chan-nel somewhat. Specifically, as VDS is increased, the channel pinch-off point is moved slightlyaway from the drain, toward the source. This is illustrated in Fig. 4.15, from which we notethat the voltage across the channel remains constant at vos - VI = VDSsat' and the additionalvoltage applied to the drain appears as a voltage drop across the narrow depletion regionbetween the end of the channel and the drain region. This voltage accelerates the electronsthat reach the drain end of the channel and sweeps them across the depletion region into thedrain. Note, however, that (with depletion- layer widening) the channel length is in effectreduced, from L to L - !J.L, a phenomenon known as channel-length modulation. Now,since iD is inversely proportional to the channel length (Eq. 4.20), io increases with VDS.

Source

I Vf)Ssat = Vas - V, +IIE L- 6L

IIIE L

IIIi - ~ uos - lJDS~at

---~'16Lr-I I

I'I

(!Mnnel Drain

FIGURE 4.15 Increasingvos beyond VDSsa! causes the channelpinch-offpoint to moveslightlyaway fromthedrain. thus reducingthe effectivechannel length(by l:!.L).


To account for the dependence of iD on UDS in saturation, we replace L in Eq. (4.20) withL - M to obtain

. Ik' W ( V)''D = -' --- vcs-2 nL-/J.L '

where we have assumed that (/j.LI L) ~ 1. Now, if we assume that dL is proportional to VDS'

/J.L = A'VDS

where il' is a process-technology parameter with the dimensions of j1m/Y. we obtain for iD,

io = ~k;'~(1 + ~VOS)cVGS- V,)'

Usually. X; L is denoted A,A'A = -L

It follows that A is a process-technology parameter with the dimensions of v-! and that, fora given process. A is inversely proportional to the length selected for the channel. In termsof .A..,the expression for iD becomes

(4.22)

A typical set of in-VDs characteristics showing the effect of channel-length modulation isdisplayed in Fig. 4.16. The observed linear dependence of if) on vf)S in the saturation regionis represented in Eq. (4.22) by the factor (I + AVos). From Fig. 4.16 we observe that whenthe straight-line iD-vns characteristics are extrapolated they intercept the vDs-axis at thepoint VDS = -v:~.where VA is a positive voltage. Equation (4.22), however, indicates that if) = 0

VGS - Vt = 2.0 V

•Triode ~~E-

,-,-,-'-

»<,-'-/'//':-------_ti--------- VGS - Vt = 1.0V

,- -/' - ---

?~:::.:='=======----

VGS - Vt = 1.5 V

o

Vcs-V,$O

FIGURE 4.16 Effect of vos on iD in the saturation region. The MOSFET parameter VA depends on theprocess technology and, for a given process, is proportional (0 the channellength L.

•4.2 CURRENT-VOLTAGE CHARACTERISTICS 255

ic = 0~

G 0----0

+,-----~----o D

+ FIGURE 4.17 Large-signal equiva-lent circuit model of the e-channelMOSFET in saturation, incorporatingthe output resistance roo The outputresistance models the linear depen-dence of iD on vos and is given byEq. (422).

r; »os

at vDS -II A. It follows that

IVA = ;;:

and thus VA is a process-technology parameter with the dimensions of V. For a given pro-cess, VA is proportional to the channel length L that the designer selects for a MOSFET. Justas in the case of A, we can isolate the dependence of VA on L by expressing it as

VA = V~L

where V~ is entirely process-technology dependent with the dimensions of V/)1m. Typically,V ~ falls in the range of 5 V/)1m to 50 V/)1m. The voltage VA is usually referred to as the Earlyvoltage, after 1.M. Early, who discovered a similar phenomenon for the BJT (Chapter 5).

Equation (4.22) indicates that when channel-length modulation is taken into account,the saturation values of iD depend on VDS' Thus. for a given Vcs, a change !:1vDs yields acorresponding change 6.iD in the drain current if). It follows that the output resistance ofthe current source representing iD in saturation is no longer infinite. Defining the output

. 5resistance rI) as

[ di J-1r = _D_

o - dVDS l,osconslant(4.23)

and using Eq. (4.22) results in

r o (4.24)

which can be written as

r o (4.25)

or, equivalently,

VAr =-

o iD

where ID is the drain current without channel-length modulation taken into account; that is,

(4.26)

Thus the output resistance is inversely proportional to the drain current. Finally, we show inFig. 4.17 the large-signal equivalent circuit model incorporating r I)"

5 Tn this book we use '-0 to denote the output resistance in saturation, and 'IJS to denote the drain-to-source resistance in the triode region, for small VDS'

•256 CHAPTER 4 MOS FIELD-EFFECT TRANSISTORS (MOSFETs)

EXERCISE

4.7 An NMOS transistor is fabricated in a OA-,um process having f1nCw; = 200 ,UA/V2 and v; = 50 VI,urn ofchannel length. If L = 0.8 Jim and W = 16 .urn. find VA and A. Find the value of ID that results when thedevice is operated with an overdrive voltage Vov= 0.5 V and Vos = 1 V. Also. find the value of rQ at thisoperating point. If Vvs is increased by 2 V, what is the corresponding change in ID?

Ans.40 V; 0.025 V-I; 0.51 mA; 80 krl; 0.025 mA

4.2.4 Characteristics of the p-Channel MOSFETThe circuit symbol for the p-channel enhancement-type MOSFET is shown in Fig. 4.18(a).Figure 4.18(b) shows a modified circuit symbol in which an arrowhead pointing in the nor-ma] direction of current flow is included on the source terminal. For the case where thesource is connected to the substrate, the simplified symbol of Fig. 4.18(c) is usually used.The voltage and current polarities for normal operation are indicated in Fig. 4.l8(d). Recallthat for the p-channel device the threshold voltage Vt is negative. To induce a channel weapply a gate voltage that is more negative than VI'

Vcs ,; V, (Induced channel) (4.27)

s s s

Go-j1----0 B

D D D

(a) (b) (cJ

Vc;s

~

tis = iD

+ vosic = 0 t io +

(d)

FIGURE 4.18 (a) Circuit symbol for the p-channel enhancement-type MOSFET. (b) Modified symbolwith an arrowhead on the source lead. (c) Simplified circuit symbol for the case where the source is con-nected to the body. (d) The MOSFET with voltages applied and the directions of current flow indicated.Note that vas and tJvs are negative and iv flows out of the drain terminal.

4.2 CURRENT-VOLTAGE CHARACTERISTICS

or, equivalently,

and apply a drain voltage that is more negative than the source voltage (i.e., VDS is negativeor, equivalently, USD is positive). The current io flows out of the drain terminal, as indicatedin the figure. To operate in the triode region, V/)S must satisfy

VDS ~ vcs - VI (Continuous channel) (4.28)

that is, the drain voltage must he higher than the gate voltage by at least IV,!. The current iois given by the same equation as for MOS, Eq. (4.11), except for replacing k~with k;,

(4.29)

where Vcs, V" and VDS are negative and the transconductance parameter k; is given by

(4.30)

where Pp is the mobility of holes in the induced p channel. Typically, Pp ~ 0.25 to 0.5p" andis process-technology dependent.

To operate in saturation, VDS must satisfy the relationship

VOS 5, vGS - V, (Pinched-off channel) (4.3 I)

that is, the drain voltage must be lower than (gate voltage + I VA). The current io is given bythe same equation used for NMOS, Eq. (4.22), again with k~replaced with k;,

(4.32)

where Ves, VI' A.,and VDS are all negative. We should note, however, that in evaluating t»using Eqs. (4.24) through (4.26), the magnitudes of A and VA should be used.

To recap, to turn a PMOS transistor on, the gate voltage has to be made lower than thatof the source by at least IV'!. To operate in the triode region, the drain voltage has to exceedthat of the gate by at least IV,I; otherwise, the PMOS operates in saturation.

Finally, the chart in Fig. 4.19 provides a pictorial representation of these operatingconditions.

Voltage tsIV,I

Threshold tr;Overdrive

voltageFIGURE 4.19 The relative levels of the terrni-nal voltages of the enhancement-type PMOStransistor for operation in the triode region andin the saturation region.

257


EXERCISE

4.8 The PMOS transistor shown in Fig. E4.8 has V, = -I V, k~ = 60 flAt v". and W/ L = 10. (a) Findthe range of VG for which the transistor conducts. (b) In terms or Vc. find the range of VD for which thetransistor operates in the triode region. (c) In terms of Vc, find the range of VD for which the transistoroperates in saturation. (d) Neglecting channel-length modulation (i.e .. assuming A:;; 0), find the valuesof IVovl and VG and the corresponding range of VD to operate the transistor in the saturation mode with10:;;75 tlA. (e) If A:;; -0.02 V-I, find the value of ro corresponding to the overdrive voltage determinedin (d). (f) For A= -{J.02 V-I and for the value of Vov determined in (d), find lo at V/)= +3 V and at Vv =o V; hence, calculate the value of the apparent output resistance in saturation. Compare [0 the valuefound in (e).

+5 V

VD FIGURE E4.8

Ans.(a) V G S +4 V; (b) VD <: V G+ l ; (e) V D S V G + I; (d) 0.5 V. 3.5 V, S4.5 V; (e) 0.67 Mfl;(f) 78 flA, 82.5 flA, 0.67 Mfl (same).

4.2.5 The Role of the Substrate-The Body EffectIn many applications the source terminal is connected to the substrate (or body) terminal 8,which results in the pn junction between the substrate and the induced channel (see Fig. 4.5)having a constant zero (cutoff) bias. In such a case the substrate does not play any role incircuit operation and its existence can be ignored altogether.

In integrated circuits, however, the substrate is usually common to many MOS transistors.In order to maintain the cutoff condition for all the substrate-to-channel junctions, the sub-strate is usually connected to the most negative power supply in an NMOS circuit (the mostpositive in a PMOS circuit). The resulting reverse-bias voltage between source and body(V~B in an n-channel device) will have an effect on device operation. To appreciate this fact,consider an NMOS transistor and let its substrate be made negative relative to the source.The reverse bias voltage will widen the depletion region (refer to Fig. 4.2). This in turnreduces the channel depth. To return the channel to its former state. vGS has to be increased.

The effect of VS8 on the channel can be most conveniently represented as a change in thethreshold voltage V,. SpecificaJly, it has been shown that increasing the reverse substratebias voltage VS8 results in an increase in V, according to the relationship

(4.33)

where V,u is the threshold voltage for V'B = 0; IP!is a physical parameter with (2IP!) typically0.6 V; ris a fabrication-process parameter given by

::,-J2_q::-N-",,-,E.,Y = -Cox

(4.34)

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