Post on 20-Mar-2018
July 2009
Agilent EEsof EDA Overview
Agilent EEsof EDA Todd Cutler
GM Agilent EEsof EDA
From MMIC to Multi-technology design
Electronic
Measurement $3.3B
Chemical
Analysis $1.5B
Life
Sciences $1.8B
Industrial,
Comp/Semi
Comms
Environment Forensics
Petro/chem Food
Pharma/
biotech
Academic/
government
Business Groups
$6.6 billion* revenue in FY 2011
Aero/Defense
Agilent Technologies Solutions that Address Critical Customer Challenges
* Non-GAAP
Agilent EEsof EDA Leading Communications Product Design
• Co-design
• Interoperability
• Design flows
integration
• Design
verification
Agilent EEsof Technology Development Centers A Global Presence to Support You
Ghent, Belgium
Santa Rosa, California
Westlake Village, California
New Delhi, India
Japan
Modeling Center
Beijing, China
Alpharetta, Georgia
Santa Clara,
California
We Go Wherever the Communication Signal Goes
High Speed Design Device Modeling
Electronic System-Level Design RF/Microwave Design
Wireless Verification with SystemVue • Determine system performance of
ADS design with modulated signals
using SystemVue
• Refine system blocks with accurate
models from circuit design, e.g. X-
Parameters or connect to ADS co-
simulation directly
• Incorporate VSA 89601 measurement
software to analyze standard
compliant signal
Visit the SystemVue booth at Poster Session
Agilent EEsof Chip/Module/Package Design Flow
8
3D EM in a Big Picture, Co-Design!
o The old way: the sequential design process or “Throw-The-Die-Over-The-Wall”,
breaks down due to much smaller design form factors of packages, chips, and
substrates in modern high frequency and high speed designs
o Market Trends:
o Much closer proximity, embedded passives – increased parasitics, couplings
o Multichip modules, and stacked die become more common - forcing IC,
package, and board designers to work together more closely
o Challenge: Chip/package/module/board co-design from the
beginning of design process is inevitable!
Board
PoP
Chips
SMD SiP RF SiP
Packages
EMPro Workshop Version 2.0
Agilent RF Chip/Module/Package Investments
• Increasing design tools Integration to serve Multi-
technology IC/Module/Package/Board design
– Integrated multi-solver electromagnetic technologies
– Tight integration with enterprise PCB tools
– OpenAccess support and development for IC interoperability
• Addressing Design Flow Challenges
– integrated 3D EM saves designers hours
– Complete back end design flow through manufacturing, including Desktop DRC &
LVS reduced vendors and support
• Enhancing Simulation Technology Performance
– Broad investments in multi-core, GPU, and distributed simulation for circuit,
system, and EM engines.
– Behavioral modeling: X-Parameters and new FET modeling generate fast,
accurate nonlinear models
Agilent RF Chip/Module/Package Investments
• Key foundries support &
partnership
– GaAs, GaN, SiGe, Si
– Today with us :
• FH IAF
• IHP
• UMS
Gaetec
Knowledge*on
1. The Only Complete MMIC PDK Offering in the EDA Market, that are fully supported, maintained, and regularly updated by the foundries
ADS 2011: The IC/Module/Package/Board Design Solution
Realizing the Multi-Technology Vision
Multi-Technology Circuit Design
• Multiple die (IC and IPD)
• Multiple substrates (die, laminate, LTCC,
package, PCB)
• Multiple process design kits (PDKs)
– GaAs (HBT, pHEMT), GaN, SiGe, Si …
Integrated Electro-Magnetic Solvers
• Multi-Technology EM simulation
• Multi-layer 3D Planar EM simulation
• Easy EM simulation for the every engineer
Common Database : OpenAccess Mounted on Board
Multiple ICs Multiple Technologies
On Laminate &
Packaged
Page 11
3D EM Simulation Technologies
• Frequency Domain EM
• 3D Planar structures
• Full Wave and Quasi-Static
• Dense & Compressed Solvers
• Multiport simulation at no additional
cost
• High Q
• Frequency Domain EM
• 3D Arbitrary Structures
• Full Wave EM Simulation
• Direct, Iterative Solvers
• Multiport simulation at no
additional cost
• High Q
• Time Domain EM
• 3D arbitrary structures
• Full Wave EM simulations
• Handles much larger and
complex problems
• Simulate full size cell phone
antennas
• EM simulations per each port
• GPU based hardware
acceleration
FDTD
(Finite Difference Time Domain)
FEM
(Finite Element Method)
MoM
(Method of Moments)
FDTD
FEM
MoM
Page 12
Visit the 3DEM booth at Poster Session
IC-CAP Device Modeling • Industry leading platform for device modeling
• Powerful characterization and analysis capabilities for
any kind of semiconductor devices and processes
• Linking to Agilent testers, and individual measurement
instruments like DC, CV, S-parameter, NVNA, 1/f
Noise, wafer prober, switching matrix, thermo chuck
• Automated measurement and modeling modules for
BSIM3, BSIM4, BSIM-SOI, PSP, HiSim, HiSim-
HighVoltage
• Agilent Root Model, Agilent HBT Model
• custom solutions for EEHEMT and Angelov modeling,
including nonlinear-RF
• IC-CAP WaferPro: multi-site, multi-wafer, automated
wafer measurements
• Agilent NeuroFET Modeling Package
• DataPro Statistical Analysis
Visit the IC-CAP booth at Poster Session
End-to-end Device Modeling Flow
A Turn-key Solution
Automated
Measurements
IC-CAP Database
Model & PDK
Verification
Data Analysis
& Selection
Model
Extraction
Model Parameter Extraction: MBP IC-CAP WaferPro / DataPro
Model Stability& Quality Test
MQA / PQA
Design Variability