system_on_a_chip_verfication-rashinkar
Module Metrics Soc Verification Session3 What Can Metrics Tell Us Ameyer
DSI Division of Integrated Systems Design Functional Verification Environments Development Goals Our main goals are in the field of developing modular.
System-level Exploration for Pareto- optimal Configurations in Parameterized Systems-on-a-chip Architectures Tony Givargis (Frank Vahid, Jörg Henkel) Center.
Verification of Configurable Processor Cores Marines Puig-Medina, Gulbin Ezer, Pavlos Konas Design Automation Conference, 2000 Page(s): 426~431 presenter:
