4 bit counter
ROM
Standard cells library design
Hakim Weatherspoon CS 3410, Spring 2011 Computer Science Cornell University Memory See: P&H Appendix C.8, C.9.
Snick snack CPSC 121: Models of Computation 2009 Winter Term 1 Sequential Circuits (“Mealy Machines”) Steve Wolfman, based on notes by Patrice Belleville.
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Sequential Circuit Design: Principle
Memory
1 PCI transaction ordering verification using trace inclusion refinement Mike Jones UV Meeting October 4, 1999.