EECC551 - Shaaban #1 Lec # 10 Winter 2010 2-7-2011 Mainstream Computer System Components Double Date Rate (DDR) SDRAM One channel = 8 bytes = 64 bits wide.
EECC551 - Shaaban #1 Lec # 9 Fall 2008 10-21-2008 Input/Output & System Performance Issues System Architecture & I/O Connection StructureSystem Architecture.
EECC551 - Shaaban #1 Lec # 10 Fall 2004 10-26-2004 Computer System Components SDRAM PC100/PC133 100-133MHZ 64-128 bits wide 2-way inteleaved ~ 900 MBYTES/SEC.
EECC551 - Shaaban #1 Lec # 10 Fall 2006 10-31-2006 Mainstream Computer System Components Double Date Rate (DDR) SDRAM Current DDR2 SDRAM Example: PC2-6400.
EECC550 - Shaaban #1 Lec # 9 Winter 2010 2-10-2011 Mainstream Computer System Components Double Date Rate (DDR) SDRAM One channel = 8 bytes = 64 bits wide.
Motherboards
EECC551 - Shaaban #1 Lec # 10 Fall 2005 11-1-2005 Mainstream Computer System Components SDRAM PC100/PC133 100-133MHZ 64-128 bits wide 2-way inteleaved.
EECC551 - Shaaban #1 Lec # 10 Spring 2006 5-8-2006 Mainstream Computer System Components SDRAM PC100/PC133 100-133MHZ 64-128 bits wide 2-way inteleaved.
