Xilinx 2012 Analyst Meeting

© Copyright 2012 Xilinx Inc.

Xilinx 2012

Analyst Meeting

Xilinx Copyright 2012

Safe Harbor Disclaimer

During the course of this presentation, we may provide projections

or other forward-looking statements regarding future events and/or

future financial performance. Forward- looking statements and

projections can be identified by the use of words such as “expect”,

“anticipate”, “believe”, and “estimate”. We wish to caution you that

such statements are predictions and that actual events or results

may differ materially. We refer you to the documents the Company

files from time to time with the Securities and Exchange

Commission. Specifically, the Company’s last filed Forms 10-K

and 10-Q. These documents contain and identify important risk

factors that could cause the actual results to differ materially from

those contained in our projections and other forward-looking

statements. © Copyright 2012 Xilinx, Inc. Xilinx, the Xilinx logo,

Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated

brands included herein are trademarks of Xilinx in the United

States and other countries. All other trademarks are the property of

their respective owners


“All in” at 28nm

– Moshe Gavrielov, President and CEO

28nm Leadership in the Broader Markets

– Vin Ratford, Sr. VP Worldwide Marketing and Business Development

28nm Leadership in Communications

– Krishna Rangasayee, Corporate VP & GM, Communications Business Unit

Corporate Financials and Outlook

– Jon Olson, CFO

Q & A

Reception & Demos

Agenda


Moshe Gavrielov President & Chief Executive Officer, Xilinx

“All In” at 28nm


Indisputable Leadership

at 28nm

First to Tape Out & Deliver Silicon at 28nm

Outstanding Partnership with TSMC

Pioneering 3D IC Technology

Leading Edge Processing Sub-systems

System to IC Tools & IP to Enable Silicon

From Programmable Logic to

Programmable System Integration


Xilinx Business Drivers

Programmable Imperative

Relentless

Systems

Integration

Insatiable Intelligent Bandwidth


The Programmable Imperative Accelerates

Source: Gartner

28nm =

2X 45nm Cost > $170 M

Extreme Costs Limit ASIC & ASSP Viability at 28nm

28/22-nm

32-nm

45-nm

65-nm

90-nm

130-nm

180-nm

0 45 90 135 180

($ Million)

Estimated Chip Design Cost, by Process Node, Worldwide, 2011 Design cost ($M)

Mask cost ($M)

Embedded software ($M)

Yield ramp-up cost ($M)


Insatiable Bandwidth… and Spending

Source: EETimes, Light Reading, Gizmodo.

We Will Soon Live in a 100 Gbps World By Stacey Higginbotham I Feb.22, 2011, 8:21 PT I 14 Comments

Docomo to ramp network spending following outage

Sprint announces “aggressive”

LTE 4G rollout for mid-2012

China’s big data center build-out

France Telecom Orange to increase fiber network spending in 2012


Insatiable Bandwidth Expands to Latin America

Source: eCommerce Facts, GigaCom

318% Growth in Facebook Users

20% Growth in Mobile Subscribers

Almost 2x the Size of the US Market

Brazil now has

236m mobile

numbers,

That’s a 20%

increase in the

last year 20th Dec 2011 by Anna Heim


Insatiable Bandwidth Across India

Optical fibre-based 100Mbps

Broadband connections to debut in India 26th September 2011 by AAYUSH SRYA

Google’s Internet Bus enables 1.5 million

first-timers to discover the Internet in India 7th September 2011 by AAYUSH SRYA

Bharti taps China’s ZTE to begin 4G roll-

out in India 3rd October 2011 by JON RUSSELL

Source: The Next Web, India


Insatiable Bandwidth Growing in Africa

Source: White African

World’s 2nd Largest & Fastest

Growing Mobile Market

735M Subscribers

100%

80%

60%

40%

20%

0%

1980 1990 2000 2010

Rich

Middle class

Poor

313 million middle class 34%

Source: Economy Watch


Trends Driving Insatiable Intelligent Bandwidth

Embedded Security

Extreme Bandwidth

5X Growth in 5 Years

Ubiquitous Computing

Smart Vision

Lane Detection

“Everyware”

The 3rd Wave in

Computing

Is It Safe?

Source: Ericsson, Adam Greenfield.

http://www.gettyimages.com/detail/illustration/globe-with-world-map-and-circuit-board-in-royalty-free-illustration/200213603-001


Relentless System Integration

Programmable

Systems

Integration

Xilinx SSIT

AMS

Extreme Bandwidth Smart Vision

Ubiquitous Computing Embedded Security

AMS

http://www.xilinx.com/publications/prod_mktg/Industiral_Imaging_Solutions_Product_Brief.pdf


What Xilinx is Making Possible …

Next Generation OTN Switch

Integration Needs

Extreme Bandwidth


Security

Infonetics Research

“The introduction of these speeds (100 Gbps)

is causing a fundamental change in the way

optical networks are built ….”



LTE Wireless Active Antenna

Integration Needs

Extreme Bandwidth


Security

Source: EETimes

Jagdish Rebello, IHS iSuppli

“…LTE capital spending projected to boom…

reaching $24.3B in 2013

…200 operators worldwide already trialing,

deploying 4G LTE networks”


Datacenter App Delivery Control

Integration Needs

Extreme Bandwidth


Security

Juniper Research

“Cloud-based mobile applications will grow

88% to nearly $9.5B in 2014

…75% of this market are enterprise customers”




Dan Elwell, VP Civil Aviation at the Aerospace

Industries Association

“Military… police …utility companies… farmers…

It’s going to happen.”

Unmanned Air Vehicle

Integration Needs

Extreme Bandwidth

Smart Vision


Security


Charles Brickwell, DaVinci Patient – Intuitive Surgical

“… recovery from conventional open-heart

surgery typically took more than 3 months

…I returned to work in only 4 weeks…I felt

great!”

Robotic Surgery Platform

Integration Needs

Extreme Bandwidth

Smart Vision



Source: Intuitive Surgical



Source: Next Big Future

Sven Beiker, Executive Director of the Center

for Auto Research, Stanford University

“…33,000 people killed in road accidents in the

US every year

… I imagine we can bring it down to 10,000 “

Next Gen Driver Assistance

Integration Needs

Extreme Bandwidth

Smart Vision



Jim Chrzan,

Publisher, Automation World

“Production methods must be optimized with

urgency

….in view of a growing world population with

relatively limited resources.”

Next Gen Industrial Automation

Integration Needs

Extreme Bandwidth

Smart Vision


Security/Safety



Accelerating Xilinx SAM Growth

$6B

SAM

$7B

SAM

$2B

SAM

Evolutionary

FPGA

SAM

Programmable

System

Integration

SAM

2015 Xilinx SAM

> $15 B SAM

Source: Xilinx Estimates

2015 Available

$58B ASSP ASIC

2015 Serviceable

PLD

Core PLD

ASIC/ASSP

Displacement

Embedded


Price &

Power

Processing

Integration

Performance

Extreme

Bandwidth &

Capacity

Logic

Integration

Price/

Perf/Watt

28nm: 5 Optimized Scalable Families

Programmable

System Integration

Serdes

Integration

Market Optimization

System Optimized w/ SSIT


Serdes

Integration

Price &

Power

Processing

Integration

Performance

Extreme

Bandwidth &

Capacity

Logic

Integration

Price/

Perf/Watt


28nm: 5 Families, Optimization with Integration

Programmable

System Integration

Market Optimization

No Major

Competitor

Today


Serdes

Integration

Price &

Power

Processing

Integration

Performance

Extreme

Bandwidth &

Capacity

Logic

Integration

Price/

Perf/Watt



Changed

The Game

In Price/

Perf / Watt

Programmable

System Integration

Market Optimization

No Major

Competitor

Today


Serdes

Integration

Processing

Integration

Extreme

Bandwidth &

Capacity

Logic

Integration


Programmable

System Integration

Market Optimization


Price &

Power

Performance

Price/

Perf/Watt

Source: Xilinx, Current Win Rate to Date

70%

Design

Win Rate

100%

Design

Win Rate


Programmable Systems Integration

28nm: Break-out in Customer Value

Build better systems with fewer chips… faster

BOM Cost Reduction

Total Power Reduction

Accelerated Design Productivity

Increased System

Performance


Xilinx 28nm Leadership by the Numbers

1,000’s… of Units Already Shipped

>$1B… of Design Wins to Date

70%... Design Win Rate with Core FPGA

100%... Design Win Rate in System Integration

>$15B… 2015 Xilinx SAM



Xilinx “All In” at 28nm

Value Advantages w/ FPGA & Integration Technology

Leadership at 28nm “By the Numbers”

Summary


Vincent Ratford Sr. Vice President Worldwide Marketing and Business Development

28nm Leadership in Broader Markets


Broader Markets: 2015 Estimated SAM

Broader Markets: $8.4B

ISM $2.2B

A&D $2.3B

AVB $1.4B

Consumer $1.3B

Auto $0.5B

Computing/ Storage $0.5B

Reported as: Industrial & Other Reported as: Consumer & Auto



What “All In” Means for

the Broader Markets

Winning 7 Series Portfolio - All End Markets

Zynq Expanding SAM, Enabling New Apps

Targeted Design Platforms Reduce TTM

Segment Teams and System Architects

Deeper Distribution Partnership & Ecosystem




Broader Market 28nm Leadership by the Numbers – Excludes Communications

>1000s… Units Already Shipped

>$500M… Design Wins to Date

70%... Design Win Rate with 7 Series

100%... Win Rate with Zynq & Virtex SSIT*

~200… Customers Designing with Zynq

>250... Customers Designing with 7 Series

$8.4B... 2015 Xilinx Broader Market SAM

Source: Xilinx, Current Win Rate to Date * vs. FPGA Competitors


Integration: Boosting Performance, Lowering Cost & Power

System Level Performance Across the Product Line

Core FPGA Price/Performance/Watt & Total Power

Broadest Productivity Boost

Value Advantages our Customers Highlight


Increased System

Performance

BOM Cost Reduction




Highest System-level Performance

I/O

Bandwidth

Memory

Bandwidth

DSP

Performance

System-level

Performance

1.3X 1.2X 1.4X 2X

1.2X 1.4X 2.0X 1X

1.6X 1.3X 3.1X 1.2X

Relative to competitive offering *Relative to Stratix V **Relative to Arria V ***Relative to Cyclone V

System

Capacity

*

**

***

Source: Xilinx


Changing the Game in Price/Performance/Watt

Competitor’s

High-end

Syste

m P

erf

orm

an

ce

/ W

att

Cost

Competitor’s

Mid-range

Competitor’s

Low-end

w/ SSIT


DSP

FPGA

0

4

8

12

16

Multi-chip High Density Zynq

Low Density Zynq

Zynq Enabled Low Power

Processor

Client FPGA

Virtex

Client FPGA

0

20

40

60

80

Multi-chip Virtex-7

Pow

er

(W)

SSIT Enabled Low Power

Backplane FPGA

Line

FPGA


5 Key FPGA Power Innovations

70%

Lower

Power

Optimized & Simpler HPL

Re-architected Transceivers

Multi-mode I/O Control

Intelligent Clock Gating

Voltage Scaling/Power Binning

> 50%

Lower

Power

50% FPGA Power Savings 50-70% System-level Power Savings

To

tal P

ow

er 60%

30%

25%

65%

Max

Static

Power

Dynamic

Power

I/O Power

Transceiver

Power

Pow

er

Zynq

Zynq

50%

Lower

Power


40% Lower

Cost

BOM Cost Reduction 40-50% System-level Cost Savings Through Integration

FPGA

FPGA with AMS

Analog

$

$2

$4

$6

$8

$10

$12

Multi-chip Single Chip

BO

M C

ost

ADC

50% Lower

Cost

ARTIX

Processor

DSP

$0

$20

$40

$60

$80

Multi-chip High Density Zynq

Low Density Zynq

BO

M C

ost

FPGA

Page 37

Zynq Enabled BOM Cost Savings AMS Enabled BOM Cost Savings

FPGA

Virtex

FPGA

FPGA

$0K

$1K

$2K

$3K

$4K

Multi-chip Virtex-7

BO

M C

ost

40% Lower

Cost

SSIT Enabled BOM Cost Savings

Zynq

Zynq


Accelerating Design Productivity

Scalable IP Across Families

Plug and Play IP

Targeted Design

Platforms

High-Level Synthesis

Xilinx Best-in-class

Support

Design Reuse Ease-of-Use Turns/Day Expertise

Next Generation

Design Environment


North America &

Japan Medical Imaging: $9M

EMEA & APAC Industrial

Networking: $15M

APAC Surveillance

Platform: $6M

North America

& EMEA T&M Platform: $15M

> $150 M in Zynq Design Wins – All Geographies

North America Imaging

Platform: $18M

EMEA Wind Turbines: $11M


Perf.

+ 2X

Cost

- 40%

Power

- 50%

Productivity

> 50%

A/D FPGA + ARM + DSP

Flash

LCD

SD

HMI

RAM

Today’s Solution

Zynq Solution

Zynq in Medical Handheld Ultrasound

2015 Medical SAM: $400M

Matlab, AutoESL, IP Reuse


A/D FPGA ARM+

DSP

Flash

LCD

SD

HMI

RAM

Integration

2 or 3 Chips → 1 Chip


Today’s Solution

Zynq Solution

Zynq in Surveillance

Perf.

+ 30%

Cost

- 50%

Power

- 50%

2015 Surveillance SAM: $350M

AutoESL, IP Reuse


FPGA DDR

Scalar

D D R C

System

Processor

Video Accel.

FPGA

Image Processing

Engine

Video input

GbE

Data stream out Image Sensor

DDR CTLR

Zynq

FPGA

Scalar

H.264

JPEG

D D R C

System

Processor

Video Accel.

FPGA

Image Processing

Engine

Video input

GbE

Data stream out Image Sensor

DDR CTLR

H.264

DDR

JPEG

DDR

DDR

DDR

DDR

Productivity

> 50%

Integration

4 Chips → 1 Chip


Zynq in Motor Control – Robotic Arm

Motor Controller

System Controller

Zynq

ARM Cortex-A9

Motor Controller 1

Motor Controller 2

Motor Controller 3

Existing Infrastructure

Zynq Solution

Perf.

+ 30%

Cost

- 20%

Power

- 30%

2015 Motor Control SAM: $260M

TDP + IP Reuse


Motor

Controller 3

Motor

Controller 2

Motor

Controller 1

System Controller

Productivity

> 30%

Integration

4 Chips → 1 Chip


Going “All In” w/ Zynq, TDPs, Segment Teams, Distribution

Value Advantages w/ 28nm FPGA & Integration Technology

Leadership at 28nm “By the Numbers”

Broader Markets Business Summary


Krishna Rangasayee

Corporate Vice President &

General Manager,

Communications Business Unit

28nm Leadership in

Communications


What “All In” Means for

Communications

Best 28nm Communications Portfolio

Dedicated Communications Business Unit

Deep Customer Intimacy: Aligned Roadmap

Industry Leading IP: 3 Acquisitions

Design Services: ASIC/ASSP Conversion




Communications 28nm Leadership by the Numbers

10/10... Top Comms Customers Designing with 7 Series

>$600M… Design Wins to Date

1000’s… Units Already Shipped

70%... Design Win Rate with 7 Series

100%... Win Rate with Zynq & Virtex SSIT*

>50%… Design Wins Displace Incumbent ASIC/ASSP

$7.2B… 2015 Communications Market SAM

Source: Xilinx, Current Win Rate to Date * vs. FPGA Competitors


Wired Communications Market: 2015 SAM

Access Metro Transport Mobile

Backhaul Switching Voice

Security

Appliance

Wired Communications Market: $5.2B

Service

Provider

$2.6B

Enterprise

$1.5B

Datacenter

$1.1B

Datacenter Equipment: Server, Storage, Networking,

and Appliance



Wired Communications – Traditional Xilinx Fit

Line Card

Packet

Processing/

Traffic

Manager

Fabric

Interface MAC

Bridging

FPGA

Bridging

FPGA

Control

Plane

CPU

TCAM DDR3

Xilinx: Currently 12% of Logic IC BOM at Top 10 OEMs

Implement in FPGA Implement in ASIC/ASSP


Wired Comms Line Card


FPGA Solutions Coverage Expanded at 28nm

Xilinx: Approx 25% of Logic IC BOM at Top 10 OEMs by 2015

Line Card

Packet

Processing/

Traffic

Manager

Fabric

Interface

Bridging

FPGA

Control

Plane

CPU

TCAM DDR3


MAC Bridging

FPGA


Wired Comms Line Card


Industry Leading System Performance, Capacity, & Features

High Integration, Translating to Lowest System Power & BOM Cost

IP & Services Accelerating ASIC/ASSP SAM Expansion

Values our Wired Comms Customers Highlight


Increased System

Performance

BOM Cost Reduction





Xilinx 7 Series Solution

Service Provider Metro: Core & Edge Routers

Channelized MAC

Bridge

FPGA

Interlaken

FPGA

Bridge

Interlaken

MAC

1/10/40/100

MAC

1/10/40/100

MAC

1/10/40/100

MAC

1/10/40/100

xAUI

xAUI

xAUI

xAUI Perf.

+ 2X

Cost

- 40%

Power

- 50%

2015 SAM: $260M


Productivity

Industry Leading Connectivity IP

Integration

5 Chips → 1 Chip



Metro Optical Transport: OTN 10x10Muxponder

Client

Mapper/

ODU2

FEC

U1

Client

Mapper/

ODU2

FEC

U2

OTU2

10GE

OC192/

STM64

FC

OTU4

FEC /

Framer

U3

OTU4

Overhead Processing

100G

GFEC

/

EFEC

GTH

OTU2

10GE

OC192/

STM64

FC

OTU4

FPGA

OTU-4

Framer

1

Stage

MUX

2 Stage

Mux

Mapper

OTU-2 Framer

any FEC

10GE

8/10GFC

OC192

STM64

GTH

Perf.

+ 2X

Cost

- 50%

Power

- 50%

2015 SAM: $250M



Productivity

Best in Class OTN IP Solutions

Integration

3 Chips → 1 Chip




Datacenter Example: 80G High End NIC

X-86

DDR DDR

PCIe

40G DMA Engine

PCIe Gen 2/3

Traffic Manager

20GE 10GE 10GE 10GE

FP

GA

X-86

PCIe

DDR DDR

2x10GE

NIC

2x10GE

NIC

Traffic

Manager

PCIe

PCIe

Perf.

> 2X

Cost

- 40%

Power

- 50%

2015 SAM: $1.1B


Productivity

Traffic Manager & Connectivity IP

Integration

3 Chips → 1 Chip

Xilinx Copyright 2012 Page 54

Expanding the Wired Comms ASIC/ASSP SAM

Growing from 12% to 25% of Logic IC BOM at Top 10 OEMs by 2015

28nm

$5.2B

40nm

$2.4B

65nm

$1B



Wireless Market Segments : 2015 SAM

Wireless Infrastructure Market: $2.0B

Connectivity

$200M

Radio $700M

Baseband $500M

Mobile Backhaul $600M



Xilinx: Currently 24% of Logic IC BOM at Top 10 OEMs


Wireless Communications – Traditional Xilinx Fit

Backhaul

Baseband Line Card

Power Amp +Converter

+RF

Network/Processing Card

Radio Digital Front-end Card

Wireless Base Station

DFE (DPD/CFR/

DUC/DDC)

Connectivity

CPRI

Co-Processor/

Accelerators

Multicore

DSP

Multicore

DSP

Multicore

DSP

Multicore

DSP

Multicore

CPU

Multicore

CPU

Ethernet

Switch

SRIO

Switch Control

CPU



Xilinx: Approx. 35% of Logic IC BOM at Top 10 OEMs by 2015


FPGA Solutions Coverage Expanded at 28nm

Backhaul

Baseband Line Card

Power Amp +Converter

+RF

Network/Processing Card

Radio Digital Front-end Card

Wireless Base Station

DFE

(DPD/CFR/

DUC/DDC)

Co-Processor/

Accelerators

Multicore

DSP

Multicore

DSP

Multicore

CPU

Transport

Switch

+ Timing

Sync +

Traffic

Manager

Connectivity

CPRI

Connectivity

JESD



Industry’s Lowest Total Power Solution

Disruptive Price/Performance/Watt Solution

Kintex: De Facto Solution for Wireless

Value Our Wireless Customers Highlight


Increased System

Performance

BOM Cost Reduction




28nm Solution

Wireless Basestation: LTE Remote Radio Head

FPGA + ASSP (+DSP) + O&M Processor

DAC

Control

Processor:

PowerQUICC

or other

DSP:

DPD Update Memory

Micro interface

CPRI/ OBSAI Master

CPRI/ OBSAI Slave

Memory interface

SPI/I2C interface

Spartan-6 LX45 TIGC5330 ASSP

Digital

Up

Conversion

(DUC)

Digital

Up

Conversion

(DUC)

Digital

Up

Conversion

(DUC)

Digital

Up

Conversion

(DUC)

Memory

6G SerDes

6G SerDes

Dual SERDES

Optical Modules

DAC

ADC

ADC

ADC

DAC

Control

Processor:

PowerQUICC

or other Memory

Micro interface

CPRI/ OBSAI Master

CPRI/ OBSAI Slave

Memory interface

SPI/I2C interface

Kintex-7 7K160T (58% utilisation)

Digital

Up

Conversion

(DUC)

SerDes Or LVDS

6G SerDes

6G SerDes

Optical Modules

DAC

ADC

ADC

ADC

Digital

Down

Conversion

(DDC)

Crest

Factor

Reduction

(CFR)

Digital

Pre-

Distortion

(DPD) SerDes

Or LVDS

SerDes Or LVDS

FPGA

Perf.

+ 2X

Cost

- 65%

Power

- 38%

2015 SAM: $700M



Productivity

World Class Radio IP & Services

Integration

8 Chips → 2 Chip


28nm Solution

Power

- 30%


Wireless Basestation: Baseband

To/ From

Radio Card To/ From

Network/

Processor

Card

To/ From

Radio Card To/ From

Network/

Processor

Card

FPGA

Co-Processor FPGA

CPRI

DSP

CPRI

CPRI

CPRI

DSP

Switch

SRIO

Switch

CPRI

DSP

DSP

CPRI

CPRI

CPRI

DSP

FPGA

Co-Processor

DSP

Perf.

2X

Cost

- 30%

2015 SAM: $500M


Productivity

Design Productivity via AutoESL

Integration

7 Chips → 1 Chip


Power

- 50%

Zynq Solution

Wireless Basestation: Mobile Backhaul

DUAL CORE

A9 PROCESSOR

DDR SRAM

MODEM

“H” - POL

MODEM

“V”-POL TIMING

SWITCH

PP & TM

FPGA/ ASIC FPGA/ ASIC

(MODEM)

SRAM DDR DDR

CONTROL PROCESSOR

SWITCH

TIMING PHY PHY

DDR

FPGA/ ASIC

(MODEM)

Perf.

2X

Cost

- 30%

2015 SAM: $600M

Existing Solution


Productivity

Wired & Wireless IP + AutoESL

Integration

7 Chips → 1 Chip


Expanding the Wireless Comms ASIC/ASSP SAM

28nm

$2B

40nm

$1.5B

65nm

$1B

Growing from 24% to 35% of Logic IC BOM at Top 10 OEMs by 2015



Going “All In” with Best Portfolio, CBU, IP, Design Services

Value Advantages with 28nm FPGA & Integration Technology

Clear Leader at 28nm “By the Numbers”

Communications Business Summary


Jon Olson Sr. Vice President and Chief Financial Officer

Corporate Financials and Outlook


Financial Model: Areas of Focus

Balanced Business Model • Grow 2X Overall Semiconductor Market

• Drive Consistent Gross Margins in mid 60%’s

Operating Model Leverage • Consistently Grow Opex Slower than Revenue

Cash Generation • Working Capital Discipline

• Efficient Tax Structure

Capital Allocation • Continued Commitment to Dividend

• Opportunistic Share Buyback

• Controlled Capital Expense


Accelerating Xilinx SAM Growth

$6B

SAM

$7B

SAM

$2B

SAM

Evolutionary

FPGA

SAM

Programmable

System

Integration

SAM

2015 Xilinx SAM

> $15 B SAM


2015 Available

$58B ASSP ASIC

2015 Serviceable

PLD

Core PLD

ASIC/ASSP

Displacement

Embedded


Projected Growth End Market Estimates 5 YR CAGR

Source: Xilinx Estimates, FY11-FY16

5 YR CAGR (E) vs. Last Year

Guidance

Communications

Industrial and Other

Consumer and Automotive

Data Processing

Total

9% - 13%

8% - 12%

8% - 12%

4% - 8%

8% - 12%


PLD Market Share

59% 59% 58% 59%

54% 52%

54% 55%

41% 41% 42% 41%

46% 48%

46% 45%

2006 2007 2008 2009 2010 2011 2012E 2013E

Calendar Year

Xilinx

Nearest Competitor

Source: Xilinx estimates

2012 is Inflection Point


~35%

Market Share by Node – CY11

Source: 90/65nm, and 40/45nm based on Company reports;40/45nm, and 28nm projections based on Xilinx estimates

28nm 65nm 90nm

28nm Node Expected

to be Most Successful

in Xilinx History

>70%

~55% ~60%

40/45nm

100% Share

~50%


High Volume FPGA Market Share

60%

54%

50%

46%

40%

43%

40%

46%

50%

54%

60%

57%

2006 2007 2008 2009 2010 2011

Calendar Year

Xilinx

Nearest Competitor

Altera: Estimates include MAX-II, FLEX6K/A, ACEX1K and Cyclone families

Xilinx: Estimates include all Spartan families


OCF Increase Driven by:

Working Capital Discipline & Improved Profitability

Model Continues to Drive Strong Cash Flow

0

250

500

750

1,000

FY'08 FY'09 FY'10 FY'11 FY'12E

Operating Cash Flow ($M)

Record Cash Flow from Operations Expected in FY’12


Committed to Shareholder Return

$M

$0

$50

$100

$150

$200

FY08 FY09 FY10 FY11 FY12E

>$2.5B of Cash Returned to Shareholders Since FY08

$M

$0

$250

$500

$750


$ Spent on Dividends $ Spent on Buyback

Delivered Continuous Dividend Growth & Repurchase


Gross Margin Trend

60%

62%

64%

66%

FY'08 FY'09 FY'10 FY'11 FY'12E FY'13E

Opportunity to Expand Margin

Yield Improvement on New Products

28nm Competitive and TTM

Advantages Providing Pricing Power

More Profitable Overall Portfolio

Intense Cost Focus on Products in

Volume Production

Consistent Performance Within Long Term Model (64 – 66%)


7 Series 28HPL Yield Exceeding Roadmap

0 6 12 18 24

Pro

du

ct

Yie

ld

Time

(Months After 1st Silicon)

Kintex325T (actual)

28nm Yield (Roadmap)

3-4 Month Ahead


Operating Expense Management


SG & A

R & D

$724

+7%

+6%

-6%

-1% +4% +10%

-5% +5%

$699 $697 $743 $800

$M Op Exp 4 YR CAGR = 2.5%

Source: Company reports & Xilinx estimates; operating expenses do not include restructuring or amortization of acquisition expenses

Sales Growth Outpacing Operating Expense Growth;

Continued Commitment to R&D Investment




SG & A

R & D

$724

+7%

+6%

-6%

-1% +4% +10%

-5% +5%

$699 $697 $743 $800

$M Rev 4 YR CAGR = 5%




Page 75




SG & A

R & D

$724

+7%

+6%

-6%

-1% +4% +10%

-5% +5%

$699 $697 $743 $800

$M Rev 4 YR CAGR = 5%




+12%

+4%

$870

FY13E

Page 75


R & D Expense Composition by Process Node

40%

75%

50%

5%

10%

40% 55%

15% 10%

28nm Next Gen Prior Nodes

28nm Spend

Major Driver in FY12

(Aggressive Rollout)

Estimated Peak in Mask/Wafer $

in 1H FY13

Next Generation Spend

Sharp Increase in FY13

Investment

Implementation Well Under Way

Commitment to Maintain Technology Leadership

FY11 FY12E FY13E

Page 76


Financial Guidance

Gross Margin 64-66%

R&D ~$480 - $490M

SG&A ~$380 - $390M

Amortization of Intangibles ~$10M

Other Income ~($34M)

Tax Rate 14%

Capex $60-$70M

FY13E

Page 77


PLDs Continue to Outperform Semiconductor Industry

– ASIC/ASSP Displacement Ramp Continues to Accelerate

– Programmable Systems Integration Accelerates SAM expansion

Continued Commitment to Shareholder Value

– Continuous Dividend Improvement

– Operating Expense Leverage

Xilinx “All In” Strategy Paying Off Now

– Value Advantages w/ FPGA & Integration

– Leadership at 28nm “By the Numbers”

Page 78

Summary


Q & A


Thank You

Xilinx 2012 Analyst Meeting

Documents

Transcript of Xilinx 2012 Analyst Meeting