VLSI Routing. Routing Problem Given a placement, and a fixed number of metal layers, find a valid...

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VLSI Routing
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Transcript of VLSI Routing. Routing Problem Given a placement, and a fixed number of metal layers, find a valid...

Page 1: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

VLSI Routing

Page 2: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Routing

• Problem Given a placement, and a fixed number of metal

layers, find a valid pattern of horizontal and vertical wires that connect the terminals of the nets

Levels of abstraction:o Global routingo Detailed routing

• Objectives Cost components:

o Area (channel width) o Wire delays o Number of layerso Additional cost components: number of bends, vias

Page 3: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Global vs. Detailed Routing• Global routing

Input: detailed placement, with exact terminal locations

Determine “channel” (routing region) for each net

Objective: minimize area (congestion), and timing (approximate)

• Detailed routing Input: channels and approximate

routing from the global routing phase Determine the exact route and layers

for each net Objective: valid routing, minimize

area (congestion), meet timing constraints

Additional objectives: min via, power Figs. [©Sherwani]

Page 4: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Routing Environment

• Chip architecture Full-custom Standard cell Gate Array

Page 5: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Routing Environment

• Chip architecture Full-custom:

o No constraint on routing regions

Objective functions are the objective functions of general routing problem.

•Routability•Area Minimization•Total wire length minimization•Maximum wire length minimization

Page 6: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Routing Environment

• Chip architecture Standard cell:

o Variable channel height?

o Feed-through cells connect channels

Failed netChannel

Feedthroughs

•Channels do not have predetermined capacity•Feedthroughs have predetermined capacty

•Area minimization•Minimization to total wire length•Minimization of maximum wire lenght

Page 7: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Routing Environment

• Chip architecture Gate Array:

o Fixed channel height

o Limited switchbox connections

o Prefabricated wire segments have different weights

Figs. [©Sherwani]

Tracks

Failed connection

•Routability•Minimize total wire length•Minimize maximum wire length

Page 8: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.
Page 9: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.
Page 10: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.
Page 11: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.
Page 12: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.
Page 13: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Maze Routing (Lee Algorithm)• Similar to breadth-first search

Very simple algorithm Works on grid graph Time complexity: grid size (NxN)

• Algorithm Propagate a “wave” from source

until hit the sink(implemented using a queue)

Trace back to find the path• Guaranteed to find the optimal solution

Usually multiple optimal solutions exist• More than two terminals?

For the third terminal, use the path between the first two as the source of the wave

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Page 14: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Multiple Terminal Nets

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Page 15: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Page 16: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Multiple Terminal Nets

Page 17: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Multiple Terminal Nets

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Page 18: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Finding More Desirable Paths

Page 19: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 20: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 21: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 22: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 23: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 24: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 25: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Finding More Desirable Paths

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Page 26: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Speed Improvement

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Page 27: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Hadlock’s Algorithm

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Page 28: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Soukup’s Algorithm

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Line Search (Probe) AlgorithmMikami-Tabuchi’s Algorithm

Page 30: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

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Line Search (Probe) AlgorithmHightower’s Algorithm

Page 31: VLSI Routing. Routing Problem  Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect.

Multi Terminal Nets

Steiner Tree

Steiner tree

Steinerpoint

MST

Rectilinear Steiner Tree

Minimize Wire length