VLSI Fabrication Principles, Silicon and Gallium Arsenide - 1994 Gandhi (Wiley, 2E)
vlsi fabrication steps
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VLSI Design Module Aims Introduction to VLSI Technology 1)Process Design Trends in Chip Fabrication Real Circuit Parameters 2)Circuit Design Electrical Characteristics Configuration Building Blocks Switching Circuitry Translation onto Silicon CAD 3)Practical Experience in Layout Design
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Transcript of vlsi fabrication steps
VLSI DesignModule Aims
Introduction to VLSI Technology1)Process DesignTrends in Chip FabricationReal Circuit Parameters2)Circuit DesignElectrical CharacteristicsConfiguration Building BlocksSwitching CircuitryTranslation onto SiliconCAD3)Practical Experience in Layout Design
Details of the physical structure of devices will be very important in developing models for electrical behavior
•Device structure is better understood by following through fabrication sequence
•Know the basic processing steps used in fabricating integrated devices
Then the use of these process steps in fabricating a diode, bipolar junction transistor or FET will be dealt with in later lectures
Semiconductor Fabrication Processes
• Front-End Processing (Wafer fabrication) • Back-End Processing (Assembly and
Testing)
Row 1 Row 2 Row 3 Row 40
2
4
6
8
10
12
Column 1
Column 2
Column 3
Obtaining the Sand , Preparing the Molten Silicon Bath, Making the Ingot, Preparing the WafersLapping removes the surface silicon which has been cracked or otherwise damagedby the slicing process, and assures a flat surfaceWafers are then etched in a chemically active reagent to remove any crystal damage remaining from the previous process step.Polishing is a chemical/mechanical process that smoothes the uneven surface left by the lapping and etching processes and makes the wafer flat and smooth enough to support optical photolithography
Advantages of epitaxial wafers over bulk wafersOffers means of controlling the doping profileEpitaxial layers are generally oxygen and carbon freeEpitaxy is a kind of interface between a thin film and a substrate
Oxidation Oxide is frequently employed as an insulator between two layers of metalization
n+
p substrate
p+
n well
A
YGND VDD
n+p+
substrate tap well tap
n+ p+
Well and Substrate Taps Substrate must be tied to GND and n-well to VDD
Metal to lightly-doped semiconductor forms poor connection called Shottky Diode
Use heavily doped well and substrate contacts / taps
Mask DetailSix masks
n-well
Polysilicon
n+ diffusion
p+ diffusion
Contact
Metal
