Via and Return Path Discontinuity Impact on High Speed Digital Signal

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® WPDWPD WORKSTATION PRODUCTS DIVISIONWORKSTATION PRODUCTS DIVISION11

IEEE EPEP2000

Via and Return Path Discontinuity

Impact on High Speed Digital Signal

Qinglun Chen, Intel WPD

Jin Zhao, Sigrity Inc.

Contributor: Weimin Shi, Intel DPG, Raymond Chen (Sigrity) Chi-te Chen Intel WPD

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IEEE EPEP2000

1) The motivation of this study

2) How via impact on high speed digital signal3) How Signal return path discontinuity impact on

high speed digital signal 4) Correlation and measurements5) Summary

Agenda

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IEEE EPEP2000

Motivations of This StudyRambus needs less than 5 ps skew accuracy and +/- 125 ps skew budget. What are the major skew contributors for Rambus channel interconnection?

• Via discontinuity and coupling

• Return path discontinuity

• Manufacturing variation

• Impedance discontinuity

• Buffer Strength difference

• Cross talking ---even and odd modes

• Load variation

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IEEE EPEP2000

Via DiscontinuityHow via length impact the signal wave form and delay?

How via coupling impact the signal wave form and delay?

How termination via impact the signal wave form?

Test Board for Rambus Study

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How via length impact on high Speed digital signal quality

Signal trace

GND

GND

Via

Via Inductance depending on its length -> impedance either

1

2

3

4

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IEEE EPEP2000

Waveform and Delay Comparison

8.00E-0109.00E-0101.00E-0091.10E-0091.20E-0091.30E-0091.40E-0091.50E-0091.60E-009

1.0

1.2

1.4

1.6

1.8

Case 1 Case 2 Case 3 Case 4

Voltag

e (

V)

Time (second)

delay(ps) Skew pure skew Via impactCase1 1095.8 -120.3 -102.1 17.9Case2 1216.1 0 0 0Case3 1216.7 0.6 0 0.6Case4 1239.5 18.5 12 6

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How via coupling impact on high Speed digital signal quality

Signal trace

GND

GND

Via even coupling increase via inductance increase impedance

Via odd coupling decrease via inductance decrease impedance

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IEEE EPEP2000

Via Coupling impact on waveform and Delay

0.00E+000 5.00E-010 1.00E-009 1.50E-009 2.00E-009 2.50E-009 3.00E-009

0.8

1.0

1.2

1.4

1.6

1.8 Single Line (Driver) Single Line (Receiver) Odd Mode (Driver) Odd Mode (Receiver) Even Mode (Drivers) Even Mode (Receivers)

Vo

lta

ge

(V

)

Time (second)

with ground via delay(ps) Maximum SkewSingle line 1300.9Odd 1262 39even 1344.8 43.9

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IEEE EPEP2000

Gnd

Pwr

~35 Ohm 28 Ohm Vcc

Gnd

Pwr

~35 Ohm 28 Ohm Vcc

Figure 6. Configuration of Rambus signal net

How termination via impact the signal wave form?

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IEEE EPEP2000

1.00E-009 1.20E-009 1.40E-009 1.60E-009 1.80E-009 2.00E-009

0.8

1.0

1.2

1.4

1.6

1.8 without power vias with power vias

Vo

lta

ge

(V

)

Time (second)

delay (ps) SkewWith power via 1241.1 0Without power via 1277.5 36.4

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PCB Signal Return Path Discontinuity

How does a power reference plane impact the signal wave form and delay?

How does via return path impact the signal wave form and delay?

What is the difference between single line vs multiple line switching for RPD?

How do different layer traces impact the signal wave form and delay?

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IEEE EPEP2000

How a power reference plane impact the signal wave form and delay?

Signal trace

GND

VCC

Via

• AC path through inductance and capacitance

• Local capacitance is frequency dependent

• Current have to flow to the ground plane through local capacitance and induce imaging current

• Referring a power plane will create return path discontinuity

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IEEE EPEP2000

Return Path Discontinuity & Via Coupling impact on waveform and Delay

0.00E+000 5.00E-010 1.00E-009 1.50E-009 2.00E-009 2.50E-009 3.00E-009

0.6

0.8

1.0

1.2

1.4

1.6

1.8

Single Line (Driver) Single Line (Receiver) Odd Mode (Driver) Odd Mode (Receiver) Even Mode (Drivers) Even Mode (Receivers)

Vo

lta

ge

(V

)

Time (second)

delay(ps) Maximum SkewSingle line 1312Odd 1252 60even 1400 88

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What is the difference between single line vs multiple line switching for RPD?

At Receivers: 1 line switching on S1 1 line switching on s6 8 line switching on s6

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How via return path impact on high Speed digital signal quality

Signal trace

GND

VCC

GND

Via

Delay order: near ground via, far ground via, no ground via

GND

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How Ground Via impact on Skew and Waveform

1.10E-009 1.20E-009 1.30E-009 1.40E-009 1.50E-009 1.60E-009

1.0

1.2

1.4

1.6

1.8

Ref. Bottom Ref. Bottom with 3 near vias Ref. Bottom with 3 far vias

Vo

lta

ge

(V

)

Time (second)

delay (ps) skewNo ground via 1312.5 9.7Near Via 1302.8 0Far via 1308.6 5.8

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Measurement Results for Four layers with 3 Line coupling

L1 Voltage for Even, Odd and Single

-0.2

0

0.2

0.4

0.6

0.8

1

0

23

4

46

8

70

2

93

6

11

70

14

04

16

38

18

72

21

06

23

40

25

74

28

08

30

42

32

76

35

10

37

44

39

78

42

12

44

46

46

80

49

14

Time in ps

Vo

lta

ge

V Even

V Odd

V Single


-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Time in ps

Vo

lta

ge

V EvenV OddV Single


-0.2

0

0.2

0.4

0.6

0.8

1

Time in ps

Volta

ge

V Even

V Odd

V Single

L4 voltage for Even,Odd and Single

-0.2

0

0.2

0.4

0.6

0.8

1

Tim

e

36

9

73

9

11

09

14

79

18

49

22

19

25

89

29

59

33

29

36

99

40

69

44

39

48

09

Time in ps

Vo

lta

ge V Even

V Odd

V Single

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IEEE EPEP2000

OR840 WS Board Benefits From Fundamental Studies With Speed97

More than 4000 outrigger system boards are shipped per week

Fundamental studies:

1. Return path; 2. Via coupling; 3. Die-to-Termination channel analysis

This is a very competitive product: Rambus IS on 4 Layer stack-up

That is why IBM has ordered a big volume

S1

GND

S3

VCC

Rambus signalsOutrigger Board Stack-up:

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Correlation

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Power plane as ground return test pattern

Via coupling test patternPropagation delay test pattern for manufacturing variation

Via characterization Pattern

Test Board For Correlation(1998)

Via characterization pattern

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S1

GND

S3

S4

VCC

S6

400 mils

62 mils

100 mils

50 ohm TraceVia

Via Coupling Pattern

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Red Line --- no coupling, Blue Line -----Odd coupling

Test Board Measurement of Via Even Mode Coupling

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Red Line --- no coupling, Blue Line -----Odd coupling

Test Board Measurement of Via Odd Mode Coupling

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Via Coupling Skew Measurement and Simulation (Even/odd Modes)

Input Signal skew

0 ps 25 ps 100 ps 200 ps

Via coupling skew Speed97 Sim

75 ps 80ps

59 ps 48 ps 32 ps

Via coupling skew depends on input signal skew

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S1

GND

S3

S4

VCC

S6

400 mils

62 mils

50 ohm Trace

Via

Two Series Via Patterns for Correlation

S1

GND

S3

S4

VCC

S6

62 mils

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Speed97 Simulation Vs TDR MeasurementPattern 1

Red Line --- Measurement, Blue Line -----Speed97

( done in 12/1998 at New York University at Binghamton by Weimin Shi )

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IEEE EPEP2000

Speed97 Simulation Vs TDR MeasurementPattern 2

Red Line --- Measurement, Blue Line -----Speed97

( done in 12/1998 at New York University at Binghamton by Weimin Shi )

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IEEE EPEP2000

Summary

• Via discontinuity and coupling become a major signal skew contributor for high speed digital signals

• Power reference plane is another major signal skew contributor for high speed digital signals

• Synchronized signals should reference a same ground plane to avoid additional signal skew

• Return path discontinuity is due to non-uniform inductance and capacitance in signal paths

Via and Return Path Discontinuity Impact on High Speed Digital Signal

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