Department of Communication Engineering, NCTU 1

Unit 8 Multiplexers, Decoders andProgrammable Logic Devices

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8.1 Multiplexers

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

2-to-1 Multiplexer

0 1Z A I AI

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

4-to-1, 8-to-1 and 2n-to-1 multiplexers

0 1 2 3Z A B I A BI AB I ABI

0 1 2 7Z A B C I A B CI A BC I ABCI

2 1

0

n

k kk

Z m I

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

Logic diagram for 8-to-1

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8.2 Three-State Buffers

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

Tri-state Buffers

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

Using tri-state buffer for data selection

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8.3 Decoders and Encoders

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

3-to-8 line decoder The i th output is 1 if the input binary value is equal to i

Department of Communication Engineering, NCTU 11

Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

4-to-10 line decoder

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

In general a n-to-2n decoder can generate the all 2n

minterms Because an n-input decoder generates all of the minterms

of n variables, n-variable functions can be realized byORing together selected minterm outputs from a decoder

Department of Communication Engineering, NCTU 13

Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

An encoder performs the inverse function of a decoder E.g. 8-to-3 priority encoder If more that one input is 1, the highest number determines

the output D is 1 if any input is 1, otherwise d is 0

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8.4 Read Only Memories

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

A read-only-memory (ROM) is a semiconductor devicethat stores an array of data

Once binary data is stored in the ROM, it can be read out,but cannot be changed

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

A ROM with n input lines and m output lines

Department of Communication Engineering, NCTU 17

Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

A ROM basically consists of a decoder and a memoryarray

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Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

The decoder output select one of the words

Department of Communication Engineering, NCTU 19

Logic Design Unit 8 MUXs, Decoders & PLDs Sau-Hsuan Wu

Multiple output functions can be realized with ROM