STROMLO EVENT TIMING SYSTEM

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CALIBRATION OF EOS/STROMLO TIMING CARD John Luck, Josh Vear and Chris Moore EOS Space Systems Pty. Ltd.

description

CALIBRATION OF EOS/STROMLO TIMING CARD John Luck, Josh Vear and Chris Moore EOS Space Systems Pty. Ltd. STROMLO EVENT TIMING SYSTEM. Symmetricom XLi GPS Timing Receiver with high-stability ovenized crystal oscillator. Output: 1 p.p.s. and 10 MHz sine, etc. - PowerPoint PPT Presentation

Transcript of STROMLO EVENT TIMING SYSTEM

Page 1: STROMLO EVENT TIMING SYSTEM

CALIBRATION OF EOS/STROMLO TIMING CARD

John Luck, Josh Vear and Chris MooreEOS Space Systems Pty. Ltd.

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27 May 2004

STROMLO EVENT TIMING SYSTEM

• Symmetricom XLi GPS Timing Receiver with high-stability ovenized crystal oscillator. Output: 1 p.p.s. and 10 MHz sine, etc.

• “80 MHz Multiplier” producing 80 MPPS square waves (EOS – Josef Kolbl)

• Buffer/Distribution Amplifier making 4 copies of 80 MPPS and of 1 p.p.s. (EOS)

• Timing Card: Two Channels (for Start Diode and for CSPAD). Clock from 80 MPPS sync’d to GPS 1 p.p.s. at start of each pass or segment. Verniers based on capacitor discharge through constant-current circuit so voltage decay is linear (nominally) with time (EOS – Josh Vear)

• Vernier Test Box (VTB) (EOS – Josh Vear) with LeCroy Wavemaster 8600 20 GS/sec Digital Oscilloscope

• Delay Generator, producing laser & T/R commands, etc (EOS)

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EOS TIMING CARD with Scaler.Part of Vernier Test Box in background.

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EOS TIMING SYSTEM

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TIMING SEQUENCE

FIGURE 3: Sequence of events in one shot cycle of the Stromlo Timing Card. The

Time axis is NOT to scale; nor is the Volts axis.

~ 50 ns ~ 9.6us

WAIT

60 μs

80 MPPS MARKS

12.5 ns 5 μs

D

ΔV 5 V

CAP RELEASE

WINDOW OPEN

SIGNAL

VOLTAGE MEASURED

WINDOW CLOSE

ADC CONV

CAP RECHARGE

CAP HOLD @ 5V

CAPACITOR DISCHARGE RATE ~0.2 V / ns DROOP D < 0.4 mV, i.e. 2 ps over 5-10 μs

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VERNIER TEST BOX with 4 Delay Cables

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VERNIER TEST BOX Schematic

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AVAILABLE DELAYS IN VTBONLY NEED TO COVER 12.5 ns (1/80

MPPS)

Delay # Delay (ns) Delay # Delay (ns)

0 4.047 8 10.251 1 4.914 9 11.135 2 5.669 10 11.921 3 6.537 11 12.790 4 7.192 12 13.443 5 8.086 13 14.287 6 8.860 14 15.048 7 9.726

15 15.924

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VTB DELAY CALIBRATION SETUP

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VTB CALIBRATION PROCEDURE

• VERNIER 0• Connect 1 GHz active FET probes at V0 and 80 MPPS

inputs AT the Timing Card• For each delay cable combination take many readings of

the input between 80 MPPS marks and VTB output on the Oscilloscope. Average.

• Simultaneously read Timing Card results. Average.• Fit cubic curve to Oscilloscope vs. Timing Card. This

constitutes its calibration curve.• Perform post-calibration “Confirmation Runs” per delay.• VERNIER 1• Change one probe from V0 to V1 input, and repeat.

Thus each channel is calibrated independently.

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FACTS AND FIGURES

• Timing Card can handle 13,000 events/sec (but the computer operating system can not …..)

• RMS JITTER from Confirmation Runs: 4.9 – 8.7 ps (~ 1mm)

• Capacitor Leakage “droop” corresponds to about 2 ps It too will be calibrated and applied soon

• 80 MPPS is the REFERENCE. Assumed on-time to GPS BUT:

• Spec on 80 MHz Multiplier jitter not available– Jitter in Distribution Amplifier is Negligible (200 fs per

ECL component)• Profusion of stiff cables in VTB to be replaced by

Programmable Delay Lines (chip has been chosen)