Stratix III F1152 Development Kit Host - UBC Physics ...mce/mcedocs/hardware/schematics...K1 VOUT K2...
Transcript of Stratix III F1152 Development Kit Host - UBC Physics ...mce/mcedocs/hardware/schematics...K1 VOUT K2...
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Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B1 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B1 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B1 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
DESCRIPTIONREV DATE PAGES
PAGE DESCRIPTION
2
NOTES:
Title, Notes, Block Diagram, Revision History1
34
7891011
1213141516
1718192021
22232425
56
Digital Ground
832 Parts, 71 Library Parts, 1015 Nets, 5255 Pins
Stratix III F1152 Development Kit Host
1. Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework
S3 FPGA Package Top
2.
100-0310800-C1110-0310800-C1120-0310800-C1130-0310800-C1140-0310800-C1150-0310800-C1160-0310800-C1170-0310800-C1180-0310800-C1210-0310800-C1220-0310800-C1320-0310800-C1
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Power 1Power 2
Current Sense
Stratix III PowerStratix III ClocksMAX IIDDR2 SDRAM DIMM
PSRAM & FLASHUSB 2.010/100/1000 EthernetHSM Connectors
User IO & ConnectorStratix III Configuration
Decoupling
Power 3
Stratix III Banks 7 & 8
Stratix III Banks 5 & 6Stratix III Banks 3 & 4Stratix III Banks 1 & 2
DDR2 & QDRII TERMINATIONS
QDRII SRAM & DDR2 DEVICES
Block Diagram
A 8/10/2007 All Released Rev A.B 9/26/2007 All Released Rev B - Change 1.1V_VCC regulator & circuitry (U23 on rev A to U39
on Rev B), U31 added PG_3p3V to SHDN pin, New component for D37, Fix QDR IIpinout, Connect DEV_SEL and JTAG_SEL to Max II, Add 1K pullup to 1.8V on Y5 & Y6 "EN" pin, Add jumper to VCCL, DNI OSRAM circuitry, C345 & C369,J11,R18-R20,J7,C207,U16. Add 1K pulldown on LCD RSTn pin.. Add Decoupling,
3,4,5,611/12/2007C-1 Changed U14, C190-191, R140 to DNI and shorted pins 1 to 5 on U14. ChangedR26,R135,R163,R166,R173,R178,R186,R196,R214,R215,R216,R217,R218,R222,R228 from 3mohm to 9mohm. Replaced LTC1865L with LTC 2402. Removed U14.
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D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B2 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B2 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B2 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
BANKS 8A, 8B, 8C
(A)
( L)
1.
BANKS 4B, 4C
( K)
Notes:
BANKS 1A 1C
(B)
Bank 5 - HSMC PORT A
VCCIO = 1.8V
VCCIO = 2.5V
FPGA Schematic Symbol Breakdown:
VCCIO, VREF
( I )
(F)
Bank 2 - HSMC PORT B
(H)
VCCL, VCC, VCCD_PLL, VCCPT, VCCA_PLL
BANKS 2A, 2C
BANKS 7A, 7B, 7C
( J)
BANKS 3A, 3B, 3C
Bank 4 - DDR2 SDRAM DIMM, LCD, USER 7-SEGMENT DISPLAY
VCCIO = 1.8V
(D)(C)
VCCIO = 1.8V
(E)
(G)
DDR2 SDRAM DIMMDDR2 SDRAM DIMM
VCCIO = 1.5V/1.8V VCCIO = 1.8VQDR II SRAMUSER PB
FLASHPSRAMMAX IIUSER DIPSWITCH, PUSH BUTTONS
Stratix III FPGA Package Top
(M)(N)
Bank 3 - DDR2 SDRAM DIMM
Some Clocks
Bank 1 -DDR2 SDRAM DEVICES
Bank 6 - OLED, USB, ETHERNET
Configuration
GroundGround and NCs
VCCIO = 2.5VBANKS 6A, 6C
BANKS 5A, 5CVCCIO = 2.5V
Bank 8 - FLASH, PSRAMBank 7 - QDR II SRAM, USER PB
OLED DISPLAYETHERNETUSB
HSMC PORT A
HSMC PORT B DDR2 SDRAMDEVICES
BANK 4A
LCD DISPLAYUSER 7-SEGMENT DISPLAY
VCCIO = 2.5V
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3
3
2
2
1
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E E
D D
C C
B B
A A
LTM_FB
RUN_SW
LT1761_ADJ
LTM_FB
FSETMPGM
RUN_SW
LT4601_CLK0
LT4601_CLK0
PG_3p3V
PG_3p3V
DC_INPUT
3.3V
DC_INPUT
3.3V
3.3V
5.0V
3.3V
DC_INPUT
3.3V_SENSE
DC_INPUT 12V5.0V
PG_3p3V 6
RUN_SW 5
LT4601_CLK0 9
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B3 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B3 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B3 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Power 1
14V-20V DC INPUT
POWER LED
LT4601 SWITCHER
C106
1000pF
C106
1000pF
R69 10.0KR69 10.0K
R75
13.3K
R75
13.3K
R72 20.0KR72 20.0KR682.2KR682.2K
U32D
LTM4601
U32D
LTM4601
INTVCCA7
PLLINA8
TRACK/SSA9
RUNA10
FSET B12
MARG0C12
MARG1D12
VFB F12PGOOD G12
DRVCCE12
COMPA11
MPGMA12
VOSNS+ J12
VOSNS- M12
VOUT_LCL L12DIFFVOUT K12
R221
100, 1%
R221
100, 1%
R74 0R74 0C108 1nFC108 1nF
C95100uFC95100uF
C1014.7uFC1014.7uF
C119
10uF
C119
10uF
+ C102
10VTantalum
470uF+ C102
10VTantalum
470uF
12
U32A
LTM4601
U32A
LTM4601
VOUTJ1
VOUTJ2
VOUTJ3
VOUTJ4
VOUTJ5
VOUTJ6
VOUTJ7
VOUTJ8
VOUTJ9
VOUTJ10
VOUTK1
VOUTK2
VOUTK3
VOUTK4
VOUTK5
VOUTK6
VOUTK7
VOUTK8
VOUTK9
VOUTK10
VOUTK11
VOUT L1
VOUT L2
VOUT L3
VOUT L4
VOUT L5
VOUT L6
VOUT L7
VOUT L8
VOUT L9
VOUT L10
VOUT L11
VOUT M1
VOUT M2
VOUT M3
VOUT M4
VOUT M5
VOUT M6
VOUT M7
VOUT M8
VOUT M9
VOUT M10
VOUT M11
C100
10uF
C100
10uF
R228 .009R228 .009
C104 0.22uFC104 0.22uF
D28
FM540
D28
FM540
U32B
LTM4601
U32B
LTM4601
PGNDD1
PGNDD2
PGNDD3
PGNDD4
PGNDD5
PGNDD6
PGNDE1
PGNDE2
PGNDE3
PGNDE4
PGNDE5
PGNDE6
PGNDE7
PGNDF1
PGNDF2
PGNDF3
PGNDF4
PGNDF5
PGNDF6
PGNDF7
PGND F8
PGND F9
PGND G1
PGND G2
PGND G3
PGND G4
PGND G5
PGND G6
PGND G7
PGND G8
PGND G9
PGND H1
PGND H2
PGND H3
PGND H4
PGND H5
PGND H6
PGND H7
PGND H8
PGND H9
SGND H12
D16Blue_LedD16Blue_Led
C112
47nF
C112
47nF
U31
LT1761
U31
LT1761
VIN1
GND 2
VOUT 5
ADJ/BYPASS 4
SHDN3
C405
100pF
C405
100pF
C109
1000pF
C109
1000pF
R711.00kR711.00k
D19 MMSD914D19 MMSD91421
R734.99KR734.99K
C120
10uF
C120
10uF
L8 10uHL8 10uH1 2
C118
150u
C118
150u
D18B530C-13D18B530C-13
21
SW4EG2201ASW4EG2201A
1 2 3
654
U30
LT1374
U30
LT1374
SW 15
SHDN12
VIN4
BOOST 5
BIAS 10
FB/SENSE 6
VC11
SYNC13
GND 16GND 9GND1
GND8
GPAD 17
VIN3
SW 14
NC12
NC27
C205
10uF
C205
10uF
R78787KR78787K
R703.24KR703.24K
C343
10uF
C343
10uF
R77 100KR77 100K
C105
10uF
C105
10uF
C113 0.01uFC113 0.01uF
R65
100K
R65
100K
C90
100uF
C90
100uF
C94100uFC94100uF
C382
10uF
C382
10uF
C221
10uF
C221
10uF
D2920V ZenerD2920V Zener
J21
RAPC712X
J21
RAPC712X3
21
U32C
LTM4601
U32C
LTM4601
VINA1
VINA2
VINA3
VINA4
VINA5
VINA6
VINB1
VIN B4
VIN B5
VIN B6
VIN C1
VIN C2
VIN C3
VIN C4
VIN C5VINB2
VINB3 VIN C6
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6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
PG_3p3V
2.5V_A_PG
VREF_DIMM
VTT_DIMM
5.0V1.8V_DIMM
VREF_QDRII
VTT_QDRII
5.0VVDDQ_QDRII
VREF_DEV
VTT_DEV
5.0V1.8V_DEV
3.3V
2.5V
3.3V
1.5V_1.8V
3.3V 3.3V3.3V 3.3V
5.0V
5.0V5.0V
2.5V_B2
2.5V_VCCPD
2.5V_B4A_B5_B6
2.5V_A
1.5V_1.8V_B7
VDDQ_QDRII2.5V_VCC_CLKIN
2.5V_VCCPGM
2.5V_A_SENSE_P 2.5V_A_SENSE_N
3.3V5.0V
1.1V 1.1V_VCC
1.8V
PG_3p3V 3,6
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B4 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B4 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B4 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Power 2
0.9V VTT (3A Sink/Src) 0.9V VTT (3A Sink/Src)
1.00K needed for 1.8V operation1.30K needed for 1.5V operation
(1-2) 1.8V operation(2-3) 1.5V operation
(1-2) 1.1V operation(2-3) 1.0V operation1.00K needed for 1.1V operation
1.15K needed for 1.0V operation
U38 TPS51100DGQU38 TPS51100DGQ
VDDQSNS 1VLDOIN 2
VTT 3
PG
ND
4
VTTSNS 5
VTTREF6
S37
GN
D8
S59
VIN10
GN
D11
R44 4.7KR44 4.7K
C212
10uF
C212
10uF
U36 TPS51100DGQU36 TPS51100DGQ
VDDQSNS 1VLDOIN 2
VTT 3
PG
ND
4
VTTSNS 5
VTTREF6
S37
GN
D8
S59
VIN10
GN
D11
C56
10uF
C56
10uF
C246
10uF
C246
10uF
C67 1uFC67 1uF
R223 10.0KR223 10.0K C224
10uF
C224
10uF
R22
1.30K
R22
1.30K
R23 3.57KR23 3.57K
R154 10.0KR154 10.0K
R31 100KR31 100K
C248
10uF
C248
10uF
C394
10uF
C394
10uF
C76
10uF
C76
10uF
L17
BLM15AG221SN1
L17
BLM15AG221SN1
C193
10uF
C193
10uF
C254
0.1uF
C254
0.1uF
R162 10.0KR162 10.0K
R29 1.78KR29 1.78K
XJ8
881545-2
XJ8
881545-2
R351.00kR351.00k
U24
LTC3026
U24
LTC3026
IN11
IN22
GN
D3
SW4
BST 5
SHDN6
PG 7ADJ 8
OUT1 9OUT2 10
GN
D11
R186 .009R186 .009U21
LTC3026
U21
LTC3026
IN11
IN22
GN
D3
SW4
BST 5
SHDN6
PG 7ADJ 8
OUT1 9OUT2 10
GN
D11
C51
10uF
C51
10uF
J10TSW-103-07-L-SJ10TSW-103-07-L-S
123
R166 .009R166 .009
C397
10uF
C397
10uF
C44 1uFC44 1uF
J12TSW-103-07-L-SJ12TSW-103-07-L-S
123
U37 TPS51100DGQU37 TPS51100DGQ
VDDQSNS 1VLDOIN 2
VTT 3
PG
ND
4
VTTSNS 5
VTTREF6
S37
GN
D8
S59
VIN10
GN
D11
C253
10uF
C253
10uF
R32 4.7KR32 4.7K
R217 .009R217 .009
C82 1uFC82 1uF
C396
10uF
C396
10uF
R21
1.00k
R21
1.00k
R30
1.00k
R30
1.00k
C36
10uF
C36
10uF
C183
10uF
C183
10uF
C50
10uF
C50
10uF
R224 10.0KR224 10.0K
C259
1uF
C259
1uF
R38 100KR38 100K
C401
10uF
C401
10uF
R421.00kR421.00k
C220
10uF
C220
10uF
R173 .009R173 .009
R26 .009R26 .009
C61 1uFC61 1uF
C57
10uF
C57
10uF
C399
10uF
C399
10uF
U26
LTC3026
U26
LTC3026
IN11
IN22
GN
D3
SW4
BST 5
SHDN6
PG 7ADJ 8
OUT1 9OUT2 10
GN
D11
R43 100KR43 100K
R196 .009R196 .009
C263
10uF
C263
10uF
R218 .009R218 .009
C168
10uF
C168
10uF
R25 4.7KR25 4.7K R34 5.23KR34 5.23K
C398
10uF
C398
10uF
R24 100KR24 100K
C252
10uF
C252
10uF
C37
10uF
C37
10uF
XJ7
881545-2
XJ7
881545-2
C395
1uF
C395
1uF
R36 4.7KR36 4.7K
R33
1.00k
R33
1.00k
C402
0.1uF
C402
0.1uF
U23
LTC3026
U23
LTC3026
IN11
IN22
GN
D3
SW4
BST 5
SHDN6
PG 7ADJ 8
OUT1 9OUT2 10
GN
D11
R41 5.23KR41 5.23K
C400
10uF
C400
10uF
R164 10.0KR164 10.0KC208
10uF
C208
10uF
C260
10uF
C260
10uF
C77
10uF
C77
10uF
C262
1uF
C262
1uF
R165 10.0KR165 10.0K
R214 .009R214 .009
C270
10uF
C270
10uF
C261
0.1uF
C261
0.1uF
R178 .009R178 .009
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LTMB_FB
LTMB_FB
FSETB
RUN_SW
MPGMB
RUN_SW
LT4601_CLK180
LT4601_CLK90
LTMC_FB
FSETC
LTMC_FB
MPGMC
RUN_SW
LT4601_CLK90
LT4601_CLK180
+18SW
-18FB
-18SW
DC_INPUT
1.8V
DC_INPUT
VCCL
VCCL
1.8V 1.8V_S3
1.8V_DIMM
1.8V_QDRII
1.8V_DEV
VCCL_SENSE
V512V -12V
V4 V3 V2 V1 2.5V
-12V LT4601_CLK180 9
RUN_SW 3
LT4601_CLK90 9
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B5 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B5 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B5 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Power 3
LT4601 SWITCHER
(1-2) 1.1V operation(2-3) 0.9V operation71.5K needed for 1.1V operation
1.18.0K needed for 0.9V operation
C71uFC71uF
C121
150u
C121
150u
U33B
LTM4601
U33B
LTM4601
PGNDD1
PGNDD2
PGNDD3
PGNDD4
PGNDD5
PGNDD6
PGNDE1
PGNDE2
PGNDE3
PGNDE4
PGNDE5
PGNDE6
PGNDE7
PGNDF1
PGNDF2
PGNDF3
PGNDF4
PGNDF5
PGNDF6
PGNDF7
PGND F8
PGND F9
PGND G1
PGND G2
PGND G3
PGND G4
PGND G5
PGND G6
PGND G7
PGND G8
PGND G9
PGND H1
PGND H2
PGND H3
PGND H4
PGND H5
PGND H6
PGND H7
PGND H8
PGND H9
SGND H12
C61uFC61uF
C96100uFC96100uF
R226
71.5K
R226
71.5K
R144.7KR144.7K
XJ6
881545-2
XJ6
881545-2
U34D
LTM4601
U34D
LTM4601
INTVCCA7
PLLINA8
TRACK/SSA9
RUNA10
FSET B12
MARG0C12
MARG1D12
VFB F12PGOOD G12
DRVCCE12
COMPA11
MPGMA12
VOSNS+ J12
VOSNS- M12
VOUT_LCL L12DIFFVOUT K12
J6
HDR2x1
J6
HDR2x1
11
22
C126
10uF
C126
10uF
R80787KR80787K
R82787KR82787K
C203
10uF
C203
10uF
C404
100pF
C404
100pF
C117 0.01uFC117 0.01uF
R114.7KR114.7K
C110
1000pF
C110
1000pF
C114
47nF
C114
47nF
C97100uFC97100uF
R135 .009R135 .009
C403
100pF
C403
100pF
C123
10uF
C123
10uF
U35
LT1931
U35
LT1931
SW1 1
GND 2
NFB 3
VIN4
SHDN5
+ C107
10VTantalum
470uF+ C107
10VTantalum
470uF
12
U34C
LTM4601
U34C
LTM4601
VINA1
VINA2
VINA3
VINA4
VINA5
VINA6
VINB1
VIN B4
VIN B5
VIN B6
VIN C1
VIN C2
VIN C3
VIN C4
VIN C5VINB2
VINB3 VIN C6C99100uFC99100uF
+ C103
10VTantalum
470uF+ C103
10VTantalum
470uF
12
R227
71.5K
R227
71.5K
R7630.1KR7630.1K
R1222KR1222K
D3120V ZenerD3120V Zener
R81 100KR81 100K
C101uFC101uF
C116
47nF
C116
47nF
D3740V SchottkyD3740V Schottky
R222 .009R222 .009U33C
LTM4601
U33C
LTM4601
VINA1
VINA2
VINA3
VINA4
VINA5
VINA6
VINB1
VIN B4
VIN B5
VIN B6
VIN C1
VIN C2
VIN C3
VIN C4
VIN C5VINB2
VINB3 VIN C6
C81uFC81uF
J20TSW-103-07-L-SJ20TSW-103-07-L-S
123
R215 .009R215 .009
R134.7KR134.7K
R216 .009R216 .009
D3020V ZenerD3020V Zener
R104.7KR104.7KL13
10uH
L13
10uH1 2
R163 .009R163 .009
L14
10uH
L14
10uH1 2
C111
1000pF
C111
1000pF
U33A
LTM4601
U33A
LTM4601
VOUTJ1
VOUTJ2
VOUTJ3
VOUTJ4
VOUTJ5
VOUTJ6
VOUTJ7
VOUTJ8
VOUTJ9
VOUTJ10
VOUTK1
VOUTK2
VOUTK3
VOUTK4
VOUTK5
VOUTK6
VOUTK7
VOUTK8
VOUTK9
VOUTK10
VOUTK11
VOUT L1
VOUT L2
VOUT L3
VOUT L4
VOUT L5
VOUT L6
VOUT L7
VOUT L8
VOUT L9
VOUT L10
VOUT L11
VOUT M1
VOUT M2
VOUT M3
VOUT M4
VOUT M5
VOUT M6
VOUT M7
VOUT M8
VOUT M9
VOUT M10
VOUT M11
R1382.2KR1382.2K
U33D
LTM4601
U33D
LTM4601
INTVCCA7
PLLINA8
TRACK/SSA9
RUNA10
FSET B12
MARG0C12
MARG1D12
VFB F12PGOOD G12
DRVCCE12
COMPA11
MPGMA12
VOSNS+ J12
VOSNS- M12
VOUT_LCL L12DIFFVOUT K12
C189
10uF
C189
10uF
C122
10uF
C122
10uF
R98100R98100
C115 0.01uFC115 0.01uF
R13210.0KR13210.0K
C98100uFC98100uF
R79 100KR79 100K
C125
10uF
C125
10uF
C2041.0uFC2041.0uF
U34B
LTM4601
U34B
LTM4601
PGNDD1
PGNDD2
PGNDD3
PGNDD4
PGNDD5
PGNDD6
PGNDE1
PGNDE2
PGNDE3
PGNDE4
PGNDE5
PGNDE6
PGNDE7
PGNDF1
PGNDF2
PGNDF3
PGNDF4
PGNDF5
PGNDF6
PGNDF7
PGND F8
PGND F9
PGND G1
PGND G2
PGND G3
PGND G4
PGND G5
PGND G6
PGND G7
PGND G8
PGND G9
PGND H1
PGND H2
PGND H3
PGND H4
PGND H5
PGND H6
PGND H7
PGND H8
PGND H9
SGND H12
C124
150u
C124
150u
C91uFC91uF
R13180.6KR13180.6K
U34A
LTM4601
U34A
LTM4601
VOUTJ1
VOUTJ2
VOUTJ3
VOUTJ4
VOUTJ5
VOUTJ6
VOUTJ7
VOUTJ8
VOUTJ9
VOUTJ10
VOUTK1
VOUTK2
VOUTK3
VOUTK4
VOUTK5
VOUTK6
VOUTK7
VOUTK8
VOUTK9
VOUTK10
VOUTK11
VOUT L1
VOUT L2
VOUT L3
VOUT L4
VOUT L5
VOUT L6
VOUT L7
VOUT L8
VOUT L9
VOUT L10
VOUT L11
VOUT M1
VOUT M2
VOUT M3
VOUT M4
VOUT M5
VOUT M6
VOUT M7
VOUT M8
VOUT M9
VOUT M10
VOUT M11
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
PWR_SEG_DP
PWR_SEG_A
PWR_DIG_SEL1
PWR_SEG_BPWR_SEG_CPWR_SEG_DPWR_SEG_EPWR_SEG_FPWR_SEG_G
SEG_LED_ASEG_LED_BSEG_LED_CSEG_LED_DSEG_LED_ESEG_LED_FSEG_LED_GSEG_LED_DP
PWR_SEG_A
PWR_DIG_SEL[4:1]
PWR_SEG_BPWR_SEG_CPWR_SEG_DPWR_SEG_EPWR_SEG_FPWR_SEG_GPWR_SEG_DP
PWR_SEL0
PWR_SEL[3:0]
PWR_SEL1 PWR_SEL2
PWR_SEL3
SEG_LED_MINUSPWR_SEG_MINUS
PWR_SEG_MINUS
PWR_DIG_SEL2PWR_DIG_SEL3PWR_DIG_SEL4
PG_3p3VLT1761_CSENSE
PG_3p3V
CS_DBCS_DA
PMON_DATA
PMON_CLKPMON_CSNPMON_SYNC
PMON_DATAPMON_CLK
PMON_SYNC
ALERTn
EXT_TEMPD_P
TSENSE_SMB_CLK
EXT_TEMPD_P
TSENSE_SMB_DATA
EXT_TEMPD_N
EXT_TEMPD_N
OVERTEMPn
TSENSE_FAN_CNTL
TEMPDIODE_PTEMPDIODE_N
PMON_SDI
OVERTEMPnALERTn
TSENSE_OVERTEMPn
TSENSE_SMB_DATATSENSE_SMB_CLK
CS_DA
CS_DAPMON_CLKPMON_SDIPMON_CSN
2.5V
3.0V_CSENSE
3.0V_CSENSE
3.0V_CSENSE
3.0V_CSENSE
3.3V
2.5V_B22.5V
2.5V_B4A_B5_B6
1.5V_1.8V_B71.5V_1.8V
1.1V_VCC1.1V
2.5V
2.5V_A_SENSE_N
2.5V_A_SENSE_P2.5V_VCCPGM
2.5V_VCCPD
2.5V_A_SENSE_P
2.5V
VCCL_SENSEVCCL
12V
3.3V
3.3V
3.3V
3.3V
3.3V3.3V3.3V
3.0V_CSENSE
1.8V1.8V_S3
3.3V_SENSE3.3V
2.5V 2.5V PWR_SEG_A 9
PWR_DIG_SEL[4:1] 9
PWR_SEG_B 9PWR_SEG_C 9PWR_SEG_D 9PWR_SEG_E 9PWR_SEG_F 9PWR_SEG_G 9PWR_SEG_DP 9
PWR_SEL[3:0] 9
PWR_SEG_MINUS 9
PG_3p3V 3
PMON_DATA 9
PMON_CLK 9PMON_CSN 9PMON_SYNC 9
TEMPDIODE_P 18TEMPDIODE_N 18
PMON_SDI 9
ALERTn 9
TSENSE_SMB_DATA 9
TSENSE_SMB_CLK 9
OVERTEMPn 9
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B6 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B6 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B6 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Temperature and Current Sense
POWER DISPLAY
POWER DISPLAY INTERFACE
Place (1) 0.1uF near VDD of ADG725.Place (1) 0.1uF and (1) 1.0uF near V+ of INA271Place (1) 0.1uF and (1) 1.0uF near V+ of AD7940
Values for these caps and resistors will change,but the package sizes are accurate.
Fan PowerTemperature Sense
Current Sense
Q1
FDV305N
Q1
FDV305N
D13Red_LEDD13Red_LED
R60 220R60 220
C200
100pF
C200
100pF
C192
1.0uF
C192
1.0uF
C924.7uFC924.7uF
R58 220R58 220
R66 10.0KR66 10.0KC914.7uFC914.7uF
R206100, 1%R206100, 1%
U16
DNI
U16
DNI
T_CRIT 4
D-3
D+2
SMBCLK 8VDD1
SMBDAT 7
OS/A0 6
GND5
B4
FAN
B4
FAN
R56 220R56 220
J15
22_23_2021
J15
22_23_2021
12
R140 DNIR140 DNI
U18
LTC2402
U18
LTC2402
VCC1
FSset2
CH13
CH04
ZSset5 GND 6CSn 7SDO 8SCK 9
Fo 10
C236
0.1uF
C236
0.1uF
R240 1.00kR240 1.00k
C191
DNI
C191
DNI
C249
0.1uF
C249
0.1uF
R2021.00kR2021.00k
R57 220R57 220
R142DNIR142DNI
C198
10uF
C198
10uF
R239 1.00kR239 1.00k
R676.81KR676.81K
R48 220R48 220
R47 220R47 220
U14DNIU14DNI
OUTA1
V-2
INA+3 INA- 4
V+ 5
C190
DNI
C190
DNI
C206
0.1uF
C206
0.1uF
SW6
94HAB16WT
SW6
94HAB16WT
P22
C2C2
P88C1 C1P4 4
P1 1
R46 220R46 220
R18DNIR18DNI
U29
LT1761
U29
LT1761
VIN1
GND 2
VOUT 5
ADJ/BYPASS 4
SHDN3ANALOG MUXU19
ADG725
ANALOG MUXU19
ADG725
GND23
VDD 13
DA 43
DB 41
NC1 15
NC7 44NC6 42
S3A10
S4A9
S5A8
S6A7
S7A6
S8A5
S9A 4
S10A 3
S11A 2
S12A 1
S2A11
S1A12
S13A 48
S14A 47
S15A 46
S16A 45
S1B25
S2B26
S3B27
S4B28
S5B29
S6B30
S7B31
S8B32
S9B 33
S10B 34
S11B 35
S12B 36
S13B 37
S14B 38
S15B 39
S16B 40
VDD 14
NC2 16SYNC17
VSS24
DIN18
SCLK19
NC3 20
NC4 21
NC5 22
R61 220R61 220
Q2
FDV305N
Q2
FDV305N
R139DNIR139DNI
R19DNIR19DNI
R20DNIR20DNI
U27 QUAD_7SEG_M2212RIU27 QUAD_7SEG_M2212RI
ca13
DIGIT11
D8
an14
E2
C3
F9
DIGIT34DIGIT210
G7
DIGIT46
B11
A12
DP
5
C1990.1uFC1990.1uF
C245
1.0uF
C245
1.0uF
U13
DNI
U13
DNI
IN-1
GND2
PREOUT3
BUFIN4
IN+ 8
NC 7
V+ 6
OUT 5
R230 1.00kR230 1.00k
J7DNIJ7DNI
1 2
R59 220R59 220
C213
DNI
C213
DNI
R229 1.00kR229 1.00k
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
VCCBAT
VREF_DIMM VREF_QDRII
1.1V_VCC
2.5V_A
2.5V_VCCPD
1.8V_S3
1.8V_S3
2.5V_B2
1.8V_S3
2.5V_B4A_B5_B6
2.5V_B4A_B5_B6
1.8V_S3
1.5V_1.8V_B7
VCCL
2.5V_A
VREF_DIMM
VREF_DEV
VREF_QDRII
VREF_DEV
2.5V_VCC_CLKIN
2.5V_VCCPGM
1.1V_VCC1.1V_VCCD1
1.1V_VCCD2
1.1V_VCCD3
1.1V_VCCD4
1.1V_VCCD2
1.1V_VCCD3
1.1V_VCCD4
1.1V_VCCD1
2.5V_VCC_CLKIN
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B7 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B7 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B7 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Power
PLACE NEAR SIII
TP4TP4TP8TP8
TP7TP7
C307
0.1uF
C307
0.1uF
C258
0.1uF
C258
0.1uF
C311
0.1uF
C311
0.1uF
L4
BLM15AG221SN1
L4
BLM15AG221SN1
C282
0.1uF
C282
0.1uF
BT1
Battery
BT1
Battery
1P
OS
2N
EG
TP9TP9
C313
0.1uF
C313
0.1uF
Stratix III
EP3SL150F1152
U22M
Stratix III
EP3SL150F1152
U22M
GNDAA11
GNDAA14
GNDAA16
GNDAA18
GNDAA2
GNDAA20
GNDAA22
GNDAA5
GNDAA8
GNDAB13
GNDAB15
GNDAB17
GNDAB19
GNDAB21
GNDAB23
GNDAC14
GNDAC16
GNDAC18
GNDAC20
GNDAC24
GNDAC27
GNDAC30
GNDAC33
GNDAD11
GNDAD14
GNDAD17
GNDAD2
GNDAD20
GND AD23
GND AD5
GND AD8
GNDAF27GNDAF30GNDAF33GNDAF9GNDAG11GNDAG14GNDAG17GNDAG2
GND AG20
GND AG23
GND AG26
GND AG5
GND AG8
GND AJ30
GND AJ33
GND AK11
GND AK14
GND AK17
GND AK2
GND AK20
GND AK23
GND AK26
GND AK29
GND AK5
GND AK8
GND AM33
GND AN11
GND AN14
GND AN17
GND AN2
GND AN20
GND AN23
GND AN26
GND AN29
GND AN32
GND AN5
GND AN8
GND B12
GND B15
GND B18
GND B21
GNDV13
GNDV15
GNDV17
GNDV19
GNDV2
GNDV21
GNDV23
GNDV5
GNDV8
GNDW14
GNDW16
GNDW18
GNDW20
GNDW22
GNDY13
GND Y15GND Y17GND Y19GND Y21GND Y24GND Y27GND Y30GND Y33
GND L33
GND M11
GND M15
GND M17
GND M19
GND M2
GND N16
GND N14
GND N12GNDM8GNDM5
Stratix III
EP3SL150F1152
U22N
Stratix III
EP3SL150F1152
U22N
GNDB24
GNDB27
GNDB3
GNDB30
GNDB33
GNDB6
GNDB9
GNDC2
GNDE12
GNDE15
GNDE18
GNDE21
GNDE24
GNDE27
GNDE30
GNDE33
GNDE6
GNDE9
GNDF2
GNDF5
GNDH12
GNDH15
GNDH18
GNDH21
GNDH24
GNDH27
GNDH30
GNDH33
GNDH9
GNDJ2
GNDJ5
GNDJ8
GNDL12
GNDL15
GNDL18
GNDL21
GNDL24
GNDL27
GNDL30
GND M21
GND N18
GND N20
GND N22
GND P13
GND P15
GND P17
GND P19
GND P21
GND P24
GND P27
GND P30
GND P33
GND R11
GND R14
GND R16
GND R18
GND R2
GND R20
GND R22
GND R5
GND R8
GND T13
GND T15
GND T17
GND T19
GND T21
GND U12
GND U14
GND U16
GND U20
GND U22
GND U23
GND U24
GND U27
GND U30
GND U33
GND V11
GND V12
NC_1AC10
NC_2AH7
NC_3AK30
NC_4AL31
NC_5D32
NC_6 G7
NC_7 K26
NC_8 L11
NC_9 L25
NC_10 M25
C276
0.1uF
C276
0.1uF
L5
BLM15AG221SN1
L5
BLM15AG221SN1
D41N6263-WD41N6263-W
C257
0.1uF
C257
0.1uF
C299
0.1uF
C299
0.1uF
C256
0.1uF
C256
0.1uF
Stratix III Power
EP3SL150F1152
U22K
Stratix III Power
EP3SL150F1152
U22K
VCCAB16
VCCAB18
VCCAB20
VCCN15
VCCN17
VCCN19
VCCR13
VCCT22
VCCU13
VCCV22
VCCW13
VCCY22
VCCL AA13
VCCL AA15
VCCL AA17
VCCL AA19
VCCL AA21
VCCL AB14
VCCL AB22
VCCL N13VCCL N21VCCL P14VCCL P16VCCL P18VCCL P20VCCL P22VCCL R15VCCL R17VCCL R19VCCL R21
VCCL T14
VCCL T16
VCCL T18
VCCL T20
VCCL U15
VCCL U17
VCCL U19
VCCL U21
VCCL V14
VCCL V16
VCCL V18
VCCL V20
VCCL W15
VCCL W17
VCCL W19
VCCL W21
VCCL Y14
VCCL Y16
VCCL Y18
VCCL Y20
VCCA_PLL_B1AH18
VCCA_PLL_B2AH17
VCCA_PLL_L2U28
VCCA_PLL_L3V28
VCCA_PLL_R2U7VCCA_PLL_R3V7
VCCA_PLL_T1G18VCCA_PLL_T2G17
VCCBATG6
VCCD_PLL_B1AF18
VCCD_PLL_B2AF17
VCCD_PLL_L2U26
VCCD_PLL_L3V26
VCCD_PLL_R2U9VCCD_PLL_R3V9
VCCD_PLL_T1J18VCCD_PLL_T2J17
VCCPTV6VCCPTU29VCCPTJ27VCCPTH8VCCPTF18VCCPTAJ17VCCPTAG7VCCPTAG27
VCCPGMAD24VCCPGMAD10
VCCPD8C M18VCCPD8B M20VCCPD8A M22VCCPD7C M16VCCPD7B M14VCCPD7A M12VCCPD6C T12
VCCPD1A N23
VCCPD1C R23
VCCPD2A AA23
VCCPD2C W23
VCCPD3A AC23
VCCPD3B AC21
VCCPD6A P12VCCPD5C Y12VCCPD5A AB12VCCPD4C AC17VCCPD4B AC15VCCPD4A AC13VCCPD3C AC19
VCC_CLKIN3CAG18
VCC_CLKIN4CAE17
VCC_CLKIN7CH17
VCC_CLKIN8CK18
C277
0.1uF
C277
0.1uF
D51N6263-WD51N6263-W
Stratix III Power
EP3SL150F1152
U22L
Stratix III Power
EP3SL150F1152
U22L
VCCIO1AB34
VCCIO1AG32
VCCIO1AH29
VCCIO1AL26
VCCIO1AN28
VCCIO1CM32
VCCIO1CT31
VCCIO1CU34
VCCIO1CV30
VCCIO2AAB28
VCCIO2AAD25
VCCIO2AAG28
VCCIO2AAH32
VCCIO2AAN34
VCCIO2CAD32
VCCIO2CW25
VCCIO2CW29
VCCIO2CW32
VCCIO3AAF25
VCCIO3AAJ25
VCCIO3AAL30
VCCIO3AAM27
VCCIO3BAF22
VCCIO3BAM25
VCCIO3CAH21
VCCIO3CAJ18
VCCIO3CAM20
VCCIO4AAF12
VCCIO4AAH10
VCCIO4AAL6
VCCIO4AAM3
VCCIO4BAH13
VCCIO4BAM10
VCCIO4CAG16
VCCIO4CAM13
VCCIO4CAP17
VCCIO5A AB7VCCIO5A AD9VCCIO5A AG6VCCIO5A AH3VCCIO5A AN1
VCCIO5C AC3VCCIO5C U5VCCIO5C V1VCCIO5C W4
VCCIO6A B1VCCIO6A G3VCCIO6A H7VCCIO6A L10VCCIO6A N7
VCCIO6C L3VCCIO6C T10VCCIO6C T3VCCIO6C T6
VCCIO7A C8VCCIO7A D5VCCIO7A F10VCCIO7A J10
VCCIO7B C10VCCIO7B J13
VCCIO7C C13VCCIO7C F17VCCIO7C G14
VCCIO8A C32
VCCIO8A D29
VCCIO8A G25
VCCIO8A J23
VCCIO8B C25
VCCIO8B G22
VCCIO8C A18VCCIO8C C22VCCIO8C H19
VREF1AJ26
VREF1CP26
VREF2AAA26
VREF2CV27
VREF3AAG25
VREF3BAG22
VREF3CAH20
VREF4AAG10
VREF4BAG13
VREF4CAH16
VREF5A AF7
VREF5C AA9
VREF6A P9
VREF6C U8
VREF7A H10
VREF7B H13
VREF7C G15
VREF8A H25
VREF8B H22
VREF8C G19
L6
BLM15AG221SN1
L6
BLM15AG221SN1 C312
0.1uF
C312
0.1uF
TP2TP2TP1TP1
L7
BLM15AG221SN1
L7
BLM15AG221SN1
TP10TP10
TP3TP3
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
CLKIN_50
CLKIN_125
USB_IFCLK
QDRII_WPSn
DDR2_DEVB_A12
DDR2_DEVB_A14
DDR2_DEVB_A9
DDR2_DEVB_A11
HSMA_CLK_OUT_P1HSMA_CLK_OUT_N1
HSMB_SDA
USER_PB0USER_PB1
USER_PB2
USER_PB3
FLASH_RDYBSYn
USER_DIPSW0USER_DIPSW1
USER_DIPSW3
USER_DIPSW4USER_DIPSW5USER_DIPSW6USER_DIPSW7
CLKIN_50
CLKIN_125
DDR2_DIMM_A3
DDR2_DIMM_A4
DDR2_DIMM_BA2
DDR2_DIMM_RESETn
DDR2_DIMM_SDA
DDR2_DIMM_SCL
DDR2_DIMM_SCLDDR2_DIMM_SDA
HSMB_SDA
DDR2_DEVB_A[14:0]
USER_DIPSW2
DDR2_DIMM_ODT0
DDR2_DIMM_RESETnDDR2_DIMM_RASnDDR2_DIMM_CASnDDR2_DIMM_WEn
DDR2_DIMM_ODT1
CLKOUT_SMA
CLKIN_SMA
CLKIN_SMA
QDRII_WPSn
FLASH_RDYBSYn
HSMA_CLK_IN_P[2:1]
HSMA_CLK_IN_N[2:1]
HSMB_CLK_IN_P[2:1]
HSMB_CLK_IN_N[2:1]
USER_DIPSW[7:0]
USER_PB[3:0]
HSMA_CLK_OUT_N[2:1]
HSMA_CLK_OUT_P[2:1]
DDR2_DIMM_BA[2..0]
DDR2_DIMM_A[15..0]
DDR2_DIMM_A8DDR2_DIMM_A2
DDR2_DIMM_CASn
DDR2_DIMM_ODT0
DDR2_DIMM_A7
DDR2_DIMM_BA0
DDR2_DIMM_ODT1DDR2_DIMM_RASn
DDR2_DIMM_BA1
DDR2_DIMM_WEn
ENET_RX_COLENET_RX_D7
ENET_S_CLKNENET_S_CLKP
ENET_TX_NENET_TX_P
HSMB_CLK_IN_N2HSMB_CLK_IN_P2
USB_IFCLKHSMA_CLK_IN_P2HSMA_CLK_IN_N2
CLKOUT_SMA
ENET_S_CLKNENET_S_CLKP
ENET_TX_PENET_TX_N
ENET_RX_COL
ENET_RX_D[7..0]
1.8V 2.5V
1.8V 2.5V1.8V
1.8V
USB_IFCLK 9
DDR2_DIMM_SCL 10DDR2_DIMM_SDA 10
HSMB_SDA 16
DDR2_DEVB_A[14:0] 11,12,18,19
DDR2_DIMM_ODT0 10,12
DDR2_DIMM_RESETn 10DDR2_DIMM_RASn 10,12DDR2_DIMM_CASn 10,12DDR2_DIMM_WEn 10,12
DDR2_DIMM_ODT1 10,12
QDRII_WPSn 11,12
FLASH_RDYBSYn 9,13
HSMA_CLK_IN_P[2:1] 16,21
HSMA_CLK_IN_N[2:1] 16,21
HSMB_CLK_IN_P[2:1] 16,21
HSMB_CLK_IN_N[2:1] 16,21
USER_DIPSW[7:0] 17
USER_PB[3:0] 17
HSMA_CLK_OUT_N[2:1] 16,21
HSMA_CLK_OUT_P[2:1] 16,21
DDR2_DIMM_BA[2..0] 10,12
DDR2_DIMM_A[15..0] 10,12,20
CLKOUT_SMA 19
ENET_TX_P 15ENET_TX_N 15
ENET_S_CLKP 15ENET_S_CLKN 15
ENET_RX_COL 15
ENET_RX_D[7..0] 15,19
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B8 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B8 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B8 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Clocks
SMA Connector(external clock source)
HSMC PORT B
DDR2 SDRAM DEVICE B INTERFACE
HSMC PORT A
USER INTERFACE
ETHERNET INTERFACE
DDR2 DIMM INTERFACE
USB 2.0 INTERFACE
QDRII SRAM INTERFACE
FLASH INTERFACE
SMA CLOCK
C274
0.01uF
C274
0.01uF
C184.7uFC184.7uF
L16BLM15AG221SN1
L16BLM15AG221SN1
Y6
50MHz
Y6
50MHz
VCC 4
GND2 OUT 3
EN1
Bank 1C
Bank 2C
Stratix III Clocks
Bank 3C
Bank 4C
Bank 5C
Bank 6C
Bank 7C
Bank 8C
EP3SL150F1152
U22I
Bank 1C
Bank 2C
Stratix III Clocks
Bank 3C
Bank 4C
Bank 5C
Bank 6C
Bank 7C
Bank 8C
EP3SL150F1152
U22I
CLK1NT34CLK1PT33CLK0N/DIFFIO_RX_L22NV32CLK0P/DIFFIO_RX_L22PV31
PLL_L2_CLKOUT0N/DIFFIO_TX_L22N T30PLL_L2_FB_CLKOUT0P/DIFFIO_TX_L22P T29
CLK3NV34CLK3PV33CLK2N/DIFFIO_RX_L23NW34CLK2P/DIFFIO_RX_L23PW33
PLL_L3_CLKOUT0N/DIFFIO_TX_L23N V29PLL_L3_FB_CLKOUT0P/DIFFIO_TX_L23P W28
PLL_B1_FBN/CLKOUT2/DIFFIO_RX_B23N AK19PLL_B1_FBP/CLKOUT1/DIFFIO_RX_B23P AJ19
CLK4N/DIFFIO_RX_B24NAP18CLK4P/DIFFIO_RX_B24PAN18 PLL_B1_CLKOUT0P AD18
PLL_B1_CLKOUT3 AD19PLL_B1_CLKOUT0N AE18
PLL_B1_CLKOUT4 AE19CLK5PAN19
CLK5NAP19
CLK6N/DIFFIO_RX_B25NAP16CLK6P/DIFFIO_RX_B25PAN16
PLL_B2_FBN/CLKOUT2/DIFFIO_RX_B26N AM17PLL_B2_FBP/CLKOUT1/DIFFIO_RX_B26P AL17
PLL_B2_CLKOUT3 AD15
PLL_B2_CLKOUT4 AD16
PLL_B2_CLKOUT0P AE16
PLL_B2_CLKOUT0N AF16
CLK7PAN15
CLK7NAP15
CLK8NW1CLK8PW2
CLK9N/DIFFIO_RX_R22NU3CLK9P/DIFFIO_RX_R22PU4
PLL_R3_CLKOUT0N/DIFFIO_TX_R22N W9PLL_R3_FB_CLKOUT0P/DIFFIO_TX_R22P V10
CLK10NU1CLK10PU2
CLK11N/DIFFIO_RX_R23NT1CLK11P/DIFFIO_RX_R23PT2
PLL_R2_CLKOUT0N/DIFFIO_TX_R23N U10PLL_R2_FB_CLKOUT0P/DIFFIO_TX_R23P U11
PLL_T2_FBN/CLKOUT2/DIFFIO_RX_T23N E16PLL_T2_FBP/CLKOUT1/DIFFIO_RX_T23P F16
CLK12N/DIFFIO_RX_T24NA17CLK12P/DIFFIO_RX_T24PB17
CLK13NA16CLK13PB16 PLL_T2_CLKOUT3 K16
PLL_T2_CLKOUT0N K17
PLL_T2_CLKOUT4 L16
PLL_T2_CLKOUT0P L17
CLK14N/DIFFIO_RX_T25NA19CLK14P/DIFFIO_RX_T25PB19
PLL_T1_FBN/CLKOUT2/DIFFIO_RX_T26N C18PLL_T1_FBP/CLKOUT1/DIFFIO_RX_T26P D18
CLK15NA20CLK15PB20
PLL_T1_CLKOUT0N J19PLL_T1_CLKOUT0P K19
PLL_T1_CLKOUT3 L19
PLL_T1_CLKOUT4 L20
L2BLM15AG221SN1
L2BLM15AG221SN1
C2714.7uFC2714.7uF
Y5
125MHz
Y5
125MHz
VCC 4
GND2 OUT 3
EN1
J16J16
1
2345 R20749.9R20749.9
C150.01uFC150.01uF
L3DNIL3DNI
C230
0.01uF
C230
0.01uF
J17J17
1
2345
R1481.00kR1481.00k
L15DNIL15DNI
C2720.01uFC2720.01uF
R1741.00kR1741.00k
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
MAX_JTAG_TCKMAX_JTAG_TDIMAX_JTAG_TDOMAX_JTAG_TMS
USB_RSTOUTn
USB_PHY_FD[15..0]
USB_PWR_ENn
USB_RDnUSB_WR
USB_RSTn
PGM[3:0]
MAX_DIP[3:0]MAX_EN
PGM0PGM1PGM2
RESET_CONFIGnPWR_SEL[3:0]
MAX_DIP0MAX_DIP1MAX_DIP2MAX_DIP3
MAX_JTAG_TDO
FPGA_JTAG_TDO
FSM_A15
FSM_A1
FSM_A16
FSM_A2
FSM_A17
FSM_A3
FSM_A18
FSM_A4
FSM_A19
FSM_A5
FSM_A20FSM_A21
FSM_A7
FSM_A8
FSM_A22FSM_A23
FSM_A24
FSM_A9FSM_A10FSM_A11
FSM_A0
FSM_A12FSM_A13FSM_A14
FSM_D1FSM_D2FSM_D3
FSM_D8FSM_D9
FSM_D0
FSM_D10FSM_D11
FSM_D4FSM_D5FSM_D6FSM_D7
FSM_D14FSM_D15
FSM_D12FSM_D13
CLKIN_24 CLKIN_MAX_125
FPGA_DCLKFPGA_CONF_DONEFPGA_nSTATUSFPGA_nCONFIG
CLKIN_24CLKIN_MAX_125
FLASH_RDYBSYn
FLASH_RESETnFLASH_WEn
FLASH_CLK
FLASH_OEn
FLASH_CEn
FLASH_RDYBSYn
FLASH_RESETnFLASH_WEn
FLASH_CLK
FLASH_OEn
FLASH_CEn
FSM_D16FSM_D17
FSM_D19FSM_D20FSM_D21FSM_D22FSM_D23
USB_PHY_CMD_DATAUSB_PHY_IFCLK
USB_PHY_FULLUSB_PHY_EMPTYUSB_PHY_WENUSB_PHY_REN
USB_WAKEUPUSB_CLKOUT
USB_RSTOUTn
USB_RDnUSB_WR
USB_RSTn
USB_PHY_CMD_DATAUSB_PHY_IFCLK
USB_PHY_FULLUSB_PHY_EMPTYUSB_PHY_WENUSB_PHY_REN
USB_RESETnUSB_CLKOUT
MAX_CSnMAX_OEnMAX_WEn
MAX_CSnMAX_OEnMAX_WEn
USB_RESETn
USB_WAKEUP
USB_PA3_WU2
USB_PA0_INT0nUSB_PA1_INT1nUSB_PA2_SLOE
USB_PA3_WU2
USB_PA0_INT0nUSB_PA1_INT1nUSB_PA2_SLOE
MAXGP_JTAG_TCKMAXGP_JTAG_TMS
FPGA_JTAG_TDO
FPGA_DCLKFPGA_CONF_DONEFPGA_nSTATUS
FPGA_DATA0
FPGA_nCONFIG
FSM_D31
FSM_D30
FSM_D24FSM_D25FSM_D26FSM_D27FSM_D28FSM_D29
MAX_JTAG_TDIUSB_CMD_DATAUSB_IFCLK
USB_EMPTYUSB_FULL
USB_RENUSB_WEN
USB_PHY_FD5USB_PHY_FD6
USB_PHY_FD0
USB_PHY_FD7
USB_PHY_FD1USB_PHY_FD2USB_PHY_FD3USB_PHY_FD4
USB_FD0USB_FD1USB_FD2USB_FD3USB_FD4USB_FD5USB_FD6USB_FD7
USB_PHY_FD8USB_PHY_FD9USB_PHY_FD10USB_PHY_FD11USB_PHY_FD12USB_PHY_FD13USB_PHY_FD14USB_PHY_FD15
USB_FD[7:0]
CPU_RESETn RESET_CONFIGn
CPU_RESETnPWR_SEG_MINUS
PWR_SEG_A
PWR_DIG_SEL[4:1]
PWR_SEG_BPWR_SEG_CPWR_SEG_DPWR_SEG_EPWR_SEG_FPWR_SEG_GPWR_SEG_DP
DEV_SELJTAG_SEL
USB_IFCLK
FACTORY_CONFIGn
FACTORY_CONFIGn
USB_CMD_DATA
USB_EMPTYUSB_FULL
USB_REN
PWR_SEG_MINUS
PWR_SEG_APWR_SEG_BPWR_SEG_C
PWR_SEG_DPWR_SEG_EPWR_SEG_FPWR_SEG_GPWR_SEG_DP
PWR_DIG_SEL1PWR_DIG_SEL2
PWR_DIG_SEL3PWR_DIG_SEL4
MAX_FACTORYMAX_USER
MAX_LOADMAX_ERROR
USB_PA4_IF0ADR0USB_PA5_IF0ADR1USB_PA6_PKTEND
USB_PA5_IF0ADR1USB_PA6_PKTEND
USB_PA7_SLCSn
USB_PA7_SLCSn
FLASH_ADVn
FLASH_ADVn
LT4601_CLK0LT4601_CLK90LT4601_CLK180
MAX_ERROR
MAX_USERMAX_FACTORYMAX_LOADLT4601_CLK90
LT4601_CLK180
LT4601_CLK0
PMON_CSNPMON_CLK
PMON_SYNC
PMON_DATA
PMON_CLK
PMON_SYNC
PMON_DATA
FPGA_DATA[7:0]
FPGA_DATA1FPGA_DATA2FPGA_DATA3FPGA_DATA4
FPGA_DATA5FPGA_DATA6FPGA_DATA7
OVERTEMPn
MAX_TO_STRATIX3
MAX_TO_STRATIX3
ALERTn
ALERTn
TSENSE_SMB_CLKTSENSE_SMB_DATA
TSENSE_SMB_CLKTSENSE_SMB_DATA
HSMA_JTAG_TDIFSM_D[31:0]
FSM_A[24:0] HSMB_JTAG_TDIHSMA_JTAG_TDO
FPGA_JTAG_TDI
HSMB_JTAG_TDOHSMA_PSNTnHSMB_PSNTn
MAX_JTAG_TCKMAX_JTAG_TMS
HSMB_JTAG_TDI
HSMA_PSNTnHSMB_PSNTn
HSMA_JTAG_TDO
PMON_SDI
PWR_SEL3
PWR_SEL0PWR_SEL1PWR_SEL2
MAXGP_JTAG_TDOMAXGP_JTAG_TDIFPGA_JTAG_TCKFPGA_JTAG_TMS
FPGA_JTAG_TDI HSMA_JTAG_TDIFPGA_JTAG_TCK
MAXGP_JTAG_TDI
FPGA_JTAG_TMS
MAXGP_JTAG_TDO
MAX_EN
MAX_EMB
MAXGP_JTAG_TMS
MAXGP_JTAG_TCK
MAX_EMB
PGM3
VOLTS_WATTSMWATTS_MAMPS
VOLTS_WATTSMWATTS_MAMPS
MAX_RESERVE[1:0]
MAX_RESERVE1
FPGA_BYPASSHSMA_BYPASSHSMB_BYPASS
HSMB_BYPASSHSMA_BYPASSFPGA_BYPASS
MAX_RESERVE0
HSMB_JTAG_TDO
FSM_A6
FSM_D18
USB_WEN
USB_PA4_IF0ADR0
USB_PWR_ENn
OVERTEMPn
DEV_SELJTAG_SEL
PMON_SDI
PMON_CSN
1.8V
1.8V
2.5V
1.8V
2.5V
1.8V 1.8V2.5V 2.5V1.8V 2.5V 1.8V 2.5V
USB_PHY_FD[15..0] 14
USB_RDn 14USB_WR 14
USB_RSTn 14USB_RSTOUTn 14
PWR_SEG_A 6PWR_SEG_B 6PWR_SEG_C 6PWR_SEG_D 6PWR_SEG_E 6PWR_SEG_F 6PWR_SEG_G 6PWR_SEG_DP 6MAX_EN 17
PGM[3:0] 17
PWR_DIG_SEL[4:1] 6
MAX_DIP[3:0] 17
RESET_CONFIGn 17CPU_RESETn 17,20
USB_PWR_ENn 14
PWR_SEL[3:0] 6
MAX_JTAG_TDO 18
FPGA_JTAG_TDO 18
FPGA_CONF_DONE 17,18FPGA_nSTATUS 18
FPGA_DCLK 18FPGA_DATA[7:0] 18
FPGA_nCONFIG 18
FLASH_RDYBSYn 8,13
FLASH_RESETn 13,22FLASH_WEn 13,22FLASH_OEn 13,22
FLASH_CLK 13,22FLASH_CEn 13,22
USB_PHY_IFCLK 14USB_PHY_CMD_DATA 14USB_PHY_REN 14
USB_PHY_EMPTY 14USB_PHY_FULL 14
USB_WAKEUP 14
USB_PHY_WEN 14
USB_CLKOUT 14
MAX_CSn 22MAX_OEn 22MAX_WEn 22
USB_RESETn 14
USB_PA3_WU2 14
USB_PA0_INT0n 14USB_PA1_INT1n 14USB_PA2_SLOE 14
MAXGP_JTAG_TCK 18MAXGP_JTAG_TMS 18
PWR_SEG_MINUS 6
MAX_JTAG_TDI 18
USB_IFCLK 8USB_CMD_DATA 19USB_REN 21
USB_EMPTY 20USB_FULL 20
USB_WEN 21
USB_FD[7:0] 19
FACTORY_CONFIGn 17
MAX_LOAD 17MAX_ERROR 17
MAX_USER 17MAX_FACTORY 17
USB_PA6_PKTEND 14
USB_PA4_IF0ADR0 14USB_PA5_IF0ADR1 14
USB_PA7_SLCSn 14
FLASH_ADVn 13,22
LT4601_CLK0 3LT4601_CLK90 5LT4601_CLK180 5
PMON_DATA 6
PMON_SYNC 6PMON_CSN 6PMON_CLK 6
MAX_TO_STRATIX3 21
ALERTn 6
TSENSE_SMB_DATA 6
TSENSE_SMB_CLK 6HSMA_JTAG_TDI 16FSM_D[31:0] 13,22
FSM_A[24:0] 13,22 HSMB_JTAG_TDI 16HSMA_JTAG_TDO 16
FPGA_JTAG_TDI 18
HSMB_JTAG_TDO 16HSMA_PSNTn 16HSMB_PSNTn 16
OVERTEMPn 6PMON_SDI 6
MAX_JTAG_TMS 18MAX_JTAG_TCK 18
MAXGP_JTAG_TDO 18MAXGP_JTAG_TDI 18
FPGA_JTAG_TMS 16,18FPGA_JTAG_TCK 16,18
MAX_EMB 17
MWATTS_MAMPS 17VOLTS_WATTS 17
MAX_RESERVE[1:0] 17FPGA_BYPASS 17HSMA_BYPASS 17HSMB_BYPASS 17
DEV_SEL 18JTAG_SEL 18
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B9 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B9 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B9 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
MAX II
Place near MAX II
USB 2.0 INTERFACE
POWER MONITOR INTERFACE
USER I/O's
CONFIGURATION INTERFACE
FLASH INTERFACE
USB Blaster Clock
USB TO S3 INTERFACE
S3 OSCILLATOR CONTROLLT4601 SWITCHER
CURRENT SENSE
SHARED BUS
L12DNIL12DNI
R901.00kR901.00k
C132
0.1uF
C132
0.1uF
R91DNIR91DNI
C154
0.1uF
C154
0.1uF
MAX IIBANK3
U5C
EPM2210_F256FBGA
MAX IIBANK3
U5C
EPM2210_F256FBGA
IOB3/GLCK2J12
IOB3/GCLK3H12
IOB3_103P14
IOB3_104N13
IOB3_105P15
IOB3_106M14
IOB3_107N14
IOB3_108M13
IOB3_109N15
IOB3_110L14
IOB3_111N16
IOB3_112L13
IOB3_113M15
IOB3_114L12
IOB3_115M16
IOB3_116L11
IOB3_117L15
IOB3_118K14
IOB3_119L16
IOB3_120K13
IOB3_121K15
IOB3_122K12
IOB3_123K16
IOB3_125J15
IOB3_126J14
IOB3_127 J16
IOB3_128 J13
IOB3_129 H16
IOB3_130 H13
IOB3_131 H15
IOB3_132 H14
IOB3_133 G16
IOB3_134 G12
IOB3_135 G15
IOB3_137 F16
IOB3_138 G13
IOB3_139 F15
IOB3_140 G14
IOB3_141 E16
IOB3_142 F11
IOB3_143 E15
IOB3_144 F12
IOB3_145 D16
IOB3_146 F13
IOB3_147 D15
IOB3_148 F14
IOB3_149 D14
IOB3_150 E12
IOB3_151 C15
IOB3_152 E13
IOB3_153 C14
IOB3_154 E14
IOB3_155 D13
C159
0.1uF
C159
0.1uF
L9BLM15AG221SN1
L9BLM15AG221SN1
C134
0.1uF
C134
0.1uF
C1280.01uF
C1280.01uF
C155
0.1uF
C155
0.1uF
MAX IIBANK4
U5D
EPM2210_F256FBGA
MAX IIBANK4
U5D
EPM2210_F256FBGA
IOB4/DEV_CLRnM9
IOB4/DEV_OEM8
IOB4_156P4
IOB4_157R1
IOB4_158P5
IOB4_159T2
IOB4_160N5
IOB4_161R3
IOB4_162P6
IOB4_163R4
IOB4_164N6
IOB4_165T4
IOB4_166M6
IOB4_167R5
IOB4_168P7
IOB4_169T5
IOB4_170N7
IOB4_171R6
IOB4_172M7
IOB4_173T6
IOB4_175R7
IOB4_176P8
IOB4_177T7
IOB4_178N8
IOB4_179R8
IOB4_180 N9
IOB4_181 T8
IOB4_182 T9
IOB4_183 R9
IOB4_184 P9
IOB4_185 T10
IOB4_187 R10
IOB4_188 M10
IOB4_189 T11
IOB4_190 N10
IOB4_191 R11
IOB4_192 P10
IOB4_193 T12
IOB4_194 M11
IOB4_195 R12
IOB4_196 N11
IOB4_197 T13
IOB4_198 P11
IOB4_199 R13
IOB4_200 M12
IOB4_201 R14
IOB4_202 N12
IOB4_203 T15
IOB4_204 P12
IOB4_205 R16
IOB4_206 P13
C130
0.1uF
C130
0.1uF
Y1
125MHz
Y1
125MHz
VCC 4
GND2 OUT 3
EN1
C146
0.1uF
C146
0.1uF
L11BLM15AG221SN1
L11BLM15AG221SN1
Y4
24MHz
Y4
24MHz
VCC 4
GND2 OUT 3
EN1
C144
0.1uF
C144
0.1uF
C162
0.1uF
C162
0.1uF
C184
0.01uF
C184
0.01uF
C164
0.1uF
C164
0.1uF
C1274.7uFC1274.7uF
R1361.00kR1361.00k
MAX IIPower
U5E
EPM2210_F256FBGA
MAX IIPower
U5E
EPM2210_F256FBGA
GNDINTH7
GNDINTH9
GNDINTJ8
GNDINTJ10
GNDIOA1
GNDIOA16
GNDIOB2
GNDIOB15
GNDIOG7
GNDIOG8
GNDIOG9
GNDIOG10
GNDIOK7
GNDIOK8
GNDIOK9
GNDIOK10
GNDIOR2
GNDIOR15
GNDIOT1
GNDIOT16
VCCINT J9VCCINT J7VCCINT H10VCCINT H8
VCCIO1 C1
VCCIO1 H6
VCCIO1 J6
VCCIO1 P1
VCCIO2 A3
VCCIO2 A14
VCCIO2 F8
VCCIO2 F9
VCCIO3 C16
VCCIO3 H11
VCCIO3 J11
VCCIO3 P16
VCCIO4 L8
VCCIO4 L9
VCCIO4 T3
VCCIO4 T14
GNDINTG6 VCCINT K6
VCCINT F10
GNDINTF7
GNDINTK11 VCCINT G11VCCINT L7
GNDINTL10
C139
0.1uF
C139
0.1uF
C163
0.1uF
C163
0.1uF
C145
0.1uF
C145
0.1uF
C129
0.1uF
C129
0.1uF
MAX IIBANK1
U5A
EPM2210_F256FBGA
MAX IIBANK1
U5A
EPM2210_F256FBGA
IOB1_24H1
IOB1/GCLK0H5
IOB1/GCLK1J5
IOB1_1D3
IOB1_2C2
IOB1_3E3
IOB1_4C3
IOB1_5E4
IOB1_6D2
IOB1_7E5
IOB1_8D1
IOB1_9F3
IOB1_10E2
IOB1_11F4
IOB1_12E1
IOB1_13F5
IOB1_14F2
IOB1_15F6
IOB1_16F1
IOB1_17G3
IOB1_18G2
IOB1_19G4
IOB1_20G1
IOB1_21G5
IOB1_22H2
IOB1_25 H3
IOB1_26 J1
IOB1_27 H4
IOB1_28 J2
IOB1_29 J4
IOB1_30 K1
IOB1_31 J3
IOB1_32 K2
IOB1_34 L1
IOB1_35 K5
IOB1_36 L2
IOB1_37 K4
IOB1_38 M1
IOB1_39 K3
IOB1_40 M2
IOB1_41 L5
IOB1_42 M3
IOB1_43 L4
IOB1_44 N1
IOB1_45 L3
IOB1_46 N2
IOB1_47 M4
IOB1_48 N3
IOB1_49 P2
TMS N4TDO M5TDI L6
TCK P3
C150
0.1uF
C150
0.1uF
C133
0.1uF
C133
0.1uF
C1750.01uF
C1750.01uF
C151
0.1uF
C151
0.1uF
C1734.7uFC1734.7uF
C147
0.1uF
C147
0.1uF
C131
0.01uF
C131
0.01uF
MAX IIBANK2
U5B
EPM2210_F256FBGA
MAX IIBANK2
U5B
EPM2210_F256FBGA
IOB2_50C13
IOB2_51B16
IOB2_52C12
IOB2_53A15
IOB2_54D12
IOB2_55B14
IOB2_56C11
IOB2_57B13
IOB2_58D11
IOB2_59A13
IOB2_60E11
IOB2_61B12
IOB2_62C10
IOB2_63A12
IOB2_64D10
IOB2_65B11
IOB2_66E10
IOB2_67A11
IOB2_69B10
IOB2_70C9
IOB2_71A10
IOB2_72D9
IOB2_73B9
IOB2_74 E9
IOB2_75 A9
IOB2_76 A8
IOB2_77 B8
IOB2_78 E8
IOB2_79 A7
IOB2_80 D8
IOB2_81 B7
IOB2_82 C8
IOB2_83 A6
IOB2_85 B6
IOB2_86 E7
IOB2_87 A5
IOB2_88 D7
IOB2_89 B5
IOB2_90 C7
IOB2_91 A4
IOB2_92 E6
IOB2_93 B4
IOB2_94 D6
IOB2_95 C4
IOB2_96 C6
IOB2_97 B3
IOB2_98 C5
IOB2_99 A2
IOB2_100 D5
IOB2_101 B1
IOB2_102 D4
R137DNIR137DNI
L10DNIL10DNI
C138
0.1uF
C138
0.1uF
C165
0.1uF
C165
0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
DDR2_DIMM_A0
DDR2_DIMM_A3DDR2_DIMM_A1
DDR2_DIMM_DQ37
DDR2_DIMM_DQ39
DDR2_DIMM_DQ45
DDR2_DIMM_DQ46DDR2_DIMM_DQ47
DDR2_DIMM_DQ53
DDR2_DIMM_DQ60DDR2_DIMM_DQ61
DDR2_DIMM_DQ63
DDR2_DIMM_DM7
DDR2_DIMM_DM6
DDR2_DIMM_DM4
DDR2_DIMM_A8
DDR2_DIMM_A9DDR2_DIMM_A12
DDR2_DIMM_A5
DDR2_DIMM_A7DDR2_DIMM_A11
DDR2_DIMM_BA2
DDR2_DIMM_DQ31DDR2_DIMM_DQ30
DDR2_DIMM_DM8
DDR2_DIMM_DQ29DDR2_DIMM_DQ28
DDR2_DIMM_DQ23DDR2_DIMM_DQ22
DDR2_DIMM_DM2
DDR2_DIMM_DQ21DDR2_DIMM_DQ20
DDR2_DIMM_DQ15
DDR2_DIMM_DM1
DDR2_DIMM_DQ13DDR2_DIMM_DQ12
DDR2_DIMM_DQ6
DDR2_DIMM_DQ4DDR2_DIMM_DQ5DDR2_DIMM_DQ0
DDR2_DIMM_DQ1
DDR2_DIMM_DQ2DDR2_DIMM_DQ3
DDR2_DIMM_DQ8DDR2_DIMM_DQ9
DDR2_DIMM_DQ10DDR2_DIMM_DQ11
DDR2_DIMM_DQ16DDR2_DIMM_DQ17
DDR2_DIMM_DQ18
DDR2_DIMM_DQ24DDR2_DIMM_DQ25
DDR2_DIMM_DQ26DDR2_DIMM_DQ27
DDR2_DIMM_DM3
DDR2_DIMM_DM0
DDR2_DIMM_A15DDR2_DIMM_A14
DDR2_DIMM_BA1
DDR2_DIMM_CLK_P0DDR2_DIMM_CLK_N0
DDR2_DIMM_RASnDDR2_DIMM_CSn0
DDR2_DIMM_ODT0DDR2_DIMM_A13
DDR2_DIMM_DQ36
DDR2_DIMM_DQ38
DDR2_DIMM_DQ44
DDR2_DIMM_DM5
DDR2_DIMM_DQ52
DDR2_DIMM_CLK_P2DDR2_DIMM_CLK_N2
DDR2_DIMM_DQ54DDR2_DIMM_DQ55
DDR2_DIMM_DQ62
DDR2_DIMM_CLK_P1DDR2_DIMM_CLK_N1
DDR2_DIMM_CKE1
DDR2_DIMM_A6
DDR2_DIMM_DQ14
DDR2_DIMM_DQ7
DDR2_DIMM_DQ19
DDR2_DIMM_DQS_P0
DDR2_DIMM_DQ69
DDR2_DIMM_DQ70
DDR2_DIMM_DQ68
DDR2_DIMM_DQS_P2
DDR2_DIMM_DQ64
DDR2_DIMM_DQ71
DDR2_DIMM_DQS_P1
DDR2_DIMM_DQ65
DDR2_DIMM_DQS_P3
DDR2_DIMM_DQ67
DDR2_DIMM_DQS_P8
DDR2_DIMM_DQ66
DDR2_DIMM_RESETn
DDR2_DIMM_CKE0
DDR2_DIMM_SCLDDR2_DIMM_SDA
DDR2_DIMM_RESETn
DDR2_DIMM_A[15..0]
DDR2_DIMM_BA[2..0]
DDR2_DIMM_DQS_P[8..0]
DDR2_DIMM_DM[8..0]
DDR2_DIMM_RASnDDR2_DIMM_CASn
DDR2_DIMM_CSn0DDR2_DIMM_WEn
DDR2_DIMM_CSn1DDR2_DIMM_CKE0DDR2_DIMM_CKE1DDR2_DIMM_ODT0DDR2_DIMM_ODT1
DDR2_DIMM_SDADDR2_DIMM_SCL
DDR2_DIMM_WEn
DDR2_DIMM_DQ50
DDR2_DIMM_A4
DDR2_DIMM_DQ51
DDR2_DIMM_DQS_P5
DDR2_DIMM_DQ57
DDR2_DIMM_SCL
DDR2_DIMM_CASn
DDR2_DIMM_DQ48
DDR2_DIMM_DQS_P7
DDR2_DIMM_DQ59DDR2_DIMM_DQ58
DDR2_DIMM_DQ33
DDR2_DIMM_A10
DDR2_DIMM_DQS_P6
DDR2_DIMM_DQS_P4
DDR2_DIMM_BA0
DDR2_DIMM_DQ40
DDR2_DIMM_DQ35
DDR2_DIMM_ODT1
DDR2_DIMM_DQ41
DDR2_DIMM_DQ43
DDR2_DIMM_DQ49
DDR2_DIMM_DQ34
DDR2_DIMM_DQ56
DDR2_DIMM_CSn1
DDR2_DIMM_DQ32
DDR2_DIMM_A2
DDR2_DIMM_SDA
DDR2_DIMM_DQ42
DDR2_DIMM_DQS_N[8..0]
DDR2_DIMM_DQS_N0
DDR2_DIMM_DQS_N1
DDR2_DIMM_DQS_N2
DDR2_DIMM_DQS_N3
DDR2_DIMM_DQS_N4
DDR2_DIMM_DQS_N5
DDR2_DIMM_DQS_N6
DDR2_DIMM_DQS_N7
DDR2_DIMM_DQS_N8
DDR2_DIMM_DQ[71..0]
DDR2_DIMM_CLK_P[2..0]
DDR2_DIMM_CLK_N[2..0]
DDR2_DIMM_CLK_P0 DDR2_DIMM_CLK_N0
DDR2_DIMM_CLK_N1DDR2_DIMM_CLK_P1
DDR2_DIMM_CLK_N2DDR2_DIMM_CLK_P2
1.8V_DIMM
1.8V_DIMM1.8V_DIMM
1.8V_DIMM
1.8V_DIMM
VREF_DIMM
1.8V_DIMM
DDR2_DIMM_A[15..0] 8,12,20
DDR2_DIMM_BA[2..0] 8,12
DDR2_DIMM_RASn 8,12DDR2_DIMM_CASn 8,12DDR2_DIMM_WEn 8,12
DDR2_DIMM_CKE0 12,20DDR2_DIMM_CKE1 12,20
DDR2_DIMM_CSn0 12,20DDR2_DIMM_CSn1 12,20
DDR2_DIMM_ODT0 8,12DDR2_DIMM_ODT1 8,12
DDR2_DIMM_SDA 8DDR2_DIMM_SCL 8
DDR2_DIMM_DM[8..0] 20
DDR2_DIMM_DQS_P[8..0] 20
DDR2_DIMM_RESETn 8
DDR2_DIMM_DQS_N[8..0] 20
DDR2_DIMM_DQ[71..0] 20
DDR2_DIMM_CLK_P[2..0] 20
DDR2_DIMM_CLK_N[2..0] 20
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B10 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B10 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B10 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
DDR2 SDRAM DIMM
PLACE CAPS NEAR DDR2 DIMM
C384
0.1uF
C384
0.1uF
C379
4.7nF
C379
4.7nF
C393
0.1uF
C393
0.1uF
C376
0.1uF
C376
0.1uF
J19A
DDR2_DIMM
J19A
DDR2_DIMM
VREF1
VSS12
DQ03
DQ14
VSS25
DQS_N06
DQS_P07
VSS38
DQ29
DQ310
VSS411
DQ812
DQ913
VSS514
DQS_N115
DQS_P116
VSS617
RESETn18
NC119
VSS720
DQ1021
DQ1122
VSS823
DQ1624
DQ1725
VSS926
DQS_N227
DQS_P228
VSS1029
DQ1830
DQ1931
VSS1132
DQ2433
DQ2534
VSS1235
DQS_N336
DQS_P337
VSS1338
DQ2639
DQ2740
VSS1441
CB042
CB143
VSS1544
DQS_N845
DQS_P846
VSS1647
CB248
CB349
VSS1750
VDDQ151
CKE052
VDD153
BA2/A1654
RC055
VDDQ256
A1157
A758
VDD259
A560
VSS34 121
DQ4 122
DQ5 123
VSS35 124
DM0/DQS_P9 125
NC/DQS_N9 126
VSS36 127
DQ6 128
DQ7 129
VSS37 130
DQ12 131
DQ13 132
VSS38 133
DM1/DQS_P10 134
NC/DQS_N10 135
VSS39 136
CK_P1/RFU 137
CK_N1/RFU 138
VSS40 139
DQ14 140
DQ15 141
VSS41 142
DQ20 143
DQ21 144
VSS42 145
DM2/DQS_P11 146
NC/DQS_N11 147
VSS43 148
DQ22 149
DQ23 150
VSS44 151
DQ28 152
DQ29 153
VSS45 154
DM3/DQS_P12 155
NC/DQS_N12 156
VSS46 157
DQ30 158
DQ31 159
VSS47 160
CB4 161
CB5 162
VSS48 163
DM8/DQS_P17 164
NC/DQS_N17 165
VSS49 166
CB6 167
CB7 168
VSS50 169
VDDQ7 170
CKE1 171
VDD5 172
A15 173
A14 174
VDDQ8 175
A12 176
A9 177
VDD6 178
A8 179
A6 180
C389
4.7nF
C389
4.7nF
C380
0.01uF
C380
0.01uF
C387
0.1uF
C387
0.1uF
C377
0.1uF
C377
0.1uF
C391
0.01uF
C391
0.01uF
C374
0.01uF
C374
0.01uF
C386
0.01uF
C386
0.01uF
C370
0.1uF
C370
0.1uF
C89
7.0pF
C89
7.0pF
KEY
J19B
DDR2_DIMM
KEY
J19B
DDR2_DIMM
A461
VDDQ362
A263
VDD364
VSS1865
VSS1966
VDD467
NC268
VDD569
A10/AP70
BA071
VDDQ472
WEn73
CASn74
VDDQ575
Sn176
ODT177
VDDQ678
VSS2079
DQ3280
DQ3381
VSS2182
DQS_N483
DQS_P484
VSS2285
DQ3486
DQ3587
VSS2388
DQ4089
DQ4190
VSS2491
DQS_N592
DQS_P593
VSS2594
DQ4295
DQ4396
VSS2697
DQ4898
DQ4999
VSS27100
SA2101
NC/TEST102
VSS28103
DQS_N6104
DQS_P6105
VSS29106
DQ50107
DQ51108
VSS30109
DQ56110
DQ57111
VSS31112
DQS_N7113
DQS_P7114
VSS32115
DQ58116
DQ59117
VSS33118
SDA119
SCL120
VDDQ9 181
A3 182
A1 183
VDD7 184
CK_P0 185
CK_N0 186
VDD8 187
A0 188
VDD9 189
BA1 190
VDDQ10 191
RASn 192
Sn0 193
VDDQ11 194
ODT0 195
A13 196
VDD10 197
VSS51 198
DQ36 199
DQ37 200
VSS52 201
DM4/DQS_P13 202
NC/DQS_N13 203
VSS53 204
DQ38 205
DQ39 206
VSS54 207
DQ44 208
DQ45 209
VSS55 210
DM5/DQS_P14 211
NC/DQS_N14 212
VSS56 213
DQ46 214
DQ47 215
VSS57 216
DQ52 217
DQ53 218
VSS58 219
CK_P2/RFU 220
CK_N2/RFU 221
VSS59 222
DM6/DQS_P15 223
NC/DQS_N15 224
VSS60 225
DQ54 226
DQ55 227
VSS61 228
DQ60 229
DQ61 230
VSS62 231
DM7/DQS_P16 232
NC/DQS_N16 233
VSS63 234
DQ62 235
DQ63 236
VSS64 237
VDDSPD 238
SA0 239
SA1 240
C388
0.1uF
C388
0.1uF
C87
7.0pF
C87
7.0pF
C375
0.1uF
C375
0.1uF
C390
0.1uF
C390
0.1uF
C373
0.1uF
C373
0.1uF
C88
7.0pF
C88
7.0pF
C383
0.1uF
C383
0.1uF
R220 10.0KR220 10.0K
C385
0.1uF
C385
0.1uF
R219 10.0KR219 10.0K
C372
0.1uF
C372
0.1uF
C392
0.1uF
C392
0.1uF
C381
0.1uF
C381
0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
QDRII_ODT
QDRII_BWSn1
QDRII_A3
QDRII_D12
QDRII_D3
QDRII_K_NQDRII_QVLD
QDRII_D4
QDRII_Q16
QDRII_Q3
QDRII_D14
QDRII_D9
QDRII_ZQ
QDRII_RPSn
QDRII_A13
QDRII_D15
QDRII_D1
QDRII_Q9
QDRII_WPSn
QDRII_A10
QDRII_D0
QDRII_DOFF0
QDRII_A8
QDRII_A2
QDRII_D17
QDRII_D7
QDRII_A15
QDRII_A17
QDRII_A0
QDRII_Q14QDRII_Q15
QDRII_Q2
QDRII_Q6
QDRII_D13
QDRII_D8
QDRII_Q17
QDRII_A6QDRII_A5
QDRII_D5
QDRII_Q8
QDRII_TCK0
QDRII_CQ_P
QDRII_A1
QDRII_D16
QDRII_D11
QDRII_D2QDRII_Q1
QDRII_A11
QDRII_A14
QDRII_Q13QDRII_Q12
QDRII_Q5
QDRII_BWSn0
QDRII_A4
QDRII_K_P
QDRII_A9
QDRII_A12
QDRII_A16
QDRII_Q4
QDRII_Q7
QDRII_Q0
QDRII_ZQ
QDRII_A7
QDRII_D10
QDRII_D6
QDRII_Q11QDRII_Q10
QDRII_TMS0
QDRII_A18
QDRII_A19
QDRII_CQ_N
DDR2_DEVB_A2
DDR2_DEVB_A12DDR2_DEVB_A11
DDR2_DEVB_A6DDR2_DEVB_A5DDR2_DEVB_A4DDR2_DEVB_A3
DDR2_DEVB_A1
DDR2_DEVB_A10DDR2_DEVB_A9DDR2_DEVB_A8DDR2_DEVB_A7
DDR2_DEVA_RASnDDR2_DEVA_CASnDDR2_DEVA_WEnDDR2_DEVA_CSn
DDR2_DEVB_CASnDDR2_DEVB_RASn
DDR2_DEVB_CSn
DDR2_DEVB_DQS_P
DDR2_DEVB_BA1DDR2_DEVB_BA0
DDR2_DEVB_DQS_N
DDR2_DEVB_DM
DDR2_DEVB_A13
DDR2_DEVB_A14DDR2_DEVB_BA2
DDR2_DEVB_ODT
DDR2_DEVB_CKEDDR2_DEVB_CK_NDDR2_DEVB_CK_P
DDR2_DEVA_A10DDR2_DEVA_A11DDR2_DEVA_A12
DDR2_DEVA_A1DDR2_DEVA_A2DDR2_DEVA_A3DDR2_DEVA_A4DDR2_DEVA_A5DDR2_DEVA_A6DDR2_DEVA_A7DDR2_DEVA_A8DDR2_DEVA_A9
DDR2_DEVA_A0
DDR2_DEVA_DQS_P
DDR2_DEVB_DQ1
DDR2_DEVB_A0
DDR2_DEVA_BA0DDR2_DEVA_BA1
DDR2_DEVB_DQ0
DDR2_DEVB_DQ5DDR2_DEVB_DQ4DDR2_DEVB_DQ3DDR2_DEVB_DQ2
DDR2_DEVB_DQ7DDR2_DEVB_DQ6
DDR2_DEVA_DQ1DDR2_DEVA_DQ2DDR2_DEVA_DQ3DDR2_DEVA_DQ4DDR2_DEVA_DQ5DDR2_DEVA_DQ6DDR2_DEVA_DQ7
DDR2_DEVA_DQS_N
DDR2_DEVA_DM
DDR2_DEVA_A13
DDR2_DEVA_A14DDR2_DEVA_BA2
DDR2_DEVA_ODT
DDR2_DEVA_CK_PDDR2_DEVA_CK_NDDR2_DEVA_CKE
DDR2_DEVA_DQ0
DDR2_DEVB_CK_P
DDR2_DEVB_CK_N
DDR2_DEVA_CK_P
DDR2_DEVA_CK_N
DDR2_DEVA_A[14:0]
DDR2_DEVA_BA[2:0]
DDR2_DEVA_CKE
DDR2_DEVA_DM
DDR2_DEVA_DQS_P
DDR2_DEVA_CK_N
DDR2_DEVB_ODTDDR2_DEVB_CKE
DDR2_DEVA_DQS_N
DDR2_DEVB_DM
DDR2_DEVB_DQS_P
DDR2_DEVB_DQS_N
DDR2_DEVB_DQ[7:0]
DDR2_DEVA_WEnDDR2_DEVA_CASnDDR2_DEVA_RASn
DDR2_DEVA_CSnDDR2_DEVA_ODT
DDR2_DEVA_CK_P
DDR2_DEVB_CK_NDDR2_DEVB_CK_P
DDR2_DEVB_RASnDDR2_DEVB_CASnDDR2_DEVB_WEnDDR2_DEVB_CSn
DDR2_DEVA_DQ[7:0]
DDR2_DEVB_A[14:0]
DDR2_DEVB_BA[2:0]
QDRII_D[17..0]
QDRII_A[19..0]
QDRII_BWSn0
QDRII_QVLD
QDRII_BWSn1
QDRII_WPSn
QDRII_Q[17..0]
QDRII_RPSn
QDRII_K_PQDRII_K_N
QDRII_CQ_PQDRII_CQ_N
DDR2_DEVB_WEn
QDRII_ODT
1.8V_QDRII
1.8V_QDRII
1.8V_QDRII
VDDQ_QDRII
VDDQ_QDRII
VDDQ_QDRII
VREF_QDRII
1.8V_DEV VREF_DEV
VREF_DEV1.8V_DEV
VDDQ_QDRII
DDR2_DEVB_RASn 12,19
DDR2_DEVA_DQ[7:0] 19
DDR2_DEVB_ODT 12,19
DDR2_DEVA_CK_P 19
DDR2_DEVB_BA[2:0] 12,18,19
DDR2_DEVB_CSn 12,19
DDR2_DEVA_DQS_P 19
DDR2_DEVB_CKE 12,19
DDR2_DEVB_A[14:0] 8,12,18,19
DDR2_DEVB_WEn 12,18DDR2_DEVB_CASn 12,18
DDR2_DEVA_BA[2:0] 12,19
DDR2_DEVA_A[14:0] 12,19
DDR2_DEVA_DM 19
DDR2_DEVA_CK_N 19
DDR2_DEVA_RASn 12,19
DDR2_DEVA_ODT 12,19DDR2_DEVA_CSn 12,19DDR2_DEVA_WEn 12,19
DDR2_DEVA_CKE 12,19
DDR2_DEVA_CASn 12,19
DDR2_DEVA_DQS_N 19
DDR2_DEVB_DQ[7:0] 19
DDR2_DEVB_DQS_P 19
DDR2_DEVB_DM 19
DDR2_DEVB_DQS_N 19
DDR2_DEVB_CK_P 19DDR2_DEVB_CK_N 19
QDRII_Q[17..0] 22
QDRII_CQ_P 22QDRII_CQ_N 22
QDRII_D[17..0] 12,22
QDRII_A[19..0] 12,22
QDRII_BWSn0 12,22QDRII_BWSn1 12,22
QDRII_WPSn 8,12QDRII_RPSn 12,22
QDRII_K_P 12,22QDRII_K_N 12,22
QDRII_QVLD 22
QDRII_ODT 12,22
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B11 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B11 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B11 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
QDRII SRAM
QDRII SRAM & DDR2 SDRAM DEVICES
QDRII Output Impedance
Max Drive
PIN1-PIN2Setting
PIN3-PIN450 ohms
Shunt J47
PIN5-PIN660 ohms
CQ goes to Stratix III DLL
DDR2 SDRAM DEVICE A
DDR2 SDRAM DEVICE B
QDRII SRAM INTERFACE
DDR2 SDRAM DEVICE A INTERFACE
DDR2 SDRAM DEVICE B INTERFACE
R143 10.0KR143 10.0K
U20
MT47H32M8BP
U20
MT47H32M8BP
BA0G2
BA1G3
DQ0 C8
DQ1 C2
DQ2 D7
DQ3 D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQS_P B7
DQS_N A8
DM/RDQS_P B3
RDQS_N A2
VD
DA
1
VD
DE
9
VD
DH
9
VD
DL1
VD
DL
E1
VD
DQ
A9
VD
DQ
C1
VD
DQ
C3
VD
DQ
C7
VD
DQ
C9
VR
EF
E2
RFU4 L8RFU3 L7RFU2 L3RFU1 G1
VS
SA
3
VS
SE
3
VS
SJ1
VS
SK
9
VS
SD
LE
7
VS
SQ
A7
VS
SQ
B2
VS
SQ
B8
VS
SQ
D2
VS
SQ
D8
ODT F9
CK_PE8
CK_NF8
CKEF2
CS_NG8
RAS_NF7
CAS_NG7
WE_NF3
A0H8
A1H3
A2H7
A3J2
A4J8
A5J3
A6J7
A7K2
A8K8
A9K3
A10H2
A11K7
A12L2
R153
100, 1%
R153
100, 1%
R28 301R28 301
R141
100, 1%
R141
100, 1%
C2160.1uFC2160.1uF
C265
0.1uF
C265
0.1uF
C2140.1uFC2140.1uF
R10910.0KR10910.0K
U15
CY7C1263V18-375BZXC
U15
CY7C1263V18-375BZXC
D0P10
D1N11
D2M11
D3K10
D4J11
D5G11
D6E10
D7D11
D8C11
D9B3
D10C3
D11D2
D12F3
D13G2
D14J3
D15L3
D16M3
D17N2
Q0 P11
Q1 M10
Q2 L11
Q3 K11
Q4 J10
Q5 F11
Q6 E11
Q7 C10
Q8 B11
Q9 B2
Q10 D3
Q11 E3
Q12 F2
Q13 G3
Q14 K3
Q15 L2
Q16 N3
Q17 P3
A0A9
A1B4
A2B8
A3C5
A4C7
A5N5
A6N6
A7N7
A8P4
A9P5
A10P7
A11P8
A12R3
A13R4
A14R5
A15R7
A16R8
A17R9
BWSn0B7
BWSn1A5
WPSnA4
RPSnA8
K_PB6
K_NA6
C_P/QVLDP6
C_N/ODTR6
CQ_PA11
CQ_NA1
DOFFnH1
ZQH11
TMSR10
TDIR11
TDOR1
TCKR2
VD
D1
F5
VD
D2
F7
VD
D3
G5
VD
D4
G7
VD
D5
H5
VD
D6
H7
VD
D7
J5
VD
D8
J7
VD
D9
K5
VD
D10
K7
VD
DQ
1E
4
VD
DQ
2E
8
VD
DQ
3F4
VD
DQ
4F8
VD
DQ
5G
4
VD
DQ
6G
8
VD
DQ
7H
3
VD
DQ
8H
4
VD
DQ
9H
8
VD
DQ
10H
9
VD
DQ
11J4
VD
DQ
12J8
VD
DQ
13K
4
VD
DQ
14K
8
VD
DQ
15L4
VD
DQ
16L8
VR
EF1
H2
VR
EF2
H10
VS
S1
C4
VS
S2
C8
VS
S3
D4
VS
S4
D5
VS
S5
D6
VS
S6
D7
VS
S7
D8
VS
S8
E5
VS
S9
E6
VS
S10
E7
VS
S11
F6
VS
S12
G6
VS
S13
H6
VS
S14
J6
VS
S15
K6
VS
S16
L5
VS
S17
L6
VS
S18
L7
VS
S19
M4
VS
S20
M5
VS
S21
M6
VS
S22
M7
VS
S23
M8
VS
S24
N4
VS
S25
N8
VS
S/7
2MA
10
VS
S/1
44M
A2
NC/36MA3
NC1 A7
NC2 B1
NC3 B5
NC4 B9
NC5 B10
NC6 C1
NC7 C2
NC8 C6
NC9 C9
NC10 D1
NC11 D9
NC12 D10
NC13 E1
NC14 E2
NC15 E9
NC16 F1
NC17 F9
NC18 F10
NC19 G1
NC20 G9
NC21 G10
NC22 J1
NC23 J2
NC24 J9
NC25 K1
NC26 K2
NC27 K9
NC28 L1
NC29 L9
NC30 L10
NC31 M1
NC32 M2
NC33 M9
NC34 N1
NC35 N9
NC36 N10
NC37 P1
NC38 P2
NC39 P9
R14410.0KR14410.0K
U17
MT47H32M8BP
U17
MT47H32M8BP
BA0G2
BA1G3
DQ0 C8
DQ1 C2
DQ2 D7
DQ3 D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQS_P B7
DQS_N A8
DM/RDQS_P B3
RDQS_N A2
VD
DA
1
VD
DE
9
VD
DH
9
VD
DL1
VD
DL
E1
VD
DQ
A9
VD
DQ
C1
VD
DQ
C3
VD
DQ
C7
VD
DQ
C9
VR
EF
E2
RFU4 L8RFU3 L7RFU2 L3RFU1 G1
VS
SA
3
VS
SE
3
VS
SJ1
VS
SK
9
VS
SD
LE
7
VS
SQ
A7
VS
SQ
B2
VS
SQ
B8
VS
SQ
D2
VS
SQ
D8
ODT F9
CK_PE8
CK_NF8
CKEF2
CS_NG8
RAS_NF7
CAS_NG7
WE_NF3
A0H8
A1H3
A2H7
A3J2
A4J8
A5J3
A6J7
A7K2
A8K8
A9K3
A10H2
A11K7
A12L2
R10810.0KR10810.0K
R152 10.0KR152 10.0K
C226
0.1uF
C226
0.1uF
R27 249R27 249
R149 10.0KR149 10.0K
R1460
R1460
J9
TSW-103-07-L-D
J9
TSW-103-07-L-D
1 23 45 6
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
DDR2_DEVA_A0 DDR2_DEVB_A0DDR2_DEVA_A1 DDR2_DEVB_A1DDR2_DEVA_A2 DDR2_DEVB_A2DDR2_DEVA_A3 DDR2_DEVB_A3DDR2_DEVA_A4 DDR2_DEVB_A4DDR2_DEVA_A5 DDR2_DEVB_A5DDR2_DEVA_A6 DDR2_DEVB_A6DDR2_DEVA_A7 DDR2_DEVB_A7
DDR2_DEVA_A8 DDR2_DEVB_A8DDR2_DEVA_A9 DDR2_DEVB_A9DDR2_DEVA_A10 DDR2_DEVB_A10DDR2_DEVA_A11 DDR2_DEVB_A11DDR2_DEVA_A12 DDR2_DEVB_A12DDR2_DEVA_A13 DDR2_DEVB_A13DDR2_DEVA_A14 DDR2_DEVB_A14
DDR2_DEVA_CKE
DDR2_DEVA_BA0DDR2_DEVA_BA1
DDR2_DEVA_RASnDDR2_DEVA_CASnDDR2_DEVA_WEnDDR2_DEVA_CSnDDR2_DEVA_ODT
DDR2_DEVB_CKE
DDR2_DEVB_BA0DDR2_DEVB_BA1
DDR2_DEVB_RASnDDR2_DEVB_CASn
DDR2_DEVB_CSnDDR2_DEVB_ODT
DDR2_DIMM_A0
DDR2_DIMM_BA2
DDR2_DIMM_CKE0DDR2_DIMM_CKE1
DDR2_DIMM_CSn0
DDR2_DIMM_ODT0
DDR2_DIMM_CSn1
DDR2_DIMM_A12DDR2_DIMM_A11DDR2_DIMM_A10DDR2_DIMM_A9
DDR2_DIMM_A7DDR2_DIMM_A8
DDR2_DIMM_A6
DDR2_DIMM_BA0
DDR2_DIMM_A4
DDR2_DIMM_A2DDR2_DIMM_A3
DDR2_DIMM_A1
DDR2_DIMM_A15
DDR2_DIMM_A14DDR2_DIMM_A13
DDR2_DIMM_BA1
DDR2_DIMM_ODT1
DDR2_DIMM_A5
DDR2_DIMM_RASn
DDR2_DIMM_WEnDDR2_DIMM_CASn
QDRII_A0QDRII_A1
QDRII_A6QDRII_A5
QDRII_A3QDRII_A2
QDRII_A4
QDRII_A7
QDRII_A8QDRII_A9
QDRII_A12
QDRII_A14QDRII_A13
QDRII_A11
QDRII_A15
QDRII_A10
QDRII_A19QDRII_A18
QDRII_BWSn1QDRII_BWSn0
QDRII_WPSn
QDRII_RPSn
QDRII_D6
QDRII_D1QDRII_D2
QDRII_D0
QDRII_D7
QDRII_D4QDRII_D3
QDRII_D5
QDRII_D16
QDRII_D8
QDRII_D12
QDRII_D10QDRII_D9
QDRII_D14
QDRII_D11
QDRII_D15
QDRII_D13
QDRII_D17
QDRII_K_NQDRII_K_P
QDRII_A16QDRII_A17
QDRII_ODT
DDR2_DEVA_A[14:0]
DDR2_DEVA_BA[2:0]
DDR2_DEVA_CKE
DDR2_DEVB_ODTDDR2_DEVB_CKE
DDR2_DEVA_WEnDDR2_DEVA_CASnDDR2_DEVA_RASn
DDR2_DEVA_CSnDDR2_DEVA_ODT
DDR2_DEVB_RASnDDR2_DEVB_CASnDDR2_DEVB_WEnDDR2_DEVB_CSn
DDR2_DEVB_A[14:0]
DDR2_DEVB_BA[2:0]
QDRII_ODT
QDRII_BWSn0QDRII_BWSn1QDRII_WPSnQDRII_RPSn
QDRII_D[17..0]
QDRII_A[19..0]
QDRII_K_PQDRII_K_N
QDRII_CQ_PQDRII_CQ_N
DDR2_DIMM_RESETn
DDR2_DIMM_A[15..0]
DDR2_DIMM_BA[2..0]
DDR2_DIMM_RASnDDR2_DIMM_CASn
DDR2_DIMM_CSn0DDR2_DIMM_WEn
DDR2_DIMM_CSn1
DDR2_DIMM_CKE0DDR2_DIMM_CKE1
DDR2_DIMM_ODT0DDR2_DIMM_ODT1
DDR2_DIMM_SDA
DDR2_DIMM_SCL
DDR2_DEVB_WEn
DDR2_DIMM_A0
DDR2_DIMM_A1
DDR2_DIMM_A2
DDR2_DIMM_A3
DDR2_DIMM_A4
DDR2_DIMM_A5
DDR2_DIMM_A6
DDR2_DIMM_A7
DDR2_DIMM_A8
DDR2_DIMM_A9
DDR2_DIMM_A10
DDR2_DIMM_A11
DDR2_DIMM_A12
DDR2_DIMM_A13
DDR2_DIMM_CSn0
DDR2_DIMM_CSn1
DDR2_DIMM_CKE0
DDR2_DIMM_CKE1
DDR2_DIMM_BA2
DDR2_DIMM_RASn
DDR2_DIMM_ODT0
DDR2_DIMM_ODT1
DDR2_DIMM_BA0
DDR2_DIMM_BA1
DDR2_DIMM_CASn
DDR2_DIMM_WEn
DDR2_DIMM_A14
DDR2_DIMM_A15
DDR2_DEVA_BA2 DDR2_DEVB_BA2
VTT_DIMM
1.8V_DEV
1.8V_DEV
VTT_DIMMVTT_QDRII
VTT_QDRII VTT_QDRII
VTT_DEV
VTT_DEVVTT_DEV
VTT_DEV
VDDQ_QDRII
1.8V_QDRII
VDDQ_QDRII
QDRII_A[19..0] 11,22
DDR2_DEVB_RASn 11,19
DDR2_DEVB_ODT 11,19
DDR2_DEVB_BA[2:0] 11,18,19
DDR2_DEVB_CSn 11,19
DDR2_DEVB_CKE 11,19
DDR2_DEVB_A[14:0] 8,11,18,19
DDR2_DEVB_WEn 11,18DDR2_DEVB_CASn 11,18
DDR2_DEVA_BA[2:0] 11,19
DDR2_DEVA_A[14:0] 11,19
DDR2_DEVA_RASn 11,19
DDR2_DEVA_ODT 11,19DDR2_DEVA_CSn 11,19DDR2_DEVA_WEn 11,19
DDR2_DEVA_CKE 11,19
DDR2_DEVA_CASn 11,19
QDRII_BWSn0 11,22QDRII_BWSn1 11,22QDRII_WPSn 8,11QDRII_RPSn 11,22
QDRII_K_P 11,22QDRII_K_N 11,22
QDRII_CQ_P 11,22QDRII_CQ_N 11,22
DDR2_DIMM_A[15..0] 8,10,20
DDR2_DIMM_BA[2..0] 8,10
DDR2_DIMM_RASn 8,10DDR2_DIMM_CASn 8,10DDR2_DIMM_WEn 8,10
DDR2_DIMM_CKE0 10,20DDR2_DIMM_CKE1 10,20
DDR2_DIMM_CSn0 10,20DDR2_DIMM_CSn1 10,20
DDR2_DIMM_ODT0 8,10DDR2_DIMM_ODT1 8,10
DDR2_DIMM_SDA 8,10
DDR2_DIMM_SCL 8,10DDR2_DIMM_RESETn 8,10
QDRII_D[17..0] 11,22
QDRII_ODT 11,22
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B12 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B12 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B12 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
DDR2 & QDRII TERMINATIONS
PLACE CAPS NEAR DDR2 DEVICE A
PLACE CAPS NEAR DDR2 DEVICE B
56 OHM
56 OHM
56 OHM
56 OHM
Near QDRII
Near QDRIINear QDRII
Near DIMM
Near DEV A Near DEV B
Near DEV A Near DEV B
Near DIMM
DDR2 SDRAM DEVICES INTERFACE
QDRII SRAM INTERFACE
DDR2 SDRAM DIMM INTERFACE
QDRII
DEVICESDDR2
DDR2 DIMM
RN12A 56RN12A 561 16
CN6 0.1uf x 4CN6 0.1uf x 41735 4
628
RN16FRN16F611
C357 33pFC357 33pF
RN6B 56RN6B 562 15
C346 33pFC346 33pF
RN3G 56RN3G 567 10
RN16DRN16D413
RN15ERN15E512
RN5H 56RN5H 568 9
C255
0.1uF
C255
0.1uF
RN12F 56RN12F 566 11
RN8B 56RN8B 562 15
C231
0.1uF
C231
0.1uF
CN2 0.1uf x 4CN2 0.1uf x 41735 4
628
C347 33pFC347 33pF
R145 56.2R145 56.2
C264
0.01uF
C264
0.01uFRN10H 56RN10H 568 9
CN13 0.1uf x 4CN13 0.1uf x 41735 4
628
RN9C 56RN9C 563 14
C186
0.1uF
C186
0.1uF
RN14DRN14D413
RN14BRN14B215
RN3F 56RN3F 566 11
CN14 0.1uf x 4CN14 0.1uf x 41735 4
628
CN3 0.1uf x 4CN3 0.1uf x 41735 4
628
C345 33pFC345 33pF
RN5G 56RN5G 567 10
RN12B 56RN12B 562 15
RN11G 56RN11G 567 10
CN10 0.1uf x 4CN10 0.1uf x 41735 4
628
C235
0.1uF
C235
0.1uF
RN6F 56RN6F 566 11
C237
0.01uF
C237
0.01uF
RN6A 56RN6A 561 16
C223
0.1uF
C223
0.1uF
C215
4.7nF
C215
4.7nF
RN3H 56RN3H 568 9
CN8 0.1uf x 4CN8 0.1uf x 41735 4
628
RN7F 56RN7F 566 11
RN4E 56RN4E 565 12
C364 33pFC364 33pF
C353 33pFC353 33pF
RN13A 56RN13A 561 16
RN11A 56RN11A 561 16
C196
0.1uF
C196
0.1uF
C179
0.1uF
C179
0.1uF
RN9D 56RN9D 564 13
RN7D 56RN7D 564 13
RN12C 56RN12C 563 14CN7 0.1uf x 4CN7 0.1uf x 41735 4
628
C354 33pFC354 33pF
RN13F 56RN13F 566 11
C219
0.1uF
C219
0.1uF
RN3D 56RN3D 564 13
C363 33pFC363 33pF C369 33pFC369 33pF
RN15GRN15G710
C362 33pFC362 33pFRN4F 56RN4F 566 11
RN7G 56RN7G 567 10
RN11D 56RN11D 564 13C352 33pFC352 33pF
C176
0.1uF
C176
0.1uF
RN7A 56RN7A 561 16
RN15BRN15B215
RN17GRN17G710
C185
0.01uF
C185
0.01uF
C361 33pFC361 33pF
CN15 0.1uf x 4CN15 0.1uf x 41735 4
628 RN7H 56RN7H 568 9
C350 33pFC350 33pF C368 33pFC368 33pF
C188
0.1uF
C188
0.1uF
RN17DRN17D413
RN4B 56RN4B 562 15
C360 33pFC360 33pF
RN5F 56RN5F 566 11
C195
0.1uF
C195
0.1uF
CN16 0.1uf x 4CN16 0.1uf x 41735 4
628
RN13E 56RN13E 565 12
RN11F 56RN11F 566 11
RN10F 56RN10F 566 11
C218
0.1uF
C218
0.1uF
RN4H 56RN4H 568 9
RN15DRN15D413
RN5C 56RN5C 563 14
C177
4.7nF
C177
4.7nF
C359 33pFC359 33pF
RN10B 56RN10B 562 15
C378 33pFC378 33pF
C187
0.1uF
C187
0.1uF
RN3E 56RN3E 565 12
C349 33pFC349 33pF
RN5E 56RN5E 565 12
RN15FRN15F611
RN16BRN16B215
RN11C 56RN11C 563 14
RN4D 56RN4D 564 13
RN13H 56RN13H 568 9
RN10G 56RN10G 567 10
C211
4.7nF
C211
4.7nF
RN7C 56RN7C 563 14
RN14ARN14A116
R150 56.2R150 56.2
C240
0.1uF
C240
0.1uF
RN13C 56RN13C 563 14
RN15ARN15A116
C356 33pFC356 33pF
C238
0.1uF
C238
0.1uF
RN8H 56RN8H 568 9
C222
4.7nF
C222
4.7nF
RN9G 56RN9G 567 10
C266
4.7nF
C266
4.7nF
RN16HRN16H89
RN5A 56RN5A 561 16
C217
0.1uF
C217
0.1uF RN13D 56RN13D 564 13
C181
0.01uF
C181
0.01uFRN11B 56RN11B 562 15
RN13G 56RN13G 567 10
C210
0.1uF
C210
0.1uF
RN17FRN17F611RN15CRN15C314
RN7B 56RN7B 562 15
RN4G 56RN4G 567 10
R151 56.2R151 56.2
C267
0.1uF
C267
0.1uF
C348 33pFC348 33pF
C232
0.1uF
C232
0.1uF
RN6H 56RN6H 568 9
RN8C 56RN8C 563 14
RN10C 56RN10C 563 14
RN11E 56RN11E 565 12
RN4A 56RN4A 561 16
RN12H 56RN12H 568 9
C233
0.1uF
C233
0.1uF
RN16CRN16C314
C178
4.7nF
C178
4.7nF
C351 33pFC351 33pF
RN3A 56RN3A 561 16
RN8E 56RN8E 565 12
RN17HRN17H89
C182
0.1uF
C182
0.1uF
RN6C 56RN6C 563 14
C228
0.01uF
C228
0.01uF
RN6D 56RN6D 564 13
RN11H 56RN11H 568 9
C194
0.1uF
C194
0.1uF
RN16GRN16G710
RN17BRN17B215
CN5 0.1uf x 4CN5 0.1uf x 41735 4
628
C268
0.1uF
C268
0.1uF
RN5D 56RN5D 564 13
R130 56.2R130 56.2RN16ERN16E512
C365 33pFC365 33pF
RN9B 56RN9B 562 15
RN4C 56RN4C 563 14
RN8F 56RN8F 566 11
C227
4.7nF
C227
4.7nF
C201
0.01uF
C201
0.01uF
RN10A 56RN10A 561 16
RN14FRN14F611
C366 33pFC366 33pF
C247
0.1uF
C247
0.1uF
RN15HRN15H89
CN12 0.1uf x 4CN12 0.1uf x 41735 4
628
RN9A 56RN9A 561 16
RN5B 56RN5B 562 15
RN14GRN14G710
RN17ARN17A116
C207
0.1uF
C207
0.1uF
RN8G 56RN8G 567 10
C209
0.1uF
C209
0.1uF
RN10E 56RN10E 565 12
RN9E 56RN9E 565 12
RN14ERN14E512
RN10D 56RN10D 564 13
CN9 0.1uf x 4CN9 0.1uf x 41735 4
628
C180
4.7nF
C180
4.7nFC367 33pFC367 33pF
RN6G 56RN6G 567 10
C355 33pFC355 33pF
RN9H 56RN9H 568 9
RN3C 56RN3C 563 14
RN14HRN14H89
C344 33pFC344 33pF
R129 56.2R129 56.2
RN12G 56RN12G 567 10
C225
0.01uF
C225
0.01uF
RN17ERN17E512
RN8D 56RN8D 564 13
RN13B 56RN13B 562 15
C202
0.1uF
C202
0.1uF
RN12E 56RN12E 565 12
RN14CRN14C314
CN4 0.1uf x 4CN4 0.1uf x 41735 4
628
C371 33pFC371 33pF
C229
0.1uF
C229
0.1uF
C197
0.1uF
C197
0.1uF
RN16ARN16A116
RN17CRN17C314
C358 33pFC358 33pF
CN11 0.1uf x 4CN11 0.1uf x 41735 4
628
RN3B 56RN3B 562 15
RN9F 56RN9F 566 11
RN6E 56RN6E 565 12
C239
0.1uF
C239
0.1uF
R147 56.2R147 56.2
C234
0.01uF
C234
0.01uF
RN7E 56RN7E 565 12
RN8A 56RN8A 561 16
RN12D 56RN12D 564 13
CN1 0.1uf x 4CN1 0.1uf x 41735 4
628
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
FSM_D[31:0]
FLASH_WEnFLASH_OEnFLASH_CEn
FLASH_RDYBSYn
FLASH_WPn
FLASH_RDYBSYn
FLASH_RESETnFLASH_WEnFLASH_OEn
FSM_A[24:0]
FLASH_CEn
FSM_D0FSM_D1FSM_D2FSM_D3FSM_D4FSM_D5FSM_D6FSM_D7
SRAM_CSn
SRAM_CLK
FSM_D29FSM_D30FSM_D31
FSM_D16FSM_D17FSM_D18FSM_D19FSM_D20FSM_D21FSM_D22FSM_D23FSM_D24FSM_D25FSM_D26FSM_D27FSM_D28
FSM_D11FSM_D12FSM_D13FSM_D14FSM_D15
FSM_D8FSM_D9FSM_D10
SRAM_ADVnSRAM_OEnSRAM_WEnSRAM_BEn1SRAM_BEn0SRAM_PSn
SRAM_WAIT0
SRAM_ADVnSRAM_CSn
SRAM_CLK
SRAM_OEnSRAM_WEnSRAM_BEn3SRAM_BEn2SRAM_PSn
SRAM_ADVn
SRAM_CLK
SRAM_OEnSRAM_WEnSRAM_PSn
SRAM_CSn
SRAM_WAIT0
FLASH_RESETn
FLASH_CLK
SRAM_CSnSRAM_ADVnSRAM_OEnSRAM_WEn
SRAM_BEn1SRAM_BEn0SRAM_PSn
SRAM_WAIT1
SRAM_WAIT1
SRAM_BEn[3:0]
SRAM_BEn2SRAM_BEn3
FSM_A9FSM_A10FSM_A11FSM_A12FSM_A13FSM_A14
FSM_A0
FSM_A15FSM_A16FSM_A17FSM_A18FSM_A19FSM_A20
FSM_A1FSM_A2FSM_A3FSM_A4
FSM_A21
FSM_A5
FSM_A22
FSM_A6
FSM_A23
FSM_A7
FSM_A24
FSM_A8
FLASH_RDYBSYn
FLASH_RESETnFLASH_CEnFLASH_OEnFLASH_WEn
FLASH_WPn
FLASH_CLK
FLASH_ADVn
FLASH_ADVn
FSM_A9FSM_A10FSM_A11FSM_A12FSM_A13FSM_A14FSM_A15FSM_A16FSM_A17FSM_A18FSM_A19FSM_A20
FSM_A1FSM_A2FSM_A3FSM_A4FSM_A5
FSM_A21
FSM_A6FSM_A7FSM_A8
FSM_A9FSM_A10FSM_A11FSM_A12FSM_A13FSM_A14FSM_A15FSM_A16FSM_A17FSM_A18FSM_A19FSM_A20
FSM_A1FSM_A2FSM_A3FSM_A4FSM_A5
FSM_A21
FSM_A6FSM_A7FSM_A8
FSM_D11FSM_D12FSM_D13FSM_D14FSM_D15
FSM_D9FSM_D10
FSM_D8
FSM_D0FSM_D1FSM_D2FSM_D3FSM_D4FSM_D5FSM_D6FSM_D7
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
FSM_D[31:0] 9,22
SRAM_CLK 22
SRAM_PSn 20
SRAM_CSn 22
SRAM_WEn 22
SRAM_ADVn 22SRAM_OEn 22
SRAM_WAIT0 22
FLASH_RDYBSYn 8,9
FLASH_RESETn 9,22FLASH_WEn 9,22
FSM_A[24:0] 9,22
FLASH_OEn 9,22
FLASH_CEn 9,22FLASH_CLK 9,22
SRAM_WAIT1 22
SRAM_BEn[3:0] 22
FLASH_ADVn 9,22
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B13 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B13 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B13 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
PSRAM & Flash
PSRAM INTERFACE
FLASH INTERFACE
SHARED BUS
PSRAM 32Mb (2M X 16) PSRAM 32Mb (2M X 16)FLASH 512Mb (32M X 16)
R97 10KR97 10K
R102 10KR102 10KR101 10KR101 10K
C160
0.1uF
C160
0.1uF
K1B3216B2EU10
K1B3216B2E
K1B3216B2EU10
K1B3216B2E
A1A4A0A3
PSA6
A2A5
LBA1
OEA2
DQ8 B1
UBB2
A3B3
A4B4
CSB5
DQ0 B6
DQ9 C1
DQ10 C2
A5C3
A6C4
DQ1 C5
DQ2 C6
VSSQ D1
DQ11 D2
A17D3
DQ14 F1DQ13 F2
VSSQ E6
DQ6 F6
DQ4 E5
VCCQE1
A16E4A15F4A14F3
DQ15 G1
DQ5 F5
A7D4
DQ12 E2
RFU1 E3
DQ3 D5
VCCD6
A9H3
A18H1
A8H2
A20H6
A10H4
A11H5
A19G2
A12G3
A13G4
WEG5
DQ7 G6
WAIT J1CLKJ2
ADVJ3
RFU2 J4
RFU3 J5
RFU4 J6
R116 10KR116 10K
C174
0.1uF
C174
0.1uF
K1B3216B2EU4
K1B3216B2E
K1B3216B2EU4
K1B3216B2E
A1A4A0A3
PSA6
A2A5
LBA1
OEA2
DQ8 B1
UBB2
A3B3
A4B4
CSB5
DQ0 B6
DQ9 C1
DQ10 C2
A5C3
A6C4
DQ1 C5
DQ2 C6
VSSQ D1
DQ11 D2
A17D3
DQ14 F1DQ13 F2
VSSQ E6
DQ6 F6
DQ4 E5
VCCQE1
A16E4A15F4A14F3
DQ15 G1
DQ5 F5
A7D4
DQ12 E2
RFU1 E3
DQ3 D5
VCCD6
A9H3
A18H1
A8H2
A20H6
A10H4
A11H5
A19G2
A12G3
A13G4
WEG5
DQ7 G6
WAIT J1CLKJ2
ADVJ3
RFU2 J4
RFU3 J5
RFU4 J6
C153
0.1uF
C153
0.1uF
C166
0.1uF
C166
0.1uF
PC28FxxxP30B85FLASH
U9
PC48F4400P0VB00
PC28FxxxP30B85FLASH
U9
PC48F4400P0VB00
A1A1
A2B1
A3C1
A4D1
A5D2
A6A2
A7C2
A8A3
A9B3
A10C3
A11D3
A12C4
A13A5
A14B5
A15C5
A16D7
A17D8
A18A7
A19B7
A20C7
A21C8
A22A8
NC(64M)/A23G1
CE#B4
OE#F8
WE#G8
WP#C6
VCC A6
RESET#D4
VCC H3
D0 F2
D1 E2
D2 G3
D3 E4
D4 E5
D5 G5
D6 G6
D7 H7
D8 E1
D9 E3
D10 F3
D11 F4
D12 F5
D13 H5
D14 G7
D15 E7
WAIT F7
GND B2
GND H4GND H2
CLKE6
ADV#F6
RFU4 B8RFU3 E8RFU2 F1RFU1 G2RFU0 H1
NC(64M,128M)/A24H8
NC/A25(512M)B6
VPP A4
VCCQ D6VCCQ D5
VCCQ G4
GND H6
C157
0.1uF
C157
0.1uF
R128 10KR128 10K
C140
0.1uF
C140
0.1uF
R106 10KR106 10K
R123 10KR123 10K
C152
0.1uF
C152
0.1uF
C148
0.1uF
C148
0.1uF
R124 10KR124 10K
C167
0.1uF
C167
0.1uF
R119 10KR119 10KR117 10KR117 10K
R105 10KR105 10KR103 10KR103 10K
R125 10KR125 10K
R107 10KR107 10K
R118 10KR118 10K
C156
0.1uF
C156
0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
USB_RSTn
XTOUTXTIN
USB_PHY_FD0
XTIN
XTOUT
USB_PWR_ENn
USB_EEDATA
USB_DMUSB_DP
USB_FTDI_DM
USB_RSTOUTn
USB_FTDI_DP
USB_RDnUSB_WR
USB_EECSUSB_EESKEEDATA
USB_PHY_FD[15..0]
USB_PWR_ENn
USB_RDnUSB_WR
USB_RSTnUSB_RSTOUTn
USB_DPUSB_DM
USB_RESETn
XTALINXTALOUT
USB_SDAUSB_SCL USB_PHY_FD0
USB_PHY_FD8XTALIN
XTALOUT
USB_PHY_IFCLK
USB_PHY_WEN
USB_PHY_CMD_DATA
USB_PHY_REN
USB_PHY_REN
USB_PHY_CMD_DATA
USB_PHY_WEN
USB_PHY_EMPTYUSB_PHY_FULL
USB_PHY_FULLUSB_PHY_EMPTY
USB_RESETn
USB_WAKEUP
USB_CLKOUT
USB_WAKEUPUSB_CLKOUT
USB_PA7_SLCSn
USB_PA0_INT0nUSB_PA1_INT1nUSB_PA2_SLOEUSB_PA3_WU2
USB_PA0_INT0nUSB_PA1_INT1nUSB_PA2_SLOEUSB_PA3_WU2
USB_PHY_FD1
USB_PHY_FD9
USB_PHY_FD1
USB_PHY_FD2
USB_PHY_FD10
USB_PHY_FD2
USB_PHY_FD3
USB_PHY_FD11
USB_PHY_FD3
USB_PHY_FD4
USB_PHY_FD12
USB_PHY_FD4
USB_PHY_FD5
USB_PHY_FD13
USB_PHY_FD5
USB_PHY_FD6
USB_PHY_FD14
USB_PHY_FD6
USB_PHY_FD7
USB_PHY_FD15
USB_PHY_FD7
USB_PHY_IFCLK IFCLK
USB_PA4_IF0ADR0USB_PA5_IF0ADR1USB_PA6_PKTEND
USB_PA4_IF0ADR0USB_PA5_IF0ADR1USB_PA6_PKTENDUSB_PA7_SLCSn
USB_SCLUSB_SDA
USB_PA0_INT0nUSB_PA1_INT1n
USB_PA3_WU2
3.3V
5V_USB
5V_USB
5V_USB
5V_USB
5V_USB
5V_USB
3.3V
3.3V
3.3V
3.3V3.3V
USB_PHY_FD[15..0] 9
USB_PHY_IFCLK 9
USB_PWR_ENn 9
USB_RSTOUTn 9
USB_RDn 9USB_WR 9
USB_RSTn 9
USB_PHY_CMD_DATA 9USB_PHY_REN 9USB_PHY_WEN 9USB_PHY_EMPTY 9USB_PHY_FULL 9USB_RESETn 9
USB_CLKOUT 9USB_WAKEUP 9
USB_PA0_INT0n 9USB_PA1_INT1n 9USB_PA2_SLOE 9USB_PA3_WU2 9
USB_PA6_PKTEND 9
USB_PA4_IF0ADR0 9USB_PA5_IF0ADR1 9
USB_PA7_SLCSn 9
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B14 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B14 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B14 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
USB 2.0
DECOUPLING CAPS
USB
( Optional )
USB 2.0 INTERFACE
U8
SN65220DBV
U8
SN65220DBV
NC11
NC23
GND2B 4A 6
GND 5R121470R121470
C169 36pFC169 36pF
R17 27R17 27
R127 1.5KR127 1.5K
R89 27R89 27
C1210uFC1210uF
C141 36pFC141 36pF
C1430.1uFC1430.1uF
U6
AT93C46DN-SH-B
U6
AT93C46DN-SH-B
CS1
SK2
DIN3
DOUT4
VCC 8
NC1 7
NC2 6
GND 5
Y224.000 MHZY224.000 MHZ
12
R16 27R16 27
R99 10.0KR99 10.0K
U12
CY7C68013A-56LFXC
U12
CY7C68013A-56LFXC
GN
D28
CTL0/FLAGA 29
CTL1/FLAGB 30
CTL2/FLAGC 31
VC
C32
PA0/INT0n 33
PA1/INT1n 34
AV
CC
7
DMINUS9
AG
ND
10
VC
C11
GN
D12
IFCLK(13A)/PE0(15A)/T0OUT(15A)13
AV
CC
3
RDY0/SLRD1
PA2/SLOE 35RDY1/SLWR2
RESERVED14
PA5/FIFOADR1 38PA4/FIFOADR0 37
PA3/WU2 36
PA6/PKTEND 39
GN
D41
GN
D56
XTALOUT4
CLKOUT(13A)/PE1(15A)/T1OUT(15A)54
VC
C55
GN
D53
XTALIN5
AG
ND
6
DPLUS8
PA7/FLAGD/SLCSn 40
SCL15
SDA16
VC
C17
PB0/FD0 18
PB1/FD1 19
PB2/FD2 20
PB3/FD3 21
PB4/FD4 22
GN
D26
PB5/FD5 23
VC
C27
PB6/FD6 24
PB7/FD7 25
PD0/FD8 45
PD1/FD9 46
WAKEUP44
VC
C43
RESETn42
PD6/FD14 51
PD3/FD11 48PD2/FD10 47
PD4/FD12 49
PD5/FD13 50
PD7/FD15 52
GN
D57
C17233nFC17233nF
C170 12pFC170 12pF
C142 12pFC142 12pF
R111 2.2KR111 2.2K
C1580.1uFC1580.1uF
L1
BLM21PG331SN1
L1
BLM21PG331SN1
R1261.00kR1261.00k
R120 2.2KR120 2.2K
J5USB CONJ5USB CON
1234
5
6
R133 2.2KR133 2.2KR134 10.0KR134 10.0K
R1002.2KR1002.2K
+ C1310uF
10VTantalum
+ C1310uF
10VTantalum
12
C1610.1uFC1610.1uF
U11
FT245BL
U11
FT245BL
D0 25
D1 24
D2 23
D3 22
D4 21
D5 20
D6 19RSTOUT#5
XTOUT28
RESET#4
EECS32
EESK1
EEDATA2
AG
ND
29
GN
D1
9
D7 18
GN
D2
17
TEST31
TXE# 14
WR 15RD# 16
RXF# 12
PWREN# 10
VC
C-IO
13
3V3OUT6
AV
CC
30
VC
C2
26V
CC
13
USBDM8
USBDP7
XTIN27
SI/WU 11
U7
QUSB2CP1
U7
QUSB2CP1
A01
A12
A23
GND4
VCC 8
WP 7
SCL 6
SDA 5
Y36.000 MHZY36.000 MHZ
12
R122 10.0KR122 10.0K
C1710.1uFC1710.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
ENET_MDC
ENET_LED_TX
ENET_LED_LINK10
ENET_INTn
MDI_P1
ENET_MDCENET_INTn
ENET_MDIO
MDI_N1MDI_P2MDI_N2
ENET_GTX_CLKENET_RESETn
MDI_P3
ENET_LED_RX
ENET_LED_LINK1000ENET_LED_LINK100
ENET_LED_DUPLEX
ENET_LED_LINK10
ENET_LED_RX
MDI_N3 ENET_RX_D1
ENET_RX_D3
ENET_RX_D0
ENET_RX_D2
ENET_XTAL_25MHZ
ENET_LED_TX
MDI_N0
ENET_RSET
ENET_MDIO
MDI_P0
ENET_TX_D1
ENET_TX_D3
ENET_TX_D0
ENET_TX_D2
ENET_RX_DV
ENET_TX_EN
ENET_RX_CLK
MDI_P1MDI_N1MDI_P2MDI_N2MDI_P3MDI_N3
MDI_N0MDI_P0
ENET_LED_RX
ENET_LED_TX
ENET_LED_LINK10
ENET_LED_LINK100
ENET_LED_LINK1000
ENET_LED_DUPLEX
ENET_RESETn
ENET_TX_D4ENET_TX_D5ENET_TX_D6ENET_TX_D7
ENET_RX_D4ENET_RX_D5ENET_RX_D6ENET_RX_D7
ENET_TX_CLK
ENET_TX_ER
ENET_RX_ER
ENET_RX_CRSENET_RX_COL
ENET_S_CLKPENET_S_CLKN
ENET_TX_PENET_TX_N
ENET_TX_NENET_TX_P
ENET_RX_PENET_RX_N
ENET_RX_PENET_RX_N
ENET_TX_CLK
ENET_RX_ER
ENET_MDC
ENET_MDIO
ENET_GTX_CLK
ENET_TX_EN
ENET_RESETn
ENET_RX_D[7..0]
ENET_TX_D[7..0]
ENET_RX_DV
ENET_S_CLKP
ENET_TX_ER
ENET_RX_CRSENET_RX_COL
ENET_S_CLKN
ENET_INTn
ENET_RX_CLKENET_LED_LINK10
ENET_LED_LINK1000
1.1V2.5V
2.5V
2.5V
2.5V
1.1V
2.5V
2.5V
3.3V
3.3V
ENET_TX_P 8ENET_TX_N 8
ENET_RX_P 19ENET_RX_N 19
ENET_TX_CLK 19
ENET_RX_ER 20
ENET_MDC 21ENET_TX_EN 19
ENET_MDIO 19
ENET_GTX_CLK 19
ENET_RESETn 19
ENET_RX_DV 21
ENET_RX_D[7..0] 8,19
ENET_TX_D[7..0] 19
ENET_TX_ER 19
ENET_RX_CRS 21ENET_RX_COL 8
ENET_INTn 19
ENET_RX_CLK 20
ENET_S_CLKP 8ENET_S_CLKN 8
ENET_LED_LINK1000 22
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B15 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B15 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B15 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
10/100/1000 Ethernet
Place near 88E1111 PHY
SGMII Mode (default)
ETHERNET SGMII INTERFACE
ETHERNET INTERFACE
R208 49.9R208 49.9
D14Green_LEDD14Green_LED
C338 0.01uFC338 0.01uFR211 49.9R211 49.9
D9Green_LEDD9Green_LED
R180 49.9R180 49.9
D8Green_LEDD8Green_LED
X1
25MHz
X1
25MHz
EN1
NC12
GND3
OUT 4
NC2 5
VCC 6
R212 220R212 220
J14
HFJ11-1G02E
J14
HFJ11-1G02E
TD0_P 1
TD0_N 2
TD1_P 3
TD1_N 6
TD2_P 4
TD2_N 5
TD3_P 7
TD3_N 8
VCC 9
GND 10
GN
D_T
AB
11G
ND
_TA
B12
D7Green_LEDD7Green_LED
C294
0.1uF
C294
0.1uF
C278 0.01uFC278 0.01uF
C295
0.1uF
C295
0.1uF
C301
0.1uF
C301
0.1uF
U25B
88E1111
U25B
88E1111
NC113
VSS97
DVDD 1
DVDD 6
DVDD 10
DVDD 15
DVDD 57
DVDD 62
DVDD 67
DVDD 71
DVDD 85
AVDD32
AVDD36
AVDD35
AVDD40
AVDD45
AVDD78
VD
DO
X26
VD
DO
X48
VD
DO
5
VD
DO
21
VD
DO
88
VD
DO
96
VD
DO
H72
VD
DO
H66
VD
DO
H52
NC251
D6Green_LEDD6Green_LED
C296
0.1uF
C296
0.1uF
C316
0.1uF
C316
0.1uF
R183 49.9R183 49.9
R204 4.7KR204 4.7K
R210 49.9R210 49.9
R213 220R213 220
C314
0.1uF
C314
0.1uF
R39 4.7KR39 4.7K
R179 220R179 220
C317
0.1uF
C317
0.1uF
R2004.99KR2004.99K
R175 220R175 220
D15Green_LEDD15Green_LED
C310
0.1uF
C310
0.1uF
R182 49.9R182 49.9
C315
0.1uF
C315
0.1uF
R170 220R170 220
C303
0.1uF
C303
0.1uF
R209 49.9R209 49.9
R167 220R167 220
R201 4.7KR201 4.7K
C300
0.1uF
C300
0.1uF
GMII/MII/TBI INTERFACE
TEST
SGMII INTERFACE
JTAG
MDI INTERFACE
MGMT
U25A
88E1111
GMII/MII/TBI INTERFACE
TEST
SGMII INTERFACE
JTAG
MDI INTERFACE
MGMT
U25A
88E1111
COMA27
RESET_N28
CONFIG658CONFIG559CONFIG460CONFIG361CONFIG263CONFIG164CONFIG065
125CLK22
XTAL155
XTAL254
VSSC53
RSET30
SEL_FREQ56
MDI3_P42
MDI3_N43
MDI2_P39
MDI2_N41
MDI1_P33
MDI1_N34
MDI0_P29
MDI0_N31
MDIO24
MDC25
INT_N23
HSDAC_P37
HSDAC_N38
GTX_CLK 8
TX_CLK 4
TX_EN 9
RXCLK 2
RX_DV 94
CRS 84
COL 83
S_CLK_P 79
S_CLK_N 80
S_IN_P 82
S_IN_N 81
S_OUT_P 77
S_OUT_N 75
LED_TX 68
LED_RX 69
LED_DUPLEX 70
LED_LINK1000 73
LED_LINK100 74
LED_LINK10 76
RXD0 95
RXD1 92
RXD2 93
RXD3 91
RXD4 90
RXD5 89
RXD6 87
RXD7 86
RX_ER 3
TXD0 11
TXD1 12
TXD2 14
TXD3 16
TXD4 17
TXD5 18
TXD6 19
TXD7 20
TX_ER 7
TMS46TDO50TDI44TCK49TRST_N47
C337 0.01uFC337 0.01uF
R40 4.7KR40 4.7K
C293
0.1uF
C293
0.1uF
R181 49.9R181 49.9
R18410.0KR18410.0K
C292
0.1uF
C292
0.1uF
C279 0.01uFC279 0.01uF
R374.7KR374.7K
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
HSMA_CLK_OUT0
HSMA_SDA
HSMA_CLK_OUT_P1
HSMA_TX_P1
HSMA_CLK_OUT_N1
HSMA_TX_N1
HSMA_TX_P0
HSMA_TX_P2HSMA_TX_N2
HSMA_TX_P3HSMA_TX_N3
HSMA_TX_P4HSMA_TX_N4
HSMA_TX_P5HSMA_TX_N5
HSMA_TX_P6HSMA_TX_N6
HSMA_TX_P7HSMA_TX_N7
HSMA_TX_N0
HSMA_D0HSMA_D2
HSMA_D1
HSMA_CLK_IN_P1
HSMA_SCL
HSMA_D3
HSMA_CLK_IN_N1
HSMA_RX_P1HSMA_RX_N1
HSMA_RX_P2HSMA_RX_N2
HSMA_RX_P3HSMA_RX_N3
HSMA_RX_P0
HSMA_RX_P4HSMA_RX_N4
HSMA_RX_P5
HSMA_CLK_IN0
HSMA_RX_N5
HSMA_RX_P6HSMA_RX_N6
HSMA_RX_N0
HSMA_RX_P7HSMA_RX_N7
HSMA_TX_P10HSMA_TX_N10
HSMA_TX_P11HSMA_TX_N11
HSMA_TX_P12HSMA_TX_N12
HSMA_TX_P13HSMA_TX_N13
HSMA_TX_P14HSMA_TX_N14
HSMA_TX_P15HSMA_TX_N15
HSMA_TX_P16HSMA_TX_N16
HSMA_TX_P8HSMA_TX_N8
HSMA_TX_P9HSMA_TX_N9
HSMA_CLK_OUT_P2HSMA_CLK_OUT_N2
HSMA_RX_P10HSMA_RX_N10
HSMA_RX_P11HSMA_RX_N11
HSMA_RX_P12HSMA_RX_N12
HSMA_RX_P13HSMA_RX_N13
HSMA_RX_P14HSMA_RX_N14
HSMA_RX_P15HSMA_RX_N15
HSMA_RX_P16
HSMA_RX_P9HSMA_RX_N9
HSMA_RX_P8HSMA_RX_N8
HSMA_CLK_IN_P2HSMA_CLK_IN_N2
HSMA_PSNTn
HSMA_RX_N16
3.3V
3.3V
12V
12V
12V
3.3V
3.3V
3.3V
12V
12V
HSMA_JTAG_TDIFPGA_JTAG_TMS
HSMA_JTAG_TDOFPGA_JTAG_TCK
12V
3.3V
3.3V
12V
12V
12V
3.3V
3.3V
3.3V
12V
12V
3.3V
12V
12V
3.3V
3.3V
3.3V
3.3V
12V
12V
3.3V
3.3V
12V
12V
12V
3.3V
3.3V
12V
3.3V
3.3V
3.3V
12V
12V
12V
3.3V
3.3V
3.3V
12V
12V
HSMB_JTAG_TDIFPGA_JTAG_TMS
HSMB_JTAG_TDOFPGA_JTAG_TCK
12V
3.3V
3.3V
12V
12V
12V
3.3V
3.3V
3.3V
12V
12V
3.3V
12V
12V
3.3V
3.3V
3.3V
3.3V
12V
12V
3.3V
3.3V
12V
12V
12V
3.3V
3.3V
12V
3.3V
HSMB_SDA HSMB_SCL
HSMB_CLK_OUT0 HSMB_CLK_IN0
HSMB_CLK_OUT_P1HSMB_CLK_OUT_N1
HSMB_CLK_IN_P1HSMB_CLK_IN_N1
HSMB_CLK_IN_N2HSMB_CLK_IN_P2
HSMB_CLK_OUT_N2HSMB_CLK_OUT_P2
HSMB_D0 HSMB_D1HSMB_D2 HSMB_D3
HSMB_TX_P0HSMB_TX_N0
HSMB_RX_P0HSMB_RX_N0
HSMB_RX_P1HSMB_TX_N1HSMB_TX_P1
HSMB_RX_N1
HSMB_RX_P2HSMB_TX_N2HSMB_TX_P2
HSMB_RX_N2
HSMB_RX_P3HSMB_TX_N3HSMB_TX_P3
HSMB_RX_N3
HSMB_RX_P4HSMB_TX_N4HSMB_TX_P4
HSMB_RX_N4
HSMB_RX_P5HSMB_TX_N5HSMB_TX_P5
HSMB_RX_N5
HSMB_RX_P6HSMB_TX_N6HSMB_TX_P6
HSMB_RX_N6
HSMB_RX_P7HSMB_TX_N7HSMB_TX_P7
HSMB_RX_N7
HSMB_RX_P8HSMB_TX_N8HSMB_TX_P8
HSMB_RX_N8
HSMB_RX_P9HSMB_TX_N9HSMB_TX_P9
HSMB_RX_N9
HSMB_RX_P10HSMB_TX_N10HSMB_TX_P10
HSMB_RX_N10
HSMB_RX_P11HSMB_TX_N11HSMB_TX_P11
HSMB_RX_N11
HSMB_RX_P12HSMB_TX_N12HSMB_TX_P12
HSMB_RX_N12
HSMB_RX_P13HSMB_TX_N13HSMB_TX_P13
HSMB_RX_N13
HSMB_RX_P14HSMB_TX_N14HSMB_TX_P14
HSMB_RX_N14
HSMB_RX_P15HSMB_TX_N15HSMB_TX_P15
HSMB_RX_N15
HSMB_RX_P16HSMB_TX_N16HSMB_TX_P16
HSMB_RX_N16
HSMB_PSNTn
HSMA_PSNTn
HSMB_PSNTn
HSMA_CLK_IN0
HSMA_RX_P[16:0]
HSMA_TX_N[16:0]
HSMA_RX_N[16:0]
HSMA_TX_P[16:0]
HSMA_CLK_OUT0
HSMA_SCLHSMA_SDA
HSMA_JTAG_TDI
HSMA_D[3:0]
HSMB_RX_P[16:0]
HSMB_CLK_IN0HSMB_CLK_OUT0
HSMB_TX_P[16:0]
HSMB_TX_N[16:0]
HSMB_SDAHSMB_SCL
HSMB_JTAG_TDI
HSMB_D[3:0]
HSMB_RX_N[16:0]
HSMB_CLK_OUT_P[2:1]
HSMB_CLK_OUT_N[2:1]
HSMA_CLK_OUT_P[2:1]
HSMA_CLK_OUT_N[2:1]
HSMB_CLK_IN_N[2:1]
HSMB_CLK_IN_P[2:1]
HSMA_CLK_IN_N[2:1]
HSMA_CLK_IN_P[2:1]
HSMA_PSNTnHSMB_PSNTn
HSMB_JTAG_TDOHSMA_JTAG_TDO
FPGA_JTAG_TCKFPGA_JTAG_TMS
12V
3.3V
12V
3.3V
3.3V
3.3V
HSMA_SDA 21
HSMA_CLK_IN0 21HSMA_CLK_OUT0 19
HSMA_SCL 19
HSMA_D[3:0] 20
HSMA_TX_P[16:0] 21
HSMA_TX_N[16:0] 21
HSMA_RX_P[16:0] 21
HSMA_RX_N[16:0] 21
HSMB_SDA 8
HSMB_CLK_OUT0 19HSMB_CLK_IN0 21
HSMB_SCL 19
HSMB_D[3:0] 19
HSMB_TX_P[16:0] 21
HSMB_TX_N[16:0] 21
HSMB_RX_P[16:0] 21
HSMB_RX_N[16:0] 21
HSMB_CLK_OUT_P[2:1] 21
HSMB_CLK_OUT_N[2:1] 21
HSMA_CLK_OUT_P[2:1] 8,21
HSMA_CLK_OUT_N[2:1] 8,21
HSMB_CLK_IN_N[2:1] 8,21
HSMB_CLK_IN_P[2:1] 8,21
HSMA_CLK_IN_N[2:1] 8,21
HSMA_CLK_IN_P[2:1] 8,21
HSMA_PSNTn 9HSMB_PSNTn 9
FPGA_JTAG_TCK 9,18FPGA_JTAG_TMS 9,18
HSMA_JTAG_TDI 9HSMB_JTAG_TDI 9
HSMA_JTAG_TDO 9HSMB_JTAG_TDO 9
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B16 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B16 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B16 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
High Speed Mezzanine (HSM) Interface
HSMC PORT A
HSMC PORT B
JTAG INTERFACE
BANK 1
BANK 2
BANK 3
J18
ASP-122953-01
BANK 1
BANK 2
BANK 3
J18
ASP-122953-01
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
3.3V45
4747
4949
3.3V51
5353
5555
3.3V57
5959
6161
3.3V63
6565
6767
3.3V69
7171
7373
3.3V75
7777
7979
3.3V81
8383
8585
3.3V87
8989
9191
3.3V93
9595
9797
3.3V99
101101
103103
3.3V105
107107
109109
3.3V111
113113
115115
3.3V117
119119
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
12V 46
48 48
50 50
12V 52
54 54
56 56
12V 58
60 60
62 62
12V 64
66 66
68 68
12V 70
72 72
74 74
12V 76
78 78
80 80
12V 82
84 84
86 86
12V 88
90 90
92 92
12V 94
96 96
98 98
12V 100
102 102
104 104
12V 106
108 108
110 110
12V 112
114 114
116 116
12V 118
120 120
GN
D_1
_116
1
GN
D_1
_216
2
GN
D_1
_316
3
GN
D_1
_416
4
GN
D_2
_116
5
GN
D_2
_216
6
GN
D_2
_316
7
GN
D_3
_116
9G
ND
_2_4
168
GN
D_3
_217
0
GN
D_3
_317
1
GN
D_3
_417
2
121121
3.3V123
125125
127127
3.3V129
131131
133133
3.3V135
137137
139139
3.3V141
143143
145145
3.3V147
149149
151151
3.3V153
155155
157157
3.3V159
122 122
12V 124
126 126
128 128
12V 130
132 132
134 134
12V 136
138 138
140 140
12V 142
144 144
146 146
12V 148
150 150
152 152
12V 154
156 156
158 158
PSNTn 160
R187 56.2R187 56.2
D17Green_LEDD17Green_LED
R225 56.2R225 56.2
BANK 1
BANK 2
BANK 3
J8
ASP-122953-01
BANK 1
BANK 2
BANK 3
J8
ASP-122953-01
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
3.3V45
4747
4949
3.3V51
5353
5555
3.3V57
5959
6161
3.3V63
6565
6767
3.3V69
7171
7373
3.3V75
7777
7979
3.3V81
8383
8585
3.3V87
8989
9191
3.3V93
9595
9797
3.3V99
101101
103103
3.3V105
107107
109109
3.3V111
113113
115115
3.3V117
119119
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
12V 46
48 48
50 50
12V 52
54 54
56 56
12V 58
60 60
62 62
12V 64
66 66
68 68
12V 70
72 72
74 74
12V 76
78 78
80 80
12V 82
84 84
86 86
12V 88
90 90
92 92
12V 94
96 96
98 98
12V 100
102 102
104 104
12V 106
108 108
110 110
12V 112
114 114
116 116
12V 118
120 120
GN
D_1
_116
1
GN
D_1
_216
2
GN
D_1
_316
3
GN
D_1
_416
4
GN
D_2
_116
5
GN
D_2
_216
6
GN
D_2
_316
7
GN
D_3
_116
9G
ND
_2_4
168
GN
D_3
_217
0
GN
D_3
_317
1
GN
D_3
_417
2
121121
3.3V123
125125
127127
3.3V129
131131
133133
3.3V135
137137
139139
3.3V141
143143
145145
3.3V147
149149
151151
3.3V153
155155
157157
3.3V159
122 122
12V 124
126 126
128 128
12V 130
132 132
134 134
12V 136
138 138
140 140
12V 142
144 144
146 146
12V 148
150 150
152 152
12V 154
156 156
158 158
PSNTn 160
D10Green_LEDD10Green_LED
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
SEVEN_SEG_DP
SEVEN_SEG_A
SEVEN_SEG_SEL1
SEVEN_SEG_BSEVEN_SEG_CSEVEN_SEG_DSEVEN_SEG_ESEVEN_SEG_FSEVEN_SEG_G
LED_ALED_BLED_CLED_DLED_ELED_FLED_GLED_DP
FPGA_CONF_DONE
RESn_LED0USER_LED0
RESn_LED1
RESn_LED2
RESn_LED3
RESn_LED4
RESn_LED5
RESn_LED6
RESn_LED7
USER_DIPSW0
USER_PB0
USER_PB[3:0]
RESET_CONFIGnCPU_RESETn
USER_DIPSW[7:0]
FPGA_CONF_DONE
SEVEN_SEG_A
SEVEN_SEG_SEL[4:1]
SEVEN_SEG_BSEVEN_SEG_CSEVEN_SEG_DSEVEN_SEG_ESEVEN_SEG_FSEVEN_SEG_GSEVEN_SEG_DP
MWATTS_MAMPS
MAX_RESERVE1MAX_DIP0
VOLTS_WATTSMAX_RESERVE0
MAX_DIP[3:0]
PGM[3:0]
MAX_EN
RESET_CONFIGn
CPU_RESETn
MAX_DIP1MAX_DIP2MAX_DIP3
RESn_HSMA_RX_LEDHSMA_RX_LED
HSMA_TX_LED RESn_HSMA_TX_LED
HSMB_RX_LED RESn_HSMB_RX_LED
HSMB_TX_LED RESn_HSMB_TX_LED
HSMB_RX_LEDHSMB_TX_LED
HSMA_RX_LEDHSMA_TX_LED
SEVEN_SEG_MINUS LED_MINUS
SEVEN_SEG_MINUS
OLED_D_CnOLED_RSTnOLED_CSn
OLED_DATA[7:0]
OLED_WEnOLED_E_RDn
USER_DIPSW1USER_DIPSW2USER_DIPSW3USER_DIPSW4USER_DIPSW5USER_DIPSW6USER_DIPSW7
USER_LED1
USER_LED2
USER_LED3
USER_LED4
USER_LED5
USER_LED6
USER_LED7
USER_PB1
USER_PB2
USER_PB3
SEVEN_SEG_SEL2SEVEN_SEG_SEL3SEVEN_SEG_SEL4
LCD_DATA0 LCD_DATA1LCD_DATA2 LCD_DATA3LCD_DATA4 LCD_DATA5LCD_DATA6 LCD_DATA7
LCD_WEn LCD_CSnLCD_D_Cn
FACTORY_CONFIGnFACTORY_CONFIGn
OLED_BS1
SPEAKER_OUT
RES_MAX_ERRORMAX_ERROR
MAX_FACTORY
MAX_USER
MAX_LOAD RES_MAX_LOAD
RES_MAX_FACTORY
RES_MAX_USER
MAX_FACTORYMAX_USER
MAX_LOADMAX_ERROR
USER_LED[7:0]
LCD_WEnLCD_D_CnLCD_CSn
LCD_DATA[7:0]
OLED_DATA7
OLED_DATA3
OLED_D_CnOLED_BS1OLED_RSTnOLED_CSn
OLED_DATA2
OLED_DATA4
OLED_DATA1
OLED_DATA6
OLED_DATA0
OLED_DATA5
OLED_E_RDnOLED_WEn
SP_INnSP_INp
DESKEW_0_AE24DESKEW_1_AD22
DESKEW_0_AE24DESKEW_1_AD22
SPEAKER_OUT SPEAKER
PGM1 PGM2
PGM0
MAX_EMB RES_MAX_EMB
VOLTS_WATTSMWATTS_MAMPS
MAX_RESERVE[1:0]
PGM3
HSMB_BYPASSMAX_EN
FPGA_BYPASSHSMA_BYPASS
HSMB_BYPASS
FPGA_BYPASSHSMA_BYPASS
MAX_EMB
OLED_DATA0OLED_DATA1OLED_DATA2OLED_DATA3OLED_DATA4OLED_DATA5OLED_DATA6OLED_DATA7
OLED_CSnOLED_RSTn
OLED_WEnOLED_E_RDn
OLED_BS1
OLED_D_Cn
OLED_SERn
OLED_SERn
OLED_RSTn
3.3V
2.5V
2.5V 12V
3.3V
5.0V
3.3V
2.5V12V
2.5V
2.5V
2.5V 2.5V
2.5V
2.5V
2.5V2.5V
2.5V
2.5V
V1V2
V3V4
V5
2.5V
V5
USER_PB[3:0] 8
USER_DIPSW[7:0] 8
FPGA_CONF_DONE 9,18
SEVEN_SEG_A 20
SEVEN_SEG_SEL[4:1] 20
SEVEN_SEG_B 20SEVEN_SEG_C 20SEVEN_SEG_D 20SEVEN_SEG_E 20SEVEN_SEG_F 20SEVEN_SEG_G 20SEVEN_SEG_DP 20
MAX_DIP[3:0] 9
PGM[3:0] 9
MAX_EN 9
RESET_CONFIGn 9CPU_RESETn 9,20
HSMA_RX_LED 19
HSMB_RX_LED 20HSMA_TX_LED 19
HSMB_TX_LED 19
SEVEN_SEG_MINUS 20
OLED_CSn 19OLED_RSTn 20OLED_D_Cn 19
OLED_DATA[7:0] 19
OLED_WEn 19OLED_E_RDn 19
FACTORY_CONFIGn 9
OLED_BS1 19
SPEAKER_OUT 20
MAX_ERROR 9MAX_LOAD 9MAX_FACTORY 9MAX_USER 9
USER_LED[7:0] 22
LCD_WEn 20
LCD_CSn 20LCD_D_Cn 20
LCD_DATA[7:0] 20
DESKEW_0_AE24 20DESKEW_1_AD22 20
VOLTS_WATTS 9MWATTS_MAMPS 9
MAX_RESERVE[1:0] 9
FPGA_BYPASS 9HSMA_BYPASS 9HSMB_BYPASS 9
MAX_EMB 9
OLED_SERn 19
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B17 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B17 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B17 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
User IO & Connector
USER I/O's
SEVEN-SEG INTERFACE
MAX II CONTROL
PLACE NEAR FPC/FFC CONNECTOR
HSMC INTERFACE
OLED DISPLAY INTERFACE
2 x 16 Display Connector
2x16 LED DISPLAY INTERFACE
DESKEW
R238 56.2R238 56.2
R177 1.00kR177 1.00k
D20
Green_LED
D20
Green_LED
RN2H 10KRN2H 10K8 9
SW2
DIP_SW_8
SW2
DIP_SW_8
12345678
161514131211109
R8DNIR8DNI
R49 220R49 220
R110 56.2R110 56.2
RN2E 10KRN2E 10K5 12
RN1F 10KRN1F 10K6 11
SW3
94HCB16WT
SW3
94HCB16WT
P22
C2C2
P88C1 C1P4 4
P1 1
R115 10.0KR115 10.0K
D3
Green_LED
D3
Green_LED
R63 220R63 220
C4 1.0uFC4 1.0uF
S5PBSwitch
S5PBSwitch
1 2
R176 1.00kR176 1.00k
D27
Green_LED
D27
Green_LED
C136
0.01uF
C136
0.01uF
R1 0R1 0
R92 56.2R92 56.2
R88 10.0KR88 10.0K
C5 0.22uFC5 0.22uF
C3 1.0uFC3 1.0uF
RN1E 10KRN1E 10K5 12
R231 56.2R231 56.2
R52 220R52 220
R171 1.00kR171 1.00kRN1H 10KRN1H 10K8 9
C135
0.1uF
C135
0.1uF
R9 10.0KR9 10.0K
D32
Green_LED
D32
Green_LED
R114 10.0KR114 10.0K
D2
Green_LED
D2
Green_LED
D1
Green_LED
D1
Green_LED
RN2B 10KRN2B 10K2 15
R62 220R62 220
OPEN
SW1
TDA04H0SB1
OPEN
SW1
TDA04H0SB1
1234 5
678
S7S71 2
R203 56.2R203 56.2
+ C149
25VTantalum
10uF+ C149
25VTantalum
10uF
12
RN1D 10KRN1D 10K4 13
R104 56.2R104 56.2
R244 56.2R244 56.2
R172 1.00kR172 1.00k
C137
0.1uF
C137
0.1uF
RN2G 10KRN2G 10K7 10R15 100, 1%R15 100, 1%
R53 220R53 220
R243 100, 1%R243 100, 1%
D12
Green_LED
D12
Green_LED
R87 10.0KR87 10.0K
RN2D 10KRN2D 10K4 13
R45 10.0KR45 10.0K
R84 10.0KR84 10.0K
D33
Green_LED
D33
Green_LED
R113 10.0KR113 10.0K
J1
HDR4X1
J1
HDR4X1
11223344
R50 220R50 220
R235 56.2R235 56.2
S4S41 2
R234 56.2R234 56.2
C11
0.1uF
C11
0.1uF
RN1C 10KRN1C 10K3 14
R51 220R51 220
S6S61 2
R520.0KR520.0K
S3S31 2
S1S11 2
R236 56.2R236 56.2
R241 56.2R241 56.2
R85 10.0KR85 10.0K
R233 56.2R233 56.2
D23
Green_LED
D23
Green_LED
J24
DNI
J24
DNI
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
D11
Green_LED
D11
Green_LED
R64 220R64 220
D24
Green_LED
D24
Green_LED
RN1B 10KRN1B 10K2 15
R112 10.0KR112 10.0K
D36
Green_LED
D36
Green_LED
U1
LM4990
U1
LM4990
BYPASS2
IN+3
IN-4
SHUTDOWN1
VO2 8
GND 7
VDD 6
VO1 5
D22
Green_LED
D22
Green_LED
R7 0R7 0R6 20.0KR6 20.0K
R199 56.2R199 56.2
J11
DNI
J11
DNI
12
R237 56.2R237 56.2
R83 10.0KR83 10.0K
J22
HDR2X7
J22
HDR2X7
11
33
55
77
99
1111
1313
2 2
4 4
6 6
8 8
10 10
12 12
14 14D25
Green_LED
D25
Green_LED
U28 QUAD_7SEG_M2212RIU28 QUAD_7SEG_M2212RI
ca13
DIGIT11
D8
an14
E2
C3
F9
DIGIT34DIGIT210
G7
DIGIT46
B11
A12
DP
5
R2 DNIR2 DNI
RN2F 10KRN2F 10K6 11
TP5TP5
R242 56.2R242 56.2
R54 220R54 220
RN1A 10KRN1A 10K1 16
RN1G 10KRN1G 10K7 10
R96 1.00kR96 1.00k
SW5
DIP_SW_8
SW5
DIP_SW_8
12345678
161514131211109
D21
Green_LED
D21
Green_LED
S2S21 2
TP6TP6
J4
FPC_FFC_30PIN
J4
FPC_FFC_30PIN
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
R232 56.2R232 56.2
D34Red_LED
D34Red_LED
RN2A 10KRN2A 10K1 16
D35
Green_LED
D35
Green_LED
R86 10.0KR86 10.0K
RN2C 10KRN2C 10K3 14
D26
Green_LED
D26
Green_LED
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
JTAG_TDOJTAG_TMS
JTAG_TDI
JTAG_TCK
FPGA_JTAG_TCK
MAX_JTAG_TDI
FPGA_JTAG_TDI
FPGA_JTAG_TMS
FPGA_DCLKFPGA_CONF_DONEFPGA_nSTATUSFPGA_nCONFIG
FPGA_nCE
FPGA_nSTATUSFPGA_nCONFIG
FPGA_CONF_DONE
MAX_JTAG_TDO
FPGA_nSTATUSFPGA_nCONFIG
FPGA_nCE
FPGA_DATA0
FPGA_DCLK
FPGA_CONF_DONE
FPGA_DATA1FPGA_DATA2FPGA_DATA3FPGA_DATA4FPGA_DATA5FPGA_DATA6FPGA_DATA7
DDR2_DEVB_WEn
DDR2_DEVB_BA[2:0]
DDR2_DEVB_CASn
DDR2_DEVB_A[14:0]
DDR2_DEVB_WEn
FPGA_DATA[7:0]
MSEL1MSEL0
MSEL2
TEMPDIODE_PTEMPDIODE_N
TEMPDIODE_PTEMPDIODE_N
MSEL0
MAX_JTAG_TCKMAX_JTAG_TMS
FPGA_JTAG_TDO
MSEL1
MSEL2
DEV_SEL JTAG_SEL
DEV_SELJTAG_SEL
JTAG_TCK
JTAG_TDO
JTAG_TMS
JTAG_TDI
MAX_JTAG_TCK
MAX_JTAG_TMS
MAX_JTAG_TDO
MAX_JTAG_TDI
FPGA_JTAG_TCK
FPGA_JTAG_TMS
FPGA_JTAG_TDO
FPGA_JTAG_TDI
MAX_JTAG_TDI
MAXGP_JTAG_TCK
MAXGP_JTAG_TMS
MAXGP_JTAG_TDO
MAXGP_JTAG_TDI
MAX_JTAG_TCK
MAX_JTAG_TMS
MAX_JTAG_TDO
MAXGP_JTAG_TDO
MAXGP_JTAG_TCKMAXGP_JTAG_TMS
MAXGP_JTAG_TDI
FPGA_JTAG_TDOFPGA_JTAG_TDI
FPGA_JTAG_TCKFPGA_JTAG_TMS
FPGA_JTAG_TCK
DEV_SELJTAG_SEL
DDR2_DEVB_CASnDDR2_DEVB_A3
DDR2_DEVB_A7
DDR2_DEVB_BA2
2.5V
2.5V
2.5V_VCCPGM
2.5V_VCCPGM
2.5V_VCCPD
2.5V_VCCPGM
2.5V_VCCPD
2.5V 2.5V
2.5V2.5V
2.5V_B4A_B5_B6
FPGA_CONF_DONE 9,17FPGA_nSTATUS 9
FPGA_DCLK 9FPGA_DATA[7:0] 9
FPGA_nCONFIG 9
MAX_JTAG_TDO 9MAX_JTAG_TDI 9
DDR2_DEVB_BA[2:0] 11,12,19
DDR2_DEVB_A[14:0] 8,11,12,19
DDR2_DEVB_CASn 11,12DDR2_DEVB_WEn 11,12
TEMPDIODE_PTEMPDIODE_N
MAXGP_JTAG_TDO 9MAXGP_JTAG_TDI 9
MAX_JTAG_TMS 9MAX_JTAG_TCK 9
MAXGP_JTAG_TCK 9MAXGP_JTAG_TMS 9
FPGA_JTAG_TMS 9,16FPGA_JTAG_TCK 9,16
FPGA_JTAG_TDO 9FPGA_JTAG_TDI 9
JTAG_SEL 9DEV_SEL 9
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B18 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B18 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B18 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Configuration
(uses JTAG mode only)USB Blaster Programming Header
CONFIGURATION INTERFACE
Fast Passive Parallel: MSEL[2:0]=000Passive Serial: MSEL[2:0]=010
MSEL pins have internal 5kOhm pull-downs.
MAX II
JTAG REFERENCE
DDR2 SDRAM DEVICE B INTERFACE
FPP w/design security:MSEL[2:0]=001
FPGA
MAX II GENERAL PURPOSE
Place at end of chain
Connect Pull-up to pin B1of Stratix III device.
R190 10.0KR190 10.0K
J2
CON2
J2
CON2
12
R161 4.7KR161 4.7K
C1
0.1uF
C1
0.1uF
Stratix III Configuration
other DQ11 pins are in bank 1 section
Bank 1C
EP3SL150F1152
U22J
Stratix III Configuration
other DQ11 pins are in bank 1 section
Bank 1C
EP3SL150F1152
U22J
MSEL0 K10
MSEL1 J9
MSEL2 K9
NCEAE26 NCEO AJ5
NCONFIGAE25
NCSO AE9
NIO_PULLUP AF8
NSTATUSAH28
PORSEL AF26
TCK F30
TDI G28TDO G29
TEMPDIODEN D4TEMPDIODEP E5
TMS H28
TRST J28
DATA2/DQSN12L/DIFFIO_RX_L19NR34
DATA3/DQS12L/DIFFIO_RX_L19PR33
DATA6/DQSN13L/DIFFIO_RX_L20NT32
DATA7/DQS13L/DIFFIO_RX_L20PR31
DEV_OE/DQ13L/DIFFIO_RX_L21NU32
DEV_CLRN/DQ13L/DIFFIO_RX_L21PU31
CLKUSR/DQ11L/DIFFIO_TX_L18NR30
DATA0/DQ12L/DIFFIO_TX_L19NT28
DATA1/DQ12L/DIFFIO_TX_L19PT27
DATA4/DQ12L/DIFFIO_TX_L20NT25
DATA5/DQ12L/DIFFIO_TX_L20PT24
INIT_DONE/DQ13L/DIFFIO_TX_L21NT26
CRC_ERROR/DQ13L/DIFFIO_TX_L21PU25
ASDO AH6
CONF_DONEAH29
DCLKAL3
DNU U18
R189 10.0KR189 10.0K
XJ12
881545-2
XJ12
881545-2
R188 10.0KR188 10.0K
J23
70247-1051
J23
70247-1051
2468
10
13579 R95 1.00kR95 1.00k
ANALOG SWITCH
L:COMx=NCxH:COMx=NOx
U3
DNI
ANALOG SWITCH
L:COMx=NCxH:COMx=NOx
U3
DNI
GND8
VDD16
NC3 11
NC4 14
NC2 5
NC1 2
NO1 3
NO2 6
NO3 10
NO4 13
COM14
COM27
COM39
COM412
SEL1
EN15
R94 1.00kR94 1.00k
R4 10.0KR4 10.0KJ3
CON2
J3
CON2
12
R160 0R160 0
R193 10.0KR193 10.0K
R3 10.0KR3 10.0K
R185 10.0KR185 10.0K
C93 DNIC93 DNI
ANALOG SWITCH
L:COMx=NCxH:COMx=NOx
U2
TS3A5018
ANALOG SWITCH
L:COMx=NCxH:COMx=NOx
U2
TS3A5018
GND8
VDD16
NC3 11
NC4 14
NC2 5
NC1 2
NO1 3
NO2 6
NO3 10
NO4 13
COM14
COM27
COM39
COM412
SEL1
EN15
C2
0.1uF
C2
0.1uF
R931.00kR931.00k
R191 10.0KR191 10.0K
J13
CON2
J13
CON2
12
R55 DNIR55 DNI
R245 10.0KR245 10.0K
R159 10.0KR159 10.0K
XJ11
881545-2
XJ11
881545-2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
DDR2_DEVA_A[14:0]
DDR2_DEVA_BA[2:0]
DDR2_DEVA_CKE
DDR2_DEVA_DM
DDR2_DEVA_DQS_P
DDR2_DEVA_CK_N
DDR2_DEVA_DQS_N
DDR2_DEVA_WEn
DDR2_DEVA_CASnDDR2_DEVA_RASn
DDR2_DEVA_CSnDDR2_DEVA_ODT
DDR2_DEVA_CK_P
DDR2_DEVA_DQ[7:0]
DDR2_DEVB_ODTDDR2_DEVB_DM
DDR2_DEVB_DQS_PDDR2_DEVB_DQS_N
DDR2_DEVB_DQ[7:0]
DDR2_DEVB_CK_NDDR2_DEVB_CK_P
DDR2_DEVB_A[14:0]
DDR2_DEVB_BA[2:0]
DDR2_DEVA_A13DDR2_DEVA_CKE
DDR2_DEVA_DQS_PDDR2_DEVA_DQS_NDDR2_DEVA_DM
DDR2_DEVA_DQ1
DDR2_DEVA_DQ6
DDR2_DEVB_A8DDR2_DEVB_A5
RUP1ARDN1A
DDR2_DEVB_DQS_PDDR2_DEVB_DQS_N
DDR2_DEVB_DM
DDR2_DEVB_A0
DDR2_DEVB_A6
DDR2_DEVB_CK_N
DDR2_DEVB_BA0
RUP2ARDN2A
RDN1ARUP1A
RDN2ARUP2A
DDR2_DEVA_A8
DDR2_DEVA_A0
DDR2_DEVA_A6
DDR2_DEVA_A1
DDR2_DEVA_A10
DDR2_DEVA_ODT
DDR2_DEVA_A4
DDR2_DEVA_A11
DDR2_DEVA_A12
DDR2_DEVA_A9
DDR2_DEVA_CK_P
DDR2_DEVA_A2
DDR2_DEVA_A14
DDR2_DEVA_CK_N
DDR2_DEVA_A3
DDR2_DEVA_BA1 DDR2_DEVA_A5
DDR2_DEVA_A7
DDR2_DEVA_CSn
DDR2_DEVA_BA0
DDR2_DEVA_WEn
DDR2_DEVA_BA2
DDR2_DEVA_RASn
DDR2_DEVA_CASn
DDR2_DEVA_DQ0DDR2_DEVA_DQ2
DDR2_DEVA_DQ3
DDR2_DEVA_DQ7
DDR2_DEVA_DQ4
DDR2_DEVA_DQ5
DDR2_DEVB_DQ3
DDR2_DEVB_DQ0
DDR2_DEVB_DQ7
DDR2_DEVB_DQ1
DDR2_DEVB_DQ2
DDR2_DEVB_DQ6
DDR2_DEVB_DQ5
DDR2_DEVB_DQ4
ENET_GTX_CLKENET_INTn
ENET_MDIO
ENET_RESETn
ENET_RX_D1
ENET_RX_D2
ENET_RX_D0
ENET_RX_D3
ENET_RX_D4
ENET_RX_D5
ENET_RX_D6
ENET_RX_PENET_RX_N
ENET_TX_CLK
ENET_TX_D0
ENET_TX_D1
ENET_TX_D2
ENET_TX_D3 ENET_TX_D4
ENET_TX_D5
ENET_TX_D6
ENET_TX_D7
ENET_TX_EN
ENET_TX_ER
HSMA_CLK_OUT0
HSMA_RX_LED
HSMA_SCL
HSMA_TX_LED
HSMB_CLK_OUT0
HSMB_D0HSMB_D1
HSMB_D2HSMB_D3
HSMB_SCL
HSMB_TX_LED
OLED_BS1
OLED_CSn
OLED_D_Cn
OLED_DATA0
OLED_DATA1
OLED_DATA2
OLED_DATA3
OLED_DATA4
OLED_DATA5
OLED_DATA6
OLED_DATA7
OLED_E_RDn
OLED_WEn
USB_CMD_DATA
USB_FD0
USB_FD1
USB_FD2
USB_FD3
USB_FD4USB_FD5
USB_FD6
USB_FD7
CLKOUT_SMA
CLKOUT_SMA
HSMA_TX_LEDHSMA_RX_LEDHSMA_CLK_OUT0HSMA_SCL
HSMB_CLK_OUT0HSMB_SCL
HSMB_D[3:0]
ENET_RESETn
ENET_RX_PENET_RX_N
ENET_INTn
ENET_MDIO
ENET_TX_D[7..0]
ENET_RX_D[7..0]
ENET_GTX_CLKENET_TX_CLKENET_TX_ERENET_TX_EN
HSMB_TX_LED
USB_FD[7:0]
USB_CMD_DATA
OLED_D_CnOLED_WEnOLED_E_RDnOLED_BS1
OLED_DATA[7:0]
OLED_CSn
DDR2_DEVB_CKE
OLED_SERn
OLED_SERn
DDR2_DEVB_A1
DDR2_DEVB_A2
DDR2_DEVB_RASn
DDR2_DEVB_A4
DDR2_DEVB_BA1
DDR2_DEVB_A10DDR2_DEVB_A13
DDR2_DEVB_CSn
DDR2_DEVB_CKE
DDR2_DEVB_CK_P
DDR2_DEVB_ODT
DDR2_DEVB_RASnDDR2_DEVB_CSn
2.5V_B2
1.8V_S3
DDR2_DEVB_DQ[7:0] 11
DDR2_DEVB_DQS_P 11DDR2_DEVB_DQS_N 11DDR2_DEVB_DM 11
DDR2_DEVB_A[14:0] 8,11,12,18
DDR2_DEVB_BA[2:0] 11,12,18
DDR2_DEVB_ODT 11,12DDR2_DEVB_CK_P 11DDR2_DEVB_CK_N 11
DDR2_DEVA_CSn 11,12DDR2_DEVA_ODT 11,12
DDR2_DEVA_CKE 11,12DDR2_DEVA_CK_P 11DDR2_DEVA_CK_N 11
DDR2_DEVA_DQS_P 11
DDR2_DEVA_DQ[7:0] 11
DDR2_DEVA_DQS_N 11DDR2_DEVA_DM 11
DDR2_DEVA_A[14:0] 11,12
DDR2_DEVA_BA[2:0] 11,12
DDR2_DEVA_RASn 11,12DDR2_DEVA_CASn 11,12
DDR2_DEVA_WEn 11,12
CLKOUT_SMA 8
HSMA_SCL 16HSMA_CLK_OUT0 16
HSMA_TX_LED 17HSMA_RX_LED 17
HSMB_CLK_OUT0 16HSMB_SCL 16
HSMB_D[3:0] 16
ENET_RESETn 15
ENET_RX_P 15ENET_RX_N 15
ENET_INTn 15
ENET_MDIO 15
ENET_TX_D[7..0] 15
ENET_RX_D[7..0] 8,15
ENET_GTX_CLK 15ENET_TX_CLK 15ENET_TX_ER 15ENET_TX_EN 15
HSMB_TX_LED 17
USB_FD[7:0] 9
USB_CMD_DATA 9
OLED_WEn 17OLED_D_Cn 17
OLED_BS1 17OLED_E_RDn 17
OLED_DATA[7:0] 17
OLED_CSn 17
DDR2_DEVB_CKE 11,12
OLED_SERn 17
DDR2_DEVB_RASn 11,12DDR2_DEVB_CSn 11,12
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B19 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B19 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B19 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Banks 1 & 2DDR2 SDRAM DEVICE A INTERFACE
DDR2 SDRAM DEVICE B INTERFACE
HSMC PORT A
HSMC PORT B
ETHERNET INTERFACE
USB 2.0 INTERFACE
SMA CLOCK
OLED DISPLAY INTERFACE
Bank 2A
Bank 2C
Stratix III Bank 2
Bank 2B
EP3SL150F1152
U22B
Bank 2A
Bank 2C
Stratix III Bank 2
Bank 2B
EP3SL150F1152
U22B
DIFFIO_RX_L33N AF34DIFFIO_RX_L33P AG33
DQSN20L/DIFFIO_RX_L34NAE32DQS20L/DIFFIO_RX_L34PAE31
DQ21L/DIFFIO_RX_L35NAG34DQ21L/DIFFIO_RX_L35PAH33
DQSN21L/DIFFIO_RX_L36NAF32DQS21L/DIFFIO_RX_L36PAF31
DQSN22L/DIFFIO_RX_L37NAH34DQS22L/DIFFIO_RX_L37PAJ34
DQ23L/DIFFIO_RX_L38NAG32DQ23L/DIFFIO_RX_L38PAG31
DQSN23L/DIFFIO_RX_L39NAK34DQS23L/DIFFIO_RX_L39PAK33
DQSN24L/DIFFIO_RX_L40N AJ32DQS24L/DIFFIO_RX_L40P AJ31
DQ25L/DIFFIO_RX_L41N AL34DQ25L/DIFFIO_RX_L41P AM34
DQSN25L/DIFFIO_RX_L42N AH31DQS25L/DIFFIO_RX_L42P AH30
DQSN26L/DIFFIO_RX_L43N AL33DQS26L/DIFFIO_RX_L43P AL32
RDN2A/DIFFIO_RX_L44NAK32RUP2A/DIFFIO_RX_L44PAK31
DQ20L/DIFFIO_TX_L33NAA25DQ20L/DIFFIO_TX_L33PAA24DQ20L/DIFFIO_TX_L34NAC29DQ20L/DIFFIO_TX_L34PAC28
DQ21L/DIFFIO_TX_L35NAD31DQ21L/DIFFIO_TX_L35PAD30
DQ22L/DIFFIO_TX_L36NAB25DQ22L/DIFFIO_TX_L36PAB24DQ22L/DIFFIO_TX_L37NAB27DQ22L/DIFFIO_TX_L37PAB26
DQ23L/DIFFIO_TX_L38NAE30DQ23L/DIFFIO_TX_L38PAE29
DQ24L/DIFFIO_TX_L39N AD29DQ24L/DIFFIO_TX_L39P AD28
DQ24L/DIFFIO_TX_L40N AF29DQ24L/DIFFIO_TX_L40P AF28
DQ25L/DIFFIO_TX_L41N AE28DQ25L/DIFFIO_TX_L41P AE27
DQ26L/DIFFIO_TX_L42N AD27DQ26L/DIFFIO_TX_L42P AD26DQ26L/DIFFIO_TX_L43N AC26DQ26L/DIFFIO_TX_L43P AC25
DIFFIO_TX_L44N AG30DIFFIO_TX_L44P AG29
DQ14L/DIFFIO_RX_L24NY34DQ14L/DIFFIO_RX_L24PAA33
DQSN14L/DIFFIO_RX_L25NY32DQS14L/DIFFIO_RX_L25PY31
DQSN15L/DIFFIO_RX_L26NAA34DQS15L/DIFFIO_RX_L26PAB33
DQ16L/DIFFIO_RX_L27NAA32DQ16L/DIFFIO_RX_L27PAA31
DQSN16L/DIFFIO_RX_L28NAB34DQS16L/DIFFIO_RX_L28PAC34
DQSN17L/DIFFIO_RX_L29N AB32DQS17L/DIFFIO_RX_L29P AB31
DQ18L/DIFFIO_RX_L30N AD34DQ18L/DIFFIO_RX_L30P AD33
DQSN18L/DIFFIO_RX_L31N AC32DQS18L/DIFFIO_RX_L31P AC31
DQSN19L/DIFFIO_RX_L32N AE34DQS19L/DIFFIO_RX_L32P AE33
DQ14L/DIFFIO_TX_L24NW27DQ14L/DIFFIO_TX_L24PW26
DQ15L/DIFFIO_TX_L25NV25DQ15L/DIFFIO_TX_L25PV24DQ15L/DIFFIO_TX_L26NW31DQ15L/DIFFIO_TX_L26PW30
DQ16L/DIFFIO_TX_L27NY29DQ16L/DIFFIO_TX_L27PY28
DQ17L/DIFFIO_TX_L28N W24DQ17L/DIFFIO_TX_L28P Y23DQ17L/DIFFIO_TX_L29N AA30DQ17L/DIFFIO_TX_L29P AA29
DQ18L/DIFFIO_TX_L30N Y26DQ18L/DIFFIO_TX_L30P Y25
DQ19L/DIFFIO_TX_L31N AA28DQ19L/DIFFIO_TX_L31P AA27
DQ19L/DIFFIO_TX_L32N AB30DQ19L/DIFFIO_TX_L32P AB29
R156 49.9R156 49.9R155 49.9R155 49.9
R194 49.9R194 49.9R197 49.9R197 49.9
Bank 1A
Bank 1C
Stratix III Bank 1
other DQ11 pin in config section
Bank 1B
EP3SL150F1152
U22A
Bank 1A
Bank 1C
Stratix III Bank 1
other DQ11 pin in config section
Bank 1B
EP3SL150F1152
U22A
DQ6L/DIFFIO_RX_L10N G34DQ6L/DIFFIO_RX_L10P H34
DQSN7L/DIFFIO_RX_L11N J34DQS7L/DIFFIO_RX_L11P J33
DIFFIO_RX_L12N K34DIFFIO_RX_L12P K33
RDN1A/DIFFIO_RX_L1NE32RUP1A/DIFFIO_RX_L1PE31
DQSN1L/DIFFIO_RX_L2NF32DQS1L/DIFFIO_RX_L2PF31DQSN2L/DIFFIO_RX_L3NC34DQS2L/DIFFIO_RX_L3PC33
DQ2L/DIFFIO_RX_L4NH32DQ2L/DIFFIO_RX_L4PH31
DQSN3L/DIFFIO_RX_L5ND34DQS3L/DIFFIO_RX_L5PD33
DQSN4L/DIFFIO_RX_L6NJ32DQS4L/DIFFIO_RX_L6PJ31
DQ4L/DIFFIO_RX_L7NE34DQ4L/DIFFIO_RX_L7PF33
DQSN5L/DIFFIO_RX_L8N F34DQS5L/DIFFIO_RX_L8P G33
DQSN6L/DIFFIO_RX_L9N K32DQS6L/DIFFIO_RX_L9P K31
DQ6L/DIFFIO_TX_L10N L32DQ6L/DIFFIO_TX_L10P L31
DQ7L/DIFFIO_TX_L11N N24DQ7L/DIFFIO_TX_L11P P23
DQ7L/DIFFIO_TX_L12N M30DQ7L/DIFFIO_TX_L12P M29
DIFFIO_TX_L1N G31DIFFIO_TX_L1P G30
DQ1L/DIFFIO_TX_L2NJ30DQ1L/DIFFIO_TX_L2PJ29
DQ1L/DIFFIO_TX_L3NK28DQ1L/DIFFIO_TX_L3PK27
DQ2L/DIFFIO_TX_L4NN25DQ2L/DIFFIO_TX_L4PM24
DQ3L/DIFFIO_TX_L5NM27DQ3L/DIFFIO_TX_L5PM26
DQ3L/DIFFIO_TX_L6NK30DQ3L/DIFFIO_TX_L6PK29
DQ4L/DIFFIO_TX_L7NL29DQ4L/DIFFIO_TX_L7PL28
DQ5L/DIFFIO_TX_L8N M28DQ5L/DIFFIO_TX_L8P N27
DQ5L/DIFFIO_TX_L9N N26DQ5L/DIFFIO_TX_L9P P25
DQSN8L/DIFFIO_RX_L13NN32DQS8L/DIFFIO_RX_L13PM31
DQSN9L/DIFFIO_RX_L14NL34DQS9L/DIFFIO_RX_L14PM33
DQ9L/DIFFIO_RX_L15NP32DQ9L/DIFFIO_RX_L15PN31
DQSN10L/DIFFIO_RX_L16N M34DQS10L/DIFFIO_RX_L16P N33
DQSN11L/DIFFIO_RX_L17N R32DQS11L/DIFFIO_RX_L17P P31
DQ11L/DIFFIO_RX_L18N N34DQ11L/DIFFIO_RX_L18P P34
DQ8L/DIFFIO_TX_L13NN30DQ8L/DIFFIO_TX_L13PN29
DQ8L/DIFFIO_TX_L14NP29DQ8L/DIFFIO_TX_L14PP28
DQ9L/DIFFIO_TX_L15NR26DQ9L/DIFFIO_TX_L15PR25
DQ10L/DIFFIO_TX_L16N R24DQ10L/DIFFIO_TX_L16P T23
DQ10L/DIFFIO_TX_L17N R28DQ10L/DIFFIO_TX_L17P R27
DQ11L/DIFFIO_TX_L18P R29
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
HSMA_D0
HSMA_D1HSMA_D2
HSMA_D3
SRAM_PSn
DDR2_DIMM_DQS_N8
DDR2_DIMM_A10DDR2_DIMM_A14
DDR2_DIMM_DM1
DDR2_DIMM_CKE1
DDR2_DIMM_DQ18
DDR2_DIMM_DQS_P4DDR2_DIMM_DQS_N4
DDR2_DIMM_DM3
DDR2_DIMM_DQS_P3DDR2_DIMM_DQS_N3
DDR2_DIMM_DQS_P2
DDR2_DIMM_DM2
DDR2_DIMM_DQS_N2
DDR2_DIMM_DQ11
DDR2_DIMM_DQS_N1DDR2_DIMM_DQS_P1
DDR2_DIMM_DM0
DDR2_DIMM_DQ2
DDR2_DIMM_DQS_N0DDR2_DIMM_DQS_P0
DDR2_DIMM_DQ66DDR2_DIMM_DM8
DDR2_DIMM_DQS_P8
DDR2_DIMM_DQ39
DDR2_DIMM_DM4
DDR2_DIMM_DQ33
DDR2_DIMM_DM6
DDR2_DIMM_DQS_N6DDR2_DIMM_DQS_P6
DDR2_DIMM_DQS_N5DDR2_DIMM_DQS_P5
DDR2_DIMM_DM5
DDR2_DIMM_DM7
DDR2_DIMM_DQS_N7DDR2_DIMM_DQS_P7
LCD_DATA5
LCD_DATA3LCD_DATA7
SEVEN_SEG_DPLCD_DATA1
SEVEN_SEG_SEL1SEVEN_SEG_SEL3
SEVEN_SEG_F
SEVEN_SEG_D
LCD_DATA4SEVEN_SEG_E
SEVEN_SEG_A
LCD_DATA0SEVEN_SEG_SEL4
SEVEN_SEG_B
SEVEN_SEG_SEL2LCD_DATA2
RDN4ARUP4A
CPU_RESETnLCD_D_Cn
LCD_CSnSEVEN_SEG_C
SEVEN_SEG_GLCD_DATA6
LCD_WEn
SPEAKER_OUTSEVEN_SEG_MINUS DDR2_DIMM_CKE0
DDR2_DIMM_CKE1
DDR2_DIMM_CSn0DDR2_DIMM_CSn1
DDR2_DIMM_CLK_P[2..0]
DDR2_DIMM_CLK_N[2..0]
DDR2_DIMM_DM[8..0]
DDR2_DIMM_DQS_P[8..0]
DDR2_DIMM_DQS_N[8..0]
DDR2_DIMM_DQ[71..0]
CPU_RESETn
LCD_DATA[7:0]
SEVEN_SEG_A
SEVEN_SEG_SEL[4:1]
SEVEN_SEG_BSEVEN_SEG_CSEVEN_SEG_D
SEVEN_SEG_GSEVEN_SEG_DP
SEVEN_SEG_ESEVEN_SEG_F
SEVEN_SEG_MINUS
LCD_D_CnLCD_WEn
LCD_CSn
HSMA_D[3:0]
SPEAKER_OUT
SRAM_PSn
HSMB_RX_LED
HSMB_RX_LED
DDR2_DIMM_CKE0
DDR2_DIMM_CLK_P1DDR2_DIMM_CLK_N1
RDN4ARUP4A
DESKEW_0_AE24DESKEW_1_AD22DDR2_DIMM_A13
DDR2_DIMM_A0
DDR2_DIMM_A1
DDR2_DIMM_A[15..0]
DDR2_DIMM_A9DDR2_DIMM_A11
DDR2_DIMM_CSn0
DDR2_DIMM_A15
DDR2_DIMM_A12
DDR2_DIMM_CSn1
DDR2_DIMM_A5
DDR2_DIMM_A6
DDR2_DIMM_DQ0DDR2_DIMM_DQ7
DDR2_DIMM_DQ1
DDR2_DIMM_DQ5
DDR2_DIMM_DQ9
DDR2_DIMM_DQ10DDR2_DIMM_DQ14
DDR2_DIMM_DQ12DDR2_DIMM_DQ13
DDR2_DIMM_DQ15
DDR2_DIMM_DQ16
DDR2_DIMM_DQ21
DDR2_DIMM_DQ23
DDR2_DIMM_DQ17
DDR2_DIMM_DQ19
DDR2_DIMM_DQ20
DDR2_DIMM_DQ22
DDR2_DIMM_DQ27
DDR2_DIMM_DQ24DDR2_DIMM_DQ25DDR2_DIMM_DQ31
DDR2_DIMM_DQ26DDR2_DIMM_DQ30
DDR2_DIMM_DQ28
DDR2_DIMM_DQ29
DDR2_DIMM_DQ3DDR2_DIMM_DQ32
DDR2_DIMM_DQ35DDR2_DIMM_DQ38
DDR2_DIMM_DQ34
DDR2_DIMM_DQ36
DDR2_DIMM_DQ37DDR2_DIMM_DQ6
DDR2_DIMM_DQ4
DDR2_DIMM_DQ40
DDR2_DIMM_DQ46DDR2_DIMM_DQ41
DDR2_DIMM_DQ47
DDR2_DIMM_DQ42
DDR2_DIMM_DQ43
DDR2_DIMM_DQ44
DDR2_DIMM_DQ45
DDR2_DIMM_DQ48
DDR2_DIMM_DQ54DDR2_DIMM_DQ55
DDR2_DIMM_DQ49
DDR2_DIMM_DQ50DDR2_DIMM_DQ51
DDR2_DIMM_DQ53DDR2_DIMM_DQ52
DDR2_DIMM_DQ56DDR2_DIMM_DQ60
DDR2_DIMM_DQ57
DDR2_DIMM_DQ61
DDR2_DIMM_DQ63
DDR2_DIMM_DQ58
DDR2_DIMM_DQ59DDR2_DIMM_DQ62
DDR2_DIMM_DQ65
DDR2_DIMM_DQ64
DDR2_DIMM_DQ70
DDR2_DIMM_DQ67DDR2_DIMM_DQ68DDR2_DIMM_DQ71
DDR2_DIMM_DQ69
DDR2_DIMM_DQ8
ENET_RX_ER
OLED_RSTn
USB_EMPTY
USB_FULL
ENET_RX_CLK
OLED_RSTn
ENET_RX_CLKENET_RX_ER
USB_FULLUSB_EMPTY
HSMB_RX_LED
DESKEW_0_AE24DESKEW_1_AD22
DDR2_DIMM_CLK_N2DDR2_DIMM_CLK_P2
DDR2_DIMM_CLK_N0DDR2_DIMM_CLK_P0
2.5V_B4A_B5_B6
DDR2_DIMM_CKE0 10,12DDR2_DIMM_CKE1 10,12
DDR2_DIMM_CSn0 10,12DDR2_DIMM_CSn1 10,12
DDR2_DIMM_CLK_P[2..0] 10
DDR2_DIMM_CLK_N[2..0] 10
DDR2_DIMM_A[15..0] 8,10,12
DDR2_DIMM_DM[8..0] 10
DDR2_DIMM_DQS_P[8..0] 10
DDR2_DIMM_DQS_N[8..0] 10
DDR2_DIMM_DQ[71..0] 10
CPU_RESETn 9,17
LCD_DATA[7:0] 17
SEVEN_SEG_A 17
SEVEN_SEG_SEL[4:1] 17
SEVEN_SEG_B 17SEVEN_SEG_C 17SEVEN_SEG_D 17
SEVEN_SEG_G 17SEVEN_SEG_DP 17
SEVEN_SEG_E 17SEVEN_SEG_F 17
SEVEN_SEG_MINUS 17
LCD_D_Cn 17LCD_WEn 17
LCD_CSn 17
HSMA_D[3:0] 16
SPEAKER_OUT 17
SRAM_PSn 13
HSMB_RX_LED 17
OLED_RSTn 17
ENET_RX_CLK 15ENET_RX_ER 15
USB_FULL 9USB_EMPTY 9
HSMB_RX_LED 17
DESKEW_0_AE24 17DESKEW_1_AD22 17
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B20 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B20 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B20 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Banks 3 & 4
DDR2 DIMM INTERFACE
SEVEN-SEG INTERFACE
LCD DISPLAY INTERFACE
HSMA INTERFACE
SRAM INTERFACE
DESKEW
OLED DISPLAY INTERFACE
ETHERNET INTERFACE
HSMB INTERFACE
Bank 4A
Bank 4B
Bank 4C
Stratix III Bank 4
EP3SL150F1152
U22D
Bank 4A
Bank 4B
Bank 4C
Stratix III Bank 4
EP3SL150F1152
U22D
DIFFIO_RX_B39NAD12DIFFIO_RX_B39PAC12
DQ21B/DIFFIO_RX_B40NAJ12DQ21B/DIFFIO_RX_B40PAH12
DQSN21B/DIFFIO_RX_B41NAJ11DQS21B/DIFFIO_RX_B41PAH11
DQSN22B/DIFFIO_RX_B42NAL9DQS22B/DIFFIO_RX_B42PAK9
DQ23B/DIFFIO_RX_B43NAP4DQ23B/DIFFIO_RX_B43PAN4
DQSN23B/DIFFIO_RX_B44NAP3DQS23B/DIFFIO_RX_B44PAN3
DQSN24B/DIFFIO_RX_B45N AM5DQS24B/DIFFIO_RX_B45P AL5
DQ25B/DIFFIO_RX_B46N AK7DQ25B/DIFFIO_RX_B46P AJ7
DQSN25B/DIFFIO_RX_B47N AJ8DQS25B/DIFFIO_RX_B47P AH8
RDN4A/DQSN26B/DIFFIO_RX_B48N AH9RUP4A/DQS26B/DIFFIO_RX_B48P AG9
DQ21B_0AG12
DQ21B_1AJ13
DQ22B_0AJ10
DQ22B_1AJ9
DQ22B_2AL7
DQ22B_3AL8
DQ23B_0AP2
DQ23B_1AP5
DQ24B_0 AL4
DQ24B_1 AM4
DQ24B_2 AM6
DQ24B_3 AN6
DQ25B_0 AJ6
DQ25B_1 AK6
DQ26B_0 AE10
DQ26B_1 AE11
DQ26B_2 AF10
DQ26B_3 AF11
IO_3 AD13
IO_4 AE12
DQ17B/DIFFIO_RX_B33NAP10DQ17B/DIFFIO_RX_B33PAN10
DQSN17B/DIFFIO_RX_B34NAN9DQS17B/DIFFIO_RX_B34PAM9DQSN18B/DIFFIO_RX_B35NAF14DQS18B/DIFFIO_RX_B35PAF13
DQ19B/DIFFIO_RX_B36N AL12DQ19B/DIFFIO_RX_B36P AK12
DQSN19B/DIFFIO_RX_B37N AL11DQS19B/DIFFIO_RX_B37P AL10
DQSN20B/DIFFIO_RX_B38N AP7DQS20B/DIFFIO_RX_B38P AN7
DQ17B_0AP11
DQ17B_1AP9
DQ18B_0AE13
DQ18B_1AE14
DQ18B_2AE15
DQ18B_3AF15
DQ19B_0 AK10
DQ19B_1 AM11
DQ20B_0 AM7
DQ20B_1 AM8
DQ20B_2 AP6
DQ20B_3 AP8
DIFFIO_RX_B27N AM16DIFFIO_RX_B27P AL16
DIFFIO_RX_B28N AK16DIFFIO_RX_B28P AJ16
DQSN14B/DIFFIO_RX_B29NAM14DQS14B/DIFFIO_RX_B29PAL14
DQ15B/DIFFIO_RX_B30NAJ15DQ15B/DIFFIO_RX_B30PAH15
DQSN15B/DIFFIO_RX_B31NAJ14DQS15B/DIFFIO_RX_B31PAH14
DQSN16B/DIFFIO_RX_B32N AP12DQS16B/DIFFIO_RX_B32P AN12
DQ14B_0AK13
DQ14B_1AL13
DQ14B_2AL15
DQ14B_3AM15
DQ15B_0AG15
DQ15B_1AK15
DQ16B_0 AM12
DQ16B_1 AN13
DQ16B_2 AP13
DQ16B_3 AP14
R192 49.9R192 49.9R205 49.9R205 49.9
Bank 3A
Bank 3B
Bank 3C
Stratix III Bank 3
EP3SL150F1152
U22C
Bank 3A
Bank 3B
Bank 3C
Stratix III Bank 3
EP3SL150F1152
U22C
DIFFIO_RX_B10N AD22DIFFIO_RX_B10P AC22
RDN3A/DQSN1B/DIFFIO_RX_B1NAK28RUP3A/DQS1B/DIFFIO_RX_B1PAJ28
DQSN2B/DIFFIO_RX_B2NAM32DQS2B/DIFFIO_RX_B2PAM31
DQ2B/DIFFIO_RX_B3NAN30DQ2B/DIFFIO_RX_B3PAM30
DQSN3B/DIFFIO_RX_B4NAH24DQS3B/DIFFIO_RX_B4PAG24
DQSN4B/DIFFIO_RX_B5N AP33DQS4B/DIFFIO_RX_B5P AN33
DQ4B/DIFFIO_RX_B6N AP31DQ4B/DIFFIO_RX_B6P AN31
DQSN5B/DIFFIO_RX_B7N AL27DQS5B/DIFFIO_RX_B7P AL26
DQSN6B/DIFFIO_RX_B8N AP28DQS6B/DIFFIO_RX_B8P AN28
DQ6B/DIFFIO_RX_B9N AP27DQ6B/DIFFIO_RX_B9P AN27
DQ1B_0AH27
DQ1B_1AJ26
DQ1B_2AJ27
DQ1B_3AJ29
DQ2B_0AL29
DQ2B_1AM29
DQ3B_0AF23
DQ3B_1AF24
DQ3B_2AH25
DQ3B_3AH26
DQ4B_0 AP30
DQ4B_1 AP32
DQ5B_0 AK25
DQ5B_1 AK27
DQ5B_2 AL28
DQ5B_3 AM26
DQ6B_0 AM28
DQ6B_1 AP29
IO_1AE23IO_2AE24
DQSN7B/DIFFIO_RX_B11NAJ22DQS7B/DIFFIO_RX_B11PAH22
DQSN8B/DIFFIO_RX_B12NAM24DQS8B/DIFFIO_RX_B12PAL24
DQ8B/DIFFIO_RX_B13NAM23DQ8B/DIFFIO_RX_B13PAL23
DQSN9B/DIFFIO_RX_B14N AG21DQS9B/DIFFIO_RX_B14P AF21
DQSN10B/DIFFIO_RX_B15N AP25DQS10B/DIFFIO_RX_B15P AN25
DQ10B/DIFFIO_RX_B16N AP24DQ10B/DIFFIO_RX_B16P AN24
DQ10B_0 AP23
DQ10B_1 AP26
DQ7B_0AH23
DQ7B_1AJ23
DQ7B_2AJ24
DQ7B_3AK22
DQ8B_0AK24
DQ8B_1AL25
DQ9B_0 AD21
DQ9B_1 AE20
DQ9B_2 AE21
DQ9B_3 AE22
DQSN11B/DIFFIO_RX_B17NAL21DQS11B/DIFFIO_RX_B17PAK21
DQSN12B/DIFFIO_RX_B18NAP22DQS12B/DIFFIO_RX_B18PAN22
DQ12B/DIFFIO_RX_B19NAP21DQ12B/DIFFIO_RX_B19PAN21 DQSN13B/DIFFIO_RX_B20N AM19
DQS13B/DIFFIO_RX_B20P AL19
DIFFIO_RX_B21N AF20DIFFIO_RX_B21P AF19
DIFFIO_RX_B22N AH19DIFFIO_RX_B22P AG19
DQ11B_0AJ20
DQ11B_1AJ21DQ11B_2AL22
DQ11B_3AM22
DQ12B_0AM21
DQ12B_1AP20
DQ13B_0 AK18
DQ13B_1 AL18
DQ13B_2 AL20
DQ13B_3 AM18
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
HSMA_RX_P16HSMA_RX_N16
HSMA_TX_N5HSMA_TX_P5
HSMA_CLK_OUT_P2HSMA_CLK_OUT_N2
RUP5ARDN5A
HSMA_CLK_IN_N1HSMA_CLK_IN_P1
HSMB_RX_P[16:0]
HSMB_TX_N[16:0]
HSMB_RX_N[16:0]
HSMB_TX_P[16:0]
HSMA_TX_N[16:0]
HSMA_RX_P[16:0]
HSMA_TX_P[16:0]
HSMA_RX_N[16:0]
HSMA_SDA
HSMA_CLK_IN_N[2:1]
HSMA_CLK_IN_P[2:1]
HSMB_CLK_OUT_P[2:1]
HSMB_CLK_OUT_N[2:1]
HSMA_CLK_OUT_P[2:1]
HSMA_CLK_OUT_N[2:1]
RUP5ARDN5A
RUP6ARDN6A
HSMA_RX_N0HSMA_RX_P0
HSMA_RX_P2HSMA_RX_N2
HSMA_RX_N4HSMA_RX_P4
HSMA_RX_P1HSMA_RX_N1
HSMA_RX_P10HSMA_RX_N10
HSMA_RX_P14HSMA_RX_N14HSMA_RX_P11HSMA_RX_N11
HSMA_RX_P9HSMA_RX_N9
HSMA_RX_P15HSMA_RX_N15
HSMA_RX_P13HSMA_RX_N13
HSMA_RX_N8HSMA_RX_P8
HSMA_RX_N7HSMA_RX_P7
HSMA_RX_P3HSMA_RX_N3
HSMA_RX_P5HSMA_RX_N5
HSMA_RX_P6HSMA_RX_N6
HSMA_TX_N0HSMA_TX_P0
HSMA_TX_N4HSMA_TX_P4
HSMA_TX_N2HSMA_TX_P2
HSMA_TX_N1HSMA_TX_P1
HSMA_TX_N10HSMA_TX_P10
HSMA_TX_P11HSMA_TX_N11
HSMA_TX_N16HSMA_TX_P16
HSMA_TX_P12HSMA_TX_N12
HSMA_RX_P12HSMA_RX_N12
HSMA_TX_N7HSMA_TX_P7
HSMA_TX_P13HSMA_TX_N13
HSMA_TX_N9HSMA_TX_P9
HSMA_TX_N8HSMA_TX_P8
HSMA_TX_P14HSMA_TX_N14
HSMA_TX_P15HSMA_TX_N15
HSMA_TX_N3HSMA_TX_P3
HSMA_TX_N6HSMA_TX_P6
ENET_MDC
ENET_RX_CRS
ENET_RX_DV
HSMA_CLK_IN0
HSMA_SDA
HSMB_CLK_IN_P1HSMB_CLK_IN_N1
HSMB_CLK_IN0
HSMB_CLK_OUT_P1HSMB_CLK_OUT_N1HSMB_CLK_OUT_P2HSMB_CLK_OUT_N2
HSMB_RX_N0HSMB_RX_P0
HSMB_RX_N1HSMB_RX_P1
HSMB_RX_N2HSMB_RX_P2
HSMB_RX_N3HSMB_RX_P3
HSMB_RX_N4HSMB_RX_P4
HSMB_RX_N5HSMB_RX_P5
HSMB_RX_P6HSMB_RX_N6
HSMB_RX_P7HSMB_RX_N7
HSMB_RX_P8HSMB_RX_N8HSMB_RX_P9HSMB_RX_N9
HSMB_RX_P10HSMB_RX_N10
HSMB_RX_N11HSMB_RX_P11
HSMB_RX_N12HSMB_RX_P12
HSMB_RX_N13HSMB_RX_P13
HSMB_RX_P14HSMB_RX_N14
HSMB_RX_P15HSMB_RX_N15
HSMB_RX_P16HSMB_RX_N16
HSMB_TX_P0HSMB_TX_N0HSMB_TX_P1HSMB_TX_N1
HSMB_TX_N2HSMB_TX_P2
HSMB_TX_N3HSMB_TX_P3
HSMB_TX_N4HSMB_TX_P4
HSMB_TX_N5HSMB_TX_P5
HSMB_TX_P6HSMB_TX_N6HSMB_TX_P7HSMB_TX_N7HSMB_TX_P8HSMB_TX_N8
HSMB_TX_P9HSMB_TX_N9
HSMB_TX_P10HSMB_TX_N10HSMB_TX_P11HSMB_TX_N11
HSMB_TX_N12HSMB_TX_P12
HSMB_TX_P13HSMB_TX_N13
HSMB_TX_N14HSMB_TX_P14
HSMB_TX_P15HSMB_TX_N15
HSMB_TX_P16HSMB_TX_N16
MAX_TO_STRATIX3
USB_REN
USB_WEN
RUP6ARDN6A
ENET_RX_CRSENET_MDC
ENET_RX_DV
USB_RENUSB_WEN
MAX_TO_STRATIX3
HSMB_CLK_IN_P[2:1]
HSMB_CLK_IN_N[2:1]
HSMB_CLK_IN0
HSMA_CLK_IN0
2.5V_B4A_B5_B6
2.5V_B4A_B5_B6
HSMB_TX_N[16:0] 16
HSMB_TX_P[16:0] 16
HSMB_RX_N[16:0] 16
HSMB_RX_P[16:0] 16
HSMA_SDA 16
HSMA_RX_P[16:0] 16
HSMA_TX_N[16:0] 16
HSMA_TX_P[16:0] 16
HSMA_RX_N[16:0] 16
HSMA_CLK_IN_P[2:1] 8,16
HSMA_CLK_IN_N[2:1] 8,16
HSMB_CLK_OUT_P[2:1] 16
HSMB_CLK_OUT_N[2:1] 16
HSMA_CLK_OUT_P[2:1] 8,16
HSMA_CLK_OUT_N[2:1] 8,16
ENET_RX_CRS 15ENET_MDC 15
ENET_RX_DV 15
USB_REN 9USB_WEN 9
MAX_TO_STRATIX3 9
HSMB_CLK_IN_P[2:1] 8,16
HSMB_CLK_IN_N[2:1] 8,16
HSMB_CLK_IN0 16
HSMA_CLK_IN0 16
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B21 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B21 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B21 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Banks 5 & 6
HSMC PORT B
HSMC PORT A
ETHERNET INTERFACE
USB 2.0 INTERFACE
MAX INTERFACE
R198 49.9R198 49.9
Bank 6A
Bank 6C
Stratix III Bank 6
Bank 6B
EP3SL150F1152
U22F
Bank 6A
Bank 6C
Stratix III Bank 6
Bank 6B
EP3SL150F1152
U22F
DQSN24R/DIFFIO_RX_R40N F3DQS24R/DIFFIO_RX_R40P F4
DQ16R/DIFFIO_RX_R27NP3DQ16R/DIFFIO_RX_R27PP4
DQSN14R/DIFFIO_RX_R25NR3DQS14R/DIFFIO_RX_R25PR4
DQ14R/DIFFIO_RX_R24NR1DQ14R/DIFFIO_RX_R24PP2
DQSN16R/DIFFIO_RX_R28NN1DQS16R/DIFFIO_RX_R28PM1
DQSN15R/DIFFIO_RX_R26NP1DQS15R/DIFFIO_RX_R26PN2
DQ18R/DIFFIO_RX_R30NL1DQ18R/DIFFIO_RX_R30PL2
DQSN25R/DIFFIO_RX_R42N D1DQS25R/DIFFIO_RX_R42P C1
DQSN23R/DIFFIO_RX_R39N E1DQS23R/DIFFIO_RX_R39P E2
DQSN26R/DIFFIO_RX_R43N D2DQS26R/DIFFIO_RX_R43P D3
DQ25R/DIFFIO_RX_R41N G4DQ25R/DIFFIO_RX_R41P G5
RDN6A/DIFFIO_RX_R44NE3RUP6A/DIFFIO_RX_R44PE4
DQ20R/DIFFIO_TX_R33NP10DQ20R/DIFFIO_TX_R33PP11
DQ15R/DIFFIO_TX_R25NT8DQ15R/DIFFIO_TX_R25PT9
DQ14R/DIFFIO_TX_R24NU6DQ14R/DIFFIO_TX_R24PT7
DQ18R/DIFFIO_TX_R30NR9DQ18R/DIFFIO_TX_R30PR10DQ15R/DIFFIO_TX_R26NT4DQ15R/DIFFIO_TX_R26PT5
DQ16R/DIFFIO_TX_R27NR6DQ16R/DIFFIO_TX_R27PR7
DQ24R/DIFFIO_TX_R40N J6DQ24R/DIFFIO_TX_R40P J7DQ23R/DIFFIO_TX_R38N K5DQ23R/DIFFIO_TX_R38P K6
DIFFIO_TX_R44N H5DIFFIO_TX_R44P H6
DQ26R/DIFFIO_TX_R42N M9DQ26R/DIFFIO_TX_R42P M10DQ26R/DIFFIO_TX_R43N L8DQ26R/DIFFIO_TX_R43P L9
DQ24R/DIFFIO_TX_R39N N10DQ24R/DIFFIO_TX_R39P N11
DQSN21R/DIFFIO_RX_R36NJ3DQS21R/DIFFIO_RX_R36PJ4
DQ21R/DIFFIO_RX_R35NH1DQ21R/DIFFIO_RX_R35PG2DIFFIO_RX_R33NJ1DIFFIO_RX_R33PH2
DQSN22R/DIFFIO_RX_R37NG1DQS22R/DIFFIO_RX_R37PF1
DQ23R/DIFFIO_RX_R38NH3DQ23R/DIFFIO_RX_R38PH4
DQSN17R/DIFFIO_RX_R29N N3DQS17R/DIFFIO_RX_R29P N4
DQSN20R/DIFFIO_RX_R34N K3DQS20R/DIFFIO_RX_R34P K4
DQSN18R/DIFFIO_RX_R31N M3DQS18R/DIFFIO_RX_R31P M4
DQSN19R/DIFFIO_RX_R32N K1DQS19R/DIFFIO_RX_R32P K2
DQ22R/DIFFIO_TX_R37NN8DQ22R/DIFFIO_TX_R37PN9
DQ22R/DIFFIO_TX_R36NL6DQ22R/DIFFIO_TX_R36PL7DQ20R/DIFFIO_TX_R34NM6DQ20R/DIFFIO_TX_R34PM7
DQ21R/DIFFIO_TX_R35NL4DQ21R/DIFFIO_TX_R35PL5
DQ17R/DIFFIO_TX_R28N P5DQ17R/DIFFIO_TX_R28P P6
DQ17R/DIFFIO_TX_R29N T11DQ17R/DIFFIO_TX_R29P R12
DQ25R/DIFFIO_TX_R41N K7DQ25R/DIFFIO_TX_R41P K8
DQ19R/DIFFIO_TX_R31N P7DQ19R/DIFFIO_TX_R31P P8
DQ19R/DIFFIO_TX_R32N N5DQ19R/DIFFIO_TX_R32P N6
R195 49.9R195 49.9
R168 49.9R168 49.9R169 49.9R169 49.9
Bank 5A
Bank 5C
Stratix III Bank 5
Bank 5B
EP3SL150F1152
U22E
Bank 5A
Bank 5C
Stratix III Bank 5
Bank 5B
EP3SL150F1152
U22E
DQ6R/DIFFIO_RX_R10N AF1DQ6R/DIFFIO_RX_R10P AF2
DQSN7R/DIFFIO_RX_R11N AE3DQS7R/DIFFIO_RX_R11P AE4
DIFFIO_RX_R12NAE1DIFFIO_RX_R12PAE2
RDN5A/DIFFIO_RX_R1N AK3RUP5A/DIFFIO_RX_R1P AK4
DQSN1R/DIFFIO_RX_R2NAM1DQS1R/DIFFIO_RX_R2PAM2
DQSN2R/DIFFIO_RX_R3NAJ3DQS2R/DIFFIO_RX_R3PAJ4
DQ2R/DIFFIO_RX_R4NAL1DQ2R/DIFFIO_RX_R4PAL2
DQSN3R/DIFFIO_RX_R5NAG3DQS3R/DIFFIO_RX_R5PAG4
DQSN4R/DIFFIO_RX_R6NAK1DQS4R/DIFFIO_RX_R6PAJ2
DQ4R/DIFFIO_RX_R7NAJ1DQ4R/DIFFIO_RX_R7PAH2
DQSN5R/DIFFIO_RX_R8N AF3DQS5R/DIFFIO_RX_R8P AF4
DQSN6R/DIFFIO_RX_R9N AH1DQS6R/DIFFIO_RX_R9P AG1
DQ6R/DIFFIO_TX_R10N AC5DQ6R/DIFFIO_TX_R10P AC6
DQ7R/DIFFIO_TX_R11N AB11DQ7R/DIFFIO_TX_R11P AA12
DQ7R/DIFFIO_TX_R12N AD3DQ7R/DIFFIO_TX_R12P AD4
DIFFIO_TX_R1N AH4DIFFIO_TX_R1P AH5
DQ1R/DIFFIO_TX_R2NAE7DQ1R/DIFFIO_TX_R2PAE8
DQ1R/DIFFIO_TX_R3NAF5DQ1R/DIFFIO_TX_R3PAF6
DQ2R/DIFFIO_TX_R4NAC8DQ2R/DIFFIO_TX_R4PAC9
DQ3R/DIFFIO_TX_R5NAE5DQ3R/DIFFIO_TX_R5PAE6
DQ3R/DIFFIO_TX_R6NAB10DQ3R/DIFFIO_TX_R6PAC11
DQ4R/DIFFIO_TX_R7NAD6DQ4R/DIFFIO_TX_R7PAD7
DQ5R/DIFFIO_TX_R8N AC7DQ5R/DIFFIO_TX_R8P AB8
DQ5R/DIFFIO_TX_R9N AB9DQ5R/DIFFIO_TX_R9P AA10
DQSN8R/DIFFIO_RX_R13NAB3DQS8R/DIFFIO_RX_R13PAC4
DQSN9R/DIFFIO_RX_R14NAD1DQS9R/DIFFIO_RX_R14PAC2
DQ9R/DIFFIO_RX_R15NAA3DQ9R/DIFFIO_RX_R15PAB4
DQSN10R/DIFFIO_RX_R16NAC1DQS10R/DIFFIO_RX_R16PAB2
DQSN11R/DIFFIO_RX_R17N Y3DQS11R/DIFFIO_RX_R17P AA4
DQ11R/DIFFIO_RX_R18N AB1DQ11R/DIFFIO_RX_R18P AA1
DQSN12R/DIFFIO_RX_R19N W3DQS12R/DIFFIO_RX_R19P Y4
DQSN13R/DIFFIO_RX_R20N Y1DQS13R/DIFFIO_RX_R20P Y2
DQ13R/DIFFIO_RX_R21N V3DQ13R/DIFFIO_RX_R21P V4
DQ8R/DIFFIO_TX_R13NAB5DQ8R/DIFFIO_TX_R13PAB6
DQ8R/DIFFIO_TX_R14NAA6DQ8R/DIFFIO_TX_R14PAA7
DQ9R/DIFFIO_TX_R15NY9DQ9R/DIFFIO_TX_R15PY10
DQ10R/DIFFIO_TX_R16NY7DQ10R/DIFFIO_TX_R16PY8
DQ10R/DIFFIO_TX_R17NY11DQ10R/DIFFIO_TX_R17PW12
DQ11R/DIFFIO_TX_R18N Y5DQ11R/DIFFIO_TX_R18P Y6
DQ12R/DIFFIO_TX_R19N W7DQ12R/DIFFIO_TX_R19P W8
DQ12R/DIFFIO_TX_R20N W10DQ12R/DIFFIO_TX_R20P W11
DQ13R/DIFFIO_TX_R21N W5DQ13R/DIFFIO_TX_R21P W6
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
QDRII_CQ_P
QDRII_CQ_N
QDRII_Q8
QDRII_Q4
QDRII_Q12
QDRII_Q10
QDRII_A4
QDRII_QVLD
FLASH_ADVn
FLASH_RESETn
RDN8ARUP8A
FLASH_CLKFLASH_CEn
FLASH_OEnFLASH_WEn
FSM_A0FSM_A1FSM_A2FSM_A3FSM_A4FSM_A5FSM_A6FSM_A7
FSM_A8FSM_A9FSM_A10FSM_A11
FSM_A12FSM_A13FSM_A14FSM_A15
FSM_A16FSM_A17
FSM_A18FSM_A19
FSM_A20FSM_A21FSM_A22FSM_A23FSM_A24FSM_D0FSM_D1FSM_D2
FSM_D3FSM_D4FSM_D5FSM_D6
FSM_D7FSM_D8
FSM_D9FSM_D10FSM_D11FSM_D12FSM_D13FSM_D14FSM_D15FSM_D16
FSM_D17FSM_D18FSM_D19FSM_D20
USER_LED1
USER_LED2USER_LED3
FSM_D21FSM_D22
MAX_OEnMAX_CSn
MAX_WEnUSER_LED0
FSM_D31
FSM_D29FSM_D30
FSM_D26FSM_D27FSM_D28
FSM_D23FSM_D24FSM_D25
USER_LED6USER_LED7
SRAM_BEn0SRAM_BEn1SRAM_BEn2SRAM_BEn3SRAM_WAIT0SRAM_WAIT1
SRAM_ADVnSRAM_CLK
SRAM_CSnSRAM_OEnSRAM_WEn
USER_LED4USER_LED5
QDRII_D[17..0]
QDRII_Q[17..0]
QDRII_A[19..0]
QDRII_CQ_NQDRII_QVLD
QDRII_CQ_PQDRII_K_NQDRII_K_PQDRII_RPSnQDRII_BWSn1QDRII_BWSn0
FSM_A[24:0]
SRAM_WAIT0
FSM_D[31:0]
MAX_CSn
USER_LED[7:0]
SRAM_WAIT1
SRAM_BEn[3:0]
SRAM_CSnSRAM_CLK
SRAM_OEnSRAM_ADVn
SRAM_WEn
FLASH_ADVnFLASH_CEn
MAX_WEnMAX_OEn
FLASH_CLK
FLASH_WEnFLASH_OEnFLASH_RESETn
RDN8ARUP8A
QDRII_ODT
QDRII_ODT
QDRII_A0
QDRII_A5
QDRII_A1
QDRII_A9QDRII_A10
QDRII_A6
QDRII_A11
QDRII_A19
QDRII_A12
QDRII_A14
QDRII_A15
QDRII_A16
QDRII_A17
QDRII_A18
QDRII_A2
QDRII_A7
QDRII_A3
QDRII_A8
QDRII_RPSn
QDRII_D16
QDRII_D0
QDRII_D17
QDRII_D1
QDRII_D11
QDRII_D10QDRII_D9
QDRII_D12
QDRII_D13
QDRII_D3
QDRII_D4
QDRII_D14
QDRII_D15
QDRII_D8QDRII_D2
QDRII_D5QDRII_D7QDRII_D6
QDRII_Q13
QDRII_Q0QDRII_Q15
QDRII_Q1QDRII_Q3
QDRII_Q11
QDRII_Q17
QDRII_Q7
QDRII_Q14
QDRII_Q6
QDRII_Q16
QDRII_Q5
QDRII_Q2
QDRII_Q9
ENET_LED_LINK1000
ENET_LED_LINK1000
QDRII_K_PQDRII_K_N
QDRII_BWSn0QDRII_BWSn1
QDRII_A13
1.8V_S3
QDRII_D[17..0] 11,12
QDRII_A[19..0] 11,12
QDRII_Q[17..0] 11
QDRII_QVLD 11QDRII_CQ_N 11QDRII_CQ_P 11
QDRII_RPSn 11,12QDRII_K_P 11,12QDRII_K_N 11,12
QDRII_BWSn0 11,12QDRII_BWSn1 11,12
FSM_A[24:0] 9,13
SRAM_WAIT0 13
FSM_D[31:0] 9,13
MAX_CSn 9
USER_LED[7:0] 17
SRAM_WAIT1 13
SRAM_BEn[3:0] 13
SRAM_CSn 13SRAM_CLK 13
SRAM_OEn 13SRAM_ADVn 13
SRAM_WEn 13
FLASH_ADVn 9,13FLASH_CEn 9,13
MAX_WEn 9MAX_OEn 9
FLASH_CLK 9,13
FLASH_WEn 9,13FLASH_OEn 9,13FLASH_RESETn 9,13
QDRII_ODT 11,12
ENET_LED_LINK1000 15
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B22 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B22 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B22 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Stratix III Banks 7 & 8
QDRII SRAM INTERFACE
SHARED BUS INTERFACE
PSRAM INTERFACE
MAX II INTERFACE
USER INTERFACE
FLASH INTERFACE
ETHERNET INTERFACE
R158 49.9R158 49.9R157 49.9R157 49.9
Bank 8A
Bank 8B
Bank 8C
Stratix III Bank 8
EP3SL150F1152
U22H
Bank 8A
Bank 8B
Bank 8C
Stratix III Bank 8
EP3SL150F1152
U22H
DIFFIO_RX_T39NL23DIFFIO_RX_T39PM23
DQ21T/DIFFIO_RX_T40NF23DQ21T/DIFFIO_RX_T40PG23
DQSN21T/DIFFIO_RX_T41NF24DQS21T/DIFFIO_RX_T41PG24
DQSN22T/DIFFIO_RX_T42ND26DQS22T/DIFFIO_RX_T42PE26
DQ23T/DIFFIO_RX_T43NA31DQ23T/DIFFIO_RX_T43PB31
DQSN23T/DIFFIO_RX_T44NA32DQS23T/DIFFIO_RX_T44PB32
DQSN24T/DIFFIO_RX_T45N C30DQS24T/DIFFIO_RX_T45P D30
DQ25T/DIFFIO_RX_T46N E28DQ25T/DIFFIO_RX_T46P F28
DQSN25T/DIFFIO_RX_T47N E29DQS25T/DIFFIO_RX_T47P F29
RDN8A/DQSN26T/DIFFIO_RX_T48N G26RUP8A/DQS26T/DIFFIO_RX_T48P H26
DQ21T_0F22
DQ21T_1H23
DQ22T_0D27
DQ22T_1D28
DQ22T_2F25
DQ22T_3F26
DQ23T_0A30
DQ23T_1A33
DQ24T_0 B29
DQ24T_1 C29
DQ24T_2 C31
DQ24T_3 D31
DQ25T_0 F27
DQ25T_1 G27
DQ26T_0 J24
DQ26T_1 J25
DQ26T_2 K24
DQ26T_3 K25
IO_7 K23
IO_8 L22
DQ17T/DIFFIO_RX_T33NA25DQ17T/DIFFIO_RX_T33PB25
DQSN17T/DIFFIO_RX_T34NB26DQS17T/DIFFIO_RX_T34PC26
DQSN18T/DIFFIO_RX_T35NJ21DQS18T/DIFFIO_RX_T35PJ22
DQ19T/DIFFIO_RX_T36N D24DQ19T/DIFFIO_RX_T36P D25
DQSN19T/DIFFIO_RX_T37N D23DQS19T/DIFFIO_RX_T37P E23
DQSN20T/DIFFIO_RX_T38N A28DQS20T/DIFFIO_RX_T38P B28
DQ17T_0A24
DQ17T_1A26
DQ18T_0J20
DQ18T_1K20
DQ18T_2K21
DQ18T_3K22
DQ19T_0 C24
DQ19T_1 E25
DQ20T_0 A27
DQ20T_1 A29
DQ20T_2 C27
DQ20T_3 C28
DIFFIO_RX_T27N C19DIFFIO_RX_T27P D19
DIFFIO_RX_T28N E19DIFFIO_RX_T28P F19
DQSN14T/DIFFIO_RX_T29NC21DQS14T/DIFFIO_RX_T29PD21
DQ15T/DIFFIO_RX_T30NF20DQ15T/DIFFIO_RX_T30PG20
DQSN15T/DIFFIO_RX_T31NF21DQS15T/DIFFIO_RX_T31PG21
DQSN16T/DIFFIO_RX_T32N A23DQS16T/DIFFIO_RX_T32P B23
DQ14T_0C20
DQ14T_1D20
DQ14T_2D22
DQ14T_3E22
DQ15T_0E20
DQ15T_1H20
DQ16T_0 A21
DQ16T_1 A22
DQ16T_2 B22
DQ16T_3 C23
Bank 7A
Bank 7B
Bank 7C
Stratix III Bank 7
EP3SL150F1152
U22G
Bank 7A
Bank 7B
Bank 7C
Stratix III Bank 7
EP3SL150F1152
U22G
DIFFIO_RX_T10NK11DIFFIO_RX_T10PK12
RDN7A/DQSN1T/DIFFIO_RX_T1NE7RUP7A/DQS1T/DIFFIO_RX_T1PF7
DQSN2T/DIFFIO_RX_T2NC3DQS2T/DIFFIO_RX_T2PC4
DQ2T/DIFFIO_RX_T3NB5DQ2T/DIFFIO_RX_T3PC5
DQSN3T/DIFFIO_RX_T4NG11DQS3T/DIFFIO_RX_T4PH11
DQSN4T/DIFFIO_RX_T5N A2DQS4T/DIFFIO_RX_T5P B2
DQ4T/DIFFIO_RX_T6N A4DQ4T/DIFFIO_RX_T6P B4
DQSN5T/DIFFIO_RX_T7N C9DQS5T/DIFFIO_RX_T7P D9
DQSN6T/DIFFIO_RX_T8N A7DQS6T/DIFFIO_RX_T8P B7
DQ6T/DIFFIO_RX_T9N A8DQ6T/DIFFIO_RX_T9P B8
DQ1T_0F6
DQ1T_1F8
DQ1T_2F9
DQ1T_3G8
DQ2T_0C6
DQ2T_1D6
DQ3T_0G10
DQ3T_1G9
DQ3T_2J11
DQ3T_3J12
DQ4T_0 A3
DQ4T_1 A5
DQ5T_0 D7
DQ5T_1 D8
DQ5T_2 E10
DQ5T_3 E8
DQ6T_0 A6
DQ6T_1 C7
IO_5 L13
IO_6 M13
DQSN7T/DIFFIO_RX_T11NF12DQS7T/DIFFIO_RX_T11PF13
DQSN8T/DIFFIO_RX_T12NC11DQS8T/DIFFIO_RX_T12PD11
DQ8T/DIFFIO_RX_T13NC12DQ8T/DIFFIO_RX_T13PD12
DQSN9T/DIFFIO_RX_T14N H14DQS9T/DIFFIO_RX_T14P J14
DQSN10T/DIFFIO_RX_T15N A10DQS10T/DIFFIO_RX_T15P B10
DQ10T/DIFFIO_RX_T16N A11DQ10T/DIFFIO_RX_T16P B11
DQ10T_0 A12
DQ10T_1 A9
DQ7T_0E11
DQ7T_1F11
DQ7T_2G12
DQ7T_3G13
DQ8T_0D10
DQ8T_1D13
DQ9T_0 K13
DQ9T_1 K14
DQ9T_2 K15
DQ9T_3 L14
DQSN11T/DIFFIO_RX_T17NE14DQS11T/DIFFIO_RX_T17PF14
DQSN12T/DIFFIO_RX_T18NA13DQS12T/DIFFIO_RX_T18PB13
DQ12T/DIFFIO_RX_T19NA14DQ12T/DIFFIO_RX_T19PB14 DQSN13T/DIFFIO_RX_T20N C16
DQS13T/DIFFIO_RX_T20P D16
DIFFIO_RX_T21N J16DIFFIO_RX_T21P J15DIFFIO_RX_T22N G16DIFFIO_RX_T22P H16
DQ11T_0D14
DQ11T_1D15
DQ11T_2E13
DQ11T_3F15
DQ12T_0A15
DQ12T_1C14
DQ13T_0 C15
DQ13T_1 C17
DQ13T_2 D17
DQ13T_3 E17
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
2.5V_B2
1.1V_VCC
2.5V_VCCPD
2.5V_VCCPGM
VCCL
1.5V_1.8V_B7
2.5V_B4A_B5_B6
VCCL
VCCL
VCCL
2.5V_A
2.5V_VCC_CLKIN
1.1V_VCC 1.5V_1.8V_B7
2.5V_B4A_B5_B6 2.5V_B2
2.5V_VCC_CLKIN
2.5V_A
2.5V_VCCPGM
2.5V_VCCPD
1.8V_S3
1.8V_S3
1.8V_S3
1.8V_S3
1.8V_S3
1.1V_VCCD1
1.1V_VCCD1
1.1V_VCCD2
1.1V_VCCD2
1.1V_VCCD3
1.1V_VCCD3
1.1V_VCCD4
1.1V_VCCD4
1.1V_VCCD1 1.1V_VCCD3 1.1V_VCCD41.1V_VCCD2
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B23 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B23 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C
Stratix III Development Kit Host Board
B23 23Tuesday, November 20, 2007
150-0310800-C1
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2007, Altera Corporation. All Rights Reserved.
DecouplingStratix III VCCL
Stratix III Banks 3 and 4, except 4A
Stratix III VCC Stratix III Banks 1 and 8
Stratix III Banks 4a, 5, and 6
Stratix III Bank 7
Stratix III Bank 2
Stratix III VCCA_PLL and VCCPT
Stratix III VCC_CLKIN
Stratix III VCCPGM
Stratix III VCCPD
Place 6 vias minimum on eachX2Y cap.
Stratix III VCCD_PLL
C324
22nF
C324
22nF
C287
1uF
C287
1uF
C329
10nF
C329
10nF
C305
180nF
C305
180nF
SCREW4SCREW4
C16
10nF
C16
10nF
C319
10nF
C319
10nFC52
10nF
C52
10nF
C321
100nF
C321
100nF
C79
10nF
C79
10nF
C309
47nF
C309
47nF
SCREW3SCREW3
C55
10nF
C55
10nF
C19
100uf
C19
100uf
C333
10nF
C333
10nF
C80
47nF
C80
47nF
C308
180nF
C308
180nF
C241
10uF
C241
10uF
C33
10nF
C33
10nF
C53
10uF
C53
10uF
C29
100nF
C29
100nF
C64
100uf
C64
100uf
C341
10uF
C341
10uF
C291
1uF
C291
1uF
C74
100uf
C74
100uf
C65
100uf
C65
100uf
C302
1uF
C302
1uF
C43
100uf
C43
100uf
C285
1uF
C285
1uF
C306
220nF
C306
220nF
C71
100nF
C71
100nF
C250
22nF
C250
22nF
C20
47nF
C20
47nF
C14
100uf
C14
100uf
C68
100uf
C68
100uf
C70
22nF
C70
22nF
C281
22nF
C281
22nF
STANDOFF5STANDOFF5
C22
100uf
C22
100uf
C49
1uF
C49
1uF
STANDOFF1STANDOFF1
C251
47nF
C251
47nF
C69
1uF
C69
1uF
C27
10uF
C27
10uF
C242
47nF
C242
47nF
STANDOFF3STANDOFF3
C284
1uF
C284
1uF
C28
1uF
C28
1uF
C340
10uF
C340
10uF
C339
100nF
C339
100nF
C280
180nF
C280
180nF
C35
100uf
C35
100uf
C26
22nF
C26
22nF
C86
100uf
C86
100uf
C17
220nF
C17
220nF
C243
180nF
C243
180nF
C304
220nF
C304
220nF
C24
100uf
C24
100uf
C273
1uF
C273
1uF
C327
470nF
C327
470nF
C62
220nF
C62
220nF
C298
47nF
C298
47nF
C66
10nF
C66
10nF
C334
47nF
C334
47nF
C289
10uF
C289
10uF
+ C78
10VTantalum
470uF+ C78
10VTantalum
470uF
12
C60
10nF
C60
10nF
C244
47nF
C244
47nF
C322
4.7nF
C322
4.7nF
C34
22nF
C34
22nF
C23
100uf
C23
100uf
C297
47nF
C297
47nF
C42
10nF
C42
10nF
C40
100uf
C40
100uf
STANDOFF4STANDOFF4
C335
180nF
C335
180nF
C38
4.7nF
C38
4.7nF
C46
47nF
C46
47nF
C54
47nF
C54
47nF
C328
47nF
C328
47nF
SCREW2SCREW2
C325
22nF
C325
22nF
C41
10nF
C41
10nF
C81
10uF
C81
10uF
C283
1uF
C283
1uF
C336
180nF
C336
180nF
C288
1uF
C288
1uF
C39
4.7nF
C39
4.7nF
C331
4.7nF
C331
4.7nF
C31
22nF
C31
22nF
STANDOFF2STANDOFF2
C32
4.7nF
C32
4.7nF
C45
100uf
C45
100uf
C290
47nF
C290
47nF
C332
22nF
C332
22nF
C73
100uf
C73
100uf
C63
22nF
C63
22nF
C269
1uF
C269
1uF
C85
100uf
C85
100uf
C286
1uF
C286
1uF
C323
4.7nF
C323
4.7nF
C84
100uf
C84
100uf
C275
22nF
C275
22nF
C47
22nF
C47
22nF
C318
47nF
C318
47nF
C48
22nF
C48
22nF
C30
47nF
C30
47nF
C58
10uF
C58
10uF
C75
100uf
C75
100uf
C330
22nF
C330
22nF
C25
100uf
C25
100uf
C59
22nF
C59
22nF
C326
180nF
C326
180nF
SCREW5SCREW5
C320
47nF
C320
47nF
SCREW1SCREW1
C342
10uF
C342
10uF
C21
220nF
C21
220nF
C83
100uf
C83
100uf
C72
100uf
C72
100uf