SemiconductorManufacturing

Process

10/11/2005

PhotolithographyOxidation

CVD PVD

Photolithography

The purpose of photolithography is to imprint the desired pattern of a micro component on a substrate, normally on silicon substrates.

Patterns in micro scale are produced from photo-reduction of the same pattern drawn in macro scale.

Typically, the photo-reduced patterns are imprinted on masks that are commonly made of dimensionally stable transparent substrates such as quartz.

The mask with micro patterns is then placed on the top of a silicon substrate, or a silicon dioxide over the silicon substrate, coated with a thin layer of photoresist.

Upon exposing the photoresist to special light beams through the mask, part of thephotoresist would dissolve in the subsequent development process.

The remaining part of the photoresist will bear the desired patterns for the microcomponent.

Photolithography needs to be performed in Class 10 or better clean rooms.

The process is illustrated in Fig. 8.1

Substrate

Substrate

Substrate

Photoresist

Mask

UV light orother sources

Positive resist:

Negative resist:

(a)

(b)

(c)

(a)

(b)

(c)

Processes:(a) Development(b) Etching(c)Resist removal

Illustration of a photolithography process

Photoresists and application

Positive photoresists: The photoresists that dissolve after exposed to light.PMMA is the most popular positive photoresist.

Negative photoresists: The photoresists that dissolve under shadow.Kodak KTFR is a popular negative photoresist.

Positive photoresists usually result in clear line definition:

(a) by negative resists (b) by positive resists

Application of photoresists:

Catch cup

Dispenser

Resistpuddle

Resist spray

Wafer

Vacuum chuck

Spinnermotor

To vacuum pump

To drain &exhaust

Wafer

Edgebead

Photoresist

Vacuumchuck

The chuck spins at 1500-8000 rpm for 10-60 seconds. Photoresist thickness is in 0.5-2 µm.Edge beds is a problem. They can be mitigated by controlling the spin speed of the chuck.

Light sources

Most photoresists are sensitive to light with wavelength in 300 - 500 nm.

Popular light source is mercury vapor lamps at 310 - 440 nm.

Deep UV light is used with wavelength at 350 - 500 nm.

In rare cases, such as in the LIGA process, x-ray at wavelength of 4 to 50 A is used.

Photoresist development

Substrates or wafers with photo-exposed negative photoresists are developed in thesame chuck that is used in the photoresist application, except that solvents, such as xylene are spray from the overhead nozzle.

Development for positive photoresists require stronger developer such as KOH or TMAH, which are common etchants in microfabrication processes.

Descumming process takes place following the development of photoresists. This process involve the application of mild oxygen plasma to remove the bulkof the photoresists.

The wafer or substrate is then baked at 120oC for 20 minutes to dry.

Oxidation

Oxidation in microelectronics and MEMS means to produce a thin layer of SiO2 at the surface of silicon substrates.

Oxide layers serve two principal purpose of providing thermal and electrical insulation at the desired locations.

Silicon Diaphragm

Pyrex GlassConstraining

Base

MetalCasing

Passage forPressurized

Medium

Silicon gel

Wire bondMetal film

Dielectric layer

Piezoresistor

DieAttach

Interconnect

Mask for insulator (SiO2)

Silicon dieSiO2 insulator

Piezoresistors

Thermal oxidation

Thermal oxidation involves creating oxide layer on top surface of silicon substrates by blowing dry oxygen gas, or steam at elevated temperature.

Chemical reactions for producing silicon dioxide in silicon substrates are:

Si(solid) + O2 (gas) →→→→ SiO2 (solid)

For dry oxidation:

For wet oxidation:

Si(solid) + 2H2O(steam) →→→→ SiO2 (solid) + 2H2 (gas)

Facility for thermal oxidation:

Resistance heater

Fused quartz cassetteWafers

Fused quartztubular furnace

O2 or H2O +carrier gas to vent

Controlledair chamber

Resistance heater

Chemical Vapor Deposition (CVD)

CVD is one of the most commonly used methods in depositing thin films onsilicon or other substrates.

Thin films build-up in MEMS is either necessary for required 3-dimensional geometry, or for accomplishing specific functions.

Thin films made of silicon compounds including SiO2 and metals such as Al, Ag, Au, Ti, W, Cu, Pt and Sn can be deposited on substrates using this method.CVD is also used to deposit unusual materials, e.g. SMA NiTi and piezoelectric materials such as ZnO for some MEMS devices.

Working principle of CVD

A selected reactant material is diffused in a carrier gas that flows over the hot substrate surface. The heat from the hot substrate surface prompt chemical reactions between the reactant and the carrier gas to form the desired thin film on the substrate surface.

Carrier gases include O2, NO, NO2, CO2 and H2.

Reactors for CVD

Reactant and gas in

By-productsand gas out

Substrate

Resistance heater

Susceptor

Reactantand gas in

To exhaust

Substrates

Resistanceheater

Horizontal reactors

Vertical reactors

Chemical reactions for common thin films by CVD

For SiO2: Reactant is silane, SiH4

SiH4 + O2 → SiO2 + 2H2 at 400 - 500oC

For Si3N4:

3SiH4 + 4NH3 →→→→ Si3N4 + 12H2 at 700-900oC

3SiCl4 + 4NH3 → Si3N4 + 12 HCl at 850oC

3SiH2Cl2 + 4NH3 → Si3N4 + 6HCl + 6H2 at 650 - 750oC

For Polysilicon, Si by pyrolysis:

SiH4 → Si + 2H2 at 600 - 650oC

x

x Hot silicon substrate

Reactant and gas flow

xx

y

V(x)

δδδδ(x)G

s

Reactant and gas flow

Boundary layer

Hot silicon surface

Rate of CVD

CVD is a common way to produce thin films over substrates. The rate of productionis of a prime concern to process and design engineers.

Since CVD processes involve carrier gas flow over the substrate’s surface, the issueof “fluid/solid interface” must be dealt with in assessing the effectiveness of CVD.

Whenever a fluid flowing over a solid surface, a “boundary layer” is created:

The boundary layer acts as a barrier to transfer of heat or transport of medium.

In the case of CVD, the boundary layer plays a significant role in the rate of deposition.

The thickness of the boundary layer over the substrate surface at a distance x from the leading edge can be evaluated by:

)Re()(

xx

x =δ Re(x) = Reynolds number at x

Rate of CVD - Cont’d

It is apparent that the carrier gas and the reactant have to diffuse through the boundary layer in order to reach the substrate surface.

The diffusion flux of the reactant, Nρ

can be obtained by the expanded version of the Fick’s law:

( )NND

N sG −=δ

ρ

where D = diffusivity of the reactant in the carrier gas (cm2/s)NG = Concentration of reactant at the top of the boundary layer (molecules/m3)Ns = concentration of reactant at the surface of the substrate (molecules/m3)

Example 8.4 on the determination of NG and Ns (P.291)

For most cases in CVD process, the carrier gas flows over the substrate surface atvery low velocity, with Re < 100, this makes the diffusion of reactant through the boundary layer affected by the chemical reactions in the boundary layer and on thesubstrate surface. Consequently, the diffusion flux, N

ρin the above expression to be

modified as:

kDkND

Ns

sG

δ+=

ϖ

where ks = surface reaction rate constant of the reactant on substrate surface.

Rate of CVD - Cont’d

The rate of thin film growth over the substrate surface can be obtained by the following expressions:

γδND

r G=A. For Dk s ≥δ :

B. For ksδ << D :γ

kNr sG=

in which = number of atoms (or molecules) per unit volume of the thin film.γ

We may use the following expression for estimating the value of :γ

a3

34

1

πγ =

where a = radius of atoms or molecules of the thin film on the substrate surface.

Example 8.5 on the estimation of the rate of SiO2 thin film growth on siliconsubstrate using CVD.

Enhanced CVD

The rate of CVD is affected by the following parameters:

• The temperature, T3/2

• The pressure, P-1

• The velocity of carrier gas, V-1

• The distance in the direction of gas flow, x1/2

Of the above parameters, better performance of CVD can be achieved by either increasing the temperature and distance of gas flow, or by reducingthe pressure and gas velocity.

Increase temperature may result in adverse effect on the substrates due to incompatible CTE of the deposited thin films and that of the substrates. Reducing the gas velocity would result in non-uniformity of the deposition.

A viable option on CVD enhancement is thus left to the reduction of pressure.

Enhanced CVD- Cont’d

Low-pressure CVD (LPCDV)

LPCVD is a very popular CVD. It operates in vacuum at about 1 torr (1 mm of Hg).The reactor used for LPCVD is similar to that for APCVD (atmospheric pressure CVD)except the chamber is made leak-proof.

LPCVD offers better quality thin film deposition with more uniform thickness than those by APCVD.

Plasma-enhanced CVD (PECVD)

Unlike APCVD and LPCVD, PECVD can operate at relatively lower temperature, as the required energy for CVD is provided by RF plasma withRF at 3 KHz to 300 GHz. Lower operatingtemperature means less possibility ofdamaging the deposited thin films and thesubstrate.

PECVD usually operates at high vacuum forfast growth of thin films. Reactant

and gas in

Out to vacuum pump

Substrates

Resistanceheater

Electrode

Rotating susceptor

RF source

Heating elements

Comparison of various CVD processes

CVDProcess

Pressure/Temperature

NormalDeposition

Rates,(10-10

m/min)

Advantages Disadvantages Applications

APCVD 100-10 KPa/350-400oC

700 for SiO2 Simple, highrate, lowtemperature

Poor stepcoverage,particlecontamination

Doped andundoped oxides

LPCVD 1-8 Torr/550-900oC

50-180 forSiO2

30-80 forSi3N4

100-200 forpolysilicon

Excellentpurity anduniformity,large wafercapacity

Hightemperature andlow depositionrates

Doped andundopedoxides, siliconnitride,polysilicon, andtungsten.

PECVD 0.2-5 Torr/300-400oC

300-350 forSi3N4

Lowersubstratetemperature;fast, goodadhesion.

Vulnerable tochemicalcontamination

Low-temperatureinsulators overmetals, andpassivation.

Physical Vapor Deposition - Sputtering

Unlike CVD, which operates at elevated temperature, the PVD (physical vapor deposition) operates at room temperature.

PVD is used to deposit thin metal films in the order of 100 Aο

(= 10 -8 m)

These metal films are often used as the pads for soldering electrical wires asshown below:

Metal wire bond Metal layer

PiezoresistorsInsulation layer

Silicon diaphragm

Constraint Base

Pressurized mediumDie bond:Adhesive

Wire bondMetal layers

Insulation surface

Diffused piezoresistorMetalleads

PVD operates in similar principle as PECVD, in which the metal vapor is deposited on the substrate surface using carrier gas such as Argon gas. High vacuum in the order of 5x10-7 torr is involved.

Etching

Etching is one of the most important microfabrication processes for MEMSand microsystems production.

In opposite to vapor deposition, etching involves removing material from substrates-thereby creates 3-dimensional geometry.

There are generally two types of etching technologies available:

(1) Chemical etching (or wet etching):

Use chemical to dissolve the parts of material to be removed from the substrateThere are: (a) isotropic etching, and (b) anisotropic etching.

(2) Plasma etching (or dry etching):

Use plasma containing high energy charge-carrying ions to “knock off” moleculesin the part of the substrate.

More detail description of etching will be given in Bulk Micromanufacturing.

SUMMARY

1. All microfabrication techniques are by physical-chemical means, which is radically different from traditional mechanical fabrication techniques.

2. Most of these techniques are imported from those used in microelectronics.3. Photolithography is most critical in producing MEMS. It is the only way to

establish patterns in micrometer scale on substrates. 4. Principal fabrication technique include:

• Ion implantation for doping piezoresistors at room temperature.• Diffusion for more uniform doping but at elevated temperature.• Oxidation for introducing thermal or electric insulation in substrates by either

a wet or dry process. Both processes operate at elevated temperature. • Chemical vapor deposition (CVD) deposit thin films of various materials

on substrate surface, or on other thin films. APCVD at lower temperature but poor quality; LPCVD operates at high temperature and vacuum with good quality; PECVD operates at low temperature and high vacuum withgood quality.

• Sputtering, or physical vapor deposition (PVD) deposits metallic thin films on substrate.

• Epitaxy deposition deposits thin films of same substrate materials.• Etching removes materials from substrates at desirable locations. There are

wet and dry etching processes available.

Etching

Isotropic etching

Isotropic wet etching or Isotropic plasma etching means the chemistry (etchant or plasma gas) etches the substrates with total disregard for their crystal planes.

It etches in all directions at the same rate.

Isotropic etchants are available for oxide, nitride, aluminum, polysilicon, gold andsilicon. Hydrofluoric acid (HF) is the most commonly used chemistry for silicon.

Isotropic etching is not desirable in micromanufacturing because lack of controlof the geometry of the finished product.

(a) Substrate in wet etching (b) Partially etched substrate

EtchantsProtective

Resist

Substrate

Etchants

Etched Substrate

Anisotropic etching

Silicon crystals are not isotropic in nature. Some planes are stronger and more resistant to etching chemicals than others.

There are three planes in silicon crystal on which etching take place:

x

y

z

(100) plane (110) plane (111) plane

The (100) plane is easiest to be etched,The (110) plane results in most clear etched surface,The (111) plane is toughest plane to be etched.

The uneven resistance to etching chemicals by various planes in the silicon crystal result in different amount of materials that can be etched away using the same etching chemical for the same duration, as can be seen in the etching of a micro pressure sensor diaphragm.

Anisotropic etching-cont’d

One may prove that the (111) plane in a silicon crystal-the toughest plane to etching makes an off-normal angle of 54.74o angle with the (100) plane-the plane that is easiest to be etched.

The complementary angle to the (110) plane is 35.26o.

If etching is taken place on the (100) plane, I.e. in the normal direction of <100>, then we can expect having a cavity in the shape as follows:

(100) Plane

54.74o

Etchedcavity(100) plane

<100> orientation

Unetched wafer:

Wafer etched in the <100> direction

Etchants

Etchants are the chemicals that dissolve or remove materials from substrates.

Etchants in wet etching are chemicals in solvents, whereas etchants used in dry etching are plasmas that contains charge-carrying ions.

Wet etchants for silicon substrates

For isotropic etching: HNA (acidic agents, e.g. HF/HNO3/CH3COOH) at room temperature.

For anisotropic etching: Alkaline chemicals with PH > 12. Popular etchants:Potassium hydroxide (KOH)Ethylene-diamine and pyrocatecol (EDP)Tetramethyl ammonium hydroxide (TMAH)

Most wet etchants are diluted with water, normally 1:1 by weight.

Typical etching rates for silicon and silicon compounds

Materials Etchants Etch RatesSilicon in <100>Silicon in <100>

KOHEDP

0.25 –1.4 µm/min0.75 µm/min

Silicon dioxideSilicon dioxide

KOHEDP

40 – 80 nm/hr12 nm/hr

Silicon nitrideSilicon nitride

KOHEDP

5 nm/hr6 nm/hr

Selectivity ratio of etchants to silicon substrates

The selectivity ratio of etchants is defined as the ratio of etching rate of silicon to the etching rate of another material using the same etchant.

It is of great importance to the process design engineers in selecting the suitable material for the mask used in the etching process.

Selectivity ratio of etchants to two silicon substrates is given below:

Substrates Etchants Selectivity RatiosSilicon dioxide KOH

TMAHEDP

103

103 – 104

103 -104

Silicon nitride KOHTMAHEDP

104

103 – 104

104

• We notice that the selectivity of SiO2 has selectivity ratio of > 103 that means that SiO2 has more than 1000 time slower etching rate than that in the siliconsubstrate.

• This feature makes SiO2 as less expensive but an attractive candidate material for using as an etching mask.

• Si3N4 would have been a better choice for mask material, but it is more costlyto produce than SiO2.

Inadequate selection of mask material:

The following undesirable situations may occur in etching with the use of improper mask materials:

(a) Ideal etching (b) Under-etching (c) Under cutting

Etchants

SiO2 or Si3N4 mask

Silicon substrate

Etchants

SiO2 or Si3N4 mask

Silicon substrate

Etchants

SiO2 or Si3N4 mask

Silicon substrate

In general SiO2 is used as a masking material with KOH etchant for relativelyshallow trenches.

Si3N4 is used for etching processes for deep trenches, in which long periods in etching is a common practice.

Etch stop - a control of wet etching

There are two ways the engineer can stop wet etching in silicon substrates:

Dopant-controlled etch stop:

In general, doped silicon can dissolve in etchants faster than the undoped silicon.Thus, one may dope the parts of the silicon substrate that need to be etched away faster than the other parts of the substrate.

Electrochemical etch stop:

Since doping in silicon may alter the etching rates in wet chemicals, we may use the p-n borders to slow down or stop etching, as illustrated in the following set-up:

V

Constantvoltage supply

Current adjustment

Inert substratecontainer

n-typesilicon p-type

silicon

SiO2 or Si3N4Masking

��������

Counter electrode

The electric current is used to prompt the functioning of thep-n junction. The difference in electric resistance in the p- andn-silicon produces the differentetching rates for the control ofthe etching in the doped substrate.

Dry etching of silicon substrates

Dry etching involves the removal of substrate materials by gaseous etchantswithout wet chemicals or rising.

There are generally 3 dry etching techniques:(1) Plasma. (2) Ion milling. (3) Reactive ion etch.

Common practice, however, involves Plasma and Reactive ion etch.

Relatively recent develop has been in the Deep Reactive Ion Etching, or DRIE.

• Dry etching of silicon substrates typically is faster and cleaner than wet etching.A typical dry etching rate is 5 µm/min, which is about 5 times faster than that bywet etching.

• However, dry etching requires more costly equipment.

• On the other hand, it is the only way to produce deep trenches with near-vertical side walls using the DRIE process, which is critical for many MEMS andmicrosystems components.

Plasma Etching

Plasma is a neutral ionized gas carrying a large number of free negativelycharged electrons and positively charged ions.

Radio frequency (RF) is a common energy source for the production of plasma.

To etch silicon or silicon-compound substrates, one needs to addchemically reactive gas, e.g. CCL2F2 to the plasma.

The added reactive gas produces reactive neutrals when it is ionized in the plasma.

Both the reactive neutrals and the ions in the plasma carry high kinetic energies.

They attack the substrate materials by bombarding the surfaces of the substrate as illustrated in the next slide.

+ + +N N

N N

ions Reactive neutrals

Plasma withions and reactive neutrals

Etched substrate

Mask

+ N

+ N

RF Source

Plasma etching process:

The neutrals (N) produced by ionization of the reactive gas chemical in the plasma attack the substrate in all directions, with simultaneous chemical reactions with the contacted substrate material.

The ions (+) in the plasma itself attack the substrate only in the normal direction.Etching of the substrate material is accomplished by instant local evaporation ofsubstrate material after high energy impingement of (N)-neutrals and (+) ions.

Plasma etching rate is in the order of 2 µµµµm/min.

Common reactant gas chemical for plasma etching:

Materials ConventionalChemicals

NewChemicals

Silicon and Silicon dioxide,SiO2

CCl2F2

CF4

C2F6C3F8

CCl2F2

CHF2/CF4

CHF3/O2CH2CHF2

Silicon nitride, Si3N4 CCl2F2

CHF3

CF4/O2

CF4/H2

CHF3

CH3CHF2

Polysilicon Cl2 or BCl3/CCl4 /CF4

/CHCl3 /CHF3

SiCl4/Cl2BCl2/Cl2

HBr/Cl2/O2

HBr/O2

Br2/SF6

SF6

CF4

Gallium Arsenate CCl2F2 SiCl4/SF6

/HF3

/CF4

Rate and quality of plasma etching

Deep reactive ion etching (DRIE) for silicon substrates

Many MEMS components, such as resonators and micro accelerometers requireetching trenches in the silicon substrates with sufficient depth (H) and vertical side walls, i.e. θθθθ ≈≈≈≈ 0 in the figure below to the right.

θθθθ

Etched cavity

Substrate

Depth, H

These trenches are of typically high aspect ratio (The ratio of the dimension in the thickness (H) to those of the surface).

Wet etching and conventional dry etching could not accomplish deep etching with vertical walls.

DRIE is the only etching technique that is capable of producing trenches with aspect ratio up to 300 and a near vertical walls at θθθθ = 2o.

MEMS of high aspect ratio using DRIE

A micro spring

Working principle of DRIE

DRIE works on a similar principle as the plasma etching. A major difference, however,is that DRIE involves the production of thin protective polymer films on the side wallsduring the etching process. These thin protective films prevent etching of the sidewalls. As result etching can only take place in the normal (the depth) direction in the trench.

The DRIE process is illustrated below:

+ + +N N

N N

ions Reactive neutrals

Plasma withions and reactive neutrals

DRIE etched substrate

Mask

+ N

+ N

NN

Thin protectivepolymer films

DRIE - cont’d

The reactants that can produce thin protective polymer films is fluoropolymers (nCF2) in the plasma Argon gas ions.

The rate of DRIE is in the range of 2 - 3 µm/min.

Examples of high aspect ratio of trenches produced by DRIE are:

Sidewall protection materials Selectivity ratio Aspect ratio, A/PPolymer 30:1Photoresists 50:1 100:1Silicon dioxide 120:1 200:1

Depth of trenches at 300 µm with vertical walls at 2o were produced in silicon substrates.

Comparison of wet versus dry etching

Parameters Dry etching Wet etchingDirectionality

Production-automation

Environmental impact

Masking film adherence

Selectivity

Materials to be etched

Process scale up

Cleanliness

Critical dimensionalcontrol

Equipment cost

Typical etch rate

Operational parameters

Control of etch rate

Good for most materials

Good

Low

Not as critical

Poor

Only certain materials

Difficult

Conditionally clean

Very good (< 0.1 µm)

Expensive

Slow (0.1 µm/min) to fast (6µm/min)

Many

Good in case of slow etch

Only with single crystalmaterials (aspect ratio up to100)

Poor

High

Very critical

Very good

All

Easy

Good to very good

Poor

Less expensive

Fast ( 1 µm/min and up)

Few

Difficult