SCT Readiness for Heavy Ion Collisions Dave Robinson on behalf of SCT 15/9/101Dave Robinson Heavy...

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SCT Readiness for Heavy Ion Collisions Dave Robinson on behalf of SCT 15/9/10 1 Dave Robinson Heavy Ion Review

Transcript of SCT Readiness for Heavy Ion Collisions Dave Robinson on behalf of SCT 15/9/101Dave Robinson Heavy...

Page 1: SCT Readiness for Heavy Ion Collisions Dave Robinson on behalf of SCT 15/9/101Dave Robinson Heavy Ion Review.

Dave Robinson Heavy Ion Review 1

SCT Readiness for Heavy Ion Collisions

Dave Robinsonon behalf of SCT

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Dave Robinson Heavy Ion Review 2

SCT HI Operation : Homework Questions

1. Number of Samples = 3 ( in pp operation = 3)2. Specific dead time requirements = (see below)3. Setting different from pp operation = NONE4. Modified Voltages = NONE5. Enhanced Risk = NONE (protected by BLM)6. Read Out limitations (see below)7. Specific Calibration Requirements = NONE8. If your system provides a trigger ..... (We Don’t)

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Bottlenecks in SCT DAQ

• ABCD (front-end ASIC) buffer– 8 events deep, read out at 40MHz

• One ABCD hit is 17 bits• header and trailer 19 and 16 bits respectively• Event size = 19 + N*17 + 16 bits

• ROD input decoder & FIFO– 512 events deep

• S-Link Readout– 40MHz x 32bit

• One ABCD hit in BS is (reduced to) 16 bits• 16bit header per link• ROD header is 9x32bit words, trailer is 5x32bit words15/9/10

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Implications for Event Size and Data Throughput

Occupancy (%) Rate Limit (kHz) Complex DT Event Size/ROD(kB)

ABCD S-Link

0 754 2000 8/53 0.056

1 233 89 8/170 2

10 28 10 8/1395 15.6

20 14.5 5.2 8/2755 31Other Considerations:

• Simple dead-time = 3 (L1A is 3 clocks) + 1 contingency

• ROS event size limit is (currently configured to be) 65kB Event truncation above ~46% occupancy

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Verification of Limits

• Ran >100kHz with noise only (~10-5 occupancy)• Can artificially increase occupancy– By running with ROD simulator

Confirmed limit of ~10% occupancy at 10kHzRan at 80kHz with 0.1% occupancy (not limited by SCT)• Does not exercise chips, so independent of complex DT

– By reducing HV– By reducing threshold

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Summary

• SCT DAQ bottlenecks are known and have been verified in high rate tests within ATLAS partitionand at SR1

• SCT standard operational run settings can comfortably cope with 10% occupancy levels for trigger rates below 10kHz

SCT is ready for heavy ion collisions using nominal (standard) run settings

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Backup – Rate Calculations

• Eg, 1% occupancy– ABCD: 19 + 17*8 + 16 = 171 bits

• Max sustainable rate = 754 kHz• ERROR if get 8 triggers within next 4.3ms (while first is read out)• Time to read put = 171 clocks• -> Complex dead-time 8/171

– ROD (one link) • 1 header + 8 16bit words = 9x16bit words = 5x32bit words

– ROD (all links): • 9x2x48 16 bit words = 432 32-bit words + 14header/trailer 32bit

words = 446 32bit words• Max sustainable rate = 40MHz/446 = 89kHz

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