Physics Investigatory Projects

8/13/2019 Physics Investigatory Projects

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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

ELECTRONIC DEVICES & CIRCUITS LAB 1

1. COMMON EMITTER TRANSISTOR

CHARACTERISTICS

Aim:

1.To plot the input and output static characteristics.2. To calculate the input dynamic resistance from the input characteristics

and output dynamic resistance and current gain from the output

characteristics of the given transistor.

Apparatus Required:

S.NoName of the

Equipment/ComponentSpecifications Quantity

1 Transistor (BC 107)Icmax=100mAPD=300mwVceo=45VVbeo=50V

1

2 Resistors-39K,1KPower rating=0.5wCarbon type

1

3 Regulated Power Supply 0-30V,1A 1

4 Volt meters 0-1V, 0-10V 1

5 Ammeters 0-300A, 0-10mA 1

Theory:

In common emitter configuration the emitter is common to both input and output.

For normal operation the Base-Emitter junction is forward biased and base-

collector junction is reveres biased .The input characteristics are plotted between

IBand VBEkeeping the voltage VCEconstant. This characteristic is very similar to

that of a forward biased diode. The input dynamic resistance is calculated using

the formula

ri = VBE/ IB at constant VCE

The output characteristics are plotted between IC and VCE keeping IB constant.

These curves are almost horizontal. The output dynamic resistance is given by,

ro = VCE/ IC at constant IB

At a given operating point, we define DC and AC current gains (beta) as follows

DC current gain dc = IC/ IB at constant VCE


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AC current gain ac = IC/ IB at constant VCE.

Circuit diagram:

Fig A: Transistor Common Emitter Configuration

Procedure:

a) Input Characteristics:

1. Connect the circuit as shown in fig A.

2. Keep the voltage VCEas constant at 2V by varying VCC.

3. Vary the input voltage, VBBin steps of 1V up to 10V

4. Measure the voltage, VBEfrom voltmeter and current, IBthrough the

ammeter for different values of input voltages

5. Repeat the step 3 and 4 for VCE values of 5V and 10V

6. Draw input static characteristics for tabulated values

7. At suitable operating point, calculate input dynamic resistance.

b) Output Characteristics:

1. Fix input base current, IBat constant value say at 10A.

2. Vary the output voltage, VCCin steps of 1V from 0V up to10V.

3. Measure the voltage, VCEfrom voltmeter and current ICthrough the

ammeter for different values.

4. Repeat above steps 2and 3 for various values of IB=20A and 30A.

5. Draw output static characteristics for tabulated values


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Model graphs:

Fig B: Input Characteristics Fig C: Output Characteristics

Calculations:a) Input Characteristics:

Input Resistance, ri = VBE/ IB at VCEconstant

= (0.654-0.647) / (90-30) X 10-6

= 116.

b) Output Characteristics:

Output dynamic resistance, ro= VCE/ IC at IBconstant

= (0.9-0.15) / (9.25-7.2) X10-3

= 365.85.

Current gain, = IC/ IB at VCEconstant

= (8.8-6.8)10-3/10X10-6

= 200

Precautions:

1. Connections must be done very carefully.

2. Readings should be noted without parallax error.

3. The applied voltage, current should not exceed the maximum rating of the

given transistor.

Result:

Input and output characteristics are observed for the given transistor in

common emitter configuration. The input resistance, output resistance and the

current gain are calculated.


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Inference:

It is observed from the input characteristics that as VCE increases, the curves are

shifted towards right side. This is due to the Early effect.

Questions & Answers:1. List various operating regions of Transistor

A. Active region, cut-off region, and saturation region.

2. List various biasing circuits

A. Fixed bias, collector to base bias, and self bias.

3. Give Transistor current equation in CE configuration

A. IC =IB+ (1+) ICEO.


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2. FULL WAVE RECTIFIER

Aim:

To observe the working of full wave rectifier with and without filter & calculate its

ripple factor

Apparatus Required:

S. No Name of the Equipment/

Component

Specifications Quantity

1. Diode(1N4001) VR (max)=1000V

IR(max)=50mA

1

2. Resistor(1K) Power rating=0.5WCarbon type

1

3. Transformer 6-0-6V,500mA 1

4. Capacitor(1000F/25V) Electrolytic type,Voltage rating= 1.6v

1

5. Cathode Ray Oscilloscope 20MHz 1

6. Digital Multi meter 4 digit 1

Theory :

In the full wave rectifier circuit the transformer has a center-tap in its secondarywinding. It provides out of phase voltages to the two diodes. During the positive half

cycle the input, the diode D2is reverse biased it does not conduct. But diode D 1is in

forward bias and it conducts. The current flowing through D1 is also passes through

the load resistor, and a voltage is developed across it. During negative half cycle

diode D2 is forward biased and diode D1 is reverse biased. Now the current flows

through diode D2and load resistor. The current flowing thought the load resistor RL

passes in the both half cycles. The DC voltage obtained at the output is given by Vdc

= 2Vm / . Where Vm is peak AC voltage between center-tap point and one of the

diodes. It can be proved that the ripple factor of a full- wave rectifier is 0.482.The

output of the full-wave rectifier contains an appreciable amount of AC voltage in

addition to DC voltage. But, the required output is pure DC with out any AC voltage in

it. The AC variation can be filtered by a shunt capacitor filter connected in shunt with

the load. The capacitor offers low impedance path to the AC components of current.

Most of the AC current passes through the shunt capacitor. All the DC current passes


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through the load resistor. The capacitor tries to maintain the output voltage constant

at Vm.

Circuit Diagrams:

Fig A: Full wave Rectifier without Filter

Fig B: Full wave Rectifier with Filter

Procedure :

1. Connect the circuit as shown in Fig A.

2. Apply the supply voltage 230V, 50Hz at the primary winding of the

transformer.

3. Connect the CRO at the secondary winding of the transformer and measure

the maximum voltage (Vm) and time period (T) at the input. Calculate the RMS

input voltage using Vrms=Vm/2.

4. Now connect the multimeter at the secondary and measure the rms voltage of

the input signal. The rms voltage measured by both CRO and multimeter

must be same.


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5. Now connect the CRO across the load resistor and measure the maximum

voltage, Vmand time period, T of the output voltage. Calculate the rms and

average (dc) values of the output signal using

V rms= Vm/ 2 and Vdc=Vavg= 2Vm/ .

6. Measure the AC and DC voltages across the load resistor using multimeter

and calculate the ripple factor as r = Vac/ Vdc

7. While finding ripple factor using CRO, use r =[ [(Vrms/ Vdc )2 1]]1/2

8. Compare the measured ripple factor value with theoretical value.

9. Now close the switch s to connect the capacitor filter across the load

resistor, RL then connect the CRO at output terminals and measure the both

ripple AC voltage and DC voltages. Calculate the ripple factor. Also measure

the time period T of ripple AC voltage.

10. Tabulate the values with filter and without filter.

Observations :

Fig C : Input Waveform

Fig D: Output Wave Form Without Filter


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Fig E: Output Wave form with filter

Tabular form:

With Out Filter With FilterFull-Wave

Rectifier CRO Multimeter CRO Multimeter

Vrms (V) 6.36 6.38 0.34 0.32Vdc (V) 5.72 13.29 10 9.1

Ripple Factor, r 0.4808 0.4808 0.034 0.035

Precautions :

1. Connections must be given very carefully.

2. Readings should be taken with out any parallax error.

3. The applied voltage and current should not exceed the maximum ratings of

the diode.Result:

Input and output waveform with and without filter of a full wave rectifiers are

observed. The ripple factor with and with out f ilter are calculated.

Inference:

The ripple factor of Full wave rectifier with filter is less compared to that with out filter.

Questions & Answers:

1.What are the limitations of half wave rectifier

A. Poor efficiency, less ripple factor

2. Give theoretical values for ripple factor and efficiency of center tapped

full wave rectifier.

A. r=0.48,=81.2%


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3. SCR CHARACTERISTICS

Aim:

a) To obtain the forward characteristics of SCR.b) To identify the break over voltage at different gate voltages.

Apparatus Required:

S. NoName of the

Equipment/ComponentSpecifications Quantity

1 SCR(TYN 604)

IH (max.)=4A

P (max.)=10W

VH (max.)=5V

1

2 Variable resistor 0-10K 1

3 Resistor - 1K Power rating=0.5wCarbon type

1


5 Ammeters 0-50mA 2

6 Digital multimeter 4 digit 1

Theory:

SCR acts as a switch when it is forward bias. When the gate is kept open IG= 0 andthe operation of SCR is similar to PNPN diode. When IG< 0 the break over voltage

required to allow the current through SCR is large. When IG> 0 less amount of break

over voltage is sufficient. With very large positive gate currents break over may occur

at a very low voltage such that the characteristic of SCR is similar to ordinary PN

diode. As the voltage at which SCR is switched ON can be controlled by varying gate

current. Once the SCR is turned ON, the gate losses control and cannot be used to

switch the device OFF. One way to turn the device OFF is by lowering the anode

current below the holding current by reducing the supply voltage below the holding

voltage, keeping the gate open. At this point even if the gate signal is removed the

device keeps ON conducting, till the current level is maintained to a minimum level of

holding current.


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Circuit Diagram:

Fig A: SCR Characteristics

Procedure:


2. Initially some gate current is applied by varying the V2.

3. Voltage V1is slowly varied and different reading of ammeter (IA) and voltmeter

(VAK) are taken.

4. The voltage at which the SCR is triggered and heavy current flows is noted as

VBO, forward breakdown voltage.5. Now apply the gate current more than IG.

6. Steps 3 & 4 are repeated and note down corresponding currents and voltages.

7. Draw the graph between VAKand IAat different gate currents.


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Tabular form:

IG1 = 3mA IG > IG1

S. No

Applied

Voltage,V1

(V)VAK (V) IA(mA) VAK (V) IA (mA)

1 0 0 0 0 0

2 1 1 1 1 1

3 2 2 1 2 1

4 3 3 1 3 1

5 4 4 1 4 1

6 5 5 1 1 4

7 6 6 1 1 6

8 7 1 6 1 8

9 8 1 12 1 10

10 9 1 14 1 14

11 10 1 16 1 16

12 11 1 20 1 18

13 12 1 22 1 20

14 13 1 24 1 22

Model Graph:


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Result:

The VI-characteristics of SCR are observed and Break over Voltage at different gate

currents is noted.

Inference:

It is observed that as applied gate current increases, the forward break over voltage

reduces & the device conducts early.

Questions:

1. What are the advantages of Thyristor Family?

A. Low power dissipation

2. Define the following terms

a) Holding current

b) Forward break over voltage

A. The minimum current at which SCR turns from OFF state to ON state is called

holding current.

The maximum forward voltage at which the current through SCR increases and

voltage across SCR drops is called forward break over voltage.

3. What are the different operating regions of SCR?

A. Forward breakdown region, Reverse breakdown region, and Forward conductionregion.

4. List the applications of SCR?

A. High power applications, switching applications, and controlled device.


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4. RC COUPLED AMPLIFIER

Aim:

To plot the frequency response characteristics of two stages RC coupled

amplifier.

Apparatus Required:

S. No Name Of The

Component/ Equipment

Specifications Quantity.

1 Two stage RC coupled

amplifier circuit board

____ 1

2 Cathode Ray Oscilloscope 20 MHz 1

3 Signal Generator 0 -1MHZ 1


Theory:

To improve gain characteristics of an amplifier, two stages of CE amplifier can be

cascaded. While cascading, the output of one stage is connected to the input of

another stage. If R and C elements are used for coupling, that circuit is named as RC

coupled amplifier.

Each stage of the cascade amplifier should be biased at its designed level. It is

possible to design amultistage cascade in which each stage is separately biased

and coupled to the adjacent stage using blocking or coupling capacitors. In this circuit

each of the two capacitors c1 & c2isolate the separate bias network by acting as open

circuits to dc and allow only signals of sufficient high frequency to pass through

cascade.


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Circuit Diagram:

Fig A: Two stage RC Coupled Amplifier

Procedure:

1. Connect the circuit as per the circuit diagram.

2. Apply supply voltage, Vcc= 12V.

3. Now feed an ac signal of 20mV peak-peak at the input of the amplifier

with different frequencies ranging from 20Hz to 1MHz and measure

the amplifier output voltage, Vo.

4. Now calculate the gain in dB for various input signal frequencies using

AV= 20 log10(V0/VS).

5. Draw a graph with frequencies on X- axis and gain in dB on Y- axis.

From graph calculate bandwidth.


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Tabular Form:

Input voltage, VS= 20mV peak-peak

S. No

Input Frequency

(Hz)

Output

Voltage

peak-peak

Vo (mV)

Gain,

Av = 20log(Vo/Vs)

(dB)

1 50 22 0.82

2 100 25.5 02.11

3 200 58 09.24

4 500 152 17.61

5 1K 330 24.34

6 5K 8500 52.567 10K 8500 52.56

8 20K 8500 52.56

9 50K 8500 52.5610 100K 8500 52.56

11 200K 8500 52.56

12 300K 8500 52.56

13 500K 8500 52.56

14 700K 4000 46.02

15 1M 900 33.06

Model Graph:


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Observations:

Maximum gain (Av) = 52.56dB

Lower cutoff frequency (Fl) = 4.5 KHz

Upper cutoff frequency (FH) =580 KHz

Band width (B.W) = (FH FL) = 575.5 KHz

Gain bandwidth product = Av(B.W) = 30.24M Hz

Precautions:

1. Connections must be done very carefully.

2. Readings should be noted without any parallax error.

3. The applied voltage and current should not exceed the maximum ratings of

the given transistor.

Result:

Frequency response of RC Coupled Amplifier Characteristics of was observed.

Inference:

The bandwidth of RC coupled amplifier is large compared to CE amplifier.


1. List different coupling methods

A. a) Direct coupled b) Transformer coupled c) RC coupled

2. Define lower cut-off and upper cut-off frequencies

A. Lower cutoff frequency is defined as the frequency at which magnitude of voltage

gain in low frequency range falls to 1/2 or 0.707 of magnitude of gain in mid

frequency range.

Upper cutoff frequency is defined as the frequency at which magnitude of voltage

gain in high frequency range falls to 1/2 or 0.707 of magnitude of gain in mid

frequency range.

3. Define Band width

A. Bandwidth is defined as difference between upper & lower cutoff frequencies.


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5. VOLTAGE SERIES FEED BACK AMPLIFIER

Aim:To find the gain of the Voltage Series feed back amplifier with &

without feedback.

Apparatus Required:

Theory:

The other name of voltage series feedback amplifier is shunt derived series fed

feedback amplifier. The fraction of output voltage is applied in series with input

voltage through feedback circuit. Feedback circuit shunt the output but in series with

input. So the output impedance is decreased while input impedance is increased.

The input & output impedance of an ideal voltage series feedback amplifier is infinite

& zero respectively. The resistor RE& capacitor CE are used to provide necessarybiasing for the amplifier with voltage series feed back gain of the amplifier decreases.

S. No Name of the

Component/Equipment


1 Transistor( BC 107) Icmax=100mA

PD=300mwVceo=45VVbeo=50V

2

2 Resistors(100K,47K,

68K,10K,4.7K)

Power rating=0.5wCarbon type

1

2

5

3 Capacitors(0.1F,100F) Electrolytic type,Voltage rating= 1.6v

4

1

4 Function generator 0 -1MHZ 1



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Circuit Diagram:

Fig A: Voltage Series Feed Back Amplifier

Procedure:

1. Make sure that the switch S is opened.

2. Apply a sine wave of 40mv peak to peak amplitude at 1 kHz from signal

generator to the input of amplifier circuit.

3. Measure the output amplitude VO (p-p) and Calculate the gain of amplifier

without feedback by using A =VO/VS.

4. Provide the voltage series feed back by closing the switch S and repeat steps

2 and 3 to find the gain with feed back AF = VO/ VS.

5. Calculate the feedback factor using AF = A / 1+A.

6. Calculate theoretically value from = RE/ (RE +R).


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Frequency Response:

Input ac voltage VS = 40 mV peak-peak

Output Voltage V0(V)Gain =20 log10(VO/ VS)

(dB)Frequency

(Hz) With out

Feedback

With

Feedback

With out

Feedback

With

Feedback

1K 0.48 0.32 12 8

Model Graph:


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Precautions:

1. Connections must be given very carefully.



given transistor.

Result:

The theoretical and practical values of Gain with and without feed back and the

Factor () of voltage series feedback amplifier are determined.

Inference:

It is observed that the gain of the amplifier reduces with feed back and the band

width increases by the same amount.


1. Why Feed back used in amplifiers?

A. To improve the amplifier characteristics with required manner.

2. List various advantages of negative feedback

A. a) stabilizes the gain.

b) Increases bandwidth, input impedance.

c) Reduces output impedance, noise & distortions.


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6. CURRENT SERIES FEED BACK AMPLIFIER

Aim:

To find the gain of the Current Series feed back amplifier with & without

feedback.

Apparatus Required:

Theory:

In Current series feedback amplifier, a feedback voltage is developed which is

proportional to the output current. This is called current feedback even though it is a

voltage that subtracts from the input voltage. One of the most common methods of

applying the current series feedback is to place RE between the emitter lead of a

common emitter amplifier and ground. When RE is properly bypassed with a large

capacitor CE , the output voltage is V0 and the voltage gain without feedback is A.

Resistor REprovides d.c bias stabilization, but no AC feedback. When the capacitor

CC is removed, an a.c voltage will be developed across RE due to the emitter current

flowing through it and this current is approximately equal to output collector current.This voltage drop across REwill serve to decrease the input voltage between base

and emitter, so that the output voltage will decrease to V0I. The gain of amplifier with

negative feedback is now AF. With current series feed back both input and output

resistances increases.

S. No Name of the

Component/ Equipment


1 Transistor( BC 107) Icmax=100mAPD=300mwVceo=45VVbeo=50V

1

2 Resistor(470,4.7k,10K) Power rating=0.5WCarbon type 12

3 Capacitors(0.1F, 1F) Electrolytic type,Voltage rating=0.6V

1

4 Function generator 0 -1MHZ 1



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Circuit Diagram:

Fig A: Current Series Feed Back Amplifier

Procedure:

1. Make sure that the switch S is closed.

2. Apply a sine wave of 40mv peak to peak amplitude at 1 kHz from signal

generator to the input of amplifier circuit.

3. Measure the output amplitude VO (p-p) and Calculate the gain of amplifier

without feedback by using A =VO/VS.

4. Provide the current series feed back by open the switch S and repeat steps 2

and 3 to find the gain with feed back AF = VO/ VS.

5. Calculate the feedback factor using AF = A / 1+A.

6. Calculate theoretically value from = RE/ (RE +R).


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Observations:

Input voltage VI = 40 mV.

Model Graph:

Precautions:1. Connections must be given very carefully.



given transistor.

Output Voltage ,Vo ( V) Gain =20 Log(VO/ VI)(dB)Frequency

(Hz) With out

Feedback

With

Feedback

With out

Feedback

With

Feedback

1K 0.6 0.36 15 9


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Result:

The theoretical and practical values of Gain, feed back Factor of current series

feedback amplifier was determined.

Inference:It is observed that the gain of the amplifier reduces with feed back and the band

width increases by the same amount.


1. What is the difference between voltage series & current series feedback

amplifiers?

A. The output impedance of current series feedback amplifier is high when compared

with voltage series feedback amplifiers.

2. What is the other name of current series feedback amplifier?

A. The other name of current series feedback amplifier is Series derived series fed

feedback amplifier.


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7. RC PHASE SHIFT OSCILLATOR

Aim:

To determine the frequency of oscillations of an RC Phase shift oscillator.

Apparatus Required:

Theory:

In the RC phase shift oscillator, the combination RC provides self-bias for the

amplifier. The phase of the signal at the input gets reverse biased when it is amplified

by the amplifier. The output of amplifier goes to a feedback network consists of three

identical RC sections. Each RC section provides a phase shift of 600. Thus a total of

1800phase shift is provided by the feedback network. The output of this circuit is in

the same phase as the input to the amplifier. The frequency of oscillations is given by

F=1/2RC (6+4K)1/2 Where, R1=R2=R3=R,

C1=C2=C3=C and

K=RC/R.

S. No Name of the

Component/Equipment


1 Transistor( BC107) Icmax=100mAPD=300mwVceo=45VVbeo=50V

1

2 Resistors -

56K,2.2K,100K,10K

Power rating=0.5wCarbon type

1

3

3 Capacitors(10F/25V),0.01F Electrolytic type

Voltage rating=1.6v

2

3

4 Potentiometer 0-10K 1




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Circuit Diagram:

Fig A. RC Phase shift Oscillator

Procedure:


2. Switch on the power supply.

3. Connect the CRO at the output of the circuit.

4. Adjust the RE to get undistorted waveform.

5. Measure the Amplitude and Frequency.

6. Compare the theoretical and practical values.

7. Plot the graph amplitude versus frequency

Theoretical Values:

f = 1 / 2RC 6+4K

=1 / 2 (10K) (0.01F)6+4(0.01)

= 647.59Hz


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Tabular Form:

S.NOTheoretical

Frequency(Hz)

Practical

Frequency(Hz)% Error

1 647.59 639.23 1.2

Model Graph:

Result:

The frequency of RC Phase Shift Oscillator is determined.

Inference:

It is observed that the RC phase shift oscillator produces low frequency oscillations at

audio frequencies.


1. Define oscillator

A. The electronic circuit which produces the out put with out applying in put Ac

2. What is BARKHAUSEN CRITERION?

A. IABI=1 and Phase shift=0 or 360 degrees.


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OVERVIEW OF 8085 MICROPROCESSOR KIT

1.1 General Description:

Vmc-85/9 is single board microprocessor training /development kit configured around

the most widely used microprocessor of todays world. Based on the 8085

microprocessor

It can be used to train engineers to control any industrial process and to develop

software for 8080and8085 based system. The kit communicates with the outside

world through a key board having 28 keys and seven segment hexadecimal displays.

The kit also has the capability of interacting with teletypewriter, CRT terminal and an

audio cassette recorder through the interfaces provided on the board. Other devices

like a serial printer or floppy drives etc. can be connected to the kit.Vmc-85/9

provides 2k byte of ram and 4k bytes of EPROM. The total on board memory can be

very easily expanded to 64k bytes in an appropriate combination of RAM and ROM.

The monitor is incorporated from 0000-0FFF and the necessary. 2k bytes of RAM

has an address of 2000-27FF.The input/output structure of VMC-85/9 provides 24

programmable I/O lines expandable to 48 I/O lines. It has got 16 bit programmable

Timer/Counter for generating any type of counting etc. The on board 8259 provides 8

level of interrupts .the onboard battery back up for RAM retains the memory content

in the case of power failure. The on board resident system monitor software is very

powerful and provides various software utilities. The kit provides various powerful

software commands like SEND, RECEIVE, INSERT, DELETE, BLOCK, MOVE,

RELOCATE, STRING, FILL& MEMORY COMPARE etc. which are very helpful in

debugging/developing the software.

VMC-85/9 is configured around the internationally adopted STD bus, which is the

most popular Bus for process control and real time applications. All the address, Data

and Control lines are available at the edge connector through the buffers. The kit is

fully expandable for any kind of application.

1.2 System Specification:

C.P.U - 8bit Microprocessor, the 8085-A

MEMORY - Total on board capacity-64kbytes

RAM - 2k bytes (6116), space for further expansion


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ROM - 4k bytes of EPROM loaded with powerful monitor program

(2732), space for further expansion using

2716/2732/2764/27128.

TIMER - 16 bit programmable timer/counter using 8253

I/O - 24 I/O lines expandable to 48 I/O using 8255 PPI

INTERRUPTS- 8 different level interrupts through 8259

KEYBOARD - 10 keys for command.

16 keys for hexadecimal data entry.

1 key for Vector interrupt and 1 key for reset

LED DISPLAY- 6 seven segment displays, 4 for address field.

BUS - All data, address and control signals (TTL compatible)

Available at edge connector.

INTERFACE - 1) Audio cassette recorder.

2)20 mA current loop through SID/SOD lines.

3) RS-232-c through SID/SOD lines with auto baud rate.

4) One RS-232-c through 8251 with a programmable baud

rate.

5) EPROM programmer

POWER SUPPLY - +5V, 1.5 A for the kit

REQUIREMENT - +12 V 5%, 250mA for CRT and TTY.

- +24 V 5%, 100 mA for EPROM programmer interface

OPERATING TEMP - 0 to 50 C.

1.3 System Capabilities:

1) Examine the contents of any memory location.

2) Examine/modify the contents of any of the up internal register.

3) Modify the contents of any of the RAM location.

4) Move a block of data from one location to another location.

5) Insert one or more instructions in the user program.

6) Delete one or more instructions from the user program.

7) Relocate a program written for some memory area to some other memory area.

8) Find out a string of data lying at a particular address.

9) Fill a particular memory area with a constant.

10) Compare two blocks of memory.

11) Insert one or more data bytes in the users program/data entry.

12) Delete one or more data bytes from the users program/data area.

13) Transmit a program from memory to audio cassette recorder.

14) Receive a program into memory from Audio cassette Recorder


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15) Check the contents of an EPROM for blank.

16) List the contents of an EPROM into RAM area.

17) Verify the contents of an EPROM with any memory area.

18) Program an EPROM.

19) *List a program or a block of data on the SIOD or prepare a paper tape.

20) Enter a program or a block of data from the SIOD using the paper tape.

21) Execute a program at full clock speed.

22) Execute a program in single step i.e , instruction by instruction.

23) Download HEX file to PC

(These facilities are available if serial I/O device are also connected to the kit).

Hardware Description:

General:

The system has got 8085-a as the Central processing unit. The clock frequency for

the system is 3.07MHz and is generated from a crystal of 6.14MHz. 8085 has got 8

data lines and 16 address lines. The lower 8 address lines and 8 bit data lines are

multiplexed. Since the lower 8 address bits appear on the bus during the first clock

cycle of a machine cycle and the 8 bit data appears on the bus during the second

and third clock cycle, it becomes necessary to latch the lower lower 8 address bits

during the first clock cycle so that the 16 bit address remains available in subsequent

cycles. This is achieved using a latch 74-LS-373.

Memory:VMC-85/9 provides 2Kbytes of CMOS RAM using 6116 chip and 4Kbytes of EPROM

using 2732. The total on board memory can be expanded up to 64Kbytes. The

various chips which can be used are 2716, 2732, 2764, 27128, 6116 and 6264.

There are 6 memory spaces provided on VMC-85/9. These six pages are divided into

three blocks of two memory spaces each. Each memory space can define any

address slots from 0000-FFFF depending upon the size of the memory chip. Same

way any block (i.e, two memory spaces) can be defined to have any of the chips,

2716/2732/2764/ 27128/ 6116/ 6264.

I/O Devices:

The various I/O chips used in VMC-85/9 are 8279, 8255, 8253, 8251 and 8259. The

functional role of all these chips are given below:

8279:

8279 is a general purpose programmable keyboard and display I/O interface device

designed for use with the 8085 microprocessor. It provides a scanned interface to 28


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contact key matrix provided in VMC-85/9 and scanned interface for the six 7-segment

displays. 8279 has got 16 X 8 display RAM which can be loaded or interrogated by

the CPU. When a key is pressed, its corresponding code is entered in FIFO queue of

8279 and can now be read by the microprocessor. 8279 also refreshes the display

RAM automatically.

8255:

8255 is a programmable peripheral interface (PPI) designed to use with 8085

microprocessor. This basically acts as a general purpose I/O component to interface

peripheral equipments to the system bus. It is not necessary to have an external logic

to interface with peripheral devices since the functional configuration of 8255 is

programmed by the system software. It has got three I/O ports of 8 lines each( Port-

A, Port-B, and Port-C). Port C can be divided into two ports of four lines each named

as Port C upper and Port C lower. Any I/O combination of Port A, Port B, Port C

upper and Port C lower can be defined using the appropriate software commands.

VMC-85/9 provides six I/O ports of 8 lines each using two 8255 chips.

8253:

This chip is a programmable interval timer/ counters and can be used for the

generation of accurate time delays under software control. Various other functions

can be implemented with this chip are programmable rate generator, event counter,

binary rate multiplier, real time clock etc. This chip has got three independent 16 bit

counters, each having a count rate of up to 2MHz. This first timer counter (Counter 0)

is being used for single step operation. The second timer counter (Counter 1) is

being used for generating programmable baud rate while using 8251. For single step

operation clock 0 signal of counter 0 is getting a clock frequency of 1.535MHz.

8251:

This chip is a programmable communication interface and is used as a peripheral

device. This device accepts data characters from the CPU in parallel format and then

converts them into serial data characters for the CPU. This chip will signal the CPU

whenever it can accept a new character for transmission or whenever it has received

a character for the CPU. The CPU can read the complete status of it at any time.

8251 has been utilized in VMC-85/9 for CRT terminal and TTY interface.

Display:

VMC-85/9 provides six digits of seven segment display. Four digits are for displaying

the address of any location or name of any register, where as rest of the two digits

are meant for displaying the contents of memory location or of a register. All the six

digits of the display are in hexadecimal notation.


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Buffers:

Space has been provided on the board of VMC-85/9 for buffering the data, address

and control lines. One just needs to put buffers chips on the space provided for these

lines. All these address, data and control lines (TTL Compatible) are available to the

user at the PCB edge connector in the STD bus configuration. The buffer ICS used in

the VMC-85/9 are 74-LS-245 and 74-LS-240. In order to facilitate the multiprocessing

operation, all address, data and necessary control lines have been made Bi-

directional.

Interface:

VMC-85/9 provides an interface for Audio Cassette Recorder. The user can store his

program into the recorder and can load back the program into the system memory as

and when required. The system provides two commands namely SEND AND

RECEIVE to store and to load from the Cassette tape. The subroutines required for

transmission and parallel to serial and serial to parallel conversion are all

incorporated into the system monitor program.

VMC-85/9 provides (0-20mA) current loop and RS-232-C interface through the SID

and SOD lines of 8085. The selection of (0-20mA) current loop and RS-232-C is

done by a switch at the left bottom side of the kit. An EPROM programmer interface

is provided on the board of kit to facilitate the programming of the 2716/2732/2732-

A/2764/27128-EPROMS. An additional RS232-C interface is provided through 8251

with programmable baud rate. Any serial device like printer, floppy drive or CRTterminal etc. can be connected to it.

Battery back up:

The VMC-85/9 provides a battery back up for the onboard RAM area. The battery

back up circuitry is based around LM-393. Since each socket can be defined to have

6264 or 6116 chip also, the VCCto each memory socket is given through the Black

box-2. The VCCof all the memory sockets are brought at the Black box-2 named as

VCCM0 to VCCM5. Any RAM area to be backed up by battery, its corresponding VCC

M point should be connected to CMOS +5V point in the Black box-2 and other points

should be connected to VCCpoint.


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Simple Programs using 8085 microprocessor:

Addition of two 8 bit numbers:

Masking of lower nibble:

Address Hexcode

Mnemonic Operand Comments

5100 3A5101 005102 41

LDA 4100Load the contents of accumulatorwith the contents of memorylocation 4100

5103 E65104 F0 ANI F0 (H)

The contents of accumulator arelogically AND ed with animmediate data F0 (H)

5105 325106 015107 41

STA 4101Store the contents ofaccumulator in 4101 memorylocation

5108 76 HLT Stop the program.

Address Hexcode


5100 3A5101 005102 41


5103 47 MOV B, A Move the contents ofaccumulator into register B

5104 3A5105 015106 41


5107 80 ADD B Add the contents of accumulator

with the contents of register B5108 325109 05510A 41


510B 76 HLT Stop the program.


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Subtraction of two 8 bit numbers:

1s Complement of a given Byte:

Address Hexcode


5100 3A5101 005102 41


5103 2F CMA Complement the contents ofaccumulator

5104 32

5105 055106 41

STA 4105

Store the contents of

accumulator in 4105 memorylocation.


2s Complement of a given Byte:

Address Hexcode


5100 3A5101 005102 41


5103 2F CMA Complement the contents ofaccumulator

5104 3C INR A The contents of accumulator areincremented by 15105 325106 055107 41

STA 4105Store the contents ofaccumulator in 4105 memorylocation.


Address Hexcode


5100 3A

5101 005102 41 LDA 4100

Load the contents of accumulator

with the contents of memorylocation 4100

5103 47 MOV B, A Move the contents ofaccumulator into register B

5104 3A5105 015106 41


5107 80 SUB B Subtract the contents of registerB from the contents ofaccumulator

5108 325109 05510A 41




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Addition of two 16 bit numbers:

Subtraction of two 16 bit numbers:

Address Hexcode


5100 2A5101 005102 41

LHLD 4100Load HL pair the contents ofmemory location 4100

5103 EB XCHG Exchange the contents of HL pairwith the contents of DE pair

5104 2A5105 025106 41


5107 19 DAD D Add the contents of HL registerpair with the contents of DEregister pair

5108 225109 05510A 41

SHLD 4105Store the contents of HL pair in4105 memory location


Address Hexcode


5100 2A5101 005102 41


5103 EB XCHG Exchange the contents of HL pairwith the contents of DE pair

5104 2A

5105 025106 41 LHLD 4102

Load HL pair the contents of

memory location 4102

5107 7B MOV A, E Move the contents of register Einto accumulator

5108 95 SUB LSubtract the contents of registerL from the contents ofaccumulator

5109 32510A 04510B 41

STA 4104 Store the contents ofaccumulator in 4104 memorylocation

510C 7A MOV A, D Move the contents of register Dinto accumulator

510D 94 SUB H Subtract the contents of register

H from the contents ofaccumulator

510E 32510F 055110 41

STA 4105 Store the contents ofaccumulator in 4105 memorylocation


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