On the Determination of Minority Carrier Lifetime from the Transient Response of an MOS Capacitor

FREDERIC I). HEIMAN, MEMBER, BEE

Absfracf-Minority carrier lifetime greater than seconds can be determined for silicon at room temperature by observing the transient response of the MOS capacitance after the application of a large depleting voltage. The waveform is exponential for heavily doped samples and nonexponential for lightly doped samples. The transition occurs when the oxide capacitance approximately equals the space-charge capacitance. Results are presented for a lightly doped bulk silicon wafer exhibiting an effective minority carrier lie- time of 7.6 microseconds and a thin silicon-on-sapphire film with a lifetime of 4.5 nanoseconds. The ratio of transient time constant to lifetime is typically 105-10s at room temperature. Lower l i e t i i e may be determined by cooling the sample. A graphical method is pre- sented to rapidly extract lifetime from the transient response of lightly doped samples when the waveform is nonexponential.

A I. INTRODUCTION

METHOD is described for measuring the life- time of minority carriers in a semiconductor by observing the rate a t which the inversion layer

forms under an MOS capacitor.~ll~[sl,[gl This phenome- non is well known and the physics underlying the effect is well understood.[21-[41 The purpose of this paper is to present the results in a form that lends itself to the simple, rapid determination of lifetime. For silicon, life- time greater than seconds can easily be measured and, for most samples, a mercury-probe capacitance mea~urement[~] may be made directly on the wafer during device processing. The accuracy of the measure- ment is directly related to the accuracy to which the doping density is known.

In physical terms, the method consists of applying a step voltage to the gate of an MOS capacitor of correct poIarity to deplete majority carriers from the semicon- ductor surface: A negative step is applied for n-type material and a positive step is applied for $-type ma- terial. Initially, a large depletion region forms in the semiconductor. As minority carriers are generated in the depletion region (or within a diffusion length of the depletion region) they are swept to the silicon/silicon- dioxide interface where they accumulate in an inversion layer. The majority carriers generated flow to the edge of the depletion region where some of them neutralize the ionized impurity sites reducing the width of the depletion region. Thus, the width of the depletion region relaxes as the inversion layer forms until equilibrium is reached, as shown in Fig. 1 for p-type silicon.

The method consists of measuring either the MOS capacitance as a function of time or the external current as a function of time. Both are a consequence of the change in the depletion region width.

Manuscript received July 5 , 1967; revised August 15, 1967. The author is with the RCA Laboratories, Princeton, N. J.

METAL

OXIDE P-TYPE SEMICONDUCTOR

/- DEPLETION REGION

Fig. 1. Relaxation of depletion region due to generation of hole- electron pairs in the depletion region of an MOS capacitor.

11. MATHEMATICAL DESCRIPTION

A good feel for the advantage of this technique for the measurement of very short lifetimes can be obtained by considering the approximate solution to this problem as given by Grosvalet et al.[ll If i t is assumed that the total charge in the semiconductor is constant, then every carrier generated in the depletion region (assuming the generation rate outside the depletion region is negligi- ble) will reduce the depletion region charge by one. The generation rate g, assuming most of the generation centers are located near the center of the forbidden gap, is approximateIyr61

where ni is the intrinsic carrier density, and r is the life- time (assumed equal for holes and electrons). In a time T , enough carriers will be generated to neutralize the entire depletion region width W :

where N A is the doping density. For silicon, n; is 1.4X 1O1O cmP3 at room temperature, and the relaxation time is typically 5-8 orders of magnitude greater than the lifetime allowing low lifetimes to be accurately measured.

An accurate solution to this problem is easily obtained by assuming onIy significant generation of carriers in the

782 IEEE TRANSACTIONS ON ELECTRON DEVICES, NOVEMBER 1967

depletion region.' With reference to Fig. 1, let Wo and Wf be the initial and final values for the depletion region width, respectively, so that the net generation rate of hole-electron pairs per unit area g' is

fli g' = - (W - W,), (4)

27

because the generation rate equals the recombination rate for W = W, when thermal equilibrium is reached. Each electron generated adds to the inversion layer, but only a fraction of the holes (majority carriers) neutral- izes the depletion region charge. Some flow around the external circuit to add more positive charge to the gate as the oxide voltage Vox increases. Thus,

dN, ni - = g' = - (W - W,), at 27.

where N , is the surface density of electrons in the inver- sion layer, and

where e is the electronic charge, eox is the permittivity of the oxide, and To, is the oxide thickness. The external current density J is given by

J = - - €ox avo, T o x dt dt dt

where use is made of the relaxation time T defined in ( 3 ) . Since d W / d t is negative, the current is the difference between the number of carriers generated and those that reduce the depletion region width.

In order to find the differential equation governing the motion of the depletion region edge, consider the total voltage V T :

where the voltage drop across the inversion layer is neglected. This voltage is very small at the beginning of the transient where the solution will be used. The con-

the right-hand side of (4), where s is the surface recombination veloc- The inclusion of surface generated carriers adds a term lzgs to

ity associated with surface states assumed to be located at the center of the forbidden gap. A similar analysis of this problem has been given by ZerbstP] who assumed s to be constant during the transient

silicon/silicon-dioxide interface, they fill surface states reducing the response. This is not true. 4 s minority carriers accumulate at the

than that required to fill the surface states, part of the transient surface generation rate. As long as the applied step voltage is larger

illustrated in Section 111. response will be dominated by bulk generated carriers. This is

--ID /

--OB

--o.6 T~~ = 20008 N~ = 1015 crn-3

--0.4

--0.2

I -IO I -8 I l l -6 -4 -2 0 0.0 +2 I +4 I +6 I VG -

(VOLTS)

~ i ~ . 2. Normalized C-V curve for bulk silicon MOS capacitor. ~ , , = ~ 0 0 0 A; Na= 1015 cm-3. Fast sweep shows deep depletion for negative voltage.

s tant E , is the permittivity of the semiconductor. Differ- entiation of (10) and use of (5) yields

O = 5 [ N A z + T ] dW dN8 + y ( x ) eNAW dW (1 1)

€ox

O=-q1+(32]+ at w - T w, as the differential equation for the time dependence of W. Separation of variables with W = Wo at t=O yields the solution

Note that the thick oxide case (To,>>Wo) reduces to a simple exponential solution with time constant T.

If this is written in terms of the normalized high- frequency MOS capacitances C, Cf, and Co correspond- ing to W , W f , and Wo, we have

where Co and Cf are illustrated on the C-V curve shown for a typical MOS capacitor in Fig. 2.

111. DETERMINATION OF LIFETIME The procedure used to determine lifetime is to record

normalized MOS capacitance versus time after the application of a large depleting voltage step (positive for p-type semiconductor). The expected waveform, from (14), is shown in Fig. 3 for Co=O.l and Cf=O.S. An ex- perimental curve taken from a silicon MOS capacitor with a 2000 A silicon-dioxide layer is shown in Fig. 4.

HEIMAS: MINORITY CARRIER LIFETIME OF MOS CAPACITOR 783

0.8

0.6

0.4

0.2

c. =0.1

r

10.0 I I 1 I I I I - r

0 IO 20 30 40 50 60 70 t - T

Fig. 3. Calculated naveform of transient response for Co=O.l and Ci=0.5.

r SLOI C1

0.0 I :f A

(seconds)

I I I I I I %

0 IO 20 30 40 50 60 70 ' t

Fig. 4. Experimental transient response for capacitor whose C-V curve is shown in Fig. 2. Slope yields lifetime of 7.6 ps .

In order to extract the lifetime from this waveform, consider the slope of the C versus t curve by writing (12) in terms of C and C,:

According to (15), measurement of the slope a t any value of C will yield the time constant T which is related to the lifetime through (3). Analysis of the transient response shown in Fig. 4 shows that the effective lifetime increases from 2.8 p s at the s tar t of the transient to a constant value of 7.6 ps after 3 s. This behavior is con- sistent nith a decrease in surface generation rate due to trap-filling by holes (minority carriers) which accumu- late at the surface. The value of bulk lifetime for this sample is therefore 7.6 ps . The doping density was de- termined from the slope of the C-V curver71 shown in Fig. 2 .

Z e r b ~ t [ ~ l h a s shown that a plot of d(l/C2)/dtversus (C,/C- 1) yields a straight line whose slope is related to the minority carrier lifetime. The intercept of this line is proportional to the surface recombination velocity. This plot was made from the transient response shown in

' c/cox

-- 1.0 T~~ = 1200 a N* = 3 X 10'6 cm-3

4 -'6 -4 -2 I o t2 t4 +6 +e vG

(VOLTS)

Fig. 5. Normalized C-V curye for thin-film silicon MOS capacitor. To== 1200 A; N ~ = 3 X 1 0 ' ' CITI-~.

Fig. 6.

I(

!

I

7

6

5

4

3

2

1.

t c/cOx

Transient response of thin-film silicon MOS capacitor showing exponential response.

- ARBITRARY UNITS 1 (C/C,, - Cf /cox 1 I

\ At=26ms

Cf '0.75

6 =26ms

To 19.5 ms NA 8 3 X l0l6 Cfll-3

t= 4.5 ns

Fig. 7 . Semilog plot of transient response, yielding time constant of 26 ms which corresponds to lifetime of 4.5 ns.

784 IEEE TRANSACTIONS ON ELECTRON DEVICES, NOVEMBER 1967

Fig, 4, yielding a minority carrier lifetime of 10 ,us and a surface recombination velocity (averaged over the transient response) of 1 cm/s.

For a more heavily doped sample, where the values of C, Co, and C, are closer to unity, the logarithmic term in (14) dominates yielding a true exponential response with time constant approximately equal to T. This is also true for a voltage pulse such that Cf= Co (small signal case). These conditions were satisfied with a thin silicon film deposited on single crystal sapphire. The C-V curve is shown in Fig. 5, and the pulse response is shown in Fig. 6. Points were carefully taken from an expanded pulse response and plotted on semilog paper in Fig. 7. The true exponential response shown yields a lifetime of 4.5 ns; the silicon film was 5 E/. thick and doped to 3X10I6 cmP3 with boron.

Iv. CONCLUSIONS

The mathematical solution to the transient response of the depletion region under an MOS contact is pre- sented. I t is shown that the waveform of the capacitance versus time curve (after the application of a depleting step voltage) is exponential for heavily doped samples and nonexponential for lightly doped samples. The transition in waveshape occurs when the oxide capaci- tance is approximately equal to the depletion region Capacitance.

If i t is assumed that the minority carriers needed to form the inversion layer are generated in the depletion region, then the effective lifetime (defined by equating the volume generation rate to n i / ~ ) may be determined directly from capacitance versus time response. A t room temperature, the method can easily measure lifetime in silicon greater than s. Smaller lifetime can be mea- sured by cooling the sample.

When the lifetime is small, surface generation of car- riers is negligible with respect to the bulk generation rate. This is always the case with silicon-on-sapphire films. For bulk silicon, where the minority carrier lifetime may be greater than IOu6 s, one must compare the surface

recombination velocity with W/T. For properly an- nealed silicon-dioxide layers, the surface recombination velocity can be less than lo2. Thus, lightly doped sam- ples with W greater than a few microns will yield ac- curate results up to a lifetime of 1 ps.

Measurements can usually be made with a mercury probe contact to the oxidized silicon surface so that life- time determination can be made during wafer process- ing.

ACKNOWLEDGMENT The author would like to thank J. Jaklik for preparing

the samples and R. Lenskold for help in making the measurements. The automatic capacitance-voltage curve tracer designed by K. H. Zaininger was modified to display the pulse response and thanks are due him for his help in designing the test equipment. P. Robinson supplied the thin silicon films. The author would also like to thank A. Goetzberger for helpful comments made during review of the manuscript.

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