NXP Embedded Security Intro

46
1 COVER PAGE SUBTITLE PLACEHOLDER COMPANY CONFIDENTIAL Understanding & Implementing Embedded System Security May 25, 2016 Objectives Learn the basics of security & related technologies applicable to MCU-based embedded systems Learn how to address various security requirements using NXP products Target Audience Anyone who is interested in security and how it applies to embedded systems Requirements Basic embedded systems knowledge Presentation objectives, audience & requirements 2.

Transcript of NXP Embedded Security Intro

Page 1: NXP Embedded Security Intro

1

COVER PAGE SUBTITLE

PLACEHOLDER

COMPANY CONFIDENTIAL

Understanding & Implementing

Embedded System Security

May 25, 2016

• Objectives• Learn the basics of security & related technologies applicable to

MCU-based embedded systems

• Learn how to address various security requirements using NXP products

• Target Audience• Anyone who is interested in security and how it applies to embedded systems

• Requirements• Basic embedded systems knowledge

Presentation objectives, audience & requirements

2.

Page 2: NXP Embedded Security Intro

2

• Security goals for embedded systems• Data Integrity, Code Integrity & Device Integrity

• Basics of cryptographic algorithms

• Details of each goal & various technologies available to achieve them

• How NXP LPC18S/43S MCUs and A7 secure element can address

security challenges

• Design Examples of highly secure devices

Topics

3.

WHY IS SECURITY

NECESSARY?

Page 3: NXP Embedded Security Intro

3

Use case: A growing security threat from the cloud

Remote Attacks on

Cloud Service Provider

Physical attack (e.g. using side

channel) on peripheral systems (e.g.

door lock)

25%of installed 802.15.4 edge nodes will be IP-based (Thread, ZigBee & IPv6), thus exposed to cloud attacks in 2019

> 4M of mobile malware installation packs seen in 2014

Vulnerable or compromised device

from unknown origin compromising

home network from inside

Attack from infected Smart phones/watch (rogue

App, Pin code phishing, etc)

Decommissioned devices used as Trojan horse to

compromised other networked devices

Remote attacks on home devices (gateway

or IP edge nodes) from cloud

6

Why Security in Building Automation?

Lighting• Serious injury if

turned off

• Trip hazard

• Panic condition

Environmental• Malicious hack of

thermostat

• Building damages can cost millions

Health Issues• Tampering with

industrial coolers

• Many people can get sick

Brand Issues• Bad publicity

• Building manager reluctant to use

Page 4: NXP Embedded Security Intro

4

7

Vulnerable IoT Devices (1/3)

Web Sites Publish Vulnerable Equipment

• Hackers know exactly where to start

• Anyone can view the equipment to see what is happening

• No user fee required to access the data

8

Vulnerable IoT Devices (2/3)

Access Points

• Lists company where located

• City

• Passwords to gain access

Products Hacked

• Lists manufacturers

• How many times it shows up in a location

Page 5: NXP Embedded Security Intro

5

9

Vulnerable IoT Devices (3/3)

Well Known Names

• Specific instructions on how to hack

• Locations posted

10

Keyboard Sniffer

Published Reference Design

• Disguised as a USB wall charger

• Captures all Bluetooth keyboard strokes

• Stores keystrokes locally or sends them over the internet

• Published on microcontroller blog site

• BOM cost is $10

Page 6: NXP Embedded Security Intro

6

11

IoT Is Being Recognized

IoT

• More than a buzzword

• Customers are recognizing it

• Many products being designed

Common Platforms

• Easy to develop with

• Commonality between vendors

• Also means hackers know vulnerabilities

12

Electronic Toaster

Published Article

• Attaches costs associated with not securing a device

• Any device connected to the Internet is vulnerable

• Misfortune Virus

• Released in 2002

• Fixed in 2005

• As of 2015, still infects half of all public servers!

Page 7: NXP Embedded Security Intro

7

IoT Device

NXPA-Series

Applicationµc

Hardware Secure Element A robust, proven security Solution

NXP has shipped nearly 8 billlionSecure Elements in Bank chip cards, transport card, ePassports. This same proven technology and authentication approach is used to secure and authenticate IoTdevices.

Levels of IoT SecuritySix (6) Tenets of Security

1. Identity/Authentication

2. Authorization

3. Audit

4. Confidentiality

5. Integrity

6. Availability

Mission Critical information Management

• L2 + Confidentiality + Audit

• Remote upgradeable, manage

Essential information management

• L1 + data integrity + Availability + Authorization

• Field upgradable

Non-essential information management

• Identity Management/Mutual Authentication

• Example Black box “disposable” devices

No SecurityL0

L1

L2

L3

Page 8: NXP Embedded Security Intro

8

How much protection is enough?

MCUs for embedded applications LPC18Sxx/LPC43Sxx MCUs

Handles AES keys

Generation • Software RNG • True RNG • Certified True RNG

Storage • Flash

• Encrypted in OTP unique

per device.

• Not software readable.

• Extraction proof using

banking-grade security.

Prevents software tampering

(software integrity)

• Code read

protection

• Code read

protection

• Code read protection

• Secure boot

• Secure boot with FW

signatures verification

• Secure firmware update

Establishes secure connection

(message confidentiality)

• Software

authentication• Software authentication

• Hardware-accelerated

tamper proof authentication

and setup of session keys

Secures bulk message

transfers

• AES software

encryption

• AES hardware-accelerated

encryption

• AES hardware-accelerated

encryption with tamper

protection

+ A7 secure element+ A7 secure element+ security hardware+ security hardware+ security software+ security software

SECURITY SPECTRUM

KE

Y B

EN

EF

IT

Never reflash the board

Flash new code only with secure connection

Flash new code over internet

1

2

3

4

Use case: Device commissioning with NFC

Node Cloud

Node + NFC label• Tap the gateway or NFC phone• Send network key over ZigBee link

Node + NTAG• Tap the gateway or NFC phone• Send network key over NFC

(Node + NTAG) + secure key exchange• Tap the gateway or NFC phone• Derive session key

• Send encrypted network key over NFC

(Node + NTAG) + secure key exchange + node authentication• Tap the gateway or NFC phone• Authenticate end-node• Derive session key

• Send encrypted network key over NFC

NTAG I2C

NTAG I2C

NTAG I2C

IoT Gateway

NFC Reader

NFC Reader

Secure Element

Trusted

Nodes

DBNFC Reader

NFC Reader Secure Element

NFC

Page 9: NXP Embedded Security Intro

9

Security goals for embedded systems

17.

Data Integrity

• Prevent data snooping

• Detect data alterations

Code Integrity

• Prevent code theft• Detect code alterations

• Allow authorized code changes only

Device Integrity

• Protect cryptographic keys

• Prevent product counterfeits

Cost & Complexity

CRYPTOGRAPHIC

ALGORITHM BASICS

Page 10: NXP Embedded Security Intro

10

• Objective: Scramble data so that only select entities can decipher it

• Overview

• Usage Notes• Can be implemented in software or hardware

• Hardware implementations can save performance & power

• Two basic types of cryptography algorithms• Symmetric – same key can encrypt & decrypt

• Asymmetric – different key required for reverse operation

Cryptography

How do cryptographic algorithms work?

19.

Original data (aka Plain-text)

(“Social Security; 123-45-3458)

Key(“ab123456c90x1f”)

Scrambled Data (aka Cypher-text)

(“$1c^213*&!”)

Algorithm

Not-secret

Secret

• DES, 3DES, Blowfish, AES are symmetric cryptographic algorithms• AES is the most popular due to its strength – no published reports of

successful hack

• 128-, 192- & 256-bits are frequently-used key lengths for AES algorithm

• Pros: Faster than asymmetric cryptography

• Cons: Difficult to distribute & protect the shared secret key securely

Symmetric cryptography

20.

Shared secret key(Used to encrypt & decrypt)Shared Shared

Page 11: NXP Embedded Security Intro

11

Asymmetric (Public-key) cryptography

21.

• Public & Private Key pair per system

• Only the Private key is kept secret

• Keys operate “one-way”• Public key encrypts -> Private key decrypts

• Private key encrypts -> Public key decrypts

Public1

Private1

Public2

Private2

Encrypt using Public2

Decrypt using Private2

Sender uses Receiver’s Public key Receiver uses own Private key

• Commonly used algorithms: RSA & ECC

• Keys can be up to 2048-bits or longer

• Pros• Easy to manage, scalable

• Cons• Slower than symmetric cryptography

Asymmetric (Public-key) cryptography basics

22.

Public

Private

How is this key entered?

Page 12: NXP Embedded Security Intro

12

SECURITY GOALS

• Unencrypted messages• Hackers can snoop messages

• Hackers can substitute, replay or monitor messages & create havoc

• Encrypted messages• Message cannot be read without key

• Cons: Enabling encryption reduces payload size

• Cons: Takes time to decrypt the message before it can be used

Data Integrity - why is it important?

24.

#$*& Encrypted messages #$*&#$*& Encrypted messages #$*&“Away mode activated”

“Security disarmed”

“Alarm detected” �

“Disarm security”

“Change configurations”

“Change passcode,”�

Unencrypted messagesUnencrypted messages

Page 13: NXP Embedded Security Intro

13

Data integrity – component & solutions

25.

• Symmetric cryptography• Asymmetric cryptographyPrevent data snooping

• Hash• Digital signatureDetect data alterations

• Certificates• Certificate authoritiesTrusting device identity

• Objective: Scramble data so that only intended devices can unscramble

• Overview

• Usage Notes• AES is used to encrypt/decrypt large set of data due to its speed

• aka bulk encryption & decryption

• Must share & manage shared secret key(s) with other devices

Preventing data snooping using symmetric crypto

26.

Plain-text data

Cipher

Serial Interface

(UART, Ethernet, USB, etc.)

Plain-text data

Cipher

Serial Interface

(UART, Ethernet, USB, etc.)

Node 1 Node 2

Page 14: NXP Embedded Security Intro

14

• Objective: Scramble data so that only intended devices can unscramble

• Overview

• Usage Notes• Only used to encrypt/decrypt small initial set of data, due to slower speed

• To exchange certificates, establish session key etc.

• AES (symmetric) cryptography is used to encrypt/decrypt remaining data

• Public- and session- key exchange details in later slides

Preventing data snooping using asymmetric crypto

27.

What is your public key?

Use AES to bulk encrypt/decrypt

Establish a session key

Plain-text (“in the clear”)

Asymmetric

Symmetric

Store in RAM to lose information during

tamper attempt

• Objective: Create a shorter representation of data to ascertain original

data vs altered data

• Overview

• One-way: Hash value cannot yield original data

• Usage Notes• Sender includes hash value with the data

• Receiver recalculates hash value of received data and compares with the

sender’s hash value• Hash value match = Data not altered

Detecting data alterations using hash functions

28.

DataMathematical transformation

Hash(aka digest)

Page 15: NXP Embedded Security Intro

15

1. Non-cryptographic: CRC, checksum• Pros – easy, fast

• Cons – anyone can recreate if the type of hash function is known

2. Cryptographic: MD2/3/4/5/6, SHA-0/1/2/3

• Pros – only entities with correct key can recreate

• Cons – more complex than non-cryptographic hash

• MD5 (message digest 5) is not recommended due to successful attacks

• SHA-2 (secure hash algorithm 2) is certified by U.S. government

• SHA-2 algorithms differ in bit length of hash value• SHA-224, SHA-256, SHA-384, SHA-512 are some examples

Types of hash functions

29.

Mathematical transformation

Hash(aka digest)

Data

Key

• MAC = Message Authentication Code

• Also authenticates the sender• Only trusted sender can generate the MAC using its copy of shared key

Detecting alterations using hash & symmetric crypto

30.

Node 1

Cipher-textMAC

Data

Hash Encrypt

Node 2

Decrypt

Cipher-textMAC

=?

Unaltered

Hash

Optional

Page 16: NXP Embedded Security Intro

16

• Digital signature

• Signature is uniquely tied to its owner• Only the owner has the matching private key to create it

Detecting alterations using hash & asymmetric crypto

31.

Node 1

Cipher-textSignature

Data

Hash

Node 2

Decrypt

Cipher-textSignature

=?

Unaltered

EncryptHash

Encrypt

Decrypt

Optional

Hash Data

Hardware Flow for Hash & Asymmetric Crypto

• Output is data that can not be snooped (encrypted with

asymmetric key) and has a signature (hash) so other node can

tell if data was tampered with.

Data

HashFunctionSHA, etc

Encrypt

Encrypt

Signature

Cipher Text

Secure Micro LPS43S Secure Element A70x

What is the

output?

Page 17: NXP Embedded Security Intro

17

• Objective: Identify a device using a secret information that only trusted

device is expected to possess

• Overview: • Symmetric cryptography requires a shared secret key

• Any device with access to the shared secret key is trusted• But it is not that easy with asymmetric cryptographyV

• Cons: Counterfeit devices can be made if secret key is known

Trusting device identity when using symmetric crypto

33.

Shared secret keyShared Shared

• Methods to transfer the key

Transferring Symmetric Key

34.

Shared

Shared

Transmit in the clear

Writing down information

Keyboard typing

NFC transfer

NFC Reader

Shared secret key

Page 18: NXP Embedded Security Intro

18

IoT

GatewayNFC (nTag)

Tap the gateway

NFC Tag NFC Reader

1

2

Network Key

Power on

Device in NFC Reader

proximity

Network Key

3Delete the key

AES-128 Encrypted communication

• No key provisioning required during production

• No encryption, protected by short range of NFC

• Out of band (NFC only) instant key and network parameters exchange• Faster commissioning

• Possibility to issue commands: reset, decommission, etc.

Light Link

802.15.4

BLE

ZigBee

Thread

AES/OTP

I2C

Optional Energy Harvest

Energy harvest option permits operating the device with just the NFC

• Asymmetric cryptography requires other device’s public-key

• Problem• How do you trust other device’s identity & its public key

• Much harder to distinguish because no effort is made to hide the key

• Solution• Digital certificates and certificate authorities

Trusting device identity when using asymmetric crypto

36.

What is your public key?

Use AES to bulk encrypt/decrypt

Establish a session key

Hijacked?

Page 19: NXP Embedded Security Intro

19

• Objective: Vouch for an entity’s identity & provide its public key

• Obtaining a certificate• All entities must obtain certificate from a CA and produce it on request

• VeriSign, DigCert, etc. are authorized third party CAs

• Organizations can also issue self-signed certificates

• Certificate authorities are like notary services

• Public key infrastructure (PKI) = HW, SW & process to manage certificate

Digital certificates & certificate authorities (CA)

37.

CA’s private key

Entity: < >Digital Signature: < >Valid-From: < >Valid-To: < >Public Key: < >V

CertificateApplication Certificate authority

Entity namepublic key

Asymmetric encryption

1. Devices may cache certificates to speed up or avoid Internet

connectivity

2. Verification involves decrypting cert signature using CA’s public-key &

matching it with self-calculated hash

Certificate usage

38.

What is your cert?

Verify signatures2

Contact CA for latest cert1

Get CA’s cert1

Use AES to bulk encrypt/decrypt

Establish a session key

Page 20: NXP Embedded Security Intro

20

• Session key: A temporary, single-use, shared symmetric key used for

the duration of a transaction – exact duration depends on use case• e.g., Web browser transactions last until an entire page is downloaded (~secs)

• Used in asymmetric & symmetric cryptographic connections

• Usually randomly selected to make the attacks more difficult• Must not be visible to man-in-the-middle even when using unsecured channel

• Several algorithms – Diffie-Hellman discussed next

What is a session key & why is it needed?

39.

Exchange certificates

Use AES to bulk encrypt/decrypt

Establish a session key

Store in RAM to lose information during

tamper attempt

• Common paint = Two large numbers (G, g)

• Alice’s secret color = Private key ‘a’

• Bob’s secret color = Private key ‘b’

• Alice’s mixture m1 = Math1(G, g, a)

• Bob’s mixture m2 = Math1(G, g, b)

• Common secret • Math2(G, g, b, m1) = Math2(G, g, a, m2)

• Hackers cannot create common secret without a

matching private key

Establishing a session keyDiffie-Hellman key exchange algorithm

40. Source: https://en.wikipedia.org/wiki/Diffie%E2%80%93Hellman_key_exchange

Page 21: NXP Embedded Security Intro

21

Code integrity – component & solutions

41.

• Code read protect (CRP)• Secure bootProtect firmware IP

• Secure bootExecute only trusted

code

• Cryptographic authentication• Symmetric cryptography• Asymmetric cryptography

Update only intended targets

• Objective: Prevent external devices from accessing the internal memory

• Overview

• Usage notes• Code Read Protect (CRP, NXP name) is enabled when the design is

released

• Once enabled, may not be disabled

• Prevents hackers from looking for security loopholes

Protecting firmware when executing from internal

memory

42.

Enable protection level(s)

Disable JTAG/SWDDisable ISPDisable boot modesWrite-protect boot memory, etc.

OTP fuses ORFlash fuses ORFlash memory

Page 22: NXP Embedded Security Intro

22

Objective: Verify code’s trustworthiness before executing it

– aka secure boot

• Overview

* Image doesn’t need to be encrypted

• Usage Notes• Secure boot may be implemented using on-chip ROM or Flash

• ROM code increases reliability

• May use symmetric or asymmetric cryptography

• Usually available with external memory boot configuration only

Protecting firmware when executing from external

memory

43

RESET

Is image trusted ?

Decrypt* & execute

Don’t executeY N

Secure boot using symmetric cryptography

44.

Target boot process

Binary code AES key

Hash AES

MAC Cipher-text

External memory

Desktop post-build process

Stop

MAC Cipher-text

AES KeyAES

Hash

MAC

Binary Code

Execute

N

Y

External memory

Internal RAM

=?

Optional

Page 23: NXP Embedded Security Intro

23

Secure boot using asymmetric cryptography

Target boot process

Stop

Binary code Private key

Sig.algorithm

RSA

Signature Cipher-text

External memory

Desktop post-build process

45

Signature Cipher-text

Public KeyRSA

Sig. algorithm

Signature

Binary Code

Execute

N

Y

External memory

Internal RAM

=?

Optional

• Objective: Verify target’s credentials before sending new firmware

– known as secure firmware update

• Overview

• Usage Notes• Useful for both local & remote firmware updates

• Authentication may use software or hardware techniques

• May use symmetric or asymmetric cryptography

• May use elaborate version control to enforce strict update policies

Updating intended targets

46.

StartDownload

encrypted FWAuthenticate

Page 24: NXP Embedded Security Intro

24

• Server & target must contain a shared secret key to authenticate

• Shared key may reside in internal non-volatile memory (NVM) or in an

external secure element

Authenticating a target using challenge-response

47.

ServerTarget

Calculate hash

my hash = target hash?

SharedShared

• Re-encryption & secure boot steps are optional

Downloading firmware securely to the intended target

48.

Server

Challenge-response

Target

Setup a session key

Download using session key

Temporarily store the new update

Re-encrypt using device key*

Setup new secure boot image*

Page 25: NXP Embedded Security Intro

25

Device integrity – component & solutions

49.

• Restricted NVM storage• RAM with tamper detect• Certified secure storage

Protect keys

• Write-only key storage• Secure boot• Secure firmware update• Certified secure storage

Prevent counterfeits

• Two approaches

1. Plain-sight storage• Usually stored in internal or external Flash memory

• Key fractions stored in multiple address locations

• Key values transformed using a math & stored in whole or fractions

2. Hardware-assisted storage• Maybe stored in flash or OTP memory

• Write-only

• May be stored in scrambled form

Protecting keys using NVM storage

50.

Page 26: NXP Embedded Security Intro

26

• Two approaches

1. Software solution• Stored in RAM

• Strategically placed enclosure tamper detect switches

• Software cleared RAM upon tamper event

2. Hardware tamper detect with battery-backed RAM• Stored in battery-backed RAM

• Strategically placed enclosure tamper detect switches

• Hardware cleared RAM upon tamper event

Protecting keys in RAM with tamper detect

51.

• Secure element can provide multiple key storage for multiple purposes• e.g., private key, public key, master key, etc.

• May provide additional functionalities such as symmetric and asymmetric

crypto, and challenge-response authentication

Protecting keys using certified, secured storage

52.

MCUSecure element

I2C /

SPI

Tamper-proofCertified

General-purpose with or without hardware crypto accelerator

Page 27: NXP Embedded Security Intro

27

• Imperatives for preventing counterfeits (one or more maybe used)

• Hardware component(s) that only the OEM can source• Pre-programed MCUs with internal program memory & disabled JTAG/SWD & ISP

• Flash-less MCUs pre-programmed with internal write-only key storage

• Secure element programmed with OEM-specific keys

• For connected devices, server may deny services to devices with invalid S/N

or other identifying information

• Secure boot with encrypted firmware

• Secure firmware update only to genuine products

Preventing counterfeits

53.

PROTECTING

EMBEDDED SYSTEMS

Page 28: NXP Embedded Security Intro

28

Protecting embedded systems

Other embedded

devices

MCUUSBCANEthernet

I2C/SPIUARTWirelessOther

OEM

CMExternal

memories

End product

Code copy, alterations & reverse engineering

Data snooping & alterations

Unauthorized product builds

Authenticity

FW update55.

Debugger

1

3

2

4

5

1

4

1

3

3

5

2

MCUs booting from on-chip Flash memory• CRP to disable JTAG/SWD & ISP interfaces

MCU booting from external Flash memory• CRP to disable JTAG/SWD & ISP interfaces

• Secure boot to execute only trusted encrypted code

Preventing code copy, alterations & reverse engr

56.

Secure Boot

AES

CRP

1

LPC18S/43S

External memories

End product

Debugger

1

1

Page 29: NXP Embedded Security Intro

29

• AES to scramble the data (less complex, difficult to scale) OR

• Public-key software library to exchange key (complex, scalable)• AES to perform fast bulk encryption/decryption

• TRNG to select unpredictable session key

Preventing data snooping & alterations

57.

AES

TRNG

2

Other embedded

devices

LPC18S/43S

USBCANEthernet

I2C/SPIUARTWirelessOther

End product

2

• Flashless MCU with secure boot required

• Use secure boot to decrypt and authenticate the FW• OTP key storage provides non-readable key storage

• Supply pre-programmed MCUs & encrypted firmware to CM

Preventing unauthorized product builds

58.

Secure boot

OTP key

AES

3

LPC18S/43S

External memories

End product

1

OEM

CM 3

3

Page 30: NXP Embedded Security Intro

30

• Requires a secret key stored in product to perform challenge-response

• Three options• Store key in internal/external Flash memory - vulnerable to software hacks

• Store key in OTP memory of LPC18S/43S MCUs – not modifiable

• Store key in NXP A7x secure element – certified, Flash-based storage

Protecting authenticity

59.

OTP Key

AES

TRNG

OTP Key

AES

TRNG

or other LPCs

LPC18S/43S

or other LPCs

Secure element

End product

4

4

External memory(optional)

1. Authenticate the product using OTP key or secure element

2. Download firmware• Symmetric: Use OTP key to encrypt & download the firmware

• Asymmetric: Use PKI to encrypt & decrypt using a temporary key

3. Program the memory• MCU with Flash: decrypt the firmware into second Flash bank & activate

• Flashless MCU: encrypt using OTP key, program the Flash & switch using

secondary bootloader

Secure firmware update

60.

Secure boot ordual-bank Flash

OTP key

AES

5

Other embedded

devices

USBCANEthernet

I2C/SPIUARTWirelessOther

LPC18S/43S

End product

5

Secure element

External memory(optional)

Page 31: NXP Embedded Security Intro

31

What security problems does my system have?

61.

I want to:

Security Measure(s)

Flashless part Flash part

Data IntegrityPrevent data alterations Hash software functions

Prevent data snooping Hardware AES or software PKI with hardware AES

Code Integrity

Prevent debugging/

reprogramming in the field

Disable JTAG/SWD; enable secure boot

Enable CRP

Prevent execution of

unauthorized firmware changesEnable secure boot Enable CRP

Protect firmware IP Enable secure boot Enable CRP

Prevent unauthorized product

builds

Pre-program the key & enable secure boot

Pre-program firmware & enable CRP

Provide secure firmware

updates

Use OTP or Secure Element to authenticate & download FW using AES or PKI

Use OTP or Secure Element to authenticate & download FW using AES or PKI into 2nd

Flash panel

Device Integrity

Prevent product impersonators Use AES key from OTP storage or Secure Element

Provide individualized security

to each product unit

Use companion NXP secure element to diversify keys

Implement certified security Use companion NXP secure element

Provide tamperproof storage of

data & hardened cryptoUse companion NXP secure element

LPC18S/43S MCUs

Page 32: NXP Embedded Security Intro

32

• Customer security needs• Firmware intellectual protection

• Secure communication with other systems

• Controlled product builds

• Authenticated products

• Secure firmware updates

• AND • High performance

• Up to 164 GPIOs

• Optional Hi-Speed USB, Ethernet & CAN interfaces

• Optional 1024x768 graphics LCD controller

• Applications: smart home, IoT gateways, industrial controls, HMI,

building automation, office automation and others

• Pair with NXP secure element for certified, tamperproof storage and

crypto accelerator

When is LPC18S/43S MCU the best selection for

implementing secure processing?

63.

LPC18Sxx and LPC43Sxx MCU families

• Same LPC18xx & LPC43xx features • High-performance ARM Cortex-M cores

• Large internal memories and support for external

memory expansion

• Multiple high-speed connectivity and display

• Plus features for protecting data

communications & application code• Hardware-accelerated AES-128 encryption

engine for fast bulk encryption

• Two 128-bit non-volatile OTP memories for

storage of write-only AES keys to prevent readouts

• True random number generator for unique key

creation

• Boot ROM drivers supporting secure boot of

authenticated, encrypted firmware image

• Code read protection (CRP) prevents

unauthorized access to internal Flash

64

LPC43Sxx

Page 33: NXP Embedded Security Intro

33

Development tools

LPCXpresso43S37 & 18S37 evaluation boards

LPC43S37 or LPC18S37 MCU

A7001CM secure element

OM13076: LPCXpresso18S37 board

OM13073: LPCXpresso43S37 board

Quad SPI Flash

Ethernet PHYHigh speed USB

debug probe (Link2)

LPC general-purpose shield• SPI connected 128x64 mono LCD• Temperature sensor• Joystick and 4 LEDs via port expander• BMI160 accelerometer + gyroscope• Potentiometer

WiFi module (SDIO)

Ethernet RJ45

PMOD Expansion Connector

65

SDIO socket

Virtual kit with LPCXpresso board + connectivity shield + WiFi module

LPC18Sxx ordering information: parts & tools

66

DEVELOPMENT &

DEMO TOOLS

ORDERABLE PART

NOAVAILABILITY DESCRIPTION WEB / INFO

LPCXpresso18S37 OM13076 NowRapid prototyping and

evaluation boardLPCXpresso18S37 Development Board

LPCXpresso IDELPCXpresso IDE

v7.7.2+Now

Cross platform C/C++

development suite (supports all

32-bit LPC MCUs)

www.nxp.com/lpcxpresso/home

ORDERABLE PART NO 12NC AVAILABILITY FLASH (KB) RAM (KB) PACKAGE WEB/INFO

LPC18S10FBD144E 935304121551 Now -- 136 LQFP144 LPC18S10FBD144

LPC18S10FET100E 935304177551 Now -- 136 BGA100 LPC18S10FET100

LPC18S10FET180E 935305894551 Now -- 136 BGA180 LPC18S10FET180

LPC18S30FBD144E 935305902551 Now -- 200 LQFP144 LPC18S30FBD144

LPC18S30FET100E 935305907551 Now -- 200 BGA100 LPC18S30FET100

LPC18S30FET256E 935304176551 Now -- 200 BGA256 LPC18S30FET256

LPC18S37JBD144E 935305859551 Now 1024 136 LQFP144 LPC18S37JBD144

LPC18S37JET100E 935305908551 Now 1024 136 BGA100 LPC18S37JET100

LPC18S50FET180E 935305909551 Now -- 200 BGA180 LPC18S50FET180

LPC18S50FET256,551 935296282551 Now -- 200 BGA256 LPC18S50FET256

LPC18S57JBD208E 935305918551 Now 1024 136 LQFP208 LPC18S57JBD208

LPC18S57JET256E 935299802551 Now 1024 136 BGA256 LPC18S57JET256

Page 34: NXP Embedded Security Intro

34

LPC43Sxx ordering information: parts & tools

67

DEVELOPMENT &

DEMO TOOLS

ORDERABLE PART

NO AVAILABILITY DESCRIPTION WEB / INFO

LPCXpresso43S37 OM13073 NowRapid prototyping and

evaluation boardLPCXpresso43S37 Development Board

LPCXpresso IDELPCXpresso IDE

v7.7.2+Now

Cross platform C/C++

development suite (supports all

32-bit LPC MCUs)

www.nxp.com/lpcxpresso/home

ORDERABLE PART

NUMBER 12NC AVAILABILITY FLASH (KB) RAM (KB) PACKAGE WEB/INFO

LPC43S20FBD144E 935304122551 Now -- 200 LQFP144 LPC43S20FBD144

LPC43S20FET180E 935305912551 Now -- 200 BGA180 LPC43S20FET180

LPC43S30FBD144E 935304533551 Now -- 264 LQFP144 LPC43S30FBD144

LPC43S30FET100E 935305913551 Now -- 264 BGA100 LPC43S30FET100

LPC43S30FET256E 935299908551 Now -- 264 BGA256 LPC43S30FET256

LPC43S37JBD144E 935305914551 Now 1024 136 LQFP144 LPC43S37JBD144

LPC43S37JET100E 935304409551 Now 1024 136 BGA100 LPC43S37JET100

LPC43S50FET180E 935305915551 Now -- 264 BGA180 LPC43S50FET180

LPC43S50FET256,551 935296279551 Now -- 264 BGA256 LPC43S50FET256

LPC43S57JBD208E 935305916551 Now 1024 136 LQFP208 LPC43S57JBD208

LPC43S57JET256E 935304967551 Now 1024 136 BGA256 LPC43S57JET256

LPC43S70FET100E 935305917551 Now -- 282 BGA100 LPC43S70FET100

LPC43S70FET256E 935306003551 Now -- 282 BGA256 LPC43S70FET256

SECURE ELEMENT

Page 35: NXP Embedded Security Intro

35

Program and

data memory expansion

LPC43S00

LPC43S Protects Home Automation Systems

Secure IoT Home Automation• Secure boot protects code in QSPI

• A7 Series secure element protects meter against physical attacks attempting to extract

or determine keys

• High-speed encrypted connectivity via Ethernet or WiFi with hardware AES

• Secure boot protects software IP

• TRNG for secure session keys

• SDIO for high speed WiFi data transfer

• Bluetooth connectivity

Secure key storage

and authentication

RAM

I2C

AES engine

Cortex-M4

Cortex-M0

204MHz

I2C LCDNFC TFT display

EMC

SPIFIQuad SPI

Flash

SDRAM

secure boot

A7/A8 Secure Element

secure bulk encryptionUART

SDIO

OTP keys

QN90xx Bluetooth

Secure Element use cases

• Allow the establishment of a secure authenticated connection to

Cloud Services• Support of Measured boot – Checking device integrity

• Handle device Identity relationship management

• Secure Account management

• Admin & access tokenization

• Ease Device maintenance - firmware updates

• August remote access.

• Prevent Man-in-The-Middle Attack (DNS attack�)

• Securely store encryption keys and network credential• Non – Spoofable (Anti-cloning / Anti-counterfeiting)

• Non – Extractable (home network and device integrity)

• Ease Apple HAP compliance• Customized Certificates and unique public/private key pairs generated at

NXP secure factory

• PKI based crypto to support SRP for initial setup codes

page70

BleSoC

A7SE

Edge Device

Page 36: NXP Embedded Security Intro

36

Use case #1: Long term keys storage

page71

RadioSoC

A70x

I2C

IP CameraA7 holds HAP Long term keys signs FW hash,

Supports Secure Remote protocol for setup codes.

App

Proc

Might be tempting to use this AES coprocessor rather than micro based AES

page72

RadioSDRAM

Flash

A70xI2C

Ex: Alarm acc.

- MCU accelerates HAP, lowers overall power consumption- A70x holds HAP Long term keys and Memory encryption keys, gates Ext-Flash Writes,

signs FW hash, establishes session-based AES key with SoC, Supports Secure Remote protocol for setup codes

R/W

Reset

MCU / AP LOW-POWER INTERFACESSYSTEM

INTERFACES

LOW-POWER ANALOG

ADC 12 b, 12 ch, 4.8 Msps

ADC 12 b, 12 ch, 4.8 Msps

MEMORY

Mu

ltil

aye

r B

us

Ma

trix

Flash(256-512 kB)

Flash(256-512 kB)

RAM(104 kB)

RAM(104 kB)

ROMlow-power API & drivers

ROMlow-power API & drivers

ARM Cortex-M4F100 MHz

ARM Cortex-M4F100 MHz

USART (4)USART (4)

I2C (3)I2C (3)

DMA 22 chDMA 22 ch

GPIO (50)GPIO (50)

TIMERS

SCTimer/PWMSCTimer/PWM

RTC/AlarmRTC/Alarm

32-bit General Purpose (5)32-bit General Purpose (5)

WWDTWWDT

4 ch Multi-Rate4 ch Multi-Rate

Clock Generation Unit12 MHz IRC, System PLLClock Generation Unit

12 MHz IRC, System PLL

Low-Power ManagementSingle VDD power supply, POR, BOD, reduced power modes, automatic

voltage scaling

Low-Power ManagementSingle VDD power supply, POR, BOD, reduced power modes, automatic

voltage scaling

SPI (2) SPI (2)

ARM Cortex-M0+100 MHz Mailbox

Micro-TickMicro-TickRepetitive InterruptRepetitive Interrupt

Use case #2: Secure FW update & long term key storage

Page 37: NXP Embedded Security Intro

37

page73

Secure Element Key Storage

Page 74

Key Wrapping

RadioSDRAM

Flash

A70xI2C

R/W

Reset

MCU / AP

Bus between Secure Element

and Secure Micro is not secure

• Data transfer• Not secure between A70x and secure MCU

• Need to wrap the key

• Key-Wrapping Key• Symmetric key

• Stored in A70CM

• Stored in OTP memory of secure micro

• AES key request• Secure micro requests AES key from A7

• A7 Key-Wraps AES key & sends to Secure Micro

• Processing on Secure Micro• Secure micro decrypts AES key with Key-Wrapping

Key in OTP

• AES engine uses decrypted AES key to

encrypt/decrypt

AES Key

Page 38: NXP Embedded Security Intro

38

page75

Private Key Storage Review

RadioSDRAM

Flash

A70xSecure Element I2C

R/W

Reset

MCU / AP

• SRAM of Micro• Not the best idea

• Okay if power cycled before opening unit

• Use tamper resistance methods

• NVM of Micro• Probably the worst idea

• Easy to retrieve data after power off cycle

• Secure off chip storage• Use tamper resistant device

• Excellent protection

• Summary• No really good places in the micro to store

private keys

• Use off chip storage for best system

architecture

SRAM

OTP

FLASH

Time to harden your DevicesEmbedding Strong Device ID!

� Strong Authentication

is a key requirement for Reliable and

Trusted Infrastructures & Networks

� This drives the need for a

Security IC, decoupled from host

application SW and its upgrades, and

protecting authentication credentials

May 27, 2016 COMPANY CONFIDENTIAL76.

http://en.wikipedia.org/wiki/Internet_of_Things

Page 39: NXP Embedded Security Intro

39

NXP A-Series Cyber Security Solutions Key Features

� Advanced SmartMX™

Microcontroller Architecture

� More than 100 security features including - NXP Glue Logic Technology

- Secure Fetch Technology

- Asynchronous self-timed Handshake

- Active Shielding Technology

� High performance PKI (RSA/ECC), AES and triple-DES

crypto-coprocessors, TRNG

� -40oC…+90

oC Operational Ambient Temperature

� Standalone IC with on-chip EEPROM, RAM and ROM

� High reliable EEPROM for both data storage and

program execution- 25 years minimum data retention

- 500.000 cycles minimum endurance

� ISO7816, I2C, SPI, ISO14443 (contactless) interfaces

� Factory Key/Certificate pre-injection in certified

(Common Criteria) secure environment

May 27, 2016 COMPANY CONFIDENTIAL77.

Key ApplicationsA-Series Security ICs

� Energy Management / Smart Grid- Smart Home Appliances, smart Plugs- Residential & Industrial Meters- Metering Gateways- Home & Building Automation systems- Grid Automation - Data concentrators, routers- Electrical & Hybrid Vehicles - (H)EV Charging Stations, batteries - Street Lighting, Solar panels

� Industrial- PLC, RTUs, IED, Industrial equipment & parts, remote monitoring systems

� Medical & Healthcare- Home care/monitoring Gateways- Medical Devices - Traceability solutions

� Transport- ITS (car2car), Telematics- Infrastructure networks, Tolling

� Vending

- PoS terminals, ATMs

� Smart Applications/Services

- IP cameras, sensors, Smart Cities, Smart Homes, Automation systems, etc

� Security Systems

- Authentication tokens, access control systems, biometric controls, etc

May 27, 201678.

Page 40: NXP Embedded Security Intro

40

SECURITY DESIGN

EXAMPLES

NXP Gateway Reference Design

A7005xSecure ID

I2C

GainspanGS1011WiFi

I2C orSPI

NFC Reader

I2C

Page 41: NXP Embedded Security Intro

41

Secure Touch PINPad Reference Solution Overview

• Fully PCI4.x certified POS PIN Pad Reference Design for customers seeking Payment Card Industry certifications

• Hardware and software, including all drivers, cryptographic libraries, NXP Secure KinetisK81/KL81 MCUs - Pin to pin compatible, covering range of performance and price targets

• Chip-and-PIN keypad based on Cirque® SecureSense™ technology (PCI PTS compliant without requiring physical protection for touch sensor)

• Target Applications:

• Point of Sales Terminals (secure pin entry for any terminal from mPOS to ePOS)

• Automatic Teller Machine Pin Pad

• Building and Home Automation, Secure Access Control

Reverse side:Battery backed secure on chip RAM

SecureSense™ touch pad

Segment LCD for PIN entry feedback

Reverse side:Secure Island, including Kinetis Secure MCU

• Certifications & Testing:

• TWR-POS-K81 PCI 4.1 Certified as Pin Pad

• PCI silicon pre-certification

• Side channel attack testing

• CAVP (crypto assurance validation program) certified

• TRNG entropy evaluation

Secure Touch PINPad Reference Solution Overview

Many security features are implemented but require NDA and secure document transfer

to the customer

Tamper resistance

Foreign Object Detect

Page 42: NXP Embedded Security Intro

42

Secure Touch PINPad Reference Solution Schematic

Secure Microcontroller

PCI Compliant

Kinetis: KL81, K81

Display(+ LCD Driver

if not in the MCU)

External MemoryNor, NAND, XIP Memory, DDRx

RTCReal Time Clock

Wired InterfacesSerialUSB

Thermal Printer

LEDs

Sensors (for tamper resistance)

3rd Party

PMU(Discrete)

NXP

Battery

DryICEW/ Tamper Pins

USB OTG

SPI / Flex Io

Timer / PWM

FACTRNG

LTC Engine

(RSA, ECC, 3DES,ECC,SHA, DPA)

Crypto Engine

User Interface / Pin Entry

Standard Connectivity

SDRAM/ QSPII2S

Buzzer

SecureTouch AFE

Secure Card Reader Reference Solution Overview

• Fully PCI4.x certified POS PIN Pad Reference Design for customers seeking Payment Card Industry certifications

• Hardware and software, including all drivers, cryptographic libraries, NXP Secure KinetisK81/KL81 MCUs - Pin to pin compatible, covering range of performance and price targets

• NXP PN5180 Contact & Contactless card reader module with KSDK driver support

• Chip-and-PIN keypad based on Cirque® SecureSense™ technology (PCI PTS compliant without requiring physical protection for touch sensor)

• Target Applications:

• Point of Sales Terminals, Contact & Contactless

• Automatic Teller Machine Pin Pad + Reader

• Building and Home Automation, Secure Access Control

Contactless Reader Antennae

SecureSense™ touch pad

Reverse side:Secure Island, including Kinetis Secure MCU

• Certifications & Testing:

• TWR-POS-K81 PCI 4.1 Certified as Pin Pad

• PCI silicon pre-certification

• Side channel attack testing

• CAVP (crypto assurance validation program) certified

• TRNG entropy evaluation

• EMVCo L1 CT/CL pre-certified

1.25W Contactless Reader

Contact Reader

Page 43: NXP Embedded Security Intro

43

Secure Card Reader Reference Solution Overview

Contactless Reader Antenna

SecureSense™ touch pad

Reverse side:Secure Island, including Kinetis Secure MCU

• Certifications & Testing:

• TWR-POS-K81 PCI 4.1 Certified as Pin Pad

• PCI silicon pre-certification

• Side channel attack testing

• CAVP (crypto assurance validation program) certified

• TRNG entropy evaluation

• EMVCo L1 CT/CL pre-certified

1.25W Contactless Reader

Contact Reader

Legacy Payment

Secure Microcontroller

PCI Compliant

Kinetis: KL81, K81

Contact

Reader

TDA80XX

Contactles

s Reader

PN5180

Magstripe Card Reader

External MemoryNor, NAND, XIP Memory, DDRx

RTCReal Time Clock

Wired InterfacesSerialUSB

Thermal Printer

Sensors (for tamper resistance)

Bluetooth / Wi-FiMurata | BRCM4339Wireless SiP ModuleLBEH5HMZPC-

TEMP

3rd Party

PMU(Discrete)

NXP/FSL

Battery

SAMs

(Up to x5)

EMVco Payment

DryICEW/ Tamper Pins

SDIOUART / Flex IO

GPRS/Cellular

4Mbit/s

USB OTG

ADC

SPI / Flex Io

2 x EMVSIM

Timer / PWM

FACTRNG

LTC Engine

(RSA, ECC, 3DES,ECC,SHA, DPA)

Crypto Engine

Wireless Connectivity

Standard ConnectivityISO7816-3

SDRAM/ QSPII2S

Buzzer

Display(+ LCD Driver

if not in the MCU)

LEDs

User Interface / Pin Entry

SecureTouch AFE

Card Reader Reference Solution SchematicmPOS

Page 44: NXP Embedded Security Intro

44

Traditional & Smart Mobile POS Solution Enablement

• Quick Start Guide• User Manuel• Software

• EMVCo L1 CT/CL Library integrated into PN7462

• Linux Drivers for PN7462• EMVCo L2 CT/CL Library integrated from

3rd parties• Trusted Execution Environment (TEE)

leveraging ARM Trustzone

• Application Notes• ANxxxx - Using i.MX6UL/i.MX7 Security

Features

• Certifications• Infogard PCI Silicon Pre-cert report

Trusted Execution Environment (TEE)

Card Reference Solution OverviewLeveraging Ultra-thin MCUs

• NXP Smart Card IC, Ultra-thin (0.34mm) Secure Kinetis KL81 MCU

• Multi-factor identification, PIN + Biometric

• Physically secure and encrypted key (user fingerprint)

• No PIN entry (optional)

• Fingerprint processed and transacts <1 second

• Supports contact and contactless transactions

• Target Applications:

• Physical access control

• Logical access control

• Identification

• Banking / Payment

Smart Card IC

Power Button

Secure Microcontroller

Fingerprint Sensor

LED

Battery

Page 45: NXP Embedded Security Intro

45

Card Reference Solution Schematic

Secure Microcontroller

PCI Compliant

Kinetis: KL81

RTCReal Time Clock

LEDs

Sensors (for tamper resistance)

3rd Party

PMU(Discrete)

NXP

Battery

DryICEW/ Tamper Pins

FACTRNG

LTC Engine

(RSA, ECC, 3DES,ECC,SHA, DPA)

Crypto Engine

Fingerprint

Sensor

Smart Card IC

Secure Key

Storage

SUMMARY

Page 46: NXP Embedded Security Intro

46

• There are three primary challenges to secure devices• Data integrity, code integrity & device integrity

• Each challenge requires multiple cryptographic solutions

• All cryptographic algorithms depend on a secret key

• Secret key must stored securely to protect against hacking

• HW-based key storage can provide the maximum protection

• Secure MCUs offers a number of features to enhance system security

– Integrated hardware-accelerated AES to speed up encryption and decryption

– ROM-based secure boot to protect and verify the firmware integrity before executing it

– Read-only, scrambled OTP key storage memory to help protect keys from hackers

– Can be coupled with the A7x secure elements from NXP to implement tamperproof secure storage and certified hardware accelerated authentication schemes

Summary

91.