Lecture 2 18-322 Fall 2003 Readings: 5
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Basic CMOS Logic Design Lecture 2 18-322 Fall 2003 Readings: 5.2
Transcript of Lecture 2 18-322 Fall 2003 Readings: 5
Basic CMOS Logic Design
Lecture 218-322 Fall 2003
Readings: 5.2
Overview
MOSFETs as switchesIdeal switches & boolean operations
CMOS logic gates Basic/complex functions
Transmission gates Pass transistors
Ideal Switches
Ideal switches
x y
A=0
openx y = x
A=1
closed
x y
A=0
closedx y
A=1
open
Assert-high
Assert-low
Ideal Switches (cont’d)
1
a b
a ·1 ·b(a·1)· ba
1
0
+
a
a
a ·0
a ·1
a ·1y = + a ·0 = a(well-defined behavior)
MOS Transistor
GateGate
n-doped semiconductor substrate
p pChannel
Source
p-doped semiconductor substrate
n nChannel
Source DrainDrain
VDD0
Source Drain
Substrate
Gate
Source Drain
Gate
Substrate
Copyright © by Maly 1997
Logic Gates Built with Switches
s = 0
a bs = 1
a as = 0
"1" "1"s = 0
"0" "0"s = 0
a b a as = 1
"1"s = 1
"1"
s = 1"0 "0" "
Logic Gates Built with Switches
VDD "1"GND (0 V) "0"Floating "HZ"Between VDD and GND "X"
GND
Out
s
GND
Out = 0 V
s = 0
VDD VDD
GND
Out = VDD
VDD
s s
s = 1
Copyright © by Maly 1997
Logic Gates Built with Switches
VDD
GND
s1 = 0 s2 = 0
VDD
GND
Out = 0 V
s1 = 1 s2 = 0
Out = VDD
s1 = 0
VDD
GND
Out = 0 V
s2 = 1
VDD
Out = 0 V
s2 = 1s1 = 1
GND
s2s1
1 0
0 0
Out0 1
0
1
Copyright © by Maly 1997
Logic Gates Built with Switches
0 1
0
1
s2s1
1 1
1 0
Out
VDD
GND
s1 = 0
s2 = 0
VDD
GND
s1 = 1
s2 = 0
Out = VDD Out = VDD
VDD
GND
Out = VDD
s1 = 0
s2 = 1
VDD
Out = 0 V
s1 = 1
s2 = 1
GND
Copyright © by Maly 1997
Review: NMOS Logic
“NMOS” LogicVDD
GND
Out = 0 V
s1 = 1
s2 = 1
0 1
0
1
s2s1
1 1
1 0
Out
NAND Gate
NMOS Logic
Cons:Output Low consumes powerPull-up “weaker” than pull-downNeed resistors
Pros:For X inputs: X NMOS Transistors
Overview
MOSFETs as switchesIdeal switches & boolean operations
CMOS logic gates Basic/complex functions
Transmission gates Pass transistors
Review: CMOS Inverter
VDD
GND
Out = 1 Vs = 0
s = 0
VDD
GND
Out = 0 Vs = 1
s = 1
s2s1
- 0
1 -
Out0 1
0
1p p
n n s s
CMOS Logic Design: NAND
0 1
0
1
s2s1
1 1
1 0
Out
GND
s1
s2
nmos
nmos
s1 pmos s2 pmos
VDD VDD
output
AB
out
A B
A
B
VDD
out
CMOS Logic Design: NOR
0 1
0
1
s2s1
1 0
0 0
Out
s1 nmos s2 nmos
VDD
GND GND
s1
s2
pmos
pmos
CMOS Logic Design: ANDVDD
Outs2s1
nmoss10 1
0 0 0
DO NOT DO THIS!THIS IS BAD
1 0 1 s2 nmos
GND
s1 pmos s2
output
pmos
GND
Transistor Rules
NMOS TransistorsPass 0Don’t Pass 1 (‘weak’ 1s)
PMOS TransistorsPass 1Don’t Pass 0
CMOS Gates
PMOS Pull-up Network (PUN)NMOS Pull-down Network (PDN)
VDD
PUN
PDN
“Dual” Networks
Input(s) Output
GND
Inverting Logic
Input transition: 0 -> 1 1 -> 0
Output transition: 1 -> 0 0 -> 1
Input transition 0 -> 1 turns on NMOSInput transition 1 -> 0 turns on PMOSExamples: NAND, NOR, INVERT
Complex CMOS Design
1 1 1 1
1 0 0 0
0 0 0 0
1 1 1 1CD + BD + ADD (C + B + A)
A B C
D
NN N
N
AB
CD
00
01
11
10
00 01 11 10
~D + ~A~B~C
PP
P
P
DA
B
CF = ~((A + B + C) * D)
CMOS Logic Gates
Pros:No static power consumptionPull-up symmetric with pull-downNo resistors
Cons:X input gate: 2X transistors
Overview
MOSFETs as switchesIdeal switches & boolean operations
CMOS logic gates Basic/complex functions
Transmission gates Pass transistors
Transmission Gates
Static CMOSInputs -> transistor gatesOutputs have connection to supply
Use transistor to connect input to output?
PUN
PDNGND
OutputInput(s)
NMOS Pass Gate
Works like a switchBut NMOS doesn’t “pass 1’s”
0 11 or 0
High-Z 0 0
1
1 1 (?)
Passing 1s
VDD
The NMOS shuts off as out -> VDDVout at least VTn less than VDD
VinVDD
Vout0V 0V
VDD - VT
Transmission Gates
VDDRn
Rp
Req
R(kΩ
)
VoutGND
ComplementaryInputsThe Symbol:
Logic with T-Gates: XOR/XNOR
A
B
B
A
A ⊕ B
B
B
A
A
B
B
A ⊕ B
Summary
Discussed ConceptsMOSFETs as switchesNMOS and CMOSTransmission gates
ExamplesBasic/complex functions using CMOS
More practice Complex functions (transistor-level diagrams)
