Lec25 Power

60
1 EECS 150 - Compone nts and Desi gn Techniques for Digital Systems Lec 24 ±Power, Power, Power 11/27/2007 David Culler Electrical Engineeri ng and Computer Sciences University of California, Berkeley http://www.eecs.berkeley.edu/~culler http://inst.eecs.berkeley.edu/~cs150

Transcript of Lec25 Power

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EECS 150 - Components and DesignTechniques for Digital Systems

Lec 24 ±Power, Power, Power 

11/27/2007

David Culler Electrical Engineering and Computer SciencesUniversity of California, Berkeley

http://www.eecs.berkeley.edu/~culler http://inst.eecs.berkeley.edu/~cs150

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Broad Technology Trends

Today: 1 million transistors per $

Moore¶s Law: # transistors on

cost-effective chip doubles every

18 months

Mote! years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

Workstation

PC

Cell

1:1

1:103

Bell¶s Law: a new computer 

class emerges every 10 years

Same fabrication technology provides CMOS radios

for communication and micro-sensors

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Sustaining Moore¶s Law

³If unchecked, the increasing power requirements of computer chips couldboost heat generation to absurdly highlevels,´ said Patrick Gelsinger, Intel¶s

CTO is reported to have said.

³By mid-decade, that Pentium PC may

need the power of a nuclear reactor. Bythe end of the decade, you might aswell be feeling a rocket nozzle than

touching a chip. And soon after 2010,PC chips could feel like the bubbly hot

surface of the sun itself,´

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Power, Power, Power 

IT devices represent 2% of globalCO2 emissions worldwide

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

Workstation

PC

Cell

1:1

1:103

Mote! 

Mobil

t l com, 9%

LAN offic

t l com,

7%

Fix -li

T l com, 15%

Pri t rs, 6%

S r rs, 23%

P s

Monitors, 39%

Source Gartner 

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What is EECS150 about?

ra sf r Fu tio

ra sistor Physi s

D vi s

Gat s

Cir uits

FlipFlops

EE 40

HDL

a hi r a i atio

I stru tio S t Ar h

Pgm La guage 

Asm / a hi e La g

CS 61C

Deep Digital Design Experience

Fundamentals of Boolean Logic

Synchronous Cir cuits

Finite State achines

iming & Clocking

Device  echnology & Implications

Controller Design

Arithmetic Units

Bus Design

Encoding, Framing

Testing, Debugging

Hardwar e Ar chitectur e

HDL, Design Flow (CAD)

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Data Centers

1.5% of total US energyconsumption in 2006

60 Billion kWh

Doubled in past 5 years

and expected to double innext 5 to 100 Billion kWh ± 7.4 B$ annually

EPA report aug 4 2007 delivered tocongress in response to public law109-431

Client

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

MiniWorkstation

PC

Cell

1:1

1:103

Mote! 

48% of IT budget spent on energy

50% of data center power goes intocooling

1 MW DC => 177 M kwH + 60 Mgals water + 145 K lbs copper +

21 k lbs lead

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Servers: Total Cost of Ownership (TCO)

Machine roomsare expensive «removing heatdictates howmany servers can

fit

Electric bill addsup! Powering theservers +powering the airconditioners is abig part of TCO

Reliability: running computers hotmakes them fail more often

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M. K. Patterson, A. Pratt, P. Kumar,

³ rom UPS to Silicon: an end-to-end evaluation of datacenter efficiency´, Intel Corporation

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+1V -

1 Ohm

Resistor

1A0.24 Calories per Second

Heats 1 gram of water0.24 degree C

This is how electric tea pots work ...

1 Joule of Heat

Energy per Second

20 W rating: Maximum powerthe package is able totransfer to the air. Exceed

rating and resistor burns.

P watts = I amps * V volts

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Data Center Power Usage Today

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PC

HPxw4200 ± 180 w active with two LCDs

 ± 130 w w/o monitor, 110 w idle,

 ± 6 w suspend

60% are left on around the clock

15% of all office power 

US: ± 1.72 B$ & 15 M tons CO2 annually

Mid size company: ± 165 K$ & 1400 tons of CO2

Existing power mgmt (hibernation)can reduce by 80%

=> Do nothing well

PC Energy Report 2007, 1E

Client

EnterpriseServer 

J2EE

SO

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

MiniWorkstation

PC

Cell

1:1

1:103

Mote! 

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Do Nothing Well

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Notebooks ... now most of the PC market

Performance: Must be ´close enoughµ to desktopperformance ... many people no longer own a desktop

Heat: No longer ´laptopsµ -- top may get ´warmµ,bottom ´hotµ. Quiet fans OK

Size and Weight: Ideal: paper notebook

1 in

8.9 in

12.8 in

Apple MacBook -- Weighs 5.2 lbs

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Battery: Set by size and weight limits ...

Almost full 1 inch depth.Width and height set byavailable space, weight.

Battery rating:55 W-hour

At 2.3 GHz, IntelCore Duo CPU

consumes 31 Wrunning a heavy load- under 2 hoursbattery life! And,

 just for CPU!

At 1 GHz, CPU consumes13 Watts. ´Energy saverµ

option uses this mode ...

46x energy than iPod nano.iPod lets you listen to musicfor 14 hours!

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Battery Technology

Battery technology has developed slowly Li-Ion and NiMh still the dominate technologies

Batteries still contribute significantly to theweight of mobile devices

Toshiba ortege

110 laptop - 20%

Handspring

D - 10%Nokia 1xx -

%

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55 W-hour battery stores

the energy of 

1/2 a stick of dynamite.

If battery short-circuits, 

catastrophe is possible ...

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CPU Only Part of Power Budget

2004-era notebook running afull workload.

If our CPU took no powerat all to run, that wouldonly double battery life!CPULCD

Backlight

´otherµ

LCD

GPU

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Automobiles700 Million

Telephones4 Billion

Electronic Chips60 Billion

X-Internet

³X-Internet´ Beyond the PC

Forrester Research, May 2001Revised 2007

500Million

1.5 Billion

Internet Computers

Internet Users

Today·s Internet

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³X-Internet´ Beyond the PC

Forrester Research, May 2001

0

000

10000

1 000

   2   0   0

   1

   2   0   0

   2

   2   0   0

   2   0   0

   2   0   0

   2   0   0

   2   0   0

   2   0   0

   2   0   0    2

   0   1   0

Millions

Year

XInternet

PCInternet

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Cooling an iPod nano ...

L

ike a resistor, iPod relieson passive transfer of heatfrom case to the air

Why? Users don·t wantfans in their pocket ...

To stay ´cool to the touchµ via passive cooling,

power budget of 5 W

If iPod nano used 5W all the time, its battery would last15 minutes ...

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Powering an iPod nano (2005 edition)

Battery has 1.2 W-hourrating: Can supply1.2 W of power for 1 hour

1.2 W / 5 W = 15 minutes

Real specs for iPod nano :

14 hours for music,4 hours for slide shows

85 mW for music

300 mW for slides

More W-hours require bigger batteryand thus bigger ´form factorµ --it wouldn·t be ´nanoµ anymore!

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0.55 ounces

12 hourbattery life

$79.00

1 GB

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12 hourbattery life

24 hourbattery life foraudio

5 hour batterylife for photos

20 hour battery life for audio,6.5 hours for movies (80GB version)

Up from 14 hoursfor 2005 iPod nano

Up from 4hours for 2005

iPod nano

Thinner than 2005 iPod nano

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What¶s in the iPhone?

http://www.anandtech.com/printarticle.aspx?i=3026

Battery

Wi I antenna

GSM antenna

MotherboardUSB & GSM

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What¶s in your iPhone?

3 ARM processors

Wi i & Most of Cell Phone

Main Processor 

ARM1176 + 1GB mem

4 GB NAND lash

LCD i/f 

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iPhone Parts (?)

Baseband processor: Infineon ± S-Gold3/ARM926? Applications/video processor:

Samsung/ARM10 or 11 802.11 chip: Marvell/ARM9? Touchscreen controller: Broadcom Touchscreen: Balda/TPK Bluetooth: CSR USB IC: Alcor, Phison Audio: Wolfson Memory module: A-Data, Transcend lash memory: Samsung, Toshiba,

Hynix Position sensor (MEMS?):

STMicroelectronics, Analog

devices? Light sensor: ??? Proximity sensor: ???

Camera sensor: Micron? Camera module: Altus or Lite-On

Technology, Primax Electronics Camera lens: Largan Precision Microphone: ??? Power management: NXP? Passives: Cyntec

Quartz: TXC Assembly: oxconn, IH Casing & mechanical parts:

oxconn & Catcher  Push button: Sunrex Connectors & cable: Entery,

Cheng Uei, oxlink, AdvancedConnectek

PCB: Unimicron & Tripod

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UCB Mote Platforms

*

* Crossbow variation

*

years

omputerser Person

103:1

1:106

Laptop

PDA

Mainframe

MiniWorkstation

PC

Cell

1:1

1:103

Mote! 

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Key Design Elements

Efficient wireless protocol  primitives

Flexible sensor interface

Ultra-low power standby

Very Fast wakeup

Watchdog and Monitoring

Data SRAM is critical limiting resource

proc

DataSRAM pgm

EPROM

timersSensor Interface digital sensors

analog sensors ADC 

Wireless NetInterface

Wired NetInterface

RF 

transceiver antenna

serial link USB,EN,«

Low-power Standby & Wakeup

Flash Storage

pgm images

data logs

WD

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TinyOS-driven architecture

3K RAM = 1.5 mm2

CPU Core = 1mm2

 ± multithreaded

RF COMM stack = .5mm2

 ± HW assists for SW stack

Page mapping

SmartDust RADIO = .25 mm2

SmartDust ADC 1/64 mm2

I/O PADS

Expected sleep: 1 uW  ± 400+ years on AA

150 uW per MHz

Radio: ± .5mm2, -90dBm receive sensitivity

 ± 1 mW power at 100Kbps

ADC: ± 20 pJ/sample

 ± 10 Ksamps/second = .2 uW. jhill mar 6, 2003

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Microcontrollers

Memory starved ± Far from Amdahl-Case 3M rule

Fairly uniform active inst per nJ ± Faster MCUs generally a bit better 

 ± Improving with feature size

Min operating voltage ± 1.8 volts => most of battery energy

 ± 2.7 volts => lose half of battery energy

Standby power  ± substantial improvement in 2003

 ± Probably due to design focus

 ± Fundamentally SRAM leakage ± Wake-up time is key

Trade sleep power for wake-uptime ± Memory restore

DMA Support: permits ADCsampling while processor issleeping

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What we mean by ³Low Power´

2 AA => 1.5 amp hours (~4 watt hours)

Cell => 1 amp hour (3.5 watt hours)

Cell: 500 -1000 mW => few hours active

WiF

i: 300 - 500 mW => several hoursGPS: 50 ± 100 mW => couple days

WSN: 50 mW active, 20 uW passive

450 uW => one year 

45 uW => ~10 years

Ave Power = f act * Pact + f sleep * Psleep + f waking * Pwaking

* System design

* eakage (~R M)

* Nobody fools

mother nature

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Mote Power States at Node Level

Sleep WakeUP Work Sleep WakeUP Work

Active Active

Telos: Enabling Ultra-Low Power Wireless Research, Polastre, Szewczyk, Culler, IP SN/S POT S 2005 

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Radios

Trade-offs: ± resilience / performance => slow wake up

 ± Wakeup vs interface level

 ± Ability to optimize vs dedicated support

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Power to Communicate

0

20

40

60

80

100

120

140

0 1 2 3 4 

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Multihop Routing

Upon each transmission, one of the recipientsretransmits ± determined by source, by receiver, by «

 ± on the µedge of the cell¶

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Energy Profile of a Transmission

Power up oscillator &

radio (CC2420) Configure radio

Clear Channel

Assessment, Encrypt

and Load TX buffer 

Transmit packet

Switch to rcv mode,

listen, receive ACK

10m

20m

5 ms 10 ms

Datasheet

nalysis

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Example: TX maximum packet

0

5

10

15

20

25

-15 -10 -5 0 5 10 15

ms

    m     A

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The ³Idle Listening´ Problem

The power consumption of ³short range´ (i.e., low-power) wireless communications devices is roughlythe same whether the radio is transmitting, receiving,or simply ON, ³listening´ for potential reception ± includes IEEE 802.15.4, Zwave, Bluetooth, and the many variants

 ± WiFi too!

 ± Circuit power dominated by core, rather than large amplifiers

Radio must be ON (listening) in order receive anything. ± Transmission is infrequent. Reception Transmit x Density

 ± Listening (potentially) happens all the time

Total energy consumption dominated by idle listening 

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Communication Power Consumption

Sleep~10 uA

Transmit

~20 m x 1-5 ms

[20 - 100 u s]

I

I

Time

Time

isten

~20 m

Receive

~20 m x 2- ms

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Announcements

Project Check-offs this week ± TAs posting extra ³office hours´ for use of slip days

Dr. Robert Iannucci, Nokia on Thurs ± Bring questions, show off projects

Short HW 10 out tonight ± Due next wed.

Wrap-up and Course Survey 12/4

Project Demos Friday 12/7 ± Signup sheet is posted

 ± 5 min demo + 5 min Q&A ± Set up 20 mins in advance

Final Exam Group: 15: TUESDAY, DECEMBER 18,2007 5-8P

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Power supply provides energy for charging and discharging wiresand transistor gates. The energy supplied is stored & thendissipated as heat.

If a differential amount of charge dq is given a differential increasein energy dw, the potential of the charge is increased by:

By definition of current:dqdwV  /!

dt dq I  /!

dt dw P  /|Power: Rate  of  work being done  wrt  time 

Rate  of  energy being used 

 I dt 

dq

dq

d dt d  vv/

´g

!t 

 Pdt w total energy

Units: t  E  P  (!Wa 

tts = J oules/seconds 

A ve ry pra ct ic a l fo rmul a t ion !

If we would  l ike 

to kno w tot a 

l  ene rgy

Basics ± Power and Digital Design

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Recall: Transistor-level Logic Circuits

Inverter (NOT gate): Vdd

Gnd

Vdd

Gnd0 volts

in out

3 volts

what is therelationship

between in and out?

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Older Logic Families have Pullup R

nMOS Inverter 

R

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Switching Power 

Gate power consumption: ± Assume a gate output is switching its output at a rate of:

1/f 

P

clock f 

 f  E

 savg  E rate  s itching t  E  !(!  

221 dd avg  c f   P  ! E

221 dd avg avg avg  c f  n P  ! E

Chip/circuit power consumption:

a ctivity  f a ctor clock  r a te 

Therefore :

number  of  nodes (or   g a tes) 

(prob a bility  of  switc hing  on  a ny  p a rticul a r  clock  period) 

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Other Sources of Energy Consumption

³Short Circuit´ Current:

Vout

Vin

Vin

I

I

VoutVin

I

V

DiodeCharacter istic10-20% of total chip  power 

~1nWatt/gatefew mWatts/chip

Transistor drain regions´leakµ charge to substrate.

Junction Diode Leakage :

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Other Sources of Energy Consumption

Consumption caused by ³DC leakage current´ (Ids leakage):

This source of power consumption is becoming increasingsignificant as process technology scales down

For 90nm chips around 10-20% of total power consumptionEstimates put it at up to 50% for 65nm

Ioff 

Vout=VddVin=0

Ids

VgsVthTransistor s/d conductance

never turns off all the way

Low volta g e processes much worse

Controlling Energy Consumption:

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Controlling Energy Consumption:What Contr ol Do Y ou Have as aDesigner? 

Largest contributing component to CMOS power consumption is switching power:

Factors influencing power consumption: ± n: total number of nodes in circuit

E: activity factor (probability of each node switching)

 ± f: clock frequency (does this effect energyconsumption?)

 ± Vdd: power supply voltage What control do you have over each factor?

How does each effect the total Energy?

221 dd avg avg avg  V c f  n P  ! E

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Example

What is the cost of optimistic compute andselect?

How might we reduce it?

A B Operand Registers

add/sub and/or cmp

R

MUX

Result Register 

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Discussion: Digital Design and Power 

Think about« ± n

E

 ± f 

 ± c

 ± Vdd

In

 ±F

unction units ± Registers, FSMs, Counters

 ± Busses

 ± Clock distribution

221 dd avg avg avg  c f  n P  ! E

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Technology Scaling and Design Learning

S li S it hi E G t

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Scaling Switching Energy per Gate

Moore·s Lawat work «

From: ´Facing the Hot Chips Challenge Againµ, Bill Holt, Intel, presented at Hot Chips 17, 2005.

Due toreduced V andC (length andwidth of Csdecrease, butplate distancegets smaller)

Recent slopereducedbecause V isscaled lessaggressively

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Device Engineers Trade Speed and Power 

From: Silicon Device Scaling to the Sub-10-nm Regime

Meikei Ieong,1* Bruce Doris,2 Jakub Kedzierski,1 Ken Rim,1 Min Yang1

We can reduce leakage

(Pstandby) by raising Vt

We can increase speed

by raising Vdd

andlowering Vt

We can reduce CV2 (Pactive)by lowering Vdd

Customize processes for product types

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Customize processes for product types ...

From: ´Facing the Hot Chips Challenge Againµ, Bill Holt, Intel, presented at Hot Chips 17, 2005.

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Intel: Comparing 2 CPU Generations ...

Clock speedunchanged ... Lower Vdd, lower C,

but more leakage

Design tricks:architecture & circuits

Find enoughtricks, and

 you canafford toraise Vdd a

little so that you can raisethe clockspeed!

Switching Energy: Fundamental Physics

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Switching Energy: Fundamental Physics

Vdd

C

1

2C

Vdd

E1-

>0= 

21

2C

Vdd

E0-

>1= 

2

Vdd

Every logic transition dissipates energy

Strong result: Independent of technology

How canwe limit

switching

energy?

(1) Slow down clock (fewer transitions). But we like speed ...

(2) Reduce Vdd. But lowering Vdd lowers the clock speed ...

(3) Fewer circuits. But more transistors can do more work.

(4) Reduce C per node. One reason why we scale processes.

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0V =

Second Factor: Leakage CurrentsEven when a logic gate isn·t switching, it burns power «

Igate: Ideal capacitors havezero DC current. But moderntransistor gates are a few atomsthick, and are not ideal.

Isub: Even when this nFetis off, it passes an Ioffleakage current.

We can engineer any Ioffwe like, but a lower Ioff alsoresults in a lower Ion, and thusthe lower the clock speed.

Intel·s current processor designs,

leakage vs switching power

A lot of work wasdone to get a ratiothis good ... 50/50is common.

Bill Holt, Intel, Hot Chips 17.

Engineering ´Onµ Current at 25 nm

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59

Engineering On Current at 25 nm ...

Ids

Vs

Vd

Vg

0.7 = Vdd

0.25 § Vt

Ids

1.2 mA = Ion

Ioff

= 0 ???

We can increase Ion byraising Vdd and/or lowering Vt.

Plot on a ³Log´ Scale to See ³Off´ Current

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Plot on a Log Scale to See Off Current

IdsV

s

V

dV

g Ids

Ioff

§ 10 nA

We can decrease Ioff byraising Vt - but that lowers Ion

0.25 §V

t

1.2 mA = Ion

0.7 = V