Inverter (reviewer)

download Inverter (reviewer)

of 16

Transcript of Inverter (reviewer)

  • 8/10/2019 Inverter (reviewer)

    1/16

    Inverter (logic gate)

    From Wikipedia, the free encyclopedia

    Traditional NOT Gate (Inverter) symbol

    International Electrotechnical CommissionNOT Gate (Inverter) symbolIn digital logic, an inverteror NOT gateis alogic gatewhich implementslogical negation.Thetruth tableis shown on the right.Electronic implementation[edit]

    NMOS inverter

    PMOS inverter

    Static CMOS inverter

    INPUT OUTPUT

    A NOT A

    0 1

    1 0

    http://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=1http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=1http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=1http://en.wikipedia.org/wiki/File:CMOS_Inverter.svghttp://en.wikipedia.org/wiki/File:PMOS_NOT.pnghttp://en.wikipedia.org/wiki/File:NMOS_NOT.svghttp://en.wikipedia.org/wiki/File:IEC_NOT.svghttp://en.wikipedia.org/wiki/File:Not-gate-en.svghttp://en.wikipedia.org/wiki/File:CMOS_Inverter.svghttp://en.wikipedia.org/wiki/File:PMOS_NOT.pnghttp://en.wikipedia.org/wiki/File:NMOS_NOT.svghttp://en.wikipedia.org/wiki/File:IEC_NOT.svghttp://en.wikipedia.org/wiki/File:Not-gate-en.svghttp://en.wikipedia.org/wiki/File:CMOS_Inverter.svghttp://en.wikipedia.org/wiki/File:PMOS_NOT.pnghttp://en.wikipedia.org/wiki/File:NMOS_NOT.svghttp://en.wikipedia.org/wiki/File:IEC_NOT.svghttp://en.wikipedia.org/wiki/File:Not-gate-en.svghttp://en.wikipedia.org/wiki/File:CMOS_Inverter.svghttp://en.wikipedia.org/wiki/File:PMOS_NOT.pnghttp://en.wikipedia.org/wiki/File:NMOS_NOT.svghttp://en.wikipedia.org/wiki/File:IEC_NOT.svghttp://en.wikipedia.org/wiki/File:Not-gate-en.svghttp://en.wikipedia.org/wiki/File:CMOS_Inverter.svghttp://en.wikipedia.org/wiki/File:PMOS_NOT.pnghttp://en.wikipedia.org/wiki/File:NMOS_NOT.svghttp://en.wikipedia.org/wiki/File:IEC_NOT.svghttp://en.wikipedia.org/wiki/File:Not-gate-en.svghttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=1http://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/International_Electrotechnical_Commission
  • 8/10/2019 Inverter (reviewer)

    2/16

    NPNtransistortransistor logicinverter

    Depletion-load NMOS logicNAND

    Saturated-load NMOS inverter

    NPNresistortransistor logicinverterAn inverter circuit outputs a voltage representing the opposite logic-level to its input. Inverters can be constructed using asingleNMOStransistor or a singlePMOStransistor coupled with aresistor.Since this 'resistive-drain' approach uses only a single typeof transistor, it can be fabricated at low cost. However, because current flows through the resistor in one of the two states, the resistive-drain configuration is disadvantaged for power consumption and processing speed. Alternatively, inverters can be constructed usingtwo complementary transistors in aCMOSconfiguration. This configuration greatly reduces power consumption since one of thetransistors is always off in both logic states. Processing speed can also be improved due to the relatively low resistance compared tothe NMOS-only or PMOS-only type devices. Inverters can also be constructed withbipolar junction transistors(BJT) in either aresistortransistor logic(RTL) or atransistortransistor logic(TTL) configuration.Digitalelectronics circuits operate at fixed voltage levels corresponding to a logical 0 or 1 (seebinary). An inverter circuit serves as thebasic logic gate to swap between those two voltage levels. Implementation determines the actual voltage, but common levels include(0, +5V) for TTL circuits.Digital building block[edit]

    http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Depletion-load_NMOS_logichttp://en.wikipedia.org/wiki/Depletion-load_NMOS_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/PMOS_logichttp://en.wikipedia.org/wiki/PMOS_logichttp://en.wikipedia.org/wiki/PMOS_logichttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Digital_datahttp://en.wikipedia.org/wiki/Digital_datahttp://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=2http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=2http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=2http://en.wikipedia.org/wiki/File:Transistor_pegelumsetzer.svghttp://en.wikipedia.org/wiki/File:DigitalInverter.pnghttp://en.wikipedia.org/wiki/File:Nmos_depletion_and.svghttp://en.wikipedia.org/wiki/File:Puertas_NOT_con_transistores.jpghttp://en.wikipedia.org/wiki/File:Transistor_pegelumsetzer.svghttp://en.wikipedia.org/wiki/File:DigitalInverter.pnghttp://en.wikipedia.org/wiki/File:Nmos_depletion_and.svghttp://en.wikipedia.org/wiki/File:Puertas_NOT_con_transistores.jpghttp://en.wikipedia.org/wiki/File:Transistor_pegelumsetzer.svghttp://en.wikipedia.org/wiki/File:DigitalInverter.pnghttp://en.wikipedia.org/wiki/File:Nmos_depletion_and.svghttp://en.wikipedia.org/wiki/File:Puertas_NOT_con_transistores.jpghttp://en.wikipedia.org/wiki/File:Transistor_pegelumsetzer.svghttp://en.wikipedia.org/wiki/File:DigitalInverter.pnghttp://en.wikipedia.org/wiki/File:Nmos_depletion_and.svghttp://en.wikipedia.org/wiki/File:Puertas_NOT_con_transistores.jpghttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=2http://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/Digital_datahttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/PMOS_logichttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Depletion-load_NMOS_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic
  • 8/10/2019 Inverter (reviewer)

    3/16

    This schematic diagram shows the arrangement of NOT gates within a standard 4049 CMOS hex inverting buffer.The inverter is a basic building block in digital electronics. Multiplexers, decoders, state machines, and other sophisticated digitaldevices may use inverters.The hex inverteris anintegrated circuitthat contains six (hexa-)inverters. For example, the7404TTLchip which has 14 pins and the4049CMOSchip which has 16 pins, 2 of which are used for power/referencing, and 12 of which are used by the inputs and outputs ofthe six inverters (the 4049 has 2 pins with no connection).Alternatives[edit]If no specific NOT gates are available, one can be made fromNANDorNORgates, because NAND and NOR gates are considered the"universal gates",

    [1]meaning that they can be used to make all the others.

    NAND construction NOR construction

    Performance measurement[edit]

    Voltage transfer curve for a 20 m inverter constructed atNorth Carolina State UniversityDigital inverter quality is often measured using the voltage transfer curve (VTC), which is a plot of output vs. input voltage. From such agraph, device parameters including noise tolerance, gain, and operating logic levels can be obtained.Ideally, the VTC appears as an inverted step functionthis would indicate precise switching between onand offbut in real devices, agradual transition region exists. The VTC indicates that for low input voltage, the circuit outputs high voltage; for high input, the outputtapers off towards the low level. The slope of this transition region is a measure of qualitysteep (close to infinity) slopes yield preciseswitching.The tolerance to noise can be measured by comparing the minimum input to the maximum output for each region of operation (on / off).

    The OR gateis a digitallogic gatethat implementslogical disjunction- it behaves according to thetruth tableto the right. A HIGH

    output (1) results if one or both the inputs to the gate are HIGH (1). If neither input is high, a LOW output (0) results. In another sense,

    the function of OR effectively finds the maximumbetween two binary digits, just as the complementary AND function findsthe minimum.

    [1]

    Symbols[edit]

    There are two symbols for OR gates: the American (ANSIor 'military') symbol and the IEC ('European' or 'rectangular') symbol, as wellas the deprecatedDINsymbol.

    [2][3]For more information seeLogic Gate Symbols.

    MIL/ANSI Symbol IEC Symbol DIN Symbol

    http://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wiktionary.org/wiki/hexa-http://en.wiktionary.org/wiki/hexa-http://en.wiktionary.org/wiki/hexa-http://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=3http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=3http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=3http://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/Inverter_(logic_gate)#cite_note-1http://en.wikipedia.org/wiki/Inverter_(logic_gate)#cite_note-1http://en.wikipedia.org/wiki/Inverter_(logic_gate)#cite_note-1http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=4http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=4http://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=4http://en.wikipedia.org/wiki/North_Carolina_State_Universityhttp://en.wikipedia.org/wiki/North_Carolina_State_Universityhttp://en.wikipedia.org/wiki/North_Carolina_State_Universityhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/OR_gate#cite_note-1http://en.wikipedia.org/wiki/OR_gate#cite_note-1http://en.wikipedia.org/wiki/OR_gate#cite_note-1http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=1http://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/OR_gate#cite_note-2http://en.wikipedia.org/wiki/OR_gate#cite_note-2http://en.wikipedia.org/wiki/OR_gate#cite_note-2http://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/File:OR_DIN.svghttp://en.wikipedia.org/wiki/File:IEC_OR.svghttp://en.wikipedia.org/wiki/File:OR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:Inverter_voltage_transfer_curve.pnghttp://en.wikipedia.org/wiki/File:NOT_from_NOR.svghttp://en.wikipedia.org/wiki/File:NOT_from_NAND.svghttp://en.wikipedia.org/wiki/File:CMOS_4049_diagram.svghttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/OR_gate#cite_note-2http://en.wikipedia.org/wiki/OR_gate#cite_note-2http://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=1http://en.wikipedia.org/wiki/OR_gate#cite_note-1http://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/North_Carolina_State_Universityhttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=4http://en.wikipedia.org/wiki/Inverter_(logic_gate)#cite_note-1http://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/w/index.php?title=Inverter_(logic_gate)&action=edit&section=3http://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/7400_serieshttp://en.wiktionary.org/wiki/hexa-http://en.wikipedia.org/wiki/Integrated_circuit
  • 8/10/2019 Inverter (reviewer)

    4/16

    This schematic diagram shows the arrangement of OR gates within a standard 4071 CMOS integrated circuit.

    Hardware description and pinout[edit]OR Gates are basic logic gates, and as such they are available inTTLand CMOSICslogic families.The standard 4000seriesCMOSIC is the 4071, which includes four independent two-input OR gates. The traditional TTL version is the 7432. There aremany offshoots of the original 7432 OR gate. All have the same pinout but different internal architecture, allowing them to operate indifferent voltage ranges and/or at higher speeds. In addition to the standard 2-Input OR Gate, 3- and 4-Input OR Gates are alsoavailable. In the CMOS series, these are:4075: Triple 3-Input OR Gate4072: Dual 4-Input OR GateTTL variations include:74LS32: Quad 2-input OR gate (Low powerSchottkyversion)74HC32: Quad 2-input OR gate (High Speed CMOS version) - has lower current consumption/wider Voltage range74LVC32: Low voltage CMOS version of the same.Implementations[edit]

    NMOS OR gate

    CMOS OR gateOR gate using diodes OR gate usingtransistors

    Alternatives[edit]If no specific OR gates are available, one can be made from NAND or NOR gates in the configuration shown in the image below. Anylogic gate can be made from a combination ofNANDorNORgates.

    NAND Construction NOR construction

    Wired-OR[edit]

    http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=2http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Logic_familyhttp://en.wikipedia.org/wiki/Logic_familyhttp://en.wikipedia.org/wiki/Logic_familyhttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Schottky_barrierhttp://en.wikipedia.org/wiki/Schottky_barrierhttp://en.wikipedia.org/wiki/Schottky_barrierhttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=3http://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=4http://en.wikipedia.org/wiki/NAND_gatehttp://en.wikipedia.org/wiki/NAND_gatehttp://en.wikipedia.org/wiki/NAND_gatehttp://en.wikipedia.org/wiki/NOR_gatehttp://en.wikipedia.org/wiki/NOR_gatehttp://en.wikipedia.org/wiki/NOR_gatehttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=5http://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/wiki/File:OR_using_NOR.svghttp://en.wikipedia.org/wiki/File:OR_using_NAND.svghttp://en.wikipedia.org/wiki/File:Transistor_OR_Gate.pnghttp://en.wikipedia.org/wiki/File:Diode_OR_Gate..pnghttp://en.wikipedia.org/wiki/File:CMOS_OR_4T.pnghttp://en.wikipedia.org/wiki/File:NMOS_OR_gate.pnghttp://en.wikipedia.org/wiki/File:CMOS_4071_diagram.svghttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=5http://en.wikipedia.org/wiki/NOR_gatehttp://en.wikipedia.org/wiki/NAND_gatehttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=4http://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=3http://en.wikipedia.org/wiki/Schottky_barrierhttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Logic_familyhttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/w/index.php?title=OR_gate&action=edit&section=2
  • 8/10/2019 Inverter (reviewer)

    5/16

    Wired OR gate using open-collector NOR gatesWithactive lowopen collectorlogic outputs, as used for control signals in many circuits, an OR function can be produced by wiringtogether several outputs. This arrangement is called a wired OR. This implementation of an OR function typically is also found inintegrated circuits of N or P-type only transistor processes.

    The AND gateis a basic digitallogic gatethat implementslogical conjunction- it behaves according to thetruth tableto the right. AHIGH output (1) results only if both the inputs to the AND gate are HIGH (1). If neither or only one input to the AND gate is HIGH, aLOW output results. In another sense, the function of AND effectively finds the minimumbetween two binary digits, just astheORfunction finds the maximum. Therefore, the output is always 0 except when all the inputs are 1s.Symbols[edit]

    There are three symbols for AND gates: the American (ANSIor 'military') symbol and theIEC('European' or 'rectangular') symbol, aswell as the deprecatedDINsymbol. For more information seeLogic Gate Symbols.

    MIL/ANSI Symbol IEC Symbol DIN Symbol

    The AND gate with inputsAand Band output Cimplements the logical expression .Implementations[edit]

    NMOS AND gate AND gate using diodes AND gate using transistors

    An AND gate is usually designed using N-channel (pictured) or P-channelMOSFETs.The digital inputs aand bcause the output Ftohave the same result as the AND function.Alternatives[edit]

    If no specific AND gates are available, one can be made fromNANDorNORgates, because NAND and NOR gates are considered the

    "universal gates,"[1]meaning that they can be used to make all the others. XOR Gates can also be used to simulate AND functions, butare rarely used to do so.

    Desired gate NAND construction NOR construction

    The NOR gateis a digitallogic gatethat implementslogical NOR- it behaves according to the truth table to the right. A HIGH output (1)results if both the inputs to the gate are LOW (0); if one or both input is HIGH (1), a LOW output (0) results. NOR is the result of

    http://en.wikipedia.org/wiki/Logic_levelhttp://en.wikipedia.org/wiki/Logic_levelhttp://en.wikipedia.org/wiki/Open_collectorhttp://en.wikipedia.org/wiki/Open_collectorhttp://en.wikipedia.org/wiki/Open_collectorhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/OR_gatehttp://en.wikipedia.org/wiki/OR_gatehttp://en.wikipedia.org/wiki/OR_gatehttp://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=1http://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/Deutsches_Institut_f%C3%BCr_Normunghttp://en.wikipedia.org/wiki/Deutsches_Institut_f%C3%BCr_Normunghttp://en.wikipedia.org/wiki/Deutsches_Institut_f%C3%BCr_Normunghttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=2http://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=3http://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/AND_gate#cite_note-1http://en.wikipedia.org/wiki/AND_gate#cite_note-1http://en.wikipedia.org/wiki/AND_gate#cite_note-1http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_NORhttp://en.wikipedia.org/wiki/Logical_NORhttp://en.wikipedia.org/wiki/Logical_NORhttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/File:AND_using_NOR.svghttp://en.wikipedia.org/wiki/File:AND_from_NAND.svghttp://en.wikipedia.org/wiki/File:AND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:TransistorANDgate.pnghttp://en.wikipedia.org/wiki/File:DiodeANDgate.pnghttp://en.wikipedia.org/wiki/File:NMOS_AND_gate.pnghttp://en.wikipedia.org/wiki/File:AND_DIN.svghttp://en.wikipedia.org/wiki/File:AND_IEC.svghttp://en.wikipedia.org/wiki/File:AND_ANSI.svghttp://en.wikipedia.org/wiki/File:Wired_or.pnghttp://en.wikipedia.org/wiki/Logical_NORhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/AND_gate#cite_note-1http://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NAND_Gatehttp://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=3http://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=2http://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Deutsches_Institut_f%C3%BCr_Normunghttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/American_National_Standards_Institutehttp://en.wikipedia.org/w/index.php?title=AND_gate&action=edit&section=1http://en.wikipedia.org/wiki/OR_gatehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Open_collectorhttp://en.wikipedia.org/wiki/Logic_level
  • 8/10/2019 Inverter (reviewer)

    6/16

    thenegationof theORoperator. It can also be seen as an AND gate with all the inputs inverted. NOR is afunctionallycompleteoperationNOR gates can be combined to generate any other logical function. By contrast, theORoperator is monotonicasit can only change LOW to HIGH but not vice versa.In most, but not all, circuit implementations, the negation comes for freeincludingCMOSandTTL.In such logic families, OR is themore complicated operation; it may use a NOR followed by a NOT. A significant exception is some forms of thedomino logicfamily.The originalApollo Guidance Computerused 4,100 ICs, each one containing only a single 3-input NOR gate.Symbols[edit]

    There are three symbols for NOR gates: the American (ANSI or 'military') symbol and the IEC ('European' or 'rectangular') symbol, aswell as the deprecatedDINsymbol. For more information seeLogic Gate Symbols.

    MIL/ANSI Symbol IEC Symbol DIN Symbol

    Indigital electronics,a NAND gate(Negated ANDor NOT AND) is alogic gatewhich produces an output that is false only if all itsinputs are true; thus its output iscomplementto that of theAND gate.A LOW (0) output results only if both the inputs to the gate areHIGH (1); if one or both inputs are LOW (0), a HIGH (1) output results. It is made using transistors.The NAND gate is significant because anyboolean functioncan be implemented by using a combination of NAND gates. This propertyis calledfunctional completeness.Digital systems employing certain logic circuits take advantage of NAND's functional completeness.The function NAND(a1, a2, ..., an) islogically equivalentto NOT(a1AND a2AND ... AND an).Symbols[edit]

    There are three symbols for NAND gates: the MIL/ANSIsymbol, theIECsymbol and the deprecatedDINsymbol sometimes found onold schematics. For more information seelogic gate symbols.

    MIL/ANSI Symbol IEC Symbol DIN Symbol

    Hardware description and pinout[edit]NAND gates are basic logic gates, and as such they are recognised inTTLandCMOSICs.

    This schematic diagram shows the arrangement of NAND gates within a standard 4011 CMOS integrated circuit.CMOS version[edit]

    The standard,4000 series,CMOSICis the 4011, which includes four independent, two-input, NAND gates.Availability[edit]

    These devices are available from most semiconductor manufacturers such asFairchild Semiconductor,PhilipsorTexas Instruments.These are usually available in both through-holeDILandSOICformat. Datasheets are readily available in mostdatasheet databases.The standard 2-, 3-, 4- and 8-input NAND gates are available:CMOS4011: Quad 2-input NAND gate4023: Triple 3-input NAND gate4012: Dual 4-input NAND gate4068: Mono 8-input NAND gateTTL7400: Quad 2-input NAND gate7410: Triple 3-input NAND gate7420: Dual 4-input NAND gate

    http://en.wikipedia.org/wiki/Negationhttp://en.wikipedia.org/wiki/Negationhttp://en.wikipedia.org/wiki/Negationhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Domino_logichttp://en.wikipedia.org/wiki/Domino_logichttp://en.wikipedia.org/wiki/Domino_logichttp://en.wikipedia.org/wiki/Apollo_Guidance_Computerhttp://en.wikipedia.org/wiki/Apollo_Guidance_Computerhttp://en.wikipedia.org/wiki/Apollo_Guidance_Computerhttp://en.wikipedia.org/w/index.php?title=NOR_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=NOR_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=NOR_gate&action=edit&section=1http://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Digital_electronicshttp://en.wikipedia.org/wiki/Digital_electronicshttp://en.wikipedia.org/wiki/Digital_electronicshttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Complement_(set_theory)http://en.wikipedia.org/wiki/Complement_(set_theory)http://en.wikipedia.org/wiki/Complement_(set_theory)http://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/Logical_equivalencehttp://en.wikipedia.org/wiki/Logical_equivalencehttp://en.wikipedia.org/wiki/Logical_equivalencehttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=1http://en.wikipedia.org/wiki/ANSIhttp://en.wikipedia.org/wiki/ANSIhttp://en.wikipedia.org/wiki/ANSIhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=2http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=3http://en.wikipedia.org/wiki/4000_serieshttp://en.wikipedia.org/wiki/4000_serieshttp://en.wikipedia.org/wiki/4000_serieshttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=4http://en.wikipedia.org/wiki/Fairchild_Semiconductorhttp://en.wikipedia.org/wiki/Fairchild_Semiconductorhttp://en.wikipedia.org/wiki/Fairchild_Semiconductorhttp://en.wikipedia.org/wiki/Philipshttp://en.wikipedia.org/wiki/Philipshttp://en.wikipedia.org/wiki/Philipshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Dual_in-line_packagehttp://en.wikipedia.org/wiki/Dual_in-line_packagehttp://en.wikipedia.org/wiki/Dual_in-line_packagehttp://en.wikipedia.org/wiki/Small_Outline_Integrated_Circuithttp://en.wikipedia.org/wiki/Small_Outline_Integrated_Circuithttp://en.wikipedia.org/wiki/Small_Outline_Integrated_Circuithttp://en.wikipedia.org/wiki/Datasheet#Datasheet_Search_Engineshttp://en.wikipedia.org/wiki/Datasheet#Datasheet_Search_Engineshttp://en.wikipedia.org/wiki/Datasheet#Datasheet_Search_Engineshttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:4011_Pinout.svghttp://en.wikipedia.org/wiki/File:NAND_DIN.svghttp://en.wikipedia.org/wiki/File:NAND_IEC.svghttp://en.wikipedia.org/wiki/File:NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/File:NOR_DIN.svghttp://en.wikipedia.org/wiki/File:NOR_IEC.svghttp://en.wikipedia.org/wiki/File:NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Datasheet#Datasheet_Search_Engineshttp://en.wikipedia.org/wiki/Small_Outline_Integrated_Circuithttp://en.wikipedia.org/wiki/Dual_in-line_packagehttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Philipshttp://en.wikipedia.org/wiki/Fairchild_Semiconductorhttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=4http://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/4000_serieshttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=3http://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=2http://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/wiki/International_Electrotechnical_Commissionhttp://en.wikipedia.org/wiki/ANSIhttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=1http://en.wikipedia.org/wiki/Logical_equivalencehttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/Complement_(set_theory)http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Digital_electronicshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/DINhttp://en.wikipedia.org/w/index.php?title=NOR_gate&action=edit&section=1http://en.wikipedia.org/wiki/Apollo_Guidance_Computerhttp://en.wikipedia.org/wiki/Domino_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Negation
  • 8/10/2019 Inverter (reviewer)

    7/16

    7430: Mono 8-input NAND gateImplementations[edit]The NAND gate has the property offunctional completeness.That is, any other logic function (AND, OR, etc.) canbeimplementedusing only NAND gates.

    [1]An entire processor can be created using NAND gates alone. In TTL ICs using multiple-

    emittertransistors,it also requires fewer transistors than a NOR gate.

    NMOSNANDgate

    CMOSNANDgate

    TTLNAND gate Thephysicallayoutof a CMOSNAND

    Dieof a 74AHC00D quad 2-input NANDgate manufactured byNXPSemiconductors.

    Alternatives[edit]If no specific NAND gates are available, one can be made fromNORgates, because NAND and NOR gates are considered the"universal gates", meaning that they can be used to make all the others.

    [1]

    NOR construction

    The XOR gate(sometimes EOR gate, or EXOR gateand pronounced as Exclusive OR gate) is a digitallogic gatethat implementsanexclusive or;that is, a true output (1/HIGH) results if one, and only one, of the inputs to the gate is true. If both inputs are false(0/LOW) or both are true, a false output results. XOR represents the inequality function, i.e., the output is true if the inputs are not alikeotherwise the output is false. A way to remember XOR is "one or the other but not both".XOR can also be viewed as addition modulo 2. As a result, XOR gates are used to implement binary addition in computers. AHalf

    adderconsists of an XOR gate and anAND gate.Other uses include substractors, comparators, and controlled inverters.

    [1]

    Thealgebraic expressions and ( ) both represent the XOR gate with inputsAand B.The behavior of XOR is summarized in thetruth tableshown on the right.

    CMOS XOR gateSymbols[edit]

    There are two symbols for XOR gates: the traditional symbol and theIEEEsymbol. For more information seeLogic Gate Symbols.

    Traditional XOR Symbol

    IEEE XOR SymbolThelogic symbolsand can be used to denote XOR in algebraic expressions.

    http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=5http://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/Transistorshttp://en.wikipedia.org/wiki/Transistorshttp://en.wikipedia.org/wiki/Transistorshttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Physical_layouthttp://en.wikipedia.org/wiki/Physical_layouthttp://en.wikipedia.org/wiki/Physical_layouthttp://en.wikipedia.org/wiki/Physical_layouthttp://en.wikipedia.org/wiki/Die_(integrated_circuit)http://en.wikipedia.org/wiki/Die_(integrated_circuit)http://en.wikipedia.org/wiki/NXP_Semiconductorshttp://en.wikipedia.org/wiki/NXP_Semiconductorshttp://en.wikipedia.org/wiki/NXP_Semiconductorshttp://en.wikipedia.org/wiki/NXP_Semiconductorshttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=6http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=6http://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=6http://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/Adder_(electronics)#half_adderhttp://en.wikipedia.org/wiki/Adder_(electronics)#half_adderhttp://en.wikipedia.org/wiki/Adder_(electronics)#half_adderhttp://en.wikipedia.org/wiki/Adder_(electronics)#half_adderhttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/XOR_gate#cite_note-1http://en.wikipedia.org/wiki/XOR_gate#cite_note-1http://en.wikipedia.org/wiki/XOR_gate#cite_note-1http://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=1http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=1http://en.wikipedia.org/wiki/Institute_of_Electrical_and_Electronics_Engineershttp://en.wikipedia.org/wiki/Institute_of_Electrical_and_Electronics_Engineershttp://en.wikipedia.org/wiki/Institute_of_Electrical_and_Electronics_Engineershttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/List_of_logic_symbolshttp://en.wikipedia.org/wiki/List_of_logic_symbolshttp://en.wikipedia.org/wiki/List_of_logic_symbolshttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/File:XOR_IEC.svghttp://en.wikipedia.org/wiki/File:XOR_ANSI.svghttp://en.wikipedia.org/wiki/File:CMOS_XOR_Gate.svghttp://en.wikipedia.org/wiki/File:NAND_from_NOR.svghttp://en.wikipedia.org/wiki/File:NXP-74AHC00D-HD.jpghttp://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svghttp://en.wikipedia.org/wiki/File:TTL_npn_nand.svghttp://en.wikipedia.org/wiki/File:CMOS_NAND.svghttp://en.wikipedia.org/wiki/File:NMOS_NAND.svghttp://en.wikipedia.org/wiki/List_of_logic_symbolshttp://en.wikipedia.org/wiki/Logic_gate#Symbolshttp://en.wikipedia.org/wiki/Institute_of_Electrical_and_Electronics_Engineershttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=1http://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/XOR_gate#cite_note-1http://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/Adder_(electronics)#half_adderhttp://en.wikipedia.org/wiki/Adder_(electronics)#half_adderhttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/NOR_Gatehttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=6http://en.wikipedia.org/wiki/NXP_Semiconductorshttp://en.wikipedia.org/wiki/NXP_Semiconductorshttp://en.wikipedia.org/wiki/Die_(integrated_circuit)http://en.wikipedia.org/wiki/Physical_layouthttp://en.wikipedia.org/wiki/Physical_layouthttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/Transistorshttp://en.wikipedia.org/wiki/NAND_gate#cite_note-Mano-1http://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/Functional_completenesshttp://en.wikipedia.org/w/index.php?title=NAND_gate&action=edit&section=5
  • 8/10/2019 Inverter (reviewer)

    8/16

    C-like languagesuse thecaretsymbol ^to denote bitwise XOR. (Note that the caret does not denotelogical conjunction(AND) in theselanguages, despite the similarity of symbol.)Alternatives[edit]

    If a specific type of gate is not available, a circuit that implements the same function can be constructed from other available gates. Acircuit implementing an XOR function can be trivially constructed from an XNOR gate followed by a NOT gate. If we consider the

    expression , we can construct an XOR gate circuit directly using AND, OR and NOT gates. However, thisapproach requires five gates of three different kinds.

    An XOR gate circuit can be made from four NAND or five NOR gates in the configurations shown below . In fact, both NAND and NORgates are so-called "universal gates," and any logical function can be constructed from eitherNAND logicorNOR logicalone.

    As an alternative, if different gates are available we can applyBoolean algebrato transform

    ( ) as stated above, and applyde Morgan's Lawto the last term to get which can beimplemented using only three gates as shown below.

    XOR gate circuit constructed using only NAND gates.

    XOR gate circuit constructed using only NOR gates.

    XOR gate circuit using three mixed gates

    More than two inputs[edit]

    Strict reading of the definition ofexclusive or,or observation of the IEC rectangular symbol, raises the question of correct behaviourwith additional inputs. If a logic gate were to accept three or more inputs and produce a true output if exactly one of those inputs weretrue, then it would in effect be aone-hotdetector (and indeed this is the case for only two inputs). However, it is rarely implemented this

    way in practice.It is most common to regard subsequent inputs as being applied through a cascade of binary exclusive-or operations: the first twosignals are fed into an XOR gate, then the output of that gate is fed into a second XOR gate together with the third signal, and so on forany remaining signals. The result is a circuit that outputs a 1 when the number of 1s at its inputs is odd, and a 0 when the number ofincoming 1s is even. This makes it practically useful as aparity generatoror a modulo-2adder.For example, the 74LVC1G386 microchip is advertised as a three-input logic gate, and implements a parity generator.

    [2]

    Applications[edit]

    Uses in addition[edit]The XOR logic gate can be used as a one-bitadderthat adds any two bits together to output one bit. For example, if weadd 1plus 1inbinary,we expect a two-bit answer, 10(i.e. 2in decimal). Since the trailing sumbit in this output is achieved with XOR,the preceding carrybit is calculated with anAND gate.This is the main principle inHalf Addersand the combined AND-XOR circuit maybe chained together in order to add ever longer binary numbers.

    Example half adder circuit diagram

    Pseudo-random number generation[edit]Pseudo-random number (PRN) generators, specificallyLinear feedback shift registers,are defined in terms of the exclusive-oroperation. Hence, a suitable setup of XOR gates can model a linear feedback shift register, in order to generate random numbers.Correlation and sequence detection[edit]XOR gates produce a 0when both inputs match. When searching for a specific bit pattern or PRN sequence in a very long datasequence, a series of XOR gates can be used to compare a string of bits from the data sequence against the target sequence inparallel. The number of 0outputs can then be counted to determine how well the data sequence matches the target sequence.

    http://en.wikipedia.org/wiki/C_programming_languagehttp://en.wikipedia.org/wiki/C_programming_languagehttp://en.wikipedia.org/wiki/Caret#Programming_languageshttp://en.wikipedia.org/wiki/Caret#Programming_languageshttp://en.wikipedia.org/wiki/Caret#Programming_languageshttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=2http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=2http://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/wiki/NOR_logichttp://en.wikipedia.org/wiki/NOR_logichttp://en.wikipedia.org/wiki/NOR_logichttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/De_Morgan%27s_Lawhttp://en.wikipedia.org/wiki/De_Morgan%27s_Lawhttp://en.wikipedia.org/wiki/De_Morgan%27s_Lawhttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=3http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=3http://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/wiki/One-hothttp://en.wikipedia.org/wiki/One-hothttp://en.wikipedia.org/wiki/One-hothttp://en.wikipedia.org/wiki/Parity_(telecommunication)http://en.wikipedia.org/wiki/Parity_(telecommunication)http://en.wikipedia.org/wiki/Parity_(telecommunication)http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/XOR_gate#cite_note-74LVC1G386-2http://en.wikipedia.org/wiki/XOR_gate#cite_note-74LVC1G386-2http://en.wikipedia.org/wiki/XOR_gate#cite_note-74LVC1G386-2http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=4http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=5http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/Adder_(electronics)#Half_adderhttp://en.wikipedia.org/wiki/Adder_(electronics)#Half_adderhttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=6http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=6http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=6http://en.wikipedia.org/wiki/Linear_feedback_shift_registerhttp://en.wikipedia.org/wiki/Linear_feedback_shift_registerhttp://en.wikipedia.org/wiki/Linear_feedback_shift_registerhttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=7http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=7http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=7http://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/wiki/File:Half_Adder.svghttp://en.wikipedia.org/wiki/File:254px_3gate_XOR.jpghttp://en.wikipedia.org/wiki/File:XOR_from_NOR.svghttp://en.wikipedia.org/wiki/File:XOR_from_NAND.svghttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=7http://en.wikipedia.org/wiki/Linear_feedback_shift_registerhttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=6http://en.wikipedia.org/wiki/Adder_(electronics)#Half_adderhttp://en.wikipedia.org/wiki/AND_gatehttp://en.wikipedia.org/wiki/Binary_numeral_systemhttp://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=5http://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=4http://en.wikipedia.org/wiki/XOR_gate#cite_note-74LVC1G386-2http://en.wikipedia.org/wiki/Adder_(electronics)http://en.wikipedia.org/wiki/Parity_(telecommunication)http://en.wikipedia.org/wiki/One-hothttp://en.wikipedia.org/wiki/Exclusive_orhttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=3http://en.wikipedia.org/wiki/De_Morgan%27s_Lawhttp://en.wikipedia.org/wiki/Boolean_algebrahttp://en.wikipedia.org/wiki/NOR_logichttp://en.wikipedia.org/wiki/NAND_logichttp://en.wikipedia.org/w/index.php?title=XOR_gate&action=edit&section=2http://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Caret#Programming_languageshttp://en.wikipedia.org/wiki/C_programming_language
  • 8/10/2019 Inverter (reviewer)

    9/16

    Correlators are used in many communications devices such asCDMAreceivers and decoders for error correction and channel codes.In a CDMA receiver, correlators are used to extract the polarity of a specific PRN sequence out of a combined collection of PRNsequences.

    A correlator looking for 11010in the data sequence 1110100101would compare the incoming data bits against the target sequence atevery possible offset while counting the number of matches (zeros):

    1110100101 (data)

    11010 (target)

    00111 (XOR) 2 zero bits

    1110100101

    1101000000 5 zero bits

    1110100101

    11010

    01110 2 zero bits

    1110100101

    11010

    10011 2 zero bits

    1110100101

    11010

    01000 4 zero bits

    111010010111010

    11111 0 zero bits

    Matches by offset:

    .

    : :

    : : : : :

    -----------

    0 1 2 3 4 5

    In this example, the best match occurs when the target sequence is offset by 1 bit and all five bits match. When offset by 5 bits, thesequence exactly matches its inverse. By looking at the difference between the number of ones and zeros that come out of the bank ofXOR gates, it is easy to see where the sequence occurs and whether or not it is inverted. Longer sequences are easier to detect thanshort sequences.

    Transistortransistor logic(TTL) is a class ofdigital circuitsbuilt frombipolar junction transistors(BJT) andresistors.It iscalled transistortransistor logicbecause both the logic gating function (e.g.,AND)and the amplifying function are performed bytransistors (contrast withRTLandDTL).TTL is notable for being a widespreadintegrated circuit(IC) family used in many applications such ascomputers,industrial controls,test equipment and instrumentation, consumer electronics,synthesizers,etc. The designation TTLis sometimes used to meanTTL-compatible logic levels,even when not associated directly with TTL integrated circuits, for example as a label on the inputs and outputsof electronic instruments.

    [1]

    After their introduction in integrated circuit form in 1963 by Sylvania, TTL integrated circuits were manufactured by severalsemiconductor companies, with the7400 seriesbyTexas Instrumentsbecoming particularly popular. TTL manufacturers offered a widerange of logic gate, flip-flops, counters, and other circuits. Several variations from the original bipolar TTL concept were developed,giving circuits with higher speed or lower power dissipation to allow optimization of a design. TTL circuits simplified design of systemscompared to earlier logic families, offering superior speed toresistortransistor logic(RTL) and easier design layout thanemitter-coupled logic(ECL). The design of the input and outputs of TTL gates allowed many elements to be interconnected.

    TTL became the foundation of computers and other digital electronics. Even after much larger scale integrated circuits made multiple-circuit-board processors obsolete, TTL devices still found extensive use as the "glue" logic interfacing more densely integratedcomponents. TTL devices were originally made in ceramic and plastic dual-in-line (DIP) packages, and flat-pack form. TTL chips arenow also made in surface-mount packages. Successors to the original bipolar TTL logic often are interchangeable in function with theoriginal circuits, but with improved speed or lower power dissipation.History[edit]

    http://en.wikipedia.org/wiki/CDMAhttp://en.wikipedia.org/wiki/CDMAhttp://en.wikipedia.org/wiki/CDMAhttp://en.wikipedia.org/wiki/Digital_circuithttp://en.wikipedia.org/wiki/Digital_circuithttp://en.wikipedia.org/wiki/Digital_circuithttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Diode%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Diode%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Diode%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Synthesizerhttp://en.wikipedia.org/wiki/Synthesizerhttp://en.wikipedia.org/wiki/Synthesizerhttp://en.wikipedia.org/wiki/Digital_signal#Logic_voltage_levelshttp://en.wikipedia.org/wiki/Digital_signal#Logic_voltage_levelshttp://en.wikipedia.org/wiki/Digital_signal#Logic_voltage_levelshttp://en.wikipedia.org/wiki/Digital_signal#Logic_voltage_levelshttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-1http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-1http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-1http://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Emitter-coupled_logichttp://en.wikipedia.org/wiki/Emitter-coupled_logichttp://en.wikipedia.org/wiki/Emitter-coupled_logichttp://en.wikipedia.org/wiki/Emitter-coupled_logichttp://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=1http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=1http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=1http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=1http://en.wikipedia.org/wiki/Emitter-coupled_logichttp://en.wikipedia.org/wiki/Emitter-coupled_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-1http://en.wikipedia.org/wiki/Digital_signal#Logic_voltage_levelshttp://en.wikipedia.org/wiki/Digital_signal#Logic_voltage_levelshttp://en.wikipedia.org/wiki/Synthesizerhttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Diode%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Resistor%E2%80%93transistor_logichttp://en.wikipedia.org/wiki/Logical_conjunctionhttp://en.wikipedia.org/wiki/Resistorhttp://en.wikipedia.org/wiki/Bipolar_junction_transistorhttp://en.wikipedia.org/wiki/Digital_circuithttp://en.wikipedia.org/wiki/CDMA
  • 8/10/2019 Inverter (reviewer)

    10/16

    A real-time clock built of TTL chips around 1979.TTL was invented in 1961 by James L. Buie ofTRW,"particularly suited to the newly developing integrated circuit design technology",and it was originally named transistor-coupled transistor logic(TCTL).

    [2]The first commercial integrated-circuit TTL devices were

    manufactured bySylvaniain 1963, called the Sylvania Universal High-Level Logic family (SUHL).[3]

    The Sylvania parts were used in thecontrols of thePhoenix missile.

    [3]TTL became popular with electronic systems designers afterTexas Instrumentsintroduced the 5400

    series of ICs, with military temperature range, in 1964 and the later7400 series,specified over a narrower range, and with inexpensiveplastic packages in 1966.

    [4]

    The Texas Instruments 7400 family became an industry standard. Compatible parts were madebyMotorola,AMD,Fairchild,Intel,Intersil,Signetics,Mullard,Siemens,SGS-ThomsonandNational Semiconductor,

    [5][6]and many other

    companies, even in the Eastern Bloc (Soviet Union, GDR, Poland, Bulgaria).[citation needed]

    Not only did others make compatible TTL parts

    but compatible parts were made using many other circuit technologies as well. At least one manufacturer,IBM,produced non-compatible TTL circuits for its own use; IBM used the technology in theIBM System/38,IBM 4300,andIBM 3081.

    [7]

    The term "TTL" is applied to many successive generations ofbipolarlogic, with gradual improvements in speed and power consumptionover about two decades. The most recently introduced family

    [citation needed], 74AS/ALS Advanced Schottky, was introduced in 1985.

    [8]As

    of 2008, Texas Instruments continues to supply the more general-purpose chips in numerous obsolete technology families, albeit atincreased prices. Typically, TTL chips integrate no more than a few hundred transistors each. Functions within a single packagegenerally range from a fewlogic gatesto a microprocessorbit-slice.TTL also became important because its low cost made digitaltechniques economically practical for tasks previously done by analog methods.

    [9]

    TheKenbak-1,ancestor to the firstpersonal computers,used TTL for itsCPUinstead of amicroprocessorchip, which was notavailable in 1971.

    [10]The 1973Xerox Altoand 1981Starworkstations, which introduced thegraphical user interface,used TTL circuits

    integrated at the level ofALUsand bitslices, respectively. Most computers used TTL-compatible "glue logic"between larger chips wellinto the 1990s. Until the advent ofprogrammable logic,discrete bipolar logic was used to prototypeandemulatemicroarchitecturesunder development.Implementation[edit]

    Fundamental TTL gate[edit]

    Two-input TTLNAND gatewith a simple output stage (simplified).

    http://en.wikipedia.org/wiki/TRW_Inc.http://en.wikipedia.org/wiki/TRW_Inc.http://en.wikipedia.org/wiki/TRW_Inc.http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-Buie-2http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-Buie-2http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-Buie-2http://en.wikipedia.org/wiki/Sylvania_Electric_Productshttp://en.wikipedia.org/wiki/Sylvania_Electric_Productshttp://en.wikipedia.org/wiki/Sylvania_Electric_Productshttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-The_Computer_History_Museum_2007-3http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-The_Computer_History_Museum_2007-3http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-The_Computer_History_Museum_2007-3http://en.wikipedia.org/wiki/Phoenix_missilehttp://en.wikipedia.org/wiki/Phoenix_missilehttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-The_Computer_History_Museum_2007-3http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-The_Computer_History_Museum_2007-3http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-The_Computer_History_Museum_2007-3http://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/Texas_Instrumentshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/7400_serieshttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-4http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-4http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-4http://en.wikipedia.org/wiki/Motorolahttp://en.wikipedia.org/wiki/Motorolahttp://en.wikipedia.org/wiki/Motorolahttp://en.wikipedia.org/wiki/AMDhttp://en.wikipedia.org/wiki/AMDhttp://en.wikipedia.org/wiki/AMDhttp://en.wikipedia.org/wiki/Fairchild_Semiconductorhttp://en.wikipedia.org/wiki/Fairchild_Semiconductorhttp://en.wikipedia.org/wiki/Intelhttp://en.wikipedia.org/wiki/Intelhttp://en.wikipedia.org/wiki/Intelhttp://en.wikipedia.org/wiki/Intersilhttp://en.wikipedia.org/wiki/Intersilhttp://en.wikipedia.org/wiki/Intersilhttp://en.wikipedia.org/wiki/Signeticshttp://en.wikipedia.org/wiki/Signeticshttp://en.wikipedia.org/wiki/Signeticshttp://en.wikipedia.org/wiki/Mullardhttp://en.wikipedia.org/wiki/Mullardhttp://en.wikipedia.org/wiki/Mullardhttp://en.wikipedia.org/wiki/Siemenshttp://en.wikipedia.org/wiki/Siemenshttp://en.wikipedia.org/wiki/Siemenshttp://en.wikipedia.org/wiki/SGS-Thomsonhttp://en.wikipedia.org/wiki/SGS-Thomsonhttp://en.wikipedia.org/wiki/SGS-Thomsonhttp://en.wikipedia.org/wiki/National_Semiconductorhttp://en.wikipedia.org/wiki/National_Semiconductorhttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-5http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-5http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-5http://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/IBMhttp://en.wikipedia.org/wiki/IBMhttp://en.wikipedia.org/wiki/IBMhttp://en.wikipedia.org/wiki/IBM_System/38http://en.wikipedia.org/wiki/IBM_System/38http://en.wikipedia.org/wiki/IBM_System/38http://en.wikipedia.org/wiki/IBM_4300http://en.wikipedia.org/wiki/IBM_4300http://en.wikipedia.org/wiki/IBM_4300http://en.wikipedia.org/wiki/IBM_3081http://en.wikipedia.org/wiki/IBM_3081http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-7http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-7http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-7http://en.wikipedia.org/wiki/BJThttp://en.wikipedia.org/wiki/BJThttp://en.wikipedia.org/wiki/BJThttp://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/Wikipedia:Citation_neededhttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-8http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-8http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-8http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Bit-slicehttp://en.wikipedia.org/wiki/Bit-slicehttp://en.wikipedia.org/wiki/Bit-slicehttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-9http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-9http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-9http://en.wikipedia.org/wiki/Kenbak-1http://en.wikipedia.org/wiki/Kenbak-1http://en.wikipedia.org/wiki/Kenbak-1http://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/CPUhttp://en.wikipedia.org/wiki/CPUhttp://en.wikipedia.org/wiki/CPUhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-10http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-10http://en.wikipedia.org/wiki/Transistor%E2%80%93transistor_logic#cite_note-10http://en.wikipedia.org/wiki/Xerox_Altohttp://en.wikipedia.org/wiki/Xerox_Altohttp://en.wikipedia.org/wiki/Xerox_Altohttp://en.wikipedia.org/wiki/Xerox_Starhttp://en.wikipedia.org/wiki/Xerox_Starhttp://en.wikipedia.org/wiki/Xerox_Starhttp://en.wikipedia.org/wiki/Graphical_user_interfacehttp://en.wikipedia.org/wiki/Graphical_user_interfacehttp://en.wikipedia.org/wiki/Graphical_user_interfacehttp://en.wikipedia.org/wiki/Arithmetic_logic_unithttp://en.wikipedia.org/wiki/Arithmetic_logic_unithttp://en.wikipedia.org/wiki/Arithmetic_logic_unithttp://en.wikipedia.org/wiki/Glue_logichttp://en.wikipedia.org/wiki/Glue_logichttp://en.wikipedia.org/wiki/Glue_logichttp://en.wikipedia.org/wiki/Programmable_logic_devicehttp://en.wikipedia.org/wiki/Programmable_logic_devicehttp://en.wikipedia.org/wiki/Programmable_logic_devicehttp://en.wikipedia.org/wiki/Hardware_emulationhttp://en.wikipedia.org/wiki/Hardware_emulationhttp://en.wikipedia.org/wiki/Microarchitecturehttp://en.wikipedia.org/wiki/Microarchitecturehttp://en.wikipedia.org/wiki/Microarchitecturehttp://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=2http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=2http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=2http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=3http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=3http://en.wikipedia.org/w/index.php?title=Transistor%E2%80%93transistor_logic&action=edit&section=3http://en.wikipedia.org/wiki/Sheffer_stroke#NAND_gatehttp://en.wikipedia.org/wiki/