Introdução à Micro-Informática - PUC-Rioraul/Fundamentos/SLIDES/Internal Memory.pdf · Internal...
Transcript of Introdução à Micro-Informática - PUC-Rioraul/Fundamentos/SLIDES/Internal Memory.pdf · Internal...
16/01/2013
CD/DVD 1
Internal Memory
Raul Queiroz Feitosa
Internal Memory 2
Objective
To present a survey of semiconductor main
menory technology.
16/01/2013
CD/DVD 2
Internal Memory 3
Outline
Semiconductor Main Memory
Advanced DRAM Organization
Error Detection/Correction
Internal Memory 4 16/01/2013
Semiconductor Memory Types
Memory Type Category Erasure Write Mechanism Volatility
Random-access
memory (RAM)
Read-write
memory
Electrically, byte-
level Electrically Volatile
Read-only
memory (ROM) Read-only
memory Not possible
Masks
Nonvolatile
Programmable
ROM (PROM)
Electrically
Erasable PROM
(EPROM)
Read-mostly
memory
UV light, chip-
level
(EEPROM) Electrically, byte-
level
Flash memory Electrically, block-
level
16/01/2013
CD/DVD 3
Internal Memory 5 16/01/2013
Semiconductor Memory Types
RAM
ROM
PROM
EPROM EEPROM
E2PROM
FLASH
Internal Memory 6 16/01/2013
Memory Cell Operation
16/01/2013
CD/DVD 4
Internal Memory 7 16/01/2013
Read Only Memory (ROM)
Permanent storage
Nonvolatile
Microprogramming (see later)
Library subroutines
Systems programs (BIOS)
Function tables
Internal Memory 8 16/01/2013
Types of ROM
Written during manufacture
Very expensive for small runs
Programmable (once)
PROM
Needs special equipment to program
Read “mostly”
Erasable Programmable (EPROM)
Erased by UV
Electrically Erasable (EEPROM)
Takes much longer to write than read
Flash memory
Erase whole memory electrically
16/01/2013
CD/DVD 5
Internal Memory 9 16/01/2013
Random Access Memory - RAM
Misnamed as all semiconductor memory is random
access
Read/Write
Volatile
Temporary storage
Static or dynamic
Internal Memory 10 16/01/2013
Static RAM
Bits stored as on/off switches
No charges to leak
No refreshing needed when powered
More complex construction
Larger per bit
More expensive
Does not need refresh circuits
Faster
Cache
Digital→ Uses flip-flops
16/01/2013
CD/DVD 6
Internal Memory 11 16/01/2013
Stating RAM Structure
high low
off
off
on
on
state 1 state 1
low high
on
on
off
off
state 0
Read
value is on line B Write applies
value to B and
compliment to B
Internal Memory 12 16/01/2013
Dynamic RAM
Bits stored as charge in capacitors
Charges leak
Need refreshing even when powered
Simpler construction
Smaller per bit
Less expensive
Need refresh circuits
Slower
Main memory
Essentially analogue → Level of charge determines value
16/01/2013
CD/DVD 7
Internal Memory 13 16/01/2013
Dynamic RAM Structure
0/1 on
charge
transfered
to capacitor
Write
0/1 on
charge fed
through
line to
sensor
Read
Internal Memory 14 16/01/2013
Refreshing
Refresh circuit included on chip
Disable chip
Count through rows
Read & Write back
Takes time
Slows down apparent performance
16/01/2013
CD/DVD 8
Internal Memory 15 16/01/2013
SRAM DRAM
Both volatile
Power needed to preserve data
Dynamic cell
Simpler to build, smaller
More dense
Less expensive
Needs refresh
Larger memory units
Static
Faster
Cache
Internal Memory 16 16/01/2013
Simplified DRAM Read Timing
16/01/2013
CD/DVD 9
Internal Memory 17 16/01/2013
Typical 16 Mb DRAM (4M x 4)
Internal Memory 18 16/01/2013
Packaging
16/01/2013
CD/DVD 10
Internal Memory 19
Outline
Semiconductor Main Memory
Advanced DRAM Organization
Error Detection/Correction
Internal Memory 20 16/01/2013
Advanced DRAM Organization
Basic DRAM same since 70’s.
Enhanced DRAM
Contains small SRAM as well
SRAM holds last line read (c.f. Cache!)
Cache DRAM
Larger SRAM component
Use as cache or serial buffer
16/01/2013
CD/DVD 11
Internal Memory 21 16/01/2013
Synchronous DRAM (SDRAM)
Access is synchronized with an external clock
Address is presented to RAM
RAM finds data (CPU waits in conventional DRAM)
Since SDRAM moves data in time with system clock, CPU
knows when data will be ready
CPU does not have to wait, it can do something else
Burst mode allows SDRAM to set up stream of data and fire
it out in block
DDR-SDRAM sends data twice per clock cycle (leading &
trailing edge)
Internal Memory 22 16/01/2013
SDRAM Read Timing
16/01/2013
CD/DVD 12
Internal Memory 23 16/01/2013
DDR SDRAM
SDRAM can only send data once per clock
Double-data-rate SDRAM can send data
twice per clock cycle
Rising edge and falling edge
Internal Memory 24 16/01/2013
DDR SDRAM - Read Timing
16/01/2013
CD/DVD 13
Internal Memory 25 16/01/2013
Cache DRAM
Mitsubishi
Integrates small SRAM cache (16 kb) onto generic
DRAM chip
Used as true cache
64-bit lines
Effective for ordinary random access
To support serial access of block of data
E.g. refresh bit-mapped screen
CDRAM can prefetch data from DRAM into SRAM buffer
Subsequent accesses solely to SRAM
Internal Memory 26 16/01/2013
Error Correction
Hard Failure
Permanent defect
Soft Error
Random, non-destructive
No permanent damage to memory
Detected using Hamming error correcting
code
16/01/2013
CD/DVD 14
Internal Memory 27
Outline
Semiconductor Main Memory
Advanced DRAM Organization
Error Detection/Correction
Internal Memory 28 16/01/2013
Error Correcting Code Function