INTRODUCTION TO MOTOROLA

6800

Rabel Talpur:12BME#025

HISTORY

40-pin chip Developed by Motorola in 1975 16 address lines and 8 data lines Used only +5V

6800 ARCHITECTURE

Registers Arithmetic and Logic Unit Control Unit Program Counter Stack Pointer Status Flags

REGISTERS

ABIXPCSPCC

Accumulator AAccumulator BIndex register XProgram counterStack pointerCondition code register

ACCUMULATORS

The micro processor unit contains 2 accumulators designed ACCA and ACCB.

Each accumulators is 8 bits (one byte) long and is used to hold operands and data from the arithmetic logic unit

INDEX REGISTER

The index register (x) is a 16 bit (2 byte) register which is primarily used to store a memory address in the indexed mode of memory addressing.

The index register may be decremented, incremented and stored.

CONDITION CODE REGISTER

The condition code register is an 8 bit register. each individual bit may get set or cleared from of an instruction.

Each instruction effects the condition code register differently.

The primary use of this register is execution of the conditional branch instruction.

ARITHMETIC & LOGIC UNIT

ALU is a digital circuit that performs integer arithmetic and logical operations.

It is fundamental building block of central processing unit.

CONTROL UNIT

It is a component of central processing unit which direct the operation of processor.

It control communication and co-ordination between i/o devices.

It reads interrupts instructions and determine the sequence for processing the data.

It performs the task of fetching, decoding, managing, execution and finally storing results.

PROGRAM COUNTER

Program counter contain the address of the memory containing the next instruction to be executed.

It is incremented automatically after each instruction

In 6800, it is a 16 bits register

STACK POINTER

Used to point to the memory location where all registers will be saved when an interrupt occurs

It is a 16 bit register, contain an address of a memory

CHARACTERISTICS OF 6800

16 address wires =it can address 216 memory locations

It is an 8 bit microprocessor => 8 data bits

Speed up to 4 MHZ

Architecture

DIFFERENCE B/W 6800 & 8085

S.No 6800 8085 1 It has two

accumulatorsOnly one accumulator is present

2 Uses frequency 1 MHz

uses frequency from 3 to 5 MHz

3 It has index register

No index register is present

4 Has 3 interrupts (IRQ,NMI,SWI)

Has five interrupts (Trap, RST 7.5,RST 6.5, RST 7.5, INTR)

MICROPROCESSOR 6800

BLOCK DIAGRAM OF 6800

BLOCK DIAGRAM OF 6800

BLOCK DIAGRAM OF 6800 INTERRUPTS IRO

mask able interrupt. When the interrupt occurs the program counter, index register, accumulators and condition code registers are stored in the stack, the further interrupts are disabled and the processor jumps to memory location address of which is stored in memory FFF8h - FFF9h. To return from the interrupt the processing routine should use RTI instruction. This interrupt can be enabled/disabled using CLI/SEI instructions.

INTERRUPTSIRQ

BLOCK DIAGRAM OF 6800 NMI non-maskable interrupt. When the interrupt occurs the program counter, index register, accumulators and condition code registers are stored in the stack, the further interrupts are disabled and the processor jumps to memory location address of which is stored in memory FFFCh - FFFDh. To return from the interrupt the processing routine should use RTI instruction. This interrupt can not be disabled.

NMI

BLOCK DIAGRAM OF 6800 SWI software interrupt. This interrupt can be

only invoked from the program. When the interrupt occurs the processor stores the program counter, index register, accumulators and condition code registers in the stack, disables the further interrupts and jumps to memory location address of which is stored in memory FFFAh - FFFBh. To return from the interrupt the processing routine should use RTI instruction. This interrupt can not be disabled.

SWI

BLOCK DIAGRAM OF 6800

None.

Accumulator A (ACCA) is an 8-bit register used for arithmetic and logic operations.

Accumulator B (ACCB) is an 8-bit register used for arithmetic and logic operations.

I/O ports

REGISTERS

BLOCK DIAGRAM OF 6800 Index (IX) is a 16-bit register usually

used for temporary storage or as an index when indexed addressing is used.

Program counter (PC) is a 16-bit register. Stack pointer (SP) is a 16-bit register.

BLOCK DIAGRAM OF 6800

Condition code register contains the following flags: Half carry (H) - set if there was a carry from bit 3 to

bit 4 of the result when the result was calculated. Interrupt mask (I) - set if the IRQ interrupt is

disabled. Negative (N) - set if the most significant bit of the

result is set. Zero (Z) - set if the result is zero. Overflow (V) - set if there was an overflow during

last result calculation. Carry (C) - set if there was a carry from the bit 7

during last result calculation.

Condition code register contains the following flags:

BLOCK DIAGRAM OF 6800 Instruction Set 6800 instruction set consists of 72

instructions: Data moving instructions. Arithmetic - add, subtract, negate,

increment, decrement and compare. Logic - AND, OR, exclusive OR, complement

and shift/rotate. Control transfer - conditional, unconditional,

call subroutine and return from subroutine. Other - clear/set condition flags, bit test,

stack operations, software interrupt, etc.

BLOCK DIAGRAM OF 6800 Addressing modes Implied - the data value/data address is

implicitly associated with the instruction.

Accumulator - the instruction implies that the data is one of the accumulator registers.

Immediate - 8-bit or 16-bit data is provided in the instruction.

BLOCK DIAGRAM OF 6800

MEMORY Program, size is 64 KB. data and stack

memories occupy the same memory space. The total addressable memory .

DATA MEMORY

data can be anywhere in memory space.

MEMORY

DATA MEMORY

BLOCK DIAGRAM OF 6800

program can be located anywhere in memory. Jump and subroutine call instructions can be used to jump anywhere in memory.

PROGRAM MEMORY

BLOCK DIAGRAM OF 6800 STACK MEMORY

stack can be placed anywhere in memory space.

FFF8h - FFF9h: Pointer to IRQ interrupt-processing routine.

FFFAh - FFFBh: Pointer to software interrupt-processing routine.

STACK MEMORY

RESERVED MEMORY LOCATION

BLOCK DIAGRAM OF 6800 FFFCh - FFFDh: Pointer to NMI interrupt-

processing routine. FFFEh - FFFFh: Pointer to RESET

handling code. Some memory addresses may be

reserved for memory mapped I/O as the processor doesn't have hardware I/O capability.

INSTRUCTION SET MOTOROLA 6800

PRESENTED BY: MURK

SALEEM

12BME19

Group of instructions executed by microprocessor is called as: “INSTRUCTION SET”.

Motorola-6800 has 72 instructions.

1.ARITHMETIC INSTRUCTION

S

OPERATION OPCODE/MNEMONICS

ALL REGISTER LABELS REFER TO CONTENTS

1.Addition ADDA A+MAADDB B+MB

2.Add Accumulators

ABA A+BA

3.Add With Carry

ADCA A+M+C

4.Compliment 2`s (Negative)

NEG 00-MM

NEG A 00-AANEG B 00-BB

5.Subtract SUB A A-MASUB B B-MB

6.Subtract Accumulators

SB A A-BA

Two`s compliment arithmetic is used in “MP6800” which allow us to take the 2’s compliment of a number.

The negative instruction allows us to operate on a byte in memory without first fetching the operand from memory. In the past, we have loaded the operand, performed operation and then stored the new operand

2. DATA HANDLING INSTRUCTIONS:

OPERATION OPCODES/NMEMONICS

ALL REGISTER LABELS REFER TO CONTENTS

1.Clear CLR 00MCLR A 00ACLR B 00B

2.Decrement DEC M-1MDEC A A-1ADEC B B-1B

3.Increment INC M+1MINC A A+1AINC B B+1B

4.Load Accumulator

LDAA MA

LDAB MB5.Rotate Left ROL M

ROL A AROL B B

“CLEAR” instruction allows us to clear a memory or either accumulator. In the past, we have cleared bytes of first clearing the accumulator then storing the result in the proper memory location. However, the CLR instruction allows us to clear a memory location with a single instruction.

OPERATION OPCODES/NMEMONICS

ALL REGISTER LABELS REFER TO CONTENTS

6.Rotate Right

ROR M

ROR A A

ROR B B

7.Store Accumulator

STA A AM

STA B BM

8. Transfer Accumulator

TAB AB

TBA BA

“TRANSFER ACCUMULATOR” copies the contents of accumulator A or B. After this instruction is executed, the number originally present in any accumulator(eg: A) will be in both accumulators.

3. LOGIC INSTRUCTIONS:

OPERATION OPCODES/NMEMONICS

ALL REGISTER LABELS REFER TO CONTENTS

1. And AND A A.MA

AND B B.MB

2.Compliment,1`s COM M M

COM AA A

3.X-OR EOR A A (+) M

EOR B B (+) M

4.OR OR A A+MA

OR B B+MB

4. DATA TEST INSTRUCTIONS:

OPERATION OPCODES/ NMEMONICS ALL REGISTER LABELS REFER TO CONTENTS

1. Bit Test BIT A A.M

BIT B B.M

2.Compare CMP A A—M

CMP B B—M

3.Compare Accumulators

CBA A—B

“BIT TEST” this instruction is very similar to the AND instructions. In both cases, the contents of the specified accumulator are ANDed with the contents of the selected memory location. The difference is that with the bit test instruction no logical product is produced. Neither the contents of the accumulator nor memory are altered in any way. However condition code are affected just as if the AND operation had taken place. Consider BITA instruction, when executed, A is ANDed with M. If result is 0000, the Z register is set. Otherwise, the Z register is cleared.

5. INDEX REGISTER AND STACK POINTER

INSTRUCTIONS:

The index and stack pointer are 16-bit registers. That allow us to control the operation of these registers. Because of the 16-bit format, the load, store, and compare instructions are slightly different.

OPERATION OPRANDS/NMEMONICS

ALL REGISTER LABELS REFER TO CONTENTS

1.Compare Index Reg. CPX (/)—(M/M+1)

2.Decrement Index Register

DEX X-1X

3.Decrement Stack Pointer

DES SP-1SP

4. Increment Stack Pointer

INS SP+1SP

5.Increment Index Register

INX X+1XThe “COMPARE REGISTER” instruction allows us to compare the 16-bit number in the index register with any two consecutive bytes in memory. (as index register hold two bytes). The higher byte is defined as “” while the lower byte is defined as “”. When the CPX instruction is executed, “” is compared with 8-byte in the specified memory location (M) and “” is compared with byte immediately following the specified memory location (M+1).

6.BRANCH INSTRUCTIONS:Condition code register contains the following flags:

Half carry (H) - set if there was a carry from bit 3 to bit 4 of the result when the result was calculated.

Interrupt mask (I) - set if the IRQ interrupt is disabled.

Negative (N) - set if the most significant bit of the result is set.

Zero (Z) - set if the result is zero.

Overflow (V) - set if there was an overflow during last result calculation.

Carry (C) - set if there was a carry from the bit 7 during last result calculation.

OPERATION OPCODE/NMEMONICS

ALL REGISTER LABELS REFER TO CONTENTS

1.Branch Always BRA NONE

2.Branch If Clear BCC C=0

3.Branch If Carry Set BCS C=1

4.Branch If Minus BMI N=1

5.Branch If Plus BPL N=0

6.Branch If Over-Flow Set

BVS V=1

7.Branch If Over-Flow Clear

BVC V=0

7. CONDITION CODE REGISTER:-

The 6800 uses these instructions in order to direct access the condition codes.

OPERATION OPCODES/ NMEMONICS ALL REGISTER LABELS REFER TO CONTENTS

1.Clear Carry CLC 0C

2.Clear Interrupt Mask CLI 0I

3.Clear Over-Flow CLV 0V

4.Set Carry SEC 1C

5.Set Interrupt Mask SEI 1I

6.Set Over-Flow SEV 1V