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Transcript of Instruction set class
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Instruction Set
• Prof. Rajesh R.K.• Assistant Professor,• Department of MCA• Mohandas College of Engineering &
Technology, Thiruvananthapuram, Kerala
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Instruction
• An instruction is a binary pattern designed inside a microprocessor to perform a specific function.
• 8085 has 246 instructions.
• Each instruction is represented by an 8-bit binary value.
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1. Introduction
• A microprocessor executes instructions given by the user
• Instructions should be in a language known to the microprocessor
• Microprocessor understands the language of 0’s and 1’s only
• This language is called Machine Language
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Assembly language program to add two numbers
MVI A, 2H ;Copy value 2H in register A
MVI B, 4H ;Copy value 4H in register B
ADD B ;A = A + B
Note:• Assembly language is specific to a given processor• For e.g. assembly language of 8085 is different than
that of Motorola 6800 microprocessor
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Microprocessor understands Machine Language only!
• Microprocessor cannot understand a program written in Assembly language
• A program known as Assembler is used to convert a Assembly language program to machine language
AssemblyLanguageProgram
AssemblerProgram
Machine Language
Code
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8085 Instruction Types
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8085 Instruction Types
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8085 Instruction Types
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Classification Of Instruction Set
• There are 5 Types,
• (1) Data Transfer Instruction,• (2) Arithmetic Instructions,• (3) Logical Instructions,• (4) Branching Instructions,• (5) Control Instructions,
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(1) Data Transfer Instructions
• MOV Rd, Rs• MOV M, Rs• MOV Rd, M• This instruction copies the contents of the
source register into the destination register.• The contents of the source register are not
altered.• Example: MOV B,A or MOV M,B or MOV C,M
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A 20 B 20
A F
B 30 C
D E
H 20 L 50
A 20 B
BEFORE EXECUTION AFTER EXECUTION
MOV B,A
A F
B 30 C
D E
H 20 L 50
A F
B C
D E
H 20 L 50
A F
B C 40
D E
H 20 L 50
MOV M,B
MOV C,M
40 40
30
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• MVI R, Data(8-bit)• MVI M, Data(8-bit)
• The 8-bit immediate data is stored in the destination register (R) or memory (M), R is general purpose 8 bit register such as A,B,C,D,E,H and L.
• Example: MVI B, 60H or MVI M, 40H
(2) Data Transfer Instructions
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A F
B C
D E
H L
A F
B 60 C
D E
H L
AFTER EXECUTIONBEFORE EXECUTION
MVI B,60H
40HL=2050H
2051H
204FH 204FH
HL=2050H
2051H
MVI M,40H
BEFORE EXECUTION AFTER EXECUTION
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• LDA 16-bit address
• The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator (A).
• The contents of the source are not altered.
• Example: LDA 2000H
(3) Data Transfer Instructions
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A
30
A 30
30
AFTER EXECUTIONBEFORE EXECUTION
LDA 2000H2000H 2000H
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(4) Data Transfer Instructions
• LDAX Register Pair• Load accumulator (A) with the contents of
memory location whose address is specified by BC or DE or register pair.
• The contents of either the register pair or the memory location are not altered.
• Example: LDAX D
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A F
B C
D 20 E 30
A 80 F
B C
D 20 E 30
80 80
AFTER EXECUTIONBEFORE EXECUTION
LDAX D2030H 2030H
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(5) Data Transfer Instructions
• STA 16-bit address
• The contents of accumulator are copied into the memory location i.e. address specified by the operand in the instruction.
• Example: STA 2000 H
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A 50 A 50
50
AFTER EXECUTIONBEFORE EXECUTION
STA 2000H2000H 2000H
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(6) Data Transfer Instructions
• STAX Register Pair
• Store the contents of accumulator (A) into the memory location whose address is specified by BC Or DE register pair.
• Example: STAX B
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A 50 F
B 10 C 20
D E
A 50 F
B 10 C 20
D E
50
AFTER EXECUTIONBEFORE EXECUTION
STAX B1020H 1020H
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• LHLD 2050 Means..copy content of 2050 and 2051 to HL pair
if 2050 -> 90H2051->5AH
LHLD 2050 implies..L -> 90HH -> 5AH
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•LXI means..Load Register Pair with Immediate data.. 16bit data
LXI B ,2050HLoads BC pair with value 2050HB-> 20HC-> 50H
Its similar to 2 MVI instructionie MVI B,20HMVI C,50H
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(7) Data Transfer Instructions
• SHLD 16-bit address
• Store H-L register pair in memory. • The contents of register L are stored into
memory location specified by the 16-bit address.
• The contents of register H are stored into the next memory location.
• Example: SHLD 2500 H
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H 30 L 60
BEFORE EXECUTION AFTER EXECUTION
60
30
H 30 L 60
SHLD 2500H2500H 2500H
204FH
2502H
204FH
2502H
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(8) Data Transfer Instructions
• XCHG
• The contents of register H are exchanged with the contents of register D.
• The contents of register L are exchanged with the contents of register E.
• Example: XCHG
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D 20 E 40
H 70 L 80
D 70 E 80
H 20 L 40
BEFORE EXECUTION AFTER EXECUTION
XCHG
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(9) Data Transfer Instructions
• SPHL
• Move data from H-L pair to the Stack Pointer (SP)
• This instruction loads the contents of H-L pair into SP.
• Example: SPHL
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H 25 L 00
SP
BEFORE EXECUTION
AFTER EXECUTION
H 25 L 00
SP 2500
SPHL
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(10) Data Transfer Instructions
• XTHL• Exchange H–L with top of stack• The contents of L register are exchanged with
the location pointed out by the contents of the SP.
• The contents of H register are exchanged with the next location (SP + 1).
• Example: XTHL
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H 30
L 40
SP 2700
BEFORE EXECUTION
50
60H
60L
50
SP 2700 40
30
AFTER EXECUTION
XTHL
2700H
2701H
2702H
2700H
2701H
2702H
L=SPH=(SP+1)
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(11) Data Transfer Instructions
• PCHL
• Load program counter with H-L contents• The contents of registers H and L are copied into
the program counter (PC).• The contents of H are placed as the high-order
byte and the contents of L as the low-order byte.
• Example: PCHL
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H 60
L 00
PC
BEFORE EXECUTION AFTER EXECUTION
H 60
L 00
PC 6000
PCHL
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(12) Data Transfer Instructions
• IN 8-bit port address
• Copy data to accumulator from a port with 8-bit address.
• The contents of I/O port are copied into accumulator.
• Example: IN 80 H
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10 A
10 A 10
BEFORE EXECUTION
AFTER EXECUTION
IN 80H
PORT 80H
PORT 80H
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(13) Data Transfer Instructions
• OUT 8-bit port address
• Copy data from accumulator to a port with 8-bit address
• The contents of accumulator are copied into the I/O port.
• Example: OUT 50 H
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10 A 40
40 A 40
BEFORE EXECUTION
AFTER EXECUTION
OUT 50H
PORT 50H
PORT 50H
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Arithmetic Instructions• These instructions perform the operations
like:
• Addition• Subtraction• Increment• Decrement
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(1) Arithematic Instructions
• ADD R • ADD M
• The contents of register or memory are added to the contents of accumulator.
• The result is stored in accumulator.• If the operand is memory location, its address is
specified by H-L pair.
• Example: ADD C or ADD M
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B C 30
D E
H L
B C 30
D E
H L
AFTER EXECUTIONBEFORE EXECUTION
B C
D E
H 20 L 50
B C
D E
H 20 L 50
AFTER EXECUTIONBEFORE EXECUTION
A 20
A 50A 20
A 30
ADD C A=A+R
ADD MA=A+M
10 10
2050 2050
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(2) Arithematic Instructions
• ADC R• ADC M
• The contents of register or memory and Carry Flag (CY) are added to the contents of accumulator.
• The result is stored in accumulator.• If the operand is memory location, its address is
specified by H-L pair. All flags are modified to reflect the result of the addition.
• Example: ADC C or ADC M
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B C 20
D E
H L
A 50
B C 20
D E
H L
A 71
AFTER EXECUTIONBEFORE EXECUTION
ADC CA=A+R+CY
CY 1 CY 0
CY 1 CY 0
A 20 A 51
H 20 L 50 H 20 L 50
ADC MA=A+M+CY
AFTER EXECUTIONBEFORE EXECUTION
30 302050H 2050H
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(3) Arithematic Instructions
• ADI 8-bit data
• The 8-bit data is added to the contents of accumulator.
• The result is stored in accumulator.
• Example: ADI 10 H
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A 50 A 60
AFTER EXECUTIONBEFORE EXECUTION
ADI 10HA=A+DATA(8)
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(4) Arithematic Instructions
• ACI 8-bit data
• The 8-bit data and the Carry Flag (CY) are added to the contents of accumulator.
• The result is stored in accumulator.
• Example: ACI 20 H
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CY 1 CY 0
A 30 A 51
AFTER EXECUTIONBEFORE EXECUTION
ACI 20HA=A+DATA(8)+CY
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(5) Arithematic Instructions
• DAD Register pair
• The 16-bit contents of the register pair are added to the contents of H-L pair.
• The result is stored in H-L pair.• If the result is larger than 16 bits, then CY is
set.
• Example: DAD D
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AFTER EXECUTIONBEFORE EXECUTION
B C
D 10 E 20
H 20 L 50
SP
B C
D 10 E 20
H 30 L 70
SP
CY 0 CY 0
DAD DHL=HL+R
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(6) Arithematic Instructions
• SUB R• SUB M
• The contents of the register or memory location are subtracted from the contents of the accumulator.
• The result is stored in accumulator.• If the operand is memory location, its address is
specified by H-L pair.
• Example: SUB B or SUB M
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B 30 C
D E
H L
A 50
B 30 C
D E
H L
A 20
AFTER EXECUTIONBEFORE EXECUTION
SUB BA=A-R
AFTER EXECUTIONBEFORE EXECUTION
A 50 A 40
H 10
L 20
H 10
L 20
SUB M A=A-M
10 101020H1020H
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(7) Arithematic Instructions
• SBB R• SBB M
• The contents of the register or memory location and Borrow Flag (i.e.CY) are subtracted from the contents of the accumulator.
• The result is stored in accumulator.• If the operand is memory location, its address is specified
by H-L pair.
• Example: SBB C or SBB M
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B C 20
D E
H L
A 40
CY 1
B C 20
D E
H L
A 19
CY 0
SBB CA=A-R-CY
AFTER EXECUTIONBEFORE EXECUTION
CY 1
A 50
H 20
L 50
CY 0
A 39
H 20
L 50
AFTER EXECUTIONBEFORE EXECUTION
SBB MA=A-M-CY
10 102050H 2050H
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(8) Arithematic Instructions
• SUI 8-bit data
• OPERATION: A=A-DATA(8)• The 8-bit immediate data is subtracted from
the contents of the accumulator.• The result is stored in accumulator.
• Example: SUI 45 H
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(9) Arithematic Instructions
• SBI 8-bit data
• The 8-bit data and the Borrow Flag (i.e. CY) is subtracted from the contents of the accumulator.
• The result is stored in accumulator.
• Example: SBI 20 H
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CY 1
A 50
AFTER EXECUTIONBEFORE EXECUTION
CY 0
A 29SBI 20HA=A-DATA(8)-CY
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(10) Arithematic Instructions
• INR R• INR M
• The contents of register or memory location are incremented by 1.
• The result is stored in the same place.• If the operand is a memory location, its address
is specified by the contents of H-L pair.
• Example: INR B or INR M
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B 10 C
D E
H L
A
B 11 C
D E
H L
A
AFTER EXECUTIONBEFORE EXECUTION
H 20
L 50
H 20
L 50
30 312050H 2050H
AFTER EXECUTIONBEFORE EXECUTION
INR MM=M+1
B 10 C
D E
H L
A
BEFORE EXECUTION
INR BR=R+1
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(11) Arithematic Instructions
• INX Rp
• The contents of register pair are incremented by 1.
• The result is stored in the same place.
• Example: INX H
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B C
D E
H 10 L 20
B C
D E
H 11 L 21
AFTER EXECUTIONBEFORE EXECUTION
SPSP
INX HRP=RP+1
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(12) Arithematic Instructions
• DCR R• DCR M
• The contents of register or memory location are decremented by 1.
• The result is stored in the same place.• If the operand is a memory location, its address
is specified by the contents of H-L pair.• Example: DCR E or DCR M
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B C
D E 19
H L
A
AFTER EXECUTION
B C
D E 20
H L
A
BEFORE EXECUTION
DCR ER=R-1
H 20
L 50
H 20
L 5021 20
2050H
AFTER EXECUTIONBEFORE EXECUTION
DCR MM=M-1
2050H
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(13) Arithematic Instructions
• DCX Rp
• The contents of register pair are decremented by 1.
• The result is stored in the same place.
• Example: DCX D
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B C
D 10 E 20
H L
B C
D 10 E 19
H L
AFTER EXECUTIONBEFORE EXECUTION
SPSP
DCX DRP=RP-1
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(1) Logical Instructions
• ANA R• ANA M
• AND specified data in register or memory with accumulator.
• Store the result in accumulator (A).
• Example: ANA B, ANA M
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B 10 C
D E
H L
A
B 0F C
D E
H L
A 0A
AFTER EXECUTION
ANA BA=A and R
B 0F C
D E
H L
A AA
BEFORE EXECUTION
CY
AC
CY 0
AC 1
AFTER EXECUTIONBEFORE EXECUTION
CY
AC
CY 0
AC 1
A 11A 55
H 20
L 50
H 20
L 50
B3 B32050H
ANA MA=A and M
2050H
1010 1010=AAH0000 1111=0FH
0000 1010=0AH
0101 0101=55H1011 0011=B3H
0001 0001=11H
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(2) Logical Instructions
• ANI 8-bit data
• AND 8-bit data with accumulator (A).• Store the result in accumulator (A)
• Example: ANI 3FH
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CY
AC
A B3
AFTER EXECUTIONBEFORE EXECUTION
CY 0
AC 1
A 33
ANI 3FHA=A and DATA(8)
1011 0011=B3H0011 1111=3FH
0011 0011=33H
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(3) Logical Instructions
• XRA Register (8-bit)
• XOR specified register with accumulator.• Store the result in accumulator.
• Example: XRA C
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B 10 C
D E
H L
A
B C 2D
D E
H L
A 87
AFTER EXECUTION
XRA CA=A xor R
B C 2D
D E
H L
A AA
BEFORE EXECUTION
CY
AC
CY 0
AC 0
1010 1010=AAH0010 1101=2DH
1000 0111=87H
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(4) Logical Instructions
• XRA M
• XOR data in memory (memory location pointed by H-L pair) with Accumulator.
• Store the result in Accumulator.
• Example: XRA M
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H 20 L 50
A 55
AFTER EXECUTION
XRA MA=A xor M
BEFORE EXECUTION
CY
AC
CY 0
AC 0
0101 0101=55H1011 0011=B3H
1110 0110=E6H
H 20 L 50
A E6B3 B32050H 2050H
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(5) Logical Instructions
• XRI 8-bit data
• XOR 8-bit immediate data with accumulator (A).• Store the result in accumulator.
• Example: XRI 39H
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CY
AC
A B3
AFTER EXECUTIONBEFORE EXECUTION
CY 0
AC 0
A 8A
XRI 39HA=A xor DATA(8)
1011 0011=B3H0011 1001=39H
1000 1010=8AH
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(6) Logical Instructions
• ORA Register
• OR specified register with accumulator (A).• Store the result in accumulator.
• Example: ORA B
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AFTER EXECUTIONBEFORE EXECUTION
CY
AC
ORA BA=A or R
1010 1010=AAH0001 0010=12H
1011 1010=BAH
B 12 C
D E
H L
A AA
B 12 C
D E
H L
A BA
CY 0
AC 0
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(7) Logical Instructions
• ORA M
• OR specified register with accumulator (A).• Store the result in accumulator.
• Example: ORA M
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AFTER EXECUTIONBEFORE EXECUTION
CY
AC
ORA MA=A or M
0101 0101=55H1011 0011=B3H
1111 0111=F7H
H 20 L 50
A 55 A F7
CY 0
AC 0
H 20 L 50
B3 B32050H 2050H
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(8) Logical Instructions
• ORI 8-bit data
• OR 8-bit data with accumulator (A).• Store the result in accumulator.
• Example: ORI 08H
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CY
AC
A B3
AFTER EXECUTIONBEFORE EXECUTION
CY 0
AC 0
A BB
ORI 08HA=A or DATA(8)
1011 0011=B3H0000 1000=08H
1011 1011=BBH
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(9) Logical Instructions
• CMP Register• CMP M
• Compare specified data in register or memory with accumulator (A).
• Store the result in accumulator.
• Example: CMP D or CMP M
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B 10 C
D E
H L
A
B C
D B9 E
H L
A B8
AFTER EXECUTION
CMP DA-R
B C
D B9 E
H L
A B8
BEFORE EXECUTION
CY
Z
CY 0
Z 0
AFTER EXECUTIONBEFORE EXECUTION
CY
Z
CY 0
Z 1
A B8A B8
H 20
L 50
H 20
L 50
B8 B82050H CMP M
A-M
2050H
A>R: CY=0,Z=0A=R: CY=0,Z=1A<R: CY=1,Z=0
A>M: CY=0,Z=0A=M: CY=0,Z=1A<M: CY=1,Z=0
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(10) Logical Instructions
• CPI 8-bit data
• Compare 8-bit immediate data with accumulator (A).
• Store the result in accumulator.
• Example: CPI 30H
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CY
Z
A BA
AFTER EXECUTIONBEFORE EXECUTION
CY 0
AC 0
A BA
CPI 30HA-DATA
A>DATA: CY=0,Z=0A=DATA: CY=0,Z=1A<DATA: CY=1,Z=0
1011 1010=BAH
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(11) Logical Instructions
• STC
• It sets the carry flag to 1.• Example: STC
![Page 85: Instruction set class](https://reader030.fdocuments.us/reader030/viewer/2022021500/5a65f4587f8b9a6f448b4bd7/html5/thumbnails/85.jpg)
CY 0
AFTER EXECUTIONBEFORE EXECUTION
CY 1
STCCY=1
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(12) Logical Instructions
• CMC
• It complements the carry flag.• Example: CMC
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CY 1
AFTER EXECUTIONBEFORE EXECUTION
CY 0
CMC
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(13) Logical Instructions
• CMA
• It complements each bit of the accumulator.• Example: CMA
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(14) Logical Instructions
• RLC
• Rotate accumulator left• Each binary bit of the accumulator is rotated left
by one position.• Bit D7 is placed in the position of D0 as well as
in the Carry flag.• CY is modified according to bit D7.
• Example: RLC.
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B7 B6 B5 B4 B3 B2 B1 B0CY
B6 B5 B4 B3 B2 B1 B0 B7B7
AFTER EXECUTION
BEFORE EXECUTION
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(15) Logical Instructions
• RRC
• Rotate accumulator right• Each binary bit of the accumulator is rotated right by
one• position.• Bit D0 is placed in the position of D7 as well as in the
Carry flag.• CY is modified according to bit D0.
• Example: RRC.
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B7 B6 B5 B4 B3 B2 B1 B0 CY
B0 B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
BEFORE EXECUTION
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(16) Logical Instructions
• RAL
• Rotate accumulator left through carry• Each binary bit of the accumulator is rotated left
by one position through the Carry flag.• Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0.• CY is modified according to bit D7.
• Example: RAL.
![Page 94: Instruction set class](https://reader030.fdocuments.us/reader030/viewer/2022021500/5a65f4587f8b9a6f448b4bd7/html5/thumbnails/94.jpg)
B7 B6 B5 B4 B3 B2 B1 B0CY
B6 B5 B4 B3 B2 B1 B0 CYB7
AFTER EXECUTION
BEFORE EXECUTION
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(17) Logical Instructions
• RAR
• Rotate accumulator right through carry• Each binary bit of the accumulator is rotated left
by one position through the Carry flag.• Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0.• CY is modified according to bit D7.
• Example: RAR
![Page 96: Instruction set class](https://reader030.fdocuments.us/reader030/viewer/2022021500/5a65f4587f8b9a6f448b4bd7/html5/thumbnails/96.jpg)
B7 B6 B5 B4 B3 B2 B1 B0 CY
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
BEFORE EXECUTION
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Concept of Subroutine
• In 8085 microprocessor a subroutine is a separate program written aside from main program ,this program is basically the program which requires to be executed several times in the main program.
• The microprocessor can call subroutine any time using CALL instruction. after the subroutine is executed the subroutine hands over the program to main program using RET instruction.
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Branching Instructions
• The branch group instructions allows the microprocessor to change the sequence of program either conditionally or under certain test conditions. The group includes,
• (1) Jump instructions,• (2) Call and Return instructions,• (3) Restart instructions,
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(1) Branching Instructions
• JUMP ADDRESS
• BEFORE EXECUTION AFTER EXECUTION
• Jump unconditionally to the address.• The instruction loads the PC with the address
given within the instruction and resumes the program execution from specified location.
• Example: JMP 200H
PC PC 2000JMP 2000H
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Conditional Jumps
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(2) Branching Instructions
• CALL address
• Call unconditionally a subroutine whose starting address given within the instruction and used to transfer program control to a subprogram or subroutine.
• Example: CALL 2000H
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Conditional CallsInstruction Code Description Condition for CALL
CC Call on carry CY=1
CNC Call on not carry CY=0
CP Call on positive S=0
CM Call on minus S=1
CPE Call on parity even P=1
CPO Call on parity odd P=0
CZ Call on zero Z=1
CNZ Call on not zero Z=0
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(3) Branching Instructions
• RET
• Return from the subroutine unconditionally.• This instruction takes return address from
the stack and loads the program counter with this address.
• Example: RET
![Page 104: Instruction set class](https://reader030.fdocuments.us/reader030/viewer/2022021500/5a65f4587f8b9a6f448b4bd7/html5/thumbnails/104.jpg)
SP 27FD
PC
00
62
SP 27FF
PC 6200
00
62
AFTER EXECUTIONBEFORE EXECUTION
RET27FFH
27FEH
27FDH
27FFH
27FEH
27FDH
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(4) Branching Instructions
• RST n
• Restart n (0 to 7)• This instruction transfers the program
control to a specific memory address. The processor multiplies the RST number by 8 to calculate the vector address.
• Example: RST 6
![Page 106: Instruction set class](https://reader030.fdocuments.us/reader030/viewer/2022021500/5a65f4587f8b9a6f448b4bd7/html5/thumbnails/106.jpg)
SP 3000
PC 2000
SP 2999
PC 0030
01
20
AFTER EXECUTIONBEFORE EXECUTION
RST 6
3000H
2FFFH
2FFEH
SP-1
ADDRESS OF THE NEXT INSTRUCTION IS 2001H
3000H
2FFFH
2FFEH
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Vector Address For Return Instructions
Instruction Code Vector Address
RST 0 0*8=0000H
RST 1 0*8=0008H
RST 2 0*8=0010H
RST 3 0*8=0018H
RST 4 0*8=0020H
RST 5 0*8=0028H
RST 6 0*8=0030H
Rst 7 0*8=0038H
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(1) Control Instructions
• NOP
• No operation• No operation is performed.• The instruction is fetched and decoded but no
operation is executed.
• Example: NOP
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(2) Control Instructions
• HLT
• Halt• The CPU finishes executing the current
instruction and halts any further execution.• An interrupt or reset is necessary to exit from
the halt state.
• Example: HLT
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(3) Control Instructions
• RIM
• Read Interrupt Mask• This is a multipurpose instruction used to read the
status of interrupts 7.5, 6.5, 5.5 and read serial data input bit.
• The instruction loads eight bits in the accumulator with the following interpretations.
• Example: RIM
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RIM INSTRUCTIONRIM INSTRUCTION
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• SIM
• Set Interrupt Mask• This is a multipurpose instruction and used to
implement the 8085 interrupts 7.5, 6.5, 5.5, and serial data output.
• The instruction interprets the accumulator contents as follows.
• Example: SIM
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SIM Instruction
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END OF INSTRUCTION SET
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